RT6242A/B

®
RT6242A/B
12A, 18V, 500kHz, ACOTTM Synchronous Step-Down Converter
General Description
Features
The RT6242A/B is a synchronous step-down converter
with Advanced Constant On-Time (ACOTTM) mode control.

4.5V to 18V Input Voltage Range

12A Output Current
Ω
12mΩ
Ω Internal High-Side N-MOSFET and 5.4mΩ
Internal Low-Side N-MOSFET
Advanced Constant On-Time Control
Fast Transient Response
Support All Ceramic Capacitors
Up to 95% Efficiency
Adjustable Switching Frequency from 300kHz to
700kHz
Adjustable Output Voltage from 0.7V to 8V
Adjustable Soft-Start
Pre-bias Start-Up
Adjustable Current Limit from 6A to 15A
Cycle-by-Cycle Over Current Protection
Power Good Output
Input Under-Voltage Lockout
Hiccup Mode Under-Voltage Protection
Thermal Shutdown Protection
TM
The ACOT provides a very fast transient response with
few external components. The low impedance internal
MOSFET supports high efficiency operation with wide
input voltage range from 4.5V to 18V. The proprietary circuit
of the RT6242A/B enables to support all ceramic
capacitors. The output voltage can be adjustable between
0.7V and 8V. The soft-start is adjustable by an external
capacitor.



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
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Ordering Information

RT6242A/B

Package Type
QUF : UQFN-16JL 3x3 (U-Type) (FC)

Lead Plating System
G : Green (Halogen Free and Pb Free)

UVP Option
H : Hiccup Mode UVP
L : Latched OVP & UVP

A : PSM
B : PWM
Applications


Richtek products are :
RoHS compliant and compatible with the current requirements of IPC/JEDEC J-STD-020.



Note :


Suitable for use in SnPb or Pb-free soldering processes.



Industrial and Commercial Low Power Systems
Computer Peripherals
LCD Monitors and TVs
Green Electronics/Appliances
Point of Load Regulation for High-Performance DSPs,
FPGAs, and ASICs
Simplified Application Circuit
VIN
RT6242A/B
SW
VIN
VOUT
BOOT
EN Signal
Power Good
EN
Copyright © 2015 Richtek Technology Corporation. All rights reserved.
DS6242A/B-00 August 2015
FB
RT
PGOOD
RLIM
PVCC
SS GND
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1
RT6242A/B
Pin Configurations
Marking Information
RT6242AHGQUF
RLIM
EN
SW
SW
(TOP VIEW)
16
15
14
13
7D= : Product Code
SW
PVCC
3
10
SW
RT
4
9
BOOT
5
6
7
8
PGOOD
SW
11
GND
12
2
SS
1
FB
VIN
AGND
UQFN-16JL 3x3 (FC)
7D=YM
DNN
YMDNN : Date Code
RT6242ALGQUF
7C= : Product Code
7C=YM
DNN
YMDNN : Date Code
RT6242BHGQUF
78= : Product Code
78=YM
DNN
YMDNN : Date Code
RT6242BLGQUF
75= : Product Code
75=YM
DNN
YMDNN : Date Code
Functional Pin Description
Pin No.
Pin Name
Pin Function
1
AGND
Analog Ground.
2
FB
Feedback Voltage Input. It is used to regulate the output of the converter to a set
value via an external resistive voltage divider. The feedback reference voltage is
0.7V typically.
3
PVCC
Internal Regulator Output. Connect a 1F capacitor to GND to stabilize output
voltage.
4
RT
An External Timing Resistor Adjusts the Switching Frequency of the Device.
5
SS
Soft-Start Time Setting. An external capacitor should be connected between this
pin and GND.
6
VIN
Power Input. The input voltage range is from 4.5V to 18V. Must bypass with a
suitably large (10F x 2) ceramic capacitor.
7
GND
Ground.
8
PGOOD
Power Good Indicator Open-Drain Output.
9
BOOT
Bootstrap. This capacitor is needed to drive the power switch's gate above the
supply voltage. It is connected between SW and BOOT pins to form a floating
supply across the power switch driver. A 0.1F capacitor is recommended for use.
10 to 14
SW
Switch Node. Connect this pin to an external L-C filter.
15
EN
16
RLIM
Enable Control Input. A logic-high enables the converter; a logic-low forces the IC
into shutdown mode reducing the supply current to less than 10A.
An External Resistor Adjusts the Current Limit of the Device.
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RT6242A/B
Function Block Diagram
BOOT
PVCC
EN
POR &
Reg
VBIAS
Min.
Off-Time
PVCC
VIN
VREF
OC
UGATE
Control
Driver
SW
LGATE
UV & OV
PVCC
6µA
SS
GND
Ripple
Gen.
FB
VIN
+
Comparator
ZC
Comparator
FB
+
0.8 VREF
-
PGOOD
On-Time
Operation
The RT6242A/B is a synchronous step-down converter
with advanced Constant On-Time control mode. Using the
ACOTTM control mode can reduce the output capacitance
and fast transient response. It can minimize the component
size without additional external compensation network.
Current Protection
The inductor current is monitored via the internal switches
cycle-by-cycle. Once the output voltage drops under UV
threshold, the RT6242A/B will enter hiccup mode.
UVLO Protection
Power Good
After soft-start has finished, the power good function will
be activated. The PGOOD pin is an open-drain output. If
the FB voltage is lower than 85% VREF, the PGOOD pin
will be pulled low.
To protect the chip from operating at insufficient supply
voltage, the UVLO is needed. When the input voltage of
VIN is lower than the UVLO falling threshold voltage, the
device will be lockout.
Thermal Shutdown
PVCC
The regulator provides 5V power to supply the internal
control circuit. 1μF ceramic capacitor for decoupling and
stability is required.
Soft-Start
When the junction temperature exceeds the OTP
threshold value, the IC will shut down the switching
operation. Once the junction temperature cools down and
is lower than the OTP lower threshold, the converter will
autocratically resume switching.
In order to prevent the converter output voltage from
overshooting during the startup period, the soft-start
function is necessary. The soft-start time is adjustable
by an external capacitor.
Copyright © 2015 Richtek Technology Corporation. All rights reserved.
DS6242A/B-00 August 2015
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3
RT6242A/B
Absolute Maximum Ratings











(Note 1)
Supply Voltage, VIN -----------------------------------------------------------------------------------------------Switch Voltage, SW -----------------------------------------------------------------------------------------------BOOT to SW --------------------------------------------------------------------------------------------------------EN to GND ------------------------------------------------------------------------------------------------------------Other Pins Voltage -------------------------------------------------------------------------------------------------Power Dissipation, PD @ TA = 25°C
UQFN-16JL 3x3 (FC) ----------------------------------------------------------------------------------------------Package Thermal Resistance (Note 2)
UQFN-16JL 3x3 (FC), θJA -----------------------------------------------------------------------------------------Junction Temperature Range -------------------------------------------------------------------------------------Lead Temperature (Soldering, 10 sec.) ------------------------------------------------------------------------Storage Temperature Range -------------------------------------------------------------------------------------ESD Susceptibility (Note 3)
HBM (Human Body Mode) ----------------------------------------------------------------------------------------
Recommended Operating Conditions



−0.3V to 20V
−0.3V to (VIN + 0.3V)
−0.3V to 6V
−0.3V to 6V
−0.3V to 6V
1.47W
68°C/W
150°C
260°C
−65°C to 150°C
2kV
(Note 4)
Supply Voltage, VIN ------------------------------------------------------------------------------------------------ 4.5V to 18V
Junction Temperature Range -------------------------------------------------------------------------------------- −40°C to 125°C
Ambient Temperature Range -------------------------------------------------------------------------------------- −40°C to 85°C
Electrical Characteristics
(VIN = 12V, TA = 25°C, unless otherwise specified)
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
Supply Current
Shutdown Current
ISHDN
VEN = 0V
--
1.5
10
A
Quiescent Current
IQ
VEN = 2V, VFB = 1V
--
0.8
1.2
mA
Logic-High
1.1
1.2
1.3
Hysteresis
--
0.2
--
Logic Threshold
EN Voltage
V
VREF Voltage
Feedback Threshold Voltage
VREF
4.5V  VIN  18V
0.693
0.7
0.707
V
Feedback Input Current
IFB
VFB = 0.71V
0.1
--
0.1
A
VPVCC
6V  VIN  18V, 0 < IPVCC  5mA
--
5
--
V
Line Regulation
6V  VIN  18V, IPVCC = 5mA
--
--
20
mV
Load Regulation
0  IPVCC  5mA
--
--
100
mV
VIN = 6V, VPVCC = 4V
--
150
--
mA
PVCC Output
PVCC Output Voltage
Output Current
IPVCC
RDS(ON)
Switch
On-Resistance
High-Side
RDS(ON)_H
--
12
--
Low-Side
RDS(ON)_L
--
5.5
--
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RT6242A/B
Parameter
Symbol
Test Conditions
Min
Typ
Max
Unit
13
16
--
A
--
150
--
C
--
200
--
ns
Current Limit
Current Limit
ILIM
RLIM = 66k
Thermal Shutdown
Thermal Shutdown Threshold
TSD
On-Time Timer Control
VIN = 12V, VOUT = 1.05V,
RRT = 150k
On-Time
tON
Minimum On-Time
tON(MIN)
--
60
--
ns
Minimum Off-Time
tOFF(MIN)
--
230
--
ns
VSS = 0V
5
6
7
A
Wake Up VIN
4
4.2
4.4
--
0.5
--
FB Rising
85
90
95
FB Falling
--
80
--
PGOOD = 0.1V
10
20
--
mA
115
120
125
%
OVP Propogation Delay
--
10
--
s
UVP Threshold
55
60
65
%
UVP Hysteresis
--
17
--
%
UVP Propogation Delay
--
250
--
s
RRT = 106k
600
700
800
RRT = 150k
430
500
570
RRT = 250k
250
300
350
Soft-Start
SS Charge Current
UVLO
UVLO Threshold
Hysteresis
V
Power Good
PGOOD Threshold
PGOOD Sink Current
%
OVP and UVP Protection
OVP Threshold
Switching Frequency
FS
kHz
Note 1. Stresses beyond those listed “Absolute Maximum Ratings” may cause permanent damage to the device. These are
stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in
the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions may
affect device reliability.
Note 2. θJA is measured at TA = 25°C on a high effective thermal conductivity four-layer test board per JEDEC 51-7.
Note 3. Devices are ESD sensitive. Handling precaution is recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.
Copyright © 2015 Richtek Technology Corporation. All rights reserved.
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RT6242A/B
Typical Application Circuit
VIN
C1
10µF x 2
C2
0.1µF
8 PGOOD
15
Enable
5
C5
10nF
BOOT
FB 2
SS
PVCC 3
AGND
1
C6
0.1µF
9
EN
16 RLIM
RLIM
L1
1µH
RT6242A/B
10 to 14
6 VIN
SW
C4
1µF
VOUT
1.4V/12A
C3
VPVCC
R1
20k
C7
22µF x 3
R2
20k
RT 4
GND
7
RT
RLIM = 172k, OCP typical 6A
RLIM = 94k, OCP typical 11.4A
RLIM = 80k, OCP typical 13.3A
RLIM = 66k, OCP typical 16A
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RT6242A/B
Typical Operating Characteristics
Efficiency vs. Output Current
100
Efficiency vs. Output Current
100
RT6242A
90
80
80
70
VIN = 6V
VIN = 12V
VIN = 17V
60
50
Efficiency (%)
Efficiency (%)
RT6242B
90
40
30
20
VIN = 6V
VIN = 12V
VIN = 17V
70
60
50
40
30
20
10
10
VOUT = 1.2V, FS = 500kHz, L = 1μH
0
0.01
0.1
1
10
VOUT = 1.2V, FS = 500kHz, L = 1μH
0
100
0
1
2
3
Output Current (A)
8
9
10
RT6242B
1.28
1.26
Output Voltage (V)
Output Voltage (V)
7
Output Voltage vs. Input Voltage
1.26
1.24
1.22
IOUT = 0A
IOUT = 6A
IOUT = 9A
1.20
1.18
1.16
1.14
1.24
1.22
1.20
IOUT = 0A
IOUT = 6A
IOUT = 9A
1.18
1.16
1.14
1.12
1.12
VOUT = 1.2V
1.10
VOUT = 1.2V
1.10
4
6
8
10
12
14
16
18
4
6
8
10
Input Voltage (V)
12
14
16
18
Input Voltage (V)
Output Voltage vs. Output Current
1.30
Output Voltage vs. Output Current
1.30
RT6242A
1.28
RT6242B
1.28
1.26
1.26
Output Voltage (V)
Output Voltage (V)
6
1.30
RT6242A
1.28
5
Output Current (A)
Output Voltage vs. Input Voltage
1.30
4
1.24
1.22
VIN = 17V
VIN = 12V
VIN = 6V
1.20
1.18
1.16
1.14
1.24
1.22
1.20
VIN = 17V
VIN = 12V
VIN = 6V
1.18
1.16
1.14
1.12
VOUT = 1.2V
1.10
0
1
2
3
4
5
6
7
8
Output Current (A)
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DS6242A/B-00 August 2015
9
10
1.12
VOUT = 1.2V
1.10
0
1
2
3
4
5
6
7
8
9
10
Output Current (A)
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RT6242A/B
Frequency vs. Temperature
700
650
650
600
600
Frequency (kHz)1
Frequency (kHz)1
Frequency vs. Input Voltage
700
550
500
450
400
350
550
500
450
400
350
VIN = 12V, VOUT = 1.2V
VOUT = 1.2V
300
300
4
5
6
7
8
9 10 11 12 13 14 15 16 17 18
-50
-25
0
Input Voltage (V)
50
75
100
125
Temperature (°C)
Feedback Threshold vs. Temperature
Frequency vs. RRT Resistor
0.707
0.706
0.705
700
0.704
0.703
0.702
0.701
0.700
0.699
0.698
0.697
0.696
0.695
0.694
600
650
Frequency (kHz)1
Feedback Threshold (V)
25
VIN = 17V
VIN = 12V
VIN = 4.5V
550
500
450
400
350
VIN = 12V
300
-50
-25
0
25
50
75
100
125
100 115 130 145 160 175 190 205 220 235 250
Temperature (°C)
RRT (kΩ)
Load Transient Response
Load Transient Response
RT6242A
RT6242B
VOUT
(50mV/Div)
VOUT
(50mV/Div)
IOUT
(5A/Div)
IOUT
(5A/Div)
VIN = 12V, VOUT = 1.2V, IOUT = 0.1A to 12A
Time (100μs/Div)
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VIN = 12V, VOUT = 1.2V, IOUT = 0.1A to 12A
Time (100μs/Div)
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RT6242A/B
Load Transient Response
Load Transient Response
RT6242B
RT6242A
VOUT
(50mV/Div)
VOUT
(50mV/Div)
IOUT
(5A/Div)
IOUT
(5A/Div)
VIN = 12V, VOUT = 1.2V, IOUT = 6A to 12A
RT6242A
VIN = 12V, VOUT = 1.2V, IOUT = 6A to 12A
Time (100μs/Div)
Time (100μs/Div)
Output Ripple Voltage
Output Ripple Voltage
VIN = 12V, VOUT = 1.2V, IOUT = 50mA
VOUT
(50mV/Div)
RT6242B
VOUT
(10mV/Div)
VLX
(10V/Div)
VLX
(10V/Div)
ILX
(2A/Div)
ILX
(5A/Div)
Time (50μs/Div)
Time (1μs/Div)
Output Ripple Voltage
Output Ripple Voltage
RT6242A
RT6242B
VOUT
(10mV/Div)
VOUT
(10mV/Div)
VLX
(10V/Div)
VLX
(10V/Div)
ILX
(5A/Div)
VIN = 12V, VOUT = 1.2V, IOUT = 50mA
VIN = 12V, VOUT = 1.2V, IOUT = 12A
Time (1μs/Div)
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DS6242A/B-00 August 2015
ILX
(5A/Div)
VIN = 12V, VOUT = 1.2V, IOUT = 12A
Time (1μs/Div)
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RT6242A/B
Power On from EN
RT6242A
VOUT
(1V/Div)
VOUT
(1V/Div)
VLX
(10V/Div)
VIN = 12V, VOUT = 1.2V, IOUT = 0.1A
VLX
(10V/Div)
ILX
(2A/Div)
ILX
(2A/Div)
VIN = 12V, VOUT = 1.2V,
IOUT = 0.1A
Time (2ms/Div)
Time (2ms/Div)
Power On from EN
Power Off from EN
VEN
(5V/Div)
RT6242B
VEN
(5V/Div)
RT6242B
VOUT
(1V/Div)
VOUT
(1V/Div)
ILX
(10A/Div)
RT6242A
VEN
(5V/Div)
VEN
(5V/Div)
VLX
(10V/Div)
Power Off from EN
VLX
(10V/Div)
VIN = 12V, VOUT = 1.2V,
IOUT = 10A
VIN = 12V, VOUT = 1.2V,
IOUT = 10A
Time (4ms/Div)
Time (4ms/Div)
UVP Short (Latch Mode)
UVP Short (Hiccup Mode)
VIN
(5V/Div)
VOUT
(1V/Div)
ILX
(10A/Div)
VIN
(5V/Div)
VIN = 12V, VOUT = 1.2V, IOUT = Short
VIN = 12V, VOUT = 1.2V, IOUT = Short
VOUT
(500mV/Div)
VLX
(10V/Div)
VLX
(10V/Div)
ILX
(10A/Div)
ILX
(10A/Div)
Time (2ms/Div)
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Time (10ms/Div)
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RT6242A/B
Application Information
Inductor Selection
Selecting an inductor involves specifying its inductance
and also its required peak current. The exact inductor value
is generally flexible and is ultimately chosen to obtain the
best mix of cost, physical size, and circuit efficiency.
Lower inductor values benefit from reduced size and cost
and they can improve the circuit's transient response, but
they increase the inductor ripple current and output voltage
ripple and reduce the efficiency due to the resulting higher
peak currents. Conversely, higher inductor values increase
efficiency, but the inductor will either be physically larger
or have higher resistance since more turns of wire are
required and transient response will be slower since more
time is required to change current (up or down) in the
inductor. A good compromise between size, efficiency,
and transient response is to use a ripple current (ΔIL) about
15% to 40% of the desired full output load current.
Calculate the approximate inductor value by selecting the
input and output voltages, the switching frequency (fSW),
the maximum output current (IOUT(MAX)) and estimating a
ΔIL as some percentage of that current.
L=
VOUT   VIN  VOUT 
VIN  fSW  IL
Once an inductor value is chosen, the ripple current (ΔIL)
is calculated to determine the required peak inductor
current.
VOUT   VIN  VOUT 
IL =
VIN  fSW  L
I
IL(PEAK) = IOUT(MAX)  L
2
I
IL(VALLY) = IOUT(MAX)  L
2
Inductor saturation current should be chosen over IC's
current limit.
Input Capacitor Selection
The input filter capacitors are needed to smooth out the
switched current drawn from the input power source and
to reduce voltage ripple on the input. The actual
capacitance value is less important than the RMS current
rating (and voltage rating, of course). The RMS input ripple
current (IRMS) is a function of the input voltage, output
voltage, and load current :
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DS6242A/B-00 August 2015
V
IRMS = IOUT(MAX)  OUT
VIN
VIN
1
VOUT
Ceramic capacitors are most often used because of their
low cost, small size, high RMS current ratings, and robust
surge current capabilities. However, take care when these
capacitors are used at the input of circuits supplied by a
wall adapter or other supply connected through long, thin
wires. Current surges through the inductive wires can
induce ringing at the RT6242A/B input which could
potentially cause large, damaging voltage spikes at VIN.
If this phenomenon is observed, some bulk input
capacitance may be required. Ceramic capacitors (to meet
the RMS current requirement) can be placed in parallel
with other types such as tantalum, electrolytic, or polymer
(to reduce ringing and overshoot).
Choose capacitors rated at higher temperatures than
required. Several ceramic capacitors may be paralleled to
meet the RMS current, size, and height requirements of
the application. The typical operating circuit uses two 10μF
and one 0.1μF low ESR ceramic capacitors on the input.
Output Capacitor Selection
The RT6242A/B are optimized for ceramic output
capacitors and best performance will be obtained using
them. The total output capacitance value is usually
determined by the desired output voltage ripple level and
transient response requirements for sag (undershoot on
positive load steps) and soar (overshoot on negative load
steps).
Output Ripple
Output ripple at the switching frequency is caused by the
inductor current ripple and its effect on the output
capacitor's ESR and stored charge. These two ripple
components are called ESR ripple and capacitive ripple.
Since ceramic capacitors have extremely low ESR and
relatively little capacitance, both components are similar
in amplitude and both should be considered if ripple is
critical.
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RT6242A/B
VRIPPLE = VRIPPLE(ESR)  VRIPPLE(C)
Soft-Start (SS)
VRIPPLE(ESR) = IL  RESR
IL
VRIPPLE(C) =
8  COUT  fSW
The RT6242A/B soft-start uses an external capacitor at
SS to adjust the soft-start timing according to the following
equation :
Feed-forward Capacitor (Cff)
t  ms  
The RT6242A/B are optimized for ceramic output
capacitors and for low duty cycle applications. However
for high-output voltages, with high feedback attenuation,
the circuit's response becomes over-damped and transient
response can be slowed. In high-output voltage circuits
(VOUT > 3.3V) transient response is improved by adding a
small “feed-forward” capacitor (Cff) across the upper FB
divider resistor (Figure 1), to increase the circuit's Q and
reduce damping to speed up the transient response without
affecting the steady-state stability of the circuit. Choose
a suitable capacitor value that following below step.

Get the BW the quickest method to do transient
response form no load to full load. Confirm the damping
frequency. The damping frequency is BW.
VOUT
Cff
FB
RT6242A/B
Following below equation to get the minimum capacitance
range in order to avoid UV occur.
COUT  VOUT  0.6  1.2
(ILIM  Load Current)  0.8
T  6μA
CSS 
VREF
T
Do not leave SS unconnected.
Enable Operation (EN)
For automatic start-up, the low-voltage EN pin must be
connected to VIN with a 100kΩ resistor. EN can be
externally pulled to VIN by adding a resistor-capacitor
delay (REN and CEN in Figure 2). Calculate the delay time
using EN's internal threshold where switching operation
begins (1.2V, typical).
EN
VIN
R2
GND
Figure 1. Cff Capacitor Setting

ISS μA 
An external MOSFET can be added to implement digital
control of EN (Figure 3). In this case, a 100kΩ pull-up
resistor, REN, is connected between VIN and the EN pin.
MOSFET Q1 will be under logic control to pull down the
EN pin. To prevent enabling circuit when VIN is smaller
than the VOUT target value or some other desired voltage
level, a resistive voltage divider can be placed between
the input voltage and ground and connected to EN to create
an additional input under voltage lockout threshold (Figure
4).
BW
R1
CSS  nF   0.7
REN
CEN
EN
RT6242A/B
GND
Figure 2. External Timing Control
Cff can be calculated base on below equation :
Cff 
1
2  3.1412  R1 BW  0.8
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RT6242A/B
VIN
REN
100k
External BOOT Bootstrap Diode
EN
Q1
Enable
RT6242A/B
GND
Figure 3. Digital Enable Control Circuit
VIN
REN1
External BOOT Capacitor Series Resistance
EN
REN2
RT6242A/B
GND
Figure 4. Resistor Divider for Lockout Threshold Setting
Output Voltage Setting
Set the desired output voltage using a resistive divider
from the output to ground with the midpoint connected to
FB. The output voltage is set according to the following
equation :
VOUT = 0.7 x (1 + R1 / R2)
VOUT
R1
FB
RT6242A/B
When the input voltage is lower than 5.5V it is
recommended to add an external bootstrap diode between
VIN (or VINR) and the BOOT pin to improve enhancement
of the internal MOSFET switch and improve efficiency.
The bootstrap diode can be a low cost one such as 1N4148
or BAT54.
R2
GND
The internal power MOSFET switch gate driver is
optimized to turn the switch on fast enough for low power
loss and good efficiency, but also slow enough to reduce
EMI. Switch turn-on is when most EMI occurs since VSW
rises rapidly. During switch turn-off, SW is discharged
relatively slowly by the inductor current during the dead
time between high-side and low-side switch on-times. In
some cases it is desirable to reduce EMI further, at the
expense of some additional power dissipation. The switch
turn-on can be slowed by placing a small (<47Ω)
resistance between BOOT and the external bootstrap
capacitor. This will slow the high-side switch turn-on and
VSW's rise. To remove the resistor from the capacitor
charging path (avoiding poor enhancement due to
undercharging the BOOT capacitor), use the external diode
shown in Figure 6 to charge the BOOT capacitor and place
the resistance between BOOT and the capacitor/diode
connection.
5V
Figure 5. Output Voltage Setting
BOOT
Place the FB resistors within 5mm of the FB pin. Choose
R2 between 10kΩ and 100kΩ to minimize power
consumption without excessive noise pick-up and
calculate R1 as follows :
R2  (VOUT  0.7)
R1 
0.7
For output voltage accuracy, use divider resistors with 1%
or better tolerance.
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RT6242A/B
0.1µF
SW
Figure 6. External Bootstrap Diode
PVCC Capacitor Selection
Decouple PVCC to GND with a 1μF ceramic capacitor.
High grade dielectric (X7R, or X5R) ceramic capacitors
are recommended for their stable temperature and bias
voltage characteristics.
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RT6242A/B
Hiccup Mode
The RT6242AH/RT6242BH provides Hiccup Mode UnderVoltage Protection (UVP). When the FB voltage drops
below 70% of the feedback reference voltage, the output
voltage drops below the UVP trip threshold for longer than
250μs (typical) then IC's UVP is triggered. UVP function
will be triggered to shut down switching operation. If the
UVP condition remains for a period, the RT6242 will retry
automatically. When the UVP condition is removed, the
converter will resume operation. The UVP is disabled
during soft-start period.
Latch Mode
For the RT6242AL/RT6242BL, it provides Latch-Off Mode
Under Voltage Protection (UVP). When the FB voltage
drops below 70% of the feedback reference voltage, the
output voltage drops below the UVP trip threshold for longer
than 250μs (typical) then IC's UVP is triggered. UVP
function will be triggered to shut down switching operation.
In shutdown condition, the RT6242 can be reset by EN
pin or power input VIN.
Current Limit
The RT6242 current limit is a cycle-by-cycle “valley” type,
measuring the inductor current through the synchronous
rectifier during the off-time while the inductor current ramps
down. The current is determined by measuring the voltage
between source and drain of the synchronous rectifier. If
the inductor current exceeds the current limit, the ontime one-shot is inhibited (Mask high side signal) until
the inductor current ramps down below the current limit.
Thus, only when the inductor current is well below the
current limit is another on time permitted. This arrangement
prevents the average output current from greatly exceeding
the guaranteed current limit value, as typically occurs with
other valley-type current limits. If the output current
exceeds the available inductor current (controlled by the
current limit mechanism), the output voltage will drop. If it
drops below the output under-voltage protection level, the
IC will enter UVP protection.
The current limit of low side MOSFET is adjustable by an
external resistor connected to the RLIM pin. The current
Through extra resister RLIM connect to RLIM pin to setting
the current limit value as Figure 7, below offer approximate
formula equation for design reference :
RLIM =
1
ILIM  106  5.588  107
Current Limit vs. RLIM
16
15
Current Limit (A)
Output Under-Voltage Protection
14
13
12
11
10
65
70
75
80
85
90
95
100
105
RLIM (kΩ)
Figure 7. Current Limit vs. RLIM
Output Over-Voltage Protection
If the output voltage VOUT rises above the regulation level
and lower 1.2 times regulation level, the high-side switch
naturally remains off and the synchronous rectifier turns
on. For RT6242BL, if the output voltage remains high, the
synchronous rectifier remains on until the inductor current
reaches the low side current limit. If the output voltage
still remains high, then IC's switches remain that the
synchronous rectifier turns on and high-side MOS keeps
off to operate at typical 500kHz switching protection, again
if inductor current reaches low side current limit, the
synchronous rectifier will turn off until next protection
clock. If the output voltage exceeds the OVP trip threshold
(1.2 times regulation level) for longer than 5μs (typical),
then IC's output Over-Voltage Protection (OVP) is
triggered. RT6242BL chip enters latch mode.
For RT6242AL, if the output voltage VOUT rises above the
regulation level and lower 1.2 times regulation level, the
high-side switch naturally remains off and the synchronous
rectifier turns on until the inductor current reaches zero
current. If the output voltage remains high, then IC's
switches remain off. If the output voltage exceeds the OVP
limit range is from 6A to 15A.
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RT6242A/B
For RT6242BH, if the output voltage remains high, the
synchronous rectifier remains on until the inductor current
reaches the low side current limit. If the output voltage
still remains high, the synchronous rectifier turns on and
high-side MOSFET keeps off to operate at typical 500kHz
switching protection, again if inductor current reaches low
side current limit, the synchronous rectifier will turn off
until next protection clock. RT6242BH is without OVP
latch function and recover when OV condition release.
For RT6242AH, if the output voltage remains high, the
synchronous rectifier remains on until the inductor current
reaches zero current. If the output voltage still remains
high, then IC's switches remain off. RT6242AH is without
OVP latch function and recover when OV condition release.
Switching Frequency Setting
The switching frequency can be set by using extra resister
RRT. Switching frequency range is from 300kHz to 700kHz.
Through extra resister RRT connect to RT pin to setting
the switching frequency FS as Figure 8, below offer
approximate formula equation :
Setting Frequency = FS (kHz)
6
RRT =
10
FS  1.374  10 5  1.541 10 4


Frequency vs. RRT Resistor
700
Frequency (kHz)1
650
600
550
500
450
400
350
Thermal Considerations
For continuous operation, do not exceed absolute
maximum junction temperature. The maximum power
dissipation depends on the thermal resistance of the IC
package, PCB layout, rate of surrounding airflow, and
difference between junction and ambient temperature. The
maximum power dissipation can be calculated by the
following formula :
PD(MAX) = (TJ(MAX) − TA) / θJA
where TJ(MAX) is the maximum junction temperature, TA is
the ambient temperature, and θJA is the junction to ambient
thermal resistance.
For recommended operating condition specifications, the
maximum junction temperature is 125°C. The junction to
ambient thermal resistance, θJA, is layout dependent. For
UQFN-16JL 3x3 (FC) package, the thermal resistance,
θJA, is 68°C/W on a standard four-layer thermal test board.
The maximum power dissipation at TA = 25°C can be
calculated by the following formula :
P D(MAX) = (125°C − 25°C) / (68°C/W) = 1.47W for
UQFN-16JL 3x3 (FC) package
The maximum power dissipation depends on the operating
ambient temperature for fixed T J(MAX) and thermal
resistance, θJA. The derating curve in Figure 9 allows the
designer to see the effect of rising ambient temperature
on the maximum power dissipation.
2.0
Maximum Power Dissipation (W)1
trip threshold (1.2 times regulation level) for longer than
5μs (typical), the IC's OVP is triggered. RT6242AL chip
enters latch mode.
Four-Layer PCB
1.5
1.0
0.5
0.0
0
300
100 115 130 145 160 175 190 205 220 235 250
RRT (kΩ)
Figure 8. Frequency vs. RRT Resistor
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25
50
75
100
125
Ambient Temperature (°C)
Figure 9. Derating Curve of Maximum Power Dissipation
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RT6242A/B
Layout Consideration

Follow the PCB layout guidelines for optimal performance of the device.

Keep the traces of the main current paths as short and wide as possible.

Put the input capacitor as close as possible to VIN and VIN pins.

SW node is with high frequency voltage swing and should be kept at small area. Keep analog components away from
the SW node to prevent stray capacitive noise pickup.

Connect feedback network behind the output capacitors. Keep the loop area small. Place the feedback components
near the device.

Connect all analog grounds to common node and then connect the common node to the power ground behind the
output capacitors.

An example of PCB layout guide is shown in Figure 9 and Figure 10 for reference.
Internal Regulator Output. Connect a 1µF
capacitor to GND to stabilize output voltage.
The RRT resistor must be connected
as close to the device as possible.
Keep sensitive components away.
The feedback components must be
connected as close to the device as possible.
R2
R1 VOUT
CSS
AGND
FB
RLIM
15
EN
14
SW
13
SW
REN
The RLIM resistor must be connected
as close to the device as possible.
Keep sensitive components away.
VIN
7
GND
RLIM
16
1
2
3
6
GND
PVCC
5
VIN
4
VIN CIN
RT
SS
Input capacitor must be placed
as close to the IC as possible.
AGND must be connected clear ground.
10
11
12
BOOT
SW
SW
SW
RPGOOD
9
8
PGOOD
5V
SW should be connected to inductor by
wide and short trace. Keep sensitive
components away from this trace .
CBOOT
L
COUT
VOUT
Power Good Indicator
Open-Drain Output.
The REN component
must be connected.
Connect IC Pin Trace as wide as
possible for thermal consideration
Add via for thermal consideration
Keep sensitive components
away from this CBOOT .
Top Layer
Figure 9. PCB Layout Guide (Top Layer)
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is a registered trademark of Richtek Technology Corporation.
DS6242A/B-00 August 2015
RT6242A/B
VIN
GND
Add via for thermal consideration
Bottom Layer
Figure 10. PCB Layout Guide (Bottom Layer)
Suggested Inductors for Typical Application Circuit
Component Supplier
Series
Dimensions (mm)
WE
7443320
12x12x10
Recommended component selection for Typical Application.
Component Supplier
Part No.
Capacitance (F)
Case Size
MURATA
GRM31CR61E106K
10
1206
TDK
C3225X5R1E106K
10
1206
TAIYO YUDEN
TMK316BJ106ML
10
1206
MURATA
GRM31CR60J476M
47
1206
TDK
C3225X5R0J476M
47
1210
TAIYO YUDEN
EMK325BJ476MM
47
1210
MURATA
GRM32ER71C226M
22
1210
TDK
C3225X5R1C226M
22
1210
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DS6242A/B-00 August 2015
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17
RT6242A/B
Outline Dimension
Symbol
Dimensions In Millimeters
Dimensions In Inches
Min.
Max.
Min.
Max.
A
0.500
0.600
0.020
0.024
A1
0.000
0.050
0.000
0.002
A3
0.100
0.175
0.004
0.007
D
2.900
3.100
0.114
0.122
E
2.900
3.100
0.114
0.122
b
0.320
0.420
0.013
0.017
b1
0.458
0.558
0.018
0.022
b2
0.200
0.300
0.008
0.012
L
2.325
2.425
0.092
0.095
L1
1.300
1.400
0.051
0.055
L2
0.325
0.425
0.013
0.017
L3
1.350
1.450
0.053
0.057
L4
0.350
0.450
0.014
0.018
e
0.500
0.020
K
0.325
0.013
K1
1.224
0.048
K2
2.175
0.086
K3
2.675
0.105
K4
0.785
0.031
K5
1.675
0.066
K6
2.175
0.086
K7
2.675
0.105
U-Type 16JL QFN 3x3 (FC) Package
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is a registered trademark of Richtek Technology Corporation.
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RT6242A/B
Richtek Technology Corporation
14F, No. 8, Tai Yuen 1st Street, Chupei City
Hsinchu, Taiwan, R.O.C.
Tel: (8863)5526789
Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should
obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot
assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be
accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries.
DS6242A/B-00 August 2015
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