NR111D Application Note Rev.3.0

NR111D APPLICATION NOTE
NR111D
Application Note Rev.3.0
SANKEN ELECTRIC CO., LTD.
http://www.sanken-ele.co.jp
Copy Right: SANKEN ELECTRIC CO., LTD.
Page.1
Rev.3.0
NR111D APPLICATION NOTE
Rev.3.0
CONTENTS
General Descriptions ----------------------------------------------------------------------- 3
1. Electrical Characteristics ------------------------------------------------------------- 4
1.1 Absolute Maximum Ratings ----------------------------------------------------- 4
1.2 Recommended Operating Conditions --------------------------------------- 4
1.3 Electrical Characteristics -------------------------------------------------------- 5
2. Block Diagram & Pin Functions ----------------------------------------------------- 7
2.1 Functional Block Diagram ------------------------------------------------------- 7
2.2 Pin Asignments & Functions --------------------------------------------------- 7
3. Example Application Circuit---------------------------------------------------------- 8
4. Allowable package power dissipation -------------------------------------------- 9
5. Package Outline ------------------------------------------------------------------------- 10
Pin assignments & functions----------------------------------------------------------- 11
6. Operational Descriptions ------------------------------------------------------------- 12
6.1 PWM (Pulse Width Modulation) Output Control ------------------------- 12
6.2 Power Supply Stability ----------------------------------------------------------- 12
6.3 Over Current Protection (OCP) ------------------------------------------------ 13
6.4 Thermal Shutdown (TSD) ------------------------------------------------------- 13
6.5 Soft-Start ------------------------------------------------------------------------------ 13
6.6 ON and OFF the Regulator (Enable) ----------------------------------------- 14
6.7 SKIP Mode Operation in the Light Load ----------------------------------- 15
7. Design Notes ----------------------------------------------------------------------------- 16
7.1 External Components ------------------------------------------------------------ 16
7.2 Pattern Design ---------------------------------------------------------------------- 22
7.3 Applied Design ---------------------------------------------------------------------- 25
IMPORTANT NOTICE ---------------------------------------------------------------------- 27
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Page.2
NR111D APPLICATION NOTE
Rev.3.0
General Descriptions
Package
The NR111D is buck regulator ICs integrates
High-side power MOSFETs. The feature increasing
 DIP8 Package
efficiency at light loads allows the device to be
used in the energy-saving applications. With the
current mode control, ultra low ESR capacitors such
as ceramic capacitors can be used. The Ics have
protection functions such as Over-Current Protection
(OCP), Under-Voltage Lockout (UVLO) and
Thermal Shutdown (TSD). An adjustable Soft-Start
by an external capacitor prevents the excessive inrush
current at turn-on. The Ics integrate phase
compensation circuit which reduces the number of
external components and simplifies the design of
customer application. The ON/OFF pin (EN Pin)
turns the regulator on or off and helps to achieve low
power consumption requirements. The NR111D is
available in an 8-pin DIP package.
1 BS
SS 8
IN
EN 7
2
3 SW ISET 6
4 GND
FB 5
Electrical Characteristics




Features & Benefits
 Current mode PWM control
 Up to 94% Efficiency,
4A output current
Operating input range VIN = 6.5V～31V
Output adjustable VO= 0.8V～24V
Fixed 350kHz frequency
Up to 68% Efficiency at IO = 20mA Light Load
 Stable with low ESR ceramic output capacitors
 Built-in protection function
Over Current Protection (OCP)
Thermal Shutdown (TSD)
Under Voltage Lockout (UVLO)
 Built-in phase compensation
 Adjustable Soft-Start with an external capacitor
 Turn ON/OF the regulator function
Applications




LCD TV / Blu-Ray / Set top box
Home appliance
Green Electronic products
Other power supply
Series Lineup
Product No.
fSW
VIN
VO
(1)
NR111D
350kHz
6.5V to 31V
0.8V to 24V
The minimum input voltage shall be either of 6.5V or VO+3V, whichever is higher.
(2)
The I/O condition is limited by the Minimum on-time (TON(MIN)).
(1)
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Page.3
IO
(2)
4A
NR111D APPLICATION NOTE
Rev.3.0
1. Electrical Characteristics
1.1 Absolute Maximum Ratings
Table 1 Absolute maximum rating of NR111D
Parameter
Symbol
Ratings
Units
DC input voltage
VIN
35
V
BS Pin voltage
VBS
44
V
8
VBS-SW
BS-SW Pin voltage
DC
V
12
SW Pin voltage
VSW
35
V
FB Pin voltage
VFB
5.5
V
EN Pin voltage
VEN
35
V
SS Pin voltage
VSS
5.5
V
Pulse width ≦30ns
Glass-epoxy board mounting
in a 70×60mm.
(copper area in a 1310mm2)
Max TJ =150°C
Power dissipation
(3)
PD
1.47
W
Junction temperature
(4)
TJ
40 to 150
°C
TS
40 to 150
°C
θJP
41
°C /W
Storage temperature
Thermal resistance
(junction- Pin No. 7)
Thermal resistance
(junction-ambient air)
(3)
(4)
Conditions
Glass-epoxy board mounting
θJA
85
°C /W
in a 70×60mm.
(copper area in a 1310mm2)
Limited by thermal shutdown.
The temperature detection of thermal shutdown is about 160°C
1.2 Recommended Operating Conditions
Operating IC in recommended operating conditions is required for normal operating of circuit functions shown in
Table 3 Electrical characteristics of NR111D.
Table 2 Recommended operating conditions of NR111D
Parameter
DC input voltage
Symbol
(5)
Ratings
Units
MIN
MAX
VIN
Vo+3
31
V
Io
0
4.0
A
Vo
0.8
24
V
Top
40
85
°C
(6)
DC output current
(7)
Output voltage
Ambient operating temperature
(7)
(5)
The minimum value of input voltage is taken as the larger one of either 6.5V or VO +3V.
(6)
Recommended circuit refer to Typical Application Circuit (fig.5).
(7)
To be used within the allowable package power dissipation characteristics (fig. 6)
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Page.4
Conditions
NR111D APPLICATION NOTE
Rev.3.0
1.3 Electrical Characteristics
Electrical characteristics indicate specific limits, which are guaranteed when IC is operated under the
measurement conditions shown in the circuit diagram (fig. 1)
Table 3 Electrical characteristics of NR111D
(Ta=25°C)
Parameter
Symbol
Reference voltage
Output voltage temperature
coefficient
Ratings
Units
MIN
TYP
MAX
VREF
0.784
0.800
0.816
V
⊿VREF/⊿T
―
±0.05
fSW
－20%
350
Switching frequency
Test conditions
VIN = 12V，IO = 1.0A
V = 12V, IO = 1.0A
mV/°C IN
―
40°C to +85°C
VIN=12V, VO=5.0V,
＋20%
kHz
IO=1°
VIN=8V～31V, VO
mV
―
=5.0V, IO=1°
VIN=12V, VO=5.0V,
mV
―
IO=0.1°～2.0A
VIN =12V, VO =5.0V
―
ISET=OPEN
A
VIN =12V, VO =5.0V
―
ISET=SHORT
VIN = 12V
mA
―
VEN=10kΩ pull up to VIN
VIN =12V, IO =0A,
μA
―
VEN=0V
Line regulation
(8)
VLine
―
50
Load regulation
(8)
VLoad
―
50
Overcurrent protection
threshold
IS1
―
1.5
IS2
―
5.5
Supply Current
IIN
―
1
IIN(off)
0
1
Source current
at low level
voltage
Sink current
IEN/SS
6
10
14
μA
VSS=0V, VIN =12V
20
50
μA
VEN= 10V
Threshold voltage
VC/EH
1.4
2.1
V
VIN =12V
V
VIN =12V
Shutdown Supply Current
SS Pin
EN Pin
ISET Pin
Open voltage
Max on-duty
Minimum on-time
Thermal shutdown threshold
temperature
Thermal shutdown
restart hysteresis
of temperature
IEN
0.7
VISET
DMAX
―
90
―
%
(8)
TON(MIN)
―
150
―
nsec
(8)
TSD
151
165
―
°C
(8)
TSD_hys
―
20
―
°C
(8)
1.5
(8)
Guaranteed by design,not tested.
The input and output condition is limited by Minimum on-time.
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Page.5
NR111D APPLICATION NOTE
R3
2
7
EN
Rev.3.0
1
IN
C10
L1
3
BS
SW
R5
8
C1
SS
C2
NR 111 E
NR111D
IO
R4
IIN
I EN
C4
I Fset
GND
ISET
FB
VO
5
4
VIN
VEN
C5
6
V SS
D1
IISET
V FB
R6
VISET
C1+C2: 10uF×2
C4+C5: 22uF×2
C10: 0.1uF
R3: 22Ω
R4: 18 kΩ, R5: 2.7kΩ (VO=5.0V)
R6: 3.9kΩ
Fig.1 Measurement circuit diagram
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Page.6
L1: 10uH
RL
NR111D APPLICATION NOTE
Rev.3.0
2. Block Diagram & Pin Functions
2.1 Functional Block Diagram
VIN
2
R1
Σ
OSC
7
３
EN
ON/
OFF
P.REG
VREF
6
ISET
IN
C2
D2
（ Option)
Current
Sense
Amp
OCP
６
Drive
REG
1
BS
OCP_REF
0.8V
PWM
LOGIC
７
５
C1
４
3
R3
C10
L1
SW
R5
OCP_REF
D1
ISET
OVP
FB
0.8V
Err Amp
C4
C5
R4
Compensation
FB
VO
８
5
FB
UVLO
R6
SS
TSD
１
SS
GND 4
１
8
C9
fig.2 Block diagram of NR111D
2.2 Pin Asignments & Functions
1 BS
SS 8
IN
EN 7
2
3 SW ISET 6
4 GND
FB 5
fig.3 Pin Assignments
Table2 Pin assignments & functions of NR111D
Pin No.
Symbol
1
BS
2
IN
3
SW
4
GND
5
FB
6
ISET
Description
High-side Boost input.
BS supplies the drive for High-side Nch-MOSFET switch.
Connect a capacitor and a resistor between SW to BS.
Power input. IN supplies the power to the IC as well as the regulator switches
Power switching output.
SW supplies power to the output.
Connect the LC filter from SW to the output.
Note that a capacitor is required from SW to BS to supply the power the High-side
switch
Ground
Connect the exposed pad to Pin No.4
Feedback input Pin to compare Reference Voltage. The feedback threshold is 0.8V.
To set the output voltage, FB Pin is required to connect between resistive voltage
divider R4 and R6.
Adjust Pin of OCP starting current
OCP starting current can be adjusted by connecting a resistor to ISET Pin.
In the case of using at Maximum Io, ISET Pin is required to connect to GND.
7
EN
8
SS
Enable input.
Drive EN Pin high to turn on the regulator, low to turn it off.
Soft-Start control input.
To set the soft-start period, connect to a capacitor between GND.
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Page.7
NR111D APPLICATION NOTE
Rev.3.0
3. Example Application Circuit
Each ground of all components is connected as close as possible to the Pin No.1 at one point.
To help heat dissipation, connect a large copper plane to exposed pad on the back side of the package. The
copper plane is required for GND
VIN
R3
VIN_s
2
IN
R1
7
C2
EN
C1
C10
SW
3
SS
GND
4
Vo
L1
Vo_s
NR111E
NR111D
8
GND
1
BS
R5
FB
ISET
6
C4 C5
5
R4
C9
R6
R7
D1
SW
C1, C2: 10μF / 35V
C4, C5: 22μF / 16V
C9: 0.1μF
C10: 0.1μF
R1: 510kΩ
L1: 10μH
R3: 22Ω
R4: 18kΩ, R5: 2.7kΩ (Vo=5.0V)
R6: 3.9kΩ
fig. 4 Typical Application Circuit of NR111D
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Page.8
GND
NR111D APPLICATION NOTE
Rev.3.0
4. Allowable package power dissipation
1.6
許容損失 PD[W]
Power Dissipation
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
-25
0
25
50
75
100
125
周囲温度 Ta[℃]
Ambient Temperature
fig. 5 Allowable package powe disspation of NR111D
NOTES:
1) Glass-epoxy board mounting in a 70×60mm
2) copper area : 1310mm2
3) The power dissipation is calculated at the junction temperature 125 °C
4) Losses can be calculated by the following equation.
As the efficiency is subject to the input voltage and output current, it shall be obtained from the efficiency curve
and substituted in percent
5) Thermal design for D1 shall be made separately.

 100 
V
PD  VO  I O 
 1  VF  I O 1  O
 x

 VIN




VO: Output voltage
VIN: Input voltage
IO: Output current
ηx: Efficiency(%)
VF: Diode forward voltage
SJPB-L4…0.55V(IO=3A)
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Page.9
NR111D APPLICATION NOTE
Rev.3.0
5. Package Outline
 Exposed SOIC8 package
An outside size is supplied by either Package type A or Package type B.
9.4±0.127
Type A
NR111D
*4
SK
*1
*2
6.35±0.127
*3
（1.524）
7.938±0.3175
（1.524）
6.35±0.127
0.2032~0.3810
3.302±0.127
0.381min
3.302±0.254
8.636±0.762
0.356~0.559
（1.524）
(2.54)
9.2±0.2
Type B
PIN Assignment
*1
NR111D
*4
SK
*2
1.BS
2.IN
6.4±0.2
3.SW
*3
4.GND
5.FB
7.62±0.3
(2.54)
4.01
3.4±0.2
±
6.Iset
0.282±0.078
7.EN
8.SS
0.3
3.3±0.3
0.51min
0.475±0.095
(1.524)
8.7±0.3
*1.Type number
*2.Lot number (three digit)
1st letter
The last digit of year
2nd letter
Month
(1 to 9 for Jan. to Sept.,
O for Oct. N for Nov. D for Dec.)
rd
th
3 & 4 letter week 01～03：Arabic Numerical
*3.Control number (four digit)
*4 Logo：SK
Package outline, dimensions
Note:
1 Dimension is in millimeters.
2. Drawing is not to scale.
Fig.7 Marking of NR111D
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Page.10
NR111D APPLICATION NOTE
Rev.3.0
Pin assignments & functions
fig. Pin Assignments of NR111D
Table Pin functions of NR111D
Pin No.
1
Symbol
BS
2
IN
3
SW
Description
High-side Boost input
BS supplies the drive for High-side Nch-MOSFET switch.
Connect a capacitor between SW to BS.
Power input
VIN supplies the power to the IC.
Power switching output
SW supplies power to the output.
Connect the LC filter from SW to the output.
4
GND
5
FB
6
ISET
7
EN
8
SS
Note that a capacitor is required from SW to BS to supply the power the High-side switch
Ground terminal
Connect the exposed pad to terminal No.4
Feedback input to compare Reference Voltage. The feedback threshold is 0.8V.
To set the output voltage, FB terminal is required to connect between resistive voltage divider
R4 and R6.
Adjust Pin of OCP starting current
OCP starting current can be adjusted by connecting a resistor to ISET Pin.
In the case of Io=4A, ISET Pin is required to connect to GND.
Enable input
Drive EN terminal high to turn on the regulator, low to turn it off.
Soft-Start control
To set the soft-start period, connect to a capacitor between GND.
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Page.11
NR111D APPLICATION NOTE
Rev.3.0
6. Operational Descriptions
6.1 PWM (Pulse Width Modulation) Output Control
The NR111D consist of three blocks; two feedback loops (voltage control and current control) and one slope
compensation. The PWM is controlled with the current mode control by calculating the voltage feedback control, and
the current feedback control and the slope compensation signals. (fig. 8) For the voltage feedback control, the output
voltage feed back to the PWM control. The error amplifier compares the output voltage divided by resistors with the
reference voltage VREF = 0.8V. For the current feedback control, the inductor current feed back to the PWM control.
The inductor current divided by Sense-MOSFET is detected with the current sense amplifier. To prevent sub-harmonic
oscillations, which is characteristic in current mode control, the slope of current control is compensated.
VIN
C1
2 IN
C2
５
Σ
OSC
D2
Current
Sense
Amp
OCP
（Option)
1
Drive
REG
P.REG
６
BS
R1
0.8V
7
３
EN
４
R5
D1
Compensation
6
C4
C5
R4
5
８
Err Amp
0.8V
７
NC
VO
L1
3
SW
PWM
LOGIC
ON/
OFF
R3
C10
M1
VREF
TSD
FB
R6
SS
UVLO
GND
１
SS
4
１
8
C9
Fig. 8 Basic Structure of Chopper Type Regulator with PWM Control by Current Control
The NR111D start the switching operation when UVLO is released, or EN or SS Pin voltage exceeds the threshold.
Initially, it operates switching with minimum ON duty or maximum ON duty. The high-side switch (M1) is the
switching MOSFET that supplies output power. At first, the boost capacitor C10 that drives M1 is charged by internal
circuit. When M1 is ON, as the inductor current is increased by applying voltage to SW Pin and the inductor, the
output of inductor current sense amplifier is also increased. Sum of the current sense amplifier output and slope
compensation signal is compared with the error amplifier output. When the summed signal exceeds the error amplifier
(Error Amp.) output voltage, the current comparator output becomes “High” and the RS flip-flop is reset. The
regenerative current flows through D1, when the M1 turns OFF.
In NR111D, the set signal is generated in each cycle and RS flip-flop is set. In the case that the summed signal does not
exceed the error amplifier (Error Amp.) output voltage, RS flip-flop is reset without fail by the signal from OFF duty
circuit.
6.2 Power Supply Stability
The phase characteristics of chopper type regulator are the synthesis of the internal phase characteristics of regulator IC,
the combination of output capacitor C4 (C5) and load resistance Rout. The internal phase characteristics of regulator
IC are generally determined by the delay time of control block and the phase characteristics of output error amplifier.
The phase delay due to the delay time of control block is very small and not problem in actual use. As the built-in
phase compensation for output error amplifier, in order to ensure stable operation, refer to “7.1.3 Output Capacitor
C4 (C5)” and “7.1.4 Output Voltage Set-up (FB Pin)” for setting output capacitor and the output voltage.
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Page.12
6.3 Over Current Protection (OCP)
The NR111D integrate the drooping type over-current
protection circuit. The peak current of switching transistor is
detected. When the peak current exceeds rated value, the
over-current protection limits the current by forcibly
shortening the ON time of transistor and decreasing the
output voltage. It prevents the current increment at low
output voltage by decreasing the switching frequency, if the
output voltage drops lower. When the over-current state is
released, the output voltage automatically returns.
Rev.3.0
Output Voltage Vo [V]
NR111D APPLICATION NOTE
Output current Io [A]
fig.9 OCP Characteristics of NR111D
6.4 Thermal Shutdown (TSD)
The thermal shutdown circuit detects the IC junction
temperature. When the junction temperature exceeds the
rated value (around 160°C), it shuts-down the output
transistor and turns the output OFF. If the junction
temperature falls below the thermal shutdown rated value by
around 20°C, the operation returns automatically.
* (Thermal Shutdown Characteristics) Notes
The circuit protects the IC against temporary heat generation.
It does not guarantee the operation including reliabilities
under the continuous heat generation conditions, such as
short circuit for a long time.
Output voltage
Rated
Protection
Temperature
Rated Restart
Temperature
Junction
Temperature
fig.10 TSD Characteristics of NR111D
6.5 Soft-Start
出力起動時間
[msec]
Time of Soft-Start
ｿﾌﾄｽﾀｰﾄ時間 [ms]
By connecting a capacitor between Pin No.8 (SS) and Pin
No.4 (GND), Soft-Start operates when the power is supplied
to the IC. Output Voltage (Vo) is ramped up by the charge
voltage level of Css.
Time of Soft-Start can be calculated from the time constant
of charging Css.
A capacitor Css controls OFF period of PWM and then the
rise time is determined. The rise time t_ss and the delay time
t_delay are calculated in following equations.
In the case of operating IC without using Soft-Start function,
Pin No.4 is required for open.
100
10
1
0.1
0.01
0.0001
0.001
0.01
SSコンデンサCss [uF]
Pin SS capacitance
Css [uF]
TSS = CSS × (VSS2 – VSS1) / (ISS × VSS1)
VSS1 (0.9V) < SS Pin voltage < VSS2 (1.79V)
fig.11 SS Pin capacitance CSS VS Soft-Start
t_delay = CSS × VSS1 / ISS
SS Pin voltage < VSS1(th) = VSS1 (0.9V)
fig.12 Soft-Start operating description
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t_delay
t_ss
t_all
Page.13
0.1
NR111D APPLICATION NOTE
Rev.3.0
In the case of without or too small Css, IC starts up at the
time constant that output current limited by Is charges output
capacitor C2.
Following equation shows the time constant of start up by the
output capacitor C2 at no load.
T = (CO × VO) / IS
*At the start up with a load, load current is detracted from Is.
fig.13 Discharge time of SS capacitor
Pin SS Open Voltage: 3V
SS Discharge Capability: 500µA
The left graph shows the SS Pin voltage changing
time from 3V to 0V.
6.6 ON and OFF the Regulator (Enable)
EN Pin (Pin No.7) turns the regulator ON or OFF. When
drive EN under 1.4V (VENL), output is turned OFF (fig.14).
1.4V (VENL) can be achieved by connecting a bipolar
transistor in an open collector configuration.
When the external ON/OFF function isn’t used, connect only
Pull-up resistor of 510kΩ between IN and EN.
It starts when a VIN voltage is inputted.
2. IN
510kΩ
7.EN
NR111E
NR111D
fig. 14 ON / OFF Control
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Page.14
NR111D APPLICATION NOTE
Rev.3.0
6.7 SKIP Mode operation in the Light Load
The NR111D has the skip mode (interval oscillation) in the light load. The on-width of the control is decreased in the
light load, when it reaches TON (MIN) =150nsec (Typ),the switching mode shifts to the skip mode (interval oscillation).
By shifting the skip mode, the output voltage rising in No-load can be eased. And, “Light load high efficiency” is
realized by reducing the switching number of times per unit time. But, for the system which is a simple target,when the
condition of the input voltage VIN and the output voltage VO changes, because a condition to shift to T ON→TON (MIN)
changes,a transition load condition between the normal oscillation and the skip mode sometimes changes.
As for the following figure(fig15-fig18), they are the waveform example of the skip mode in the light load condition
and continuous switching by frequency=350kHz in the heavy load condition.
5v/Div
4μsec/Div
fig.15 Vin=12V_Vo=5V_L=10uH_Io=0.001A
5v/Div
4μsec/Div
fig.16 Vin=12V_Vo=5V_L=10uH_Io=0.010A
*fig15(Io=1mA skip mode)→fig16(Io=10mA End of the skip mode)→fig17(Io=20mA Normal
oscillation,discontinuous inductor current)→fig18(Io=0.5A Normal oscillation, continuous inductor current)
5v/Div
4μsec/Div
fig.17 Vin=12V_Vo=5V_L=10uH_Io=0.020A
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5v/Div
4μsec/Div
fig.18. Vin=12V_Vo=5V_L=10uH_Io=0.500A
Page.15
NR111D APPLICATION NOTE
Rev.3.0
7. Design Notes
7.1 External Components
All components are required for matching to the condition of use.
7.1.1 Choke Coil L1
The choke coil L1 is one of the most important components in the chopper type switching regulators. In order to
maintain the stabilized regulator operation, the coil should be carefully selected so it must not enter saturation or over
heat excessively at any conditions. The selection points of choke coil are as follows:
1. .
The coil type is only required for switching regulator.
It is recommended not to use a coil for noise filer since it causes high heat generation due to high power dissipation.
From fig.15 shows the selection range of inductance L to
prevent the sub-harmonic oscillations. As for the upper
limit of inductance L, the value is for reference, because it
may vary depending on input/output conditions and load
current.
The ripple portion of choke coil current ΔIL and the peak
current Ilp are calculated from the following equations:
IL 
(VIN  Vo )  Vo
L  VIN  f
IL
ILp 
 Io
2
Inductance L
Selection
Range
Inductance
Inductance
L
L
Selection
Selection
Range
Range
------ (1)
Output Voltage Vo [V]
fig.15 Selection Range of Inductance L in NR111D
------ (2)
The ΔIL and Ilp increase when the inductance of the choke
coil L becomes smaller.
If the inductance is too small, the regulator operation may be
unstable because the choke coil current fluctuates largely. It
is necessary to give attention to decreasing of the inductance
due to the magnetic saturation such as in overload and load
shortage.
High Inductance
Inductance L [µH]
b) The sub-harmonic oscillations should be prevented.
Under the peak detection current control, the inductor current may fluctuate at a frequency that is an integer multiple
of switching operation frequency. This phenomenon is the known as sub-harmonic oscillation and this phenomenon
theoretically occurs in the peak detection current control mode. In order to stabilize the operation, the inductor
current compensation is made internally. The inductance corresponding to the output voltage should be selected.
Low Inductance
fig.16 Relationship between inductance and ripple current
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Page.16
NR111D APPLICATION NOTE
Rev.3.0
c) The coil should be of proper rated current.
The rated current of the choke coil should be higher than the maximum load current used. If the load current exceeds
the rated current of coil, the inductance decreases drastically and eventually enters into the saturation state. In this
status, it is necessary to give attention because the high-frequency impedance decreases and the excess current runs.
d) The magnetic noise should be minimized.
The open magnetic circuit type core like a drum type may generate noise in peripheral circuit due to the magnetic
flux passing outside of coil. Coils of closed magnetic circuit type core, such as toroidal type, EI type and EE type are
preferable.
7.1.2 Input Capacitor C1 (C2)
The input capacitor operates as a bypass capacitor of input circuit. It supplies the short current pulses to the regulator
during switching and compensates the input voltage drop. It should be connected close to the regulator IC. Even if the
rectifying capacitor of AC rectifier circuit is in input circuit, the input capacitor cannot be used as a rectifying capacitor
unless it is connected near IC.
The selection points of C1 (C2) are as follows:
a) The capacitor should be of proper breakdown voltage rating
b) The capacitor should have sufficient allowable ripple current rating
If the input capacitor C1 (C2) is used under the conditions of
excessive breakdown voltage or allowable ripple current, or
without derating, the regulator may become unstable and the
capacitor’s lifetime may be greatly reduced. The selection of
the capacitor C1 (C2) is required for the sufficient margins to
the ripple current. The effective value of ripple current Irms
that flows across the input capacitor is calculated from the
equation (3):
Irms  1.2 
IIN
VIN
IN
Ripple
current
C1 (C2)
Vo
 Io ------ (3)
Vin
fig. 17 C1 (C2) Current path
In the case of VIN = 20V, Io = 3A, Vo = 5V,
Irms  1.2 
5
 3  0.9A
20 IIN
The capacitor is required
VIN for the allowable ripple current
1.VIN of
0.9A or higher.
Ripple
Ip
0
current
Iv
C1
Ton
T
fig.18 C1 (C2) Current Waveform
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Page.17
NR111D APPLICATION NOTE
Rev.3.0
7.1.3 Output Capacitor C4 (C5)
In the current control mode, the feedback loop which detects the inductor current is added to the voltage control mode.
The stable operation is achieved by adding inductor current to the feedback loop without considering the effect of
secondary delay factor of LC filter. It is possible to reduce the capacitance of LC filter that is needed to make
compensations for the secondary delay, and the stable operation is achieved even by using the low ESR capacitor
(ceramic capacitor).
The output capacitor C4 (C5) comprises the LC low-pass filter with choke coil L1 and works as the rectifying capacitor
of switching output. The current equal to ripple portion ΔIL of choke coil current charges and discharges the output
capacitor. In the same way as the input capacitor, the breakdown voltage and the allowable ripple current should be met
with sufficient margins.
IL
The ripple current effective value of output capacitor is
calculated from the equation (4):
Irms 
IL
2 3
Vout
L1
------ (4)
ESR
When ΔIL = 0.5A,
Irms 
Io
Ripple
current
0.5
≒ 0.14A
2 3
RL
C4 (C5)
Therefore a capacitor with the allowable ripple current of
0.14A or higher is needed.
IL
fig. 19 C4 (C5) Current path
The output ripple voltage of regulator Vrip is determined by Vout
the product of choke current ripple L1
portion ΔIL (= C4 (C5)
discharge and charge current) and output capacitor C4 (C5)
Ripple
Io
equivalent series resistance ESR.
current
Vrip  IL  C4 ESR
------ESR
(5)
RL
It is necessary to select a capacitor with low equivalent series
resistance ESR in order to lower the output ripple voltage. As
C2
for general electrolytic capacitors of same product series, the
ESR shall be lower for products of higher capacitance with
same breakdown voltage, or of higher breakdown voltage
with same capacitance.
When ΔIL = 0.5A, Vrip = 40mV,
C4 ESR  40  0.5  80m
A capacitor with ESR of 80mΩ or lower should be selected.
Since the ESR varies with temperature and increases at low
temperature, it is required to check the ESR at the actual
operating temperatures. It is recommended to contact
capacitor manufacturers for the ESR value since it is peculiar
to every capacitor series.
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Page.18
C2 Current
Waveform
0
∆IL
fig. 20 C4 (C5) Current Waveform
NR111D APPLICATION NOTE
Rev.3.0
7.1.4 Output Voltage Set-up ( FB Pin )
The FB Pin is the feedback detection Pin that controls the
output voltage. It is recommended to connect close to the
output capacitor C4 (C5). If they are not close, the abnormal
oscillations may be caused by the poor regulation and the
increased switching ripple.
The setting of output voltage is achieved by connecting
between resistive voltage divider R4 (R5) and R6. Setting the
IFB to about 0.2mA is recommended.
(The target of IFB lower limit is 0.2mA, and the upper limit is
not defined. However, it is necessary to consider that the
circuit current shall increase according to the IFB value.)
R4 (R5), R6 and the output voltage are calculated from the
following equations:
IFB = VFB / R6
R4+R5
R6
fig. 21 Detection and setting of output voltage
*VFB = 0.8V ± 2%
R4 + R5 = ( VO  VFB ) / IFB
R6 = VFB / IFB
VO = ( R4 + R5 ) × ( VFB / R6 ) + VFB
R6 is required to connect for the stable operation when set to VO = 0.8V.
Regarding the relation of input / output voltages, it is recommended that setting of the ON width of the SW Pin is more
than 200nsec
The PCB circuit traces of FB Pin, R4 (R5) and R6 are required for not parallel to the flywheel diode. The switching
noise may affect the detection voltage and the abnormal oscillation may be caused. Especially, it is recommended to
design the circuit trace short from FB Pin to R6.
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Page.19
NR111D APPLICATION NOTE
Rev.3.0
7.1.5 Flywheel Diode D1
A shcottky Barrier Diode as a flywheel diode is required for connection between SW Pin and GND.
The flywheel diode D1 is for releasing the energy stored in the choke coil at switching OFF. If a general rectifying
diode or a fast recovery diode is used, the IC may fail to operate properly becase of applying reverse voltage due to the
recovery and ON voltage. Since the output voltage from the SW Pin (Pin No. 3) is almost equal to the input voltage, it
is required to use the flywheel diode with the reverse breakdown voltage of equal or higher than the input voltage.
It is recommended not to use ferrite beads for flywheel diode.
7.1.6 Output Voltage VO and Output Capacitor C4 (C5)
From Table 6 shows the comparison of output voltage and output capacitor, for maintaining the IC stable operations,
for reference.
ESR of Electrolytic Capacitor is required from 100m Ω to 200mΩ.
Regarding the inductance L, it is recommended to select it according to 7.1.1 Choke Coil L1.
Table 6 NR111D (fSW=350kHz) VO and C4 (C5) Comparison
C4 (C5) (µF)
VO(V)
Electrolytic Capacitor
Ceramic Capacitor
(ESR≒100mΩ)
1.2
22
to
100
4.7
to
330
1.8
22
to
100
4.7
to
470
3.3
10
to
68
4.7
to
330
5
4.7
to
47
4.7
to
220
9
4.7
to
47
4.7
to
220
12
4.7
to
47
4.7
to
220
16
4.7
to
47
4.7
to
220
20
4.7
to
47
4.7
to
220
24
4.7
to
47
4.7
to
220
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Page.20
NR111D APPLICATION NOTE
Rev.3.0
7.1.7 External Bootstrap Diode for Low
By connecting a resistor to the terminal 6, the over current value is set up. The relations of the peak electric current
become the following characteristics at a resistance level and an overcurrent.
RISET-ILpeak
NR111D Setup Over Current Protection Value
設定値_M
Over Current Protection[A]
過電流開始ピーク電流 [A]
8.00
7.00
↑Curve(A)
6.00
設定値_M
5.00
4.00
↑Curve(B)
3.00
2.00
1.00
0.00
10
100
1000
10000
100000
ISET terminal Resistance RISET[kΩ]
過電流開始電流
設定抵抗Rset [kΩ]
fig.22 Setup OverCurrent Protection Value
The vertical axis of the graph becomes the OCP start peak current.
The next expression is an expression to exchanging a peak current (Ilpeak) to for an output current (IO).
IO=Ilpeak－⊿IL×0.5
Only continuous current mode are applied
⊿IL = Vo×(1-Vo/VIN)/(L×fo)
An OCP activation point can be adjusted by the setup value of RISET. However, because OCP-characteristic has the
dispersion, the value of the Ip-detection to start OCP, it becomes the dispersion of between the curve(A) and the
curve(B).
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Page.21
NR111D APPLICATION NOTE
Rev.3.0
7.2 Pattern Design
7.2.1 High Current Line
High current paths in the circuit are marked as bold lines in the circuit diagram below. These paths are required for
wide and short trace as possible.
VIN
R3
C10
2
IN
1
BS
7 EN
C2
R4+R5
NR111E
NR111D
R1
C1
8
SS
C9
FB
NC
6
VO
L1
SW 3
GND
4
VFB
5
C4 C5
R6
D1
IADJ
GND
GND
fig.23 Circuit Diagram
7.2.2 Input / Output Capacitors
The input capacitor C1 (C2) and the output capacitor C4
(C5) are required to connect to the IC as short as possible. If
the rectifying capacitor for AC rectifier circuit is inC1,C2
the input
side, it can be also used as an input capacitor. However, if it
is not close to the IC, the input capacitor is required to be
connected in addition to the rectifying capacitor. Since the
high current is discharged and charged with high speed
through the leads of input / output capacitors, make the
current paths as short as possible. A similar care should be
taken when designing pattern for other capacitors.
C1,C2
fig. 24 Recommended Pattern example
C1,C2
fig. 25 No good pattern example
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Page.22
C1,C2
NR111D APPLICATION NOTE
Rev.3.0
7.2.3 PCB Layout Pattern
Each ground of all components is connected as close as possible to the Pin No.4 at one point.
To help heat dissipation, connect a large copper plane to exposed pad on the back side of the package. The
copper plane is required for GND
fig.26 Front Side: Component Side (double sided board)
fig.27 Back Side: GND Side (double sided board)
NOTES:
Size of the PCB is about 40mm×40mm
8×φ0.8
NOTES:
1) Dimension is in millimeters, dimension in bracket is in inches.
2) Drawing is not to scale.
fig.28 Recommended location of insertion hole
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Page.23
NR111D APPLICATION NOTE
Rev.3.0
･The circuit diagram of Demo-board for Evaluation
Z1
fig.29 The circuit diagram of Demo-board for Evaluation
C1, C2: 10μF / 35V
C3:0.1μF
C4, C5: 22μF / 16V
C6:Option
C7: 0.1μF
C9: Short
C10: Open
C11: Option
C12: Option
R1:510kΩ
R2: Option
R3:22Ω
R4:18kΩ
R5:2.7kΩ (Vo=5.0V)
R6:3.9kΩ
R7:Open
R8: Option
R9:For adjust
R10: Option
L1: 10μH
D1:SJPW-T4
(Sanken)
D2:Option
Z1：NR111D
*R9 refer to
Page20,Setup OCP
value
The demonstration boards of the fig 26 and the fig 27 are some kinds of IC common use. This is the circuit
board which contains optional part mounting for the experiment.
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Page.24
NR111D APPLICATION NOTE
Rev.3.0
7.3 Applied Design
7.3.1 Spike Noise Reduction
･The addition of the BS serial resistor
The “turn-on switching speed” of the internal
Power-MOSFETcan be slowed down by inserting RBS
(option) of the fig30.It is tendency that Spike noise becomes
small by reducing theswitching-speed. Set up 22-ohm as an
upper limit when you use RBS.
*Attention
1) When the resistance value of RBS is enlarged by mistake
toomuch, the internal power-MOSFET becomes an
under-drive,it may be damaged worst.
2) The “defective starting-up” is caused when the resistance
value of RBS is too big.
*The BS serial resistor RBS is R3 in the Demonstration Board.
･The addition of the Snubber circuit
In order to reduce the spike noise, it is possible to compensate
the output waveform and the recovery time of diode by
connecting a capacitor and resistor parallel to the freewheel
diode (snubber method). This method however may slightly
reduce the efficiency.
* For observing the spike noise with an oscilloscope, the
probe lead (GND) should be as short as possible and
connected to the root of output capacitor. If the probe GND
lead is too long, the lead may act like an antenna and the
observed spike noise may be much higher and may not show
the real values.
*The snubber circuit parts are C12 and R10.
1.BS
NR11xD series
fig.30 The addition of the BS serial resistor
3.SW
5.IN
NR11xD
NR131A
series
4.GND
R10
≒10Ω
C12
≒1000pF
fig.31 The addition of the Snubber circuit
･Attention about the insertion of the bead-core
fig.32
In the area surrounded by the red dotted line within the fig32, don’t insert the bead-core such as Ferrite-bead.
As for the pattern-design of printed-circuit-board, it is recommended that the parasitic-inductance of wiring-pattern is
made small for the safety and the stability.
When bead-core was inserted, the inductance of the bead-core is added to parasitic-inductance of the wiring-pattern.
By this influence, the surge-voltage occurs often, or , GND of IC becomes unstable, and also, negative voltage occurs
often.
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Page.25
NR111D APPLICATION NOTE
Rev.3.0
Because of this, faulty operation occurs in the IC. The IC has the possibility of damage in the worst case.
About the Noise-reduction, fundamentally, Cope by “The addition of CR snubber circuit” and “The addition of BS serial
resistor”.
7.3.2 Reverse Bias Protection
A diode for reverse bias protection may be required between
input and output in case the output voltage is expected to be
higher than the input Pin voltage (a common case in battery
charger applications).
2. IN
3.SW
NR111E
NR111D
fig.33 Reverse bias protection diode
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Page.26
NR111D APPLICATION NOTE
Rev.3.0
IMPORTANT NOTICE
 The contents in this document are subject to changes, for improvement and other purposes, without notice.
Make sure that this is the latest revision of the document before use.
 Application and operation examples described in this document are quoted for the sole purpose of reference
for the use of the products herein and Sanken can assume no responsibility for any infringement of
industrial property rights, intellectual property rights or any other rights of Sanken or any third party which
may result from its use.
 Although Sanken undertakes to enhance the quality and reliability of its products, the occurrence of failure
and defect of semiconductor products at a certain rate is inevitable. Users of Sanken products are requested
to take, at their own risk, preventative measures including safety design of the equipment or systems against
any possible injury, death, fires or damages to the society due to device failure or malfunction.
 Sanken products listed in this document are designed and intended for the use as components in general
purpose electronic equipment or apparatus (home appliances, office equipment, telecommunication
equipment, measuring equipment, etc.).
When considering the use of Sanken products in the applications where higher reliability is required
(transportation equipment and its control systems, traffic signal control systems or equipment, fire/crime
alarm systems, various safety devices, etc.), please contact your nearest Sanken sales representative to
discuss, prior to the use of the products herein.
The use of Sanken products without the written consent of Sanken in the applications where extremely high
reliability is required (aerospace equipment, nuclear power control systems, life support systems, etc.) is
strictly prohibited.
 In the case that you use Sanken semiconductor products or design your products by using Sanken
semiconductor products, the reliability largely depends on the degree of derating to be made to the rated
values. Derating may be interpreted as a case that an operation range is set by derating the load from each
rated value or surge voltage or noise is considered for derating in order to assure or improve the reliability.
In general, derating factors include electric stresses such as electric voltage, electric current, electric power
etc., environmental stresses such as ambient temperature, humidity etc. and thermal stress caused due to
self-heating of semiconductor products. For these stresses, instantaneous values, maximum values and
minimum values must be taken into consideration.
In addition, it should be noted that since power devices or IC’s including power devices have large
self-heating value, the degree of derating of junction temperature affects the reliability significantly.
 When using the products specified herein by either (i) combining other products or materials therewith or
(ii) physically, chemically or otherwise processing or treating the products, please duly consider all possible
risks that may result from all such uses in advance and proceed therewith at your own responsibility.
 Anti radioactive ray design is not considered for the products listed herein.
 Sanken assumes no responsibility for any troubles, such as dropping products caused during transportation
out of Sanken’s distribution network.
The contents in this document must not be transcribed or copied without Sanken’s written consent.
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Page.27