RENESAS HD74CBT1G126

HD74CBT1G126
Single FET Bus Switch
REJ03D0816-0100
(Previous: ADE-205-661)
Rev.1.00
Apr 07, 2006
Description
The HD74CBT1G126 features a single high-speed line switch. The switch is disabled when the output enable (OE)
input is low.
Features
•
•
•
•
Minimal propagation delay through the switch.
5 Ω switch connection between two ports.
TTL-compatible input levels.
Ultra low quiescent power.
 Ideally suited for notebook applications.
• Ordering Information
Part Name
HD74CBT1G126CME
Package Type
CMPAK–5pin
Package Code
(Previous code)
PTSP0005ZC-A
(CMPAK–5V)
Package
Abbreviation
Taping Abbreviation
(Quantity)
CM
E (3,000pcs / Reel)
Outline and Article Indication
• HD74CBT1G126
Index band
Marking
B
C
= Control code
(
or blank)
CMPAK–5
Function Table
Input OE
H
L
H:
L:
High level
Low level
Rev.1.00 Apr 07, 2006 page 1 of 6
Function
A port = B port
Disconnect
HD74CBT1G126
Pin Arrangement
OE
1
A
2
GND
3
5
VCC
4
B
(Top view)
Absolute Maximum Ratings
Item
Supply voltage range
Input voltage range *1
Input clamp current
Continuous output current
Continuous current through VCC or GND
Maximum power dissipation
*2
at Ta = 25°C (in still air)
Storage temperature
Notes:
Symbol
Ratings
Unit
VCC
VI
IIK
IO
ICC or IGND
PT
−0.5 to 7.0
−0.5 to 7.0
−50
128
±100
200
V
V
mA
mA
mA
mW
Tstg
−65 to 150
°C
Conditions
VI < 0
VO = 0 to VCC
The absolute maximum ratings are values which must not individually be exceeded, and furthermore, no two
of which may be realized at the same time.
1. The input and output voltage ratings may be exceeded even if the input and output clamp-current ratings are
observed.
2. The maximum package power dissipation was calculated using a junction temperature of 150°C.
Recommended Operating Conditions
Item
Symbol
Min
Supply voltage range
VCC
4.0
Input voltage range
VI
0
Output voltage range
VI/O
0
Input transition rise or fall rate
∆t / ∆v
0
Operating free-air temperature
Ta
−40
Note: Unused or floating inputs must be held high or low.
Rev.1.00 Apr 07, 2006 page 2 of 6
Max
5.5
5.5
5.5
5
85
Unit
V
V
V
ns / V
°C
Conditions
VCC = 4.5 to 5.5 V
HD74CBT1G126
DC Electrical Characteristics
(Ta = −40 to 85°C)
Item
Clamp diode voltage
Input voltage
On-state switch resistance *2
Input current
Off-state leakage current
Quiescent supply current
Increase in ICC per input *3
Symbol VCC (V)
VIK
4.5
VIH
4.0 to 5.5
VIL
4.0 to 5.5
RON
4.0
IIN
IOZ
ICC
∆ICC
Min

2.0


Typ



14
*1
Max
−1.2

0.8
20
4.5
4.5
4.5



5
5
10
7
7
15
0 to 5.5
5.5
5.5
5.5








±1.0
±1.0
1.0
2.5
Unit
V
V
Ω
µA
µA
µA
mA
Test conditions
IIN = −18 mA
VIN = 2.4 V, IIN = 15 mA
Typ at VCC = 4.0 V
VIN = 0 V, IIN = 64 mA
VIN = 0 V, IIN = 30 mA
VIN = 2.4 V, IIN = 15 mA
VIN = 5.5 V or GND
0 ≤ A, B ≤ VCC
VIN = VCC or GND, IO = 0 mA
One input at 3.4 V,
other inputs at VCC or GND
Notes:
For condition shown as Min or Max use the appropriate values under recommended operating conditions.
1. All typical values are at VCC = 5 V (unless otherwise noted), Ta = 25°C.
2. Measured by the voltage drop between the A and B terminals at the indicated current through the switch.
On-state resistance is determined by the lower voltage of the two (A or B) terminals.
3. This is the increase in supply current for each input that is at the specified TTL voltage level rather than VCC
or GND.
Capacitance
(Ta = 25°C)
Item
Symbol
VCC (V)
Min
Typ
Max
Unit
Control input capacitance
CIN
5.0

3

pF
Input / output capacitance
CI/O (OFF)
5.0

5

pF
Note: This parameter is determined by device characterization is not production tested.
Rev.1.00 Apr 07, 2006 page 3 of 6
Test conditions
VIN = 0 or 3 V
VO = 0 or 3 V, OE = VCC
HD74CBT1G126
Switching Characteristics
(Ta = −40 to 85°C)
VCC = 4.0 V
TO
(Output)
Symbol
Min
Max
Unit
Propagation delay time *1
tPLH
tPHL

0.35
ns
CL = 50 pF
RL = 500 Ω
A or B
B or A
Enable time
tZH
tZL
tHZ
tLZ

5.5
ns
CL = 50 pF
RL = 500 Ω
OE
A or B


4.5
4.5
ns
CL = 50 pF
RL = 500 Ω
OE
A or B
Item
Symbol
Min
Max
Unit
Propagation delay time *1
tPLH
tPHL

0.25
ns
CL = 50 pF
RL = 500 Ω
A or B
B or A
Enable time
tZH
tZL
tHZ
tLZ
1.6
4.9
ns
CL = 50 pF
RL = 500 Ω
OE
A or B
1.0
1.0
4.2
4.8
ns
CL = 50 pF
RL = 500 Ω
OE
A or B
Disable time
Test conditions
FROM
(Input)
Item
VCC = 5.0±0.5 V
Disable time
Note:
Test conditions
FROM
(Input)
TO
(Output)
1. The propagation delay is the calculated RC time constant of the typical on-state resistance of the switch and
the specified load capacitance, when driven by an ideal voltage source (zero output impedance).
Test Circuit
See under table
500 Ω
S1
OPEN
GND
*1
CL = 50 pF
500 Ω
Load circuit for outputs
Symbol
S1
t PLH / tPHL
OPEN
t ZH / t HZ
OPEN
t ZL / t LZ
7V
Note: 1. CL includes probe and jig capacitance.
Rev.1.00 Apr 07, 2006 page 4 of 6
HD74CBT1G126
Waveforms – 1
tr
tf
90 %
1.5 V
Input
3V
90 %
1.5 V
10 %
10 %
t PLH
GND
t PHL
V OH
1.5 V
Output
1.5 V
V OL
Waveforms – 2
tf
tr
90 %
Output
Control
3V
90 %
1.5 V
1.5 V
10 %
10 %
t ZL
GND
t LZ
3.5 V
Waveform - A
1.5 V
V OL + 0.3 V
t ZH
t HZ
V OH - 0.3 V
Waveform - B
V OL
V OH
1.5 V
GND
Notes: 1. All input pulses are supplied by generators having the following characteristics :
PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns.
2. Waveform - A is for an output with internal conditions such that the output is low except
when disabled by the output control.
3. Waveform - B is for an output with internal conditions such that the output is high except
when disabled by the output control.
4. The output are measured one at a time with one transition per measurement.
Rev.1.00 Apr 07, 2006 page 5 of 6
HD74CBT1G126
Package Dimensions
JEITA Package Code
RENESAS Code
SC-88A
Previous Code
PTSP0005ZC-A
D
CMPAK-5 / CMPAK-5V
MASS[Typ.]
0.006g
A
e
Q
c
E
HE
LP
L
A
A
x M
L1
S
Reference
Symbol
A3
b
A
A
A1
A2
A3
b
b1
c
c1
D
E
e
e
A2
A
A1
y S
S
e1
b
b1
c1
l1
c
b2
A-A Section
Rev.1.00 Apr 07, 2006 page 6 of 6
Pattern of terminal position areas
HE
L
L1
LP
x
y
Dimension in Millimeters
Min
0.8
0
0.8
0.15
0.1
1.8
1.15
1.8
0.3
0.1
0.2
Nom
0.9
0.25
0.22
0.2
0.13
0.11
2.0
1.25
0.65
2.1
b2
e1
1.5
l1
Q
0.25
Max
1.1
0.1
1.0
0.3
0.15
2.2
1.35
2.4
0.7
0.5
0.6
0.05
0.05
0.35
0.9
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