Datasheet

UNISONIC TECHNOLOGIES CO., LTD
UPA2008
Preliminary
CMOS IC
3W STEREO CLASS-D AUDIO
POWER AMPLIFIER WITH DC
VOLUME CONTROL

DESCRIPTION
The UTC UPA2008 is a third generation 5-V class-D amplifier
which provides precise DC volume control, lower supply current,
lower noise floor, higher efficiency, smaller packaging, and fewer
external components. Designed using a new filter-free class-D
modulation technique, the UTC UPA2008 is capable of directly
driving the speakers, without needing a low-pass output filter
consisting of two inductors and three capacitors per channel.
Eliminating this output filter saves approximately 30% in system
cost and 75% in PCB area.
The UTC UPA2008 improves the chip-level shutdown control,
1µA total supply current making the device ideal for
battery-powered applications. It also protects the chip from being
destroyed by over temperature and short current failure. To save
battery power for more essential devices when battery voltage
drops to low levels, undervoltage shutdown is designed in the UTC
UPA2008.
In applications, class-D amplifier for LCD projectors, LCD
monitors, powered speakers, the UTC UPA2008 is also suitable for
battery operated and space constrained systems.

FEATURES
* 3W per channel into 3Ω speakers (THD+N=10%)
-< 0.045% THD at 1.5W, 1kHz, 3Ω load
* Filter free modulation scheme operates without a large and
expensive LC output filter
* DC volume control with 2dB steps from -38dB to 20dB
* Extremely efficient third generation 5V Class-D technology
-Low supply current, 7mA
-Low shutdown control, 1µA
-Low noise floor, -80dBV
-Maximum efficiency into 3Ω, 78%
-Maximum efficiency into 8Ω, 88%
-PSRR, -70dB
* Operating temperature range, -40°C~85°C
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Copyright © 2015 Unisonic Technologies Co., Ltd
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UPA2008

Preliminary
ORDERING INFORMATION
Ordering Number
UPA2008G-N24-R

CMOS IC
Package
HTSSOP-24
Packing
Tape Reel
MARKING
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Preliminary
CMOS IC
PIN CONFIGURATION

LINN
1
2
24 RINN
SHUTDOWN
PVDDL
3
23 RINP
22 BYPASS
4
21 PVDDR
LOUTP
5
20 ROUTP
PGNDL
6
19 PGNDR
PGNDL
7
18 PGNDR
LOUTN 8
17 ROUTN
9
16 PVDDR
LINP
PVDDL
COSC 10
15 NC
ROSC 11
14 VOLUME
AGND 12
13
VDD
PIN DESCRIPTION

PIN
NO.
1
2
PIN NAME
DESCRIPTION
LINN
LINP
Negative differential audio input for left channel
Positive differential audio input for left channel
Places the amplifer in shutdown mode if a TTL logic low is placed on this terminal;
normal operation if a TTL logic high is placed on this terminal.
Power supply for left channel H-bridge
Positive audio output for left channel
Power ground for left channel H-bridge
Negative audio output for left channel
A capacitor connected to this terminal sets the oscillation frequency in conjunction with
ROSC. For proper operation, connect a 220pF capacitor from COSC to ground.
A resistor connected to the ROSC terminal sets the oscillation frequency in conjunction
with COSC. For proper operation, connect a 120k Ω resistor from ROSC to ground.
Analog ground
Analog power supply
DC volume control for setting the gain on the internal amplifiers. The dc voltage range is
0 to VDD
No connection
Power supply for right channel H-bridge
Negative output for right channel
Power ground for right channel H-bridge
Positive output for right channel
Tap to voltage divider for internal mid-supply bias generator used for internal analog
reference.
Negative differential audio input for right channel
Positive differential audio input for right channel
Connect to analog ground and the power grounds must be soldered down in all
applications to properly secure device on the PCB.
3
SHUTDOWN
4, 9
5
6, 7
8
PVDDL
LOUTP
PGNDL
LOUTN
10
COSC
11
ROSC
12
13
AGND
VDD
14
VOLUME
15
16, 21
17
18, 19
20
NC
PVDDR
ROUTN
PGNDR
ROUTP
22
BYPASS
23
24
RINP
RINN
Thermal Pad
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
Preliminary
CMOS IC
BLOCK DIAGRAM
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Preliminary
CMOS IC
ABSOLUTE MAXIMUM RATING over operating free-air temperature range unless otherwise noted
PARAMETER
Supply Voltage Range
SYMBOL
VDD ,PVDD
VI (RINN, RINP, LINN,
LINP, VOLUME)
TSTG
Input Voltage Range
RATINGS
-0.3~ 6
UNIT
V
0~VDD
V
Storage Temperature Range
-65~85
°C
Lead Temperature 1,6mm (1/16 inch) from Case
260
°C
for 10 Seconds
Note: Absolute maximum ratings are those values beyond which the device could be permanently damaged.
Absolute maximum ratings are stress ratings only and functional device operation is not implied.

RECOMMENDED OPERATING CONDITIONS
PARAMETER
Supply Voltage
Volume Terminal Voltage
SYMBOL
VDD
MIN
4.5
0
2
High-Level Input Voltage
SHUTDOWN
VIH
Low-Level Input Voltage
SHUTDOWN
VIL
PWM Frequency
Operating Free-Air Temperature
Operating Junction Temperature

TA
TJ
MAX
5.5
VDD
UNIT
V
V
V
200
-40
0.8
V
300
85
125
kHz
°C
°C
ELECTRICAL CHARACTERISTICS (TA=25°C, VDD=PVDD=5V, unless otherwise noted)
PARAMETER
Output Offset Voltage
(Measured Differentially)
Power Supply Rejection Ratio
High-Level Input Current
Low-Level Input Current
Supply Current
SYMBOL
|VOS|
PSRR
|IIH|
|IIL|
IDD
TEST CONDITIONS
MIN
VI=0V, AV=20dB, RL=8Ω
TYP
MAX
UNIT
5
25
mV
1
1
15
dB
µA
µA
mA
VDD=PVDD=4.5V~5.5V
VDD=PVDD=5.5V, VI=VDD=PVDD
VDD=PVDD=5.5V, VI=0V
No Filter (No Load)
RL=3Ω , PO=2.5W/channel
(Stereo)
-70
0.05
1
μA
High Side
450
600
mΩ
Low Side
450
600
mΩ
TYP
2.5
MAX
UNIT
W
RMS Supply Current at Max Power
IDD(max)
Supply Current in Shutdown Mode
IDD(SD)
SHUTDOWN =0V
Drain-Source On-State Resistance
Rds(on)
VDD=5V,
IO= 500mA,
TJ= 25°C

TYP
7
1.8
A
OPERATING CHARACTERISTICS
(TA=25°C, VDD=PVDD=5V, RL=3Ω , Gain=0dB (unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
THD+N=1%
f=1kHz,
Output Power
PO
RL=3Ω , Stereo
THD+N=10%
operation
PO=2.2W, f=20Hz~20kHz
Total Harmonic Distortion Plus Noise
THD+N
PO=1.5W, f=1kHz
Maximum Output Power Bandwidth
BOM
THD=5%
Maximum Output at
Signal-to-Noise Ratio
SNR
THD+N<0.5%
Thermal Trip Point
Thermal Hysteresis
20Hz~20kHz, Volume=0dB
Integrated Noise Floor
VN
Inputs ac
Volume=20dB
Grounded
UNISONIC TECHNOLOGIES CO., LTD
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MIN
3
W
<0.3
0.045
20
%
%
kHz
96
dB
150
20
42
°C
°C
µVrms
85
µVrms
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Preliminary
CMOS IC
TYPICAL DC VOLUME CONTROL
TYPICAL GAIN OF AMPLIFIER
VOLTAGE ON VOLUME PIN
VOLTAGE ON VOLUME PIN
(dB)
(V)
(V)
(Note 1)
(DECREASING GAIN)
(INCREASING OR FIXED GAIN)
0-0.33
0.31-0
-38 (Note 2)
0.34-0.42
0.43-0.32
-37
0.43-0.52
0.54-0.44
-35
0.53-0.63
0.64-0.55
-33
0.64-0.75
0.75-0.65
-31
0.76-0.86
0.86-0.76
-29
0.87-0.97
0.97-0.87
-27
0.98-1.07
1.08-0.98
-25
1.08-1.18
1.19-1.09
-23
1.19-1.30
1.32-1.20
-21
1.31-1.41
1.42-1.33
-19
1.42-1.52
1.53-1.43
-17
1.53-1.63
1.63-1.54
-15
1.64-1.75
1.75-1.64
-13
1.76-1.85
1.84-1.76
-12
1.86-1.96
1.96-1.85
-10
1.97-2.07
2.09-1.97
-8
2.08-2.18
2.19-2.10
-6
2.19-2.30
2.33-2.20
-4
2.31-2.40
2.43-2.34
-2
2.41-2.52
2.49-2.44
0 (Note 2)
2.53-2.63
2.62-2.50
2
2.64-2.75
2.75-2.63
4
2.76-2.87
2.85-2.76
6
2.88-2.98
2.99-2.86
8
2.99-3.10
3.12-3.00
10
3.11-3.22
3.25-3.13
12
3.23-3.33
3.36-3.26
14
3.34-3.47
3.48-3.37
16
3.48-3.69
3.64-3.49
18
3.70-VDD
VDD-3.65
20 (Note 2)
Notes: 1. The typical part-to-part gain variation can be as large as ±2dB (one gain step)
2. Tested in production
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
Preliminary
CMOS IC
TYPICAL APPLICATION CIRCUIT
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
Preliminary
CMOS IC
TYPICAL APPLICATION CIRCUIT (Cont.)
UTC assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or
other parameters) listed in products specifications of any and all UTC products described or contained
herein. UTC products are not designed for use in life support appliances, devices or systems where
malfunction of these products can be reasonably expected to result in personal injury. Reproduction in
whole or in part is prohibited without the prior written consent of the copyright owner. The information
presented in this document does not form part of any quotation or contract, is believed to be accurate
and reliable and may be changed without notice.
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