UNISONIC TECHNOLOGIES CO., LTD UPS3652 LINEAR INTEGRATED CIRCUIT HIGH PERFORMANCE CURRENT MODE POWER SWITCH DESCRIPTION The UTC UPS3652 is an integrated PWM controller and PowerMOSFET specifically designed for switching operation with minimal external components. The UTC UPS3652 is designed to provide several special enhancements to satisfy the needs, for example, Power-Saving mode for low standby power (<0.3W), Frequency Hopping , Constant Output Power Limiting , Slope Compensation ,Over Current Protection (OCP), Over Voltage Protection (OVP), Over Load Protection (OLP), Under Voltage Lock Out (UVLO), Short Circuit Protection (SCP) , Over Temperature Protection (OTP), etc. IC will be shutdown or can auto-restart in situations. DIP-8 FEATURE * Internal PowerMOSFET (650V) * Programming Gate Driver Capability * Frequency hopping for Improved EMI Performance. * Lower than 0.3W Standby Power Design * Linearly decreasing frequency to 26KHz during light load * Internal Soft start * Internal Slope Compensation * Constant Power Limiting for universal AC input Range * Gate Output Maximum Voltage Clamp(15V) * Over temperature protection * Overload protection * Over voltage protection * Leading edge blanking * Cycle-by-Cycle current limiting * Under Voltage Lock Out * Short Circuit Protection ORDERING INFORMATION Ordering Number Lead Free Halogen Free UPS3652L-D08-T UPS3652G-D08-T www.unisonic.com.tw Copyright © 2013 Unisonic Technologies Co., Ltd Package Packing DIP-8 Tube 1 of 9 QW-R119.021.B UPS3652 PIN CONFIGURATION VCC-G 1 8 GND VCC 2 7 GND FB 3 6 DRAIN CS 4 5 DRAIN PIN DESCRIPTION PIN NO. 1 2 3 4 5 6 7 8 LINEAR INTEGRATED CIRCUIT PIN NAME VCC-G VCC FB CS DRAIN DRAIN GND GND DESCRIPTION Supply voltage Supply voltage Feedback Current sense input Power MOSFET drain Power MOSFET drain Ground Ground BLOCK DIAGRAM Notes: OLP (Over Load Protection) OVP (Over Voltage Protection) OTP (Over Temperature Protection) OCP (Over Current Protection) UVLO (Under Voltage Latch-Out) LEB (Led Edge Blanking) UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 2 of 9 QW-R119-021.B UPS3652 LINEAR INTEGRATED CIRCUIT ABSOLUTE MAXIMUM RATING (TA=25°C, unless otherwise specified) PARAMETER SYMBOL RATINGS UNIT Supply Voltage VCC 30 V Input Voltage to FB Pin VFB -0.3 ~ 6.5 V Input Voltage to CS Pin VCS -0.3 ~ 6.5 V Junction Temperature TJ +150 °C Operating Temperature TOPR -40 ~ +125 °C Storage Temperature TSTG -50 ~ +150 °C Note: Absolute maximum ratings are those values beyond which the device could be permanently damaged. Absolute maximum ratings are stress ratings only and functional device operation is not implied. OPERATING RANGE PARAMETER Supply Voltage SYMBOL VCC RATINGS 8.6 ~ 22 UNIT V ELECTRICAL CHARACTERISTICS (TA＝25°C, VCC=15V, unless otherwise specified) PARAMETER SYMBOL TEST CONDITIONS SUPPLY SECTION Start Up Current IST VCC = VTHD(ON)-1V Supply Current with switch IOP VFB= 4V UNDER-VOLTAGE LOCKOUT SECTION Start Threshold Voltage VTHD(ON) Min. Operating Voltage VCC(MIN) Hysteresis VCC(HY) INTERNAL VOLTAGE REFERENCE Reference Voltage VREF Guarantee by design CONTROL SECTION Feedback Source Current IFB VFB=0 VFB Operating Level VFBMAX Burst-Mode Out FB Voltage VFB(OUT) VCS =0 Reduce-Frequency end FB Voltage VFB(END) VCS =0 Burst-Mode Enter FB Voltage VFB(IN) VCS =0 Normal initial VFB = 4V Switching frequency F(SW) Power-Saving Before enter burst mode Duty Cycle DMAX VFB=4V, VCS=0 Frequency Hopping FJ(SW) Frequency Variation VS VCC Deviation FDV VCC=10 to 20V Frequency Variation VS Temperature Deviation FDT T=-25 to 105°C Soft-Start Time TSOFTS PROTECTION SECTION OVP threshold VOVP VFB=4V OLP threshold VFB(OLP) VCS=0 CFB=47nF(From VFB=3.7V Delay Time Of OLP TD-OLP to Drain OFF) OTP Threshold T(THR) CURRENT LIMITING SECTION Leading Edge Blanking Time tLEB Peak Current Limitation VCS VFB=4V Threshold Voltage For Valley VSENSE-L VFB=4V UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw MIN TYP MAX UNIT 22 8 45 10 μA mA 13.5 7.5 14.2 8.2 6 15 9 V V V 6.3 6.5 6.7 V 1.1 3.5 45 20 64 ±2.5 2 1.1 1.2 0.9 50 72 ±4 4 55 30 80 ±5.5 5 5 6 23 3.7 mA V V V V kHz kHz % kHz % % ms V V 35 65 95 ms 120 135 155 °C 270 0.88 350 0.95 0.75 450 1.03 nS V V 3 of 9 QW-R119-021.B UPS3652 LINEAR INTEGRATED CIRCUIT ELECTRICAL CHARACTERISTICS(Cont.) PARAMETER SYMBOL TEST CONDITIONS POWER MOS-TRANSISTOR SECTION Drain-Source Breakdown Voltage VDSS VGS=0V, ID=250μA Turn-on voltage between gate and source VTH VDS=VGS, ID=250μA Drain-Source Diode Continuous Source Current IS Static Drain-Source On-State Resistance RDS(ON) VGS=10V,ID=2.25A VDD =300V, ID =4.0A Rise Time tR RG=25Ω (Note 1,2) Fall Time tF Notes: 1. Pulse Test: Pulse width≤300μs, Duty cycle≤2% 2. Essentially independent of operating temperature UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw MIN TYP MAX UNIT 4 2 5 V V A Ω 45 100 ns 35 80 ns 650 2 4 of 9 QW-R119-021.B UPS3652 LINEAR INTEGRATED CIRCUIT FUNCTIONAL DESCRIPTION The internal reference voltages and bias circuit work at VCC> VTHD(ON), and shutdown at VCC<VCC(MIN). (1) Soft-Start When every IC power on, driver output duty cycle will be decided by inter-slope voltage VSOFTS and VCS on current sense resistor at beginning. After the whole soft-start phase end, and driver duty cycle depend on VFB and VCS. The relation among VSOFTS, VFB and VOUT as followed FIG.3. Furthermore, soft-start phase should end before VCC reach VCC(MIN) during VCC power on. Otherwise, if soft-start phase remain not end before VCC reach VCC(MIN) during VCC power on, IC will enter auto-restart phase and not set up VOUT. FIG.3 Soft-start phase (2) Switching Frequency Set The maximum switching frequency is set to 50kHz. Switching frequency is modulated by output power POUT during IC operating. At no load or light load condition, most of the power dissipation in a switching mode power supply is from switching loss on the MOSFET transistor, the core loss of the transformer and the loss on the snubber circuit. The magnitude of power loss is in proportion to the number of switching events within a fixed period of time. So lower Switching frequency at lower load, which more and more improve IC’s efficiency at light load. At from no load to light load condition, The IC will operate at from Burst mode to Reducing Frequency Mode. The relation curve between fSW and POUT/POUT(MAX) as followed FIG.4. FIG.4 The relation curve between fSW and relative output power POUT/ POUT(MAX) UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 5 of 9 QW-R119-021.B UPS3652 LINEAR INTEGRATED CIRCUIT FUNCTIONAL DESCRIPTION(Cont.) (3) Internal Synchronized Slope Compensation Built-in slope compensation circuit adds voltage ramp onto the current sense input voltage for PWM generation, this greatly improves the close loop stability at CCM and prevents the sub-harmonic oscillation and thus reduces the output ripple voltage. (4) Frequency Hopping For EMI Improvement The Frequency Hopping is implemented in the IC; there are two oscillators built-in the IC. The first oscillator is to set the normal switching frequency; the switching frequency is modulated with a period signal generated by the 2nd oscillator. The relation between the first oscillator and the 2nd oscillator as followed FIG.5. So the tone energy is evenly spread out, the spread spectrum minimizes the conduction band EMI and therefore eases the system design in meeting stringent EMI requirement. FIG.5 Frequency Hopping (5) Constant Output Power Limit When the primary current, across the primary wind of transfer, reaches the limit current, around 1.2A, the output GATE drive will be turned off after a small propagation delay tD. This propagation delay will introduce an additional current proportional to tD×VIN/Lp. Since the propagation delay is nearly constant regardless of the input line voltage VIN. Higher input line voltage will result in a larger additional current and hence the output power limit is also higher than that under low input line voltage. To compensate for this output power limit variation across a wide AC input range, the threshold voltage is adjusted by adding a positive ramp. This ramp signal rises from 0.75V to 0.95V, and then flattens out at 0.95V. A smaller threshold voltage forces the output GATE drive to terminate earlier. This reduces the total PWM turn-on time and makes the output power equal to that of low line input. This proprietary internal compensation ensures a constant output power limit for a wide AC input voltage range (90VAC to 264VAC). (6) Protection section The IC takes on more protection functions such as OLP, OVP and OTP etc. In case of those failure modes for continual blanking time, the driver is shut down. At the same time, IC enters auto-restart, VCC power on and driver is reset after VCC power on again. OLP After power on, IC will shutdown driver if over load state occurs for continual TD-OLP. OLP case as followed FIG.6. The test circuit as followed FIG.8. TD-OLP≈2CFB/1.4. OVP OVP will shutdown the switching of the power MOSFET whenever VCC>VOVP. The OVP case as followed FIG.7. the test circuit as followed FIG.9. UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 6 of 9 QW-R119-021.B UPS3652 LINEAR INTEGRATED CIRCUIT FUNCTIONAL DESCRIPTION(Cont.) FIG.6 OLP case 470u VCC IC3 33n 15V 1 8 2 7 47nF 3 4 6 5.6V 3V 0 5 VCC IC3 t VFB UPS3652 15V VDD 470u 33n 500Ω/1W VDRAIN 500Ω/1W 15V FIG.7 OVP case 470u TD-OLP 33n 8 2 7 Drain UPS3652 2.5V t 1 3 6 4 5 VCC VOVP VCC VTHD(ON) 0 t FIG.8 OLP test circuit FIG.9 OVP test circuit OTP OTP will shut down driver when junction temperature TJ>T(THR) for continual a blanking time. (7) Driver Output Section The driver-stage drives the gate of the MOSFET and is optimized to minimize EMI and to provide high circuit efficiency. This is done by reducing the switch on slope when reaching the MOSFET threshold. This is achieved by a slope control of the rising edge at the driver’s output. The output driver is clamped by an internal 15V Zener diode in order to protect power MOSFET transistors against undesirable gate over voltage. (8) Inside power switch MOS transistor Specific power MOS transistor parameter is as “POWER MOS TRANSISTOR SECTION” in electrical characteristics table. UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 7 of 9 QW-R119-021.B UPS3652 LINEAR INTEGRATED CIRCUIT TYPICAL APPLICATION CIRCUIT YC1 C8 R6 LINE F1 L1 XC1 ZNR1 R1 R2 1 2 4 3 4 BD1 3 T1 10 R3 1 C1 2 C2 12V/1.33A D2 C10 C4 9 R5 L2 1 2 16W 3 NEUT GND 4 D1 R7 2 RG VCC 1 D3 8 7 C3 IC1 6 DRAIN 5 DRAIN 6 R17 VCC-G R14 R10 IC2 FB GND GND 8 7 3 CS 4 RCS 4 1 3 2 C9 R8 IC3 C7 R9 FIG.10 UTC UPS3652 Typical Application Circuit Table1. Components reference description for UTC UPS3652 application circuit DESIGNATOR C1 C2 C3 C4 C7 C8 C9 C10 PART TYPE 33μF 0.001μF 22μF 470μF 0.01μF 0.001μF 0.1μF 470μF DESIGNATOR R1 R2 R3 R5 R6 R7 R8 R9 R10 R14 R17 RG RCS UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw PART TYPE 2.2MΩ 2.2MΩ 100KΩ 2MΩ 30Ω 15Ω 4.7KΩ 3.92KΩ 15KΩ 1.8KΩ 510Ω 0Ω 1Ω DESIGNATOR D1 D2 D3 IC1 IC2 IC3 YC1 T1 L1 L2 F1 ZNR1 XC1 BD1 PART TYPE RS1M SR39 RS1D UPS3652 PC-817 TL431 102P/400V EE22 UU9.8 2μH 1A/250V 7D471K 0.1μF/250V KBP205 8 of 9 QW-R119-021.B UPS3652 LINEAR INTEGRATED CIRCUIT Frequency(KHz) Input Power (mW) TYPICAL CHARACTERISTICS UTC assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all UTC products described or contained herein. UTC products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 9 of 9 QW-R119-021.B