SPECIFICATION SPEC. No. A-ESD-a D A T E : 2014 Jan. To Non-Controlled Copy Upon the acceptance of this spec. previous spec. (C2005-1420) shall be abolished. CUSTOMER’S PRODUCT NAME TDK PRODUCT NAME MULTILAYER CERAMIC CHIP CAPACITORS CGA Series / Automotive Grade ESD Protection CGA3EA Series Please return this specification to TDK representatives. If orders are placed without returned specification, please allow us to judge that specification is accepted by your side. RECEIPT CONFIRMATION DATE: TDK Corporation Sales Electronic Components Sales & Marketing Group APPROVED Person in charge YEAR MONTH DAY TDK-EPC Corporation Engineering Ceramic Capacitors Business Group APPROVED CHECKED Person in charge 1. SCOPE This specification is applicable to chip type multilayer ceramic capacitors with a priority over the other relevant specifications. Production places defined in this specification shall be TDK-EPC Corporation Japan, TDK (Suzhou) Co., Ltd and TDK Components U.S.A. Inc. EXPLANATORY NOTE: This specification warrants the quality of the ceramic chip capacitor. The chips should be evaluated or confirmed a state of mounted on your product. If the use of the chips go beyond the bounds of this specification, we can not afford to guarantee. 2. CODE CONSTRUCTION (Example) Catalog Number : CGA3 (1) (Web) Item Description : CGA3 (1) E (2) A (3) C0G (4) 2 A (5) 103 (6) J (7) 080 (8) A (9) E (2) A (3) C0G (4) 2 A (5) 103 (6) J (7) T (11) xxxx (12) (1) Type Terminal electrode B L G W B T Internal electrode Ceramic dielectric Please refer to product list for the dimension of each product. (2) Thickness * As for dimension tolerance, please contact with our sales representative. (3) Identification for ESD capacitor (Details are shown in table 1 No.16 at page 6) Thickness Dimension (mm) E 0.80 Symbol Identification A ESD Capacitor (4) Temperature Characteristics (Details are shown in table 1 No.6 at page 3) —1— C (10) (5) Rated Voltage Symbol Rated Voltage 2A DC 100 V (6) Rated Capacitance Stated in three digits and in units of pico farads (pF). The first and Second digits identify the first and second significant figures of the capacitance, the third digit identifies the multiplier. Example 103 → 10,000pF (7) Capacitance tolerance Symbol J Tolerance ± 5% (8) Thickness code (Only Catalog Number) (9) Package code (Only Catalog Number) (10) Special code (Only Catalog Number) (11) Packaging (Only Item Description) (Bulk is not applicable for CGA1 and CGA2 type.) Symbol Packaging B Bulk T Taping (12) Internal code (Only Item Description) 3. OPERATING TEMPERATURE RANGE Min. operating Max. operating T.C. Temperature Temperature Reference Temperature C0G -55°C 125°C 25°C NP0 -55°C 150°C 25°C 4. STORING CONDITION AND TERM 5 to 40°C at 20 to 70%RH 6 months Max. 5. INDUSTRIAL WASTE DISPOSAL Dispose this product as industrial waste in accordance with the Industrial Waste Law. —2— 6. PERFORMANCE table 1 No. Item Performance Test or inspection method 1 External Appearance No defects which may affect performance. Inspect with magnifying glass (3×). 2 Insulation Resistance 10,000MΩ min. Apply rated voltage for 60s. 3 Voltage Proof Withstand test voltage without insulation breakdown or other damage. 3 times of rated voltage Above DC voltage shall be applied for 1 to 5s. Charge / discharge current shall not exceed 50mA. 4 Capacitance Within the specified tolerance. Capacitance Measuring frequency 1000pF and under 1MHz±10% Over 1000pF 1kHz±10% Measuring voltage 0.5 - 5 Vrms. For information which product has which measuring voltage, please contact with our sales representative. 5 Q (Class1) 6 Temperature Characteristics of Capacitance (Class1) 1,000 min. See No.4 in this table for measuring condition. T.C. Temperature Coefficient C0G NP0 0 ± 30 (ppm/°C) 0 ± 30 (ppm/°C) Capacitance drift within ± 0.2% or ± 0.05pF, whichever larger. 7 Robustness of Terminations No sign of termination coming off, breakage of ceramic, or other abnormal signs. Temperature coefficient shall be calculated based on values at 25°C and 85°C temperature. Measuring temperature below 20°C shall be -10°C and -25°C. Reflow solder the capacitors on a P.C.Board shown in Appendix 1a or Appendix 1b and apply a pushing force of 17.7N with 10±1s. Pushing force Capacitor —3— P.C.Board (continued) No. 8 Item Bending Performance No mechanical damage. Test or inspection method Reflow solder the capacitors on a P.C.Board shown in Appendix 2a or Appendix 2b and bend it for 2mm. 20 50 F R230 45 9 Solderability New solder to cover over 75% of termination. 25% may have pin holes or rough spots but not concentrated in one spot. Ceramic surface of A sections shall not be exposed due to melting or shifting of termination material. 2 45 (Unit : mm) Completely soak both terminations in solder at 235±5°C for 2±0.5s. Solder : H63A (JIS Z 3282) Flux : Isopropyl alcohol (JIS K 8839) Rosin(JIS K 5902) 25% solid solution. A section 10 Resistance to solder heat External appearance No cracks are allowed and terminations shall be covered at least 60% with new solder. Capacitance Change from the Characteristics value before test C0G NP0 ± 2.5% Completely soak both terminations in solder at 260±5°C for 5±1s. Preheating condition Temp. : 150±10°C Time : 1 to 2min. 1,000 min. Flux : Isopropyl alcohol (JIS K 8839) Rosin (JIS K 5902) 25% solid solution. Insulation Resistance Meet the initial spec. Solder : H63A (JIS Z 3282) Voltage proof No insulation breakdown or other damage. Leave the capacitors in ambient condition for 6 to 24h (Class1) before measurement. Q (Class1) —4— (continued) No. 11 Item Vibration Performance External No mechanical damage. appearance Capacitance Q Characteristics Change from the value before test C0G NP0 ± 2.5% 1,000 min. (Class1) 12 Temperature External cycle appearance No mechanical damage. Capacitance Q Characteristics Change from the value before test C0G NP0 ± 2.5% Insulation Resistance Meet the initial spec. Voltage proof No insulation breakdown or other damage. Q ± 7.5% 350 min. Applied force : 5G max. Frequency : 10-2000Hz Duration : 20 min. Cycle : 12 cycles in each 3 mutually perpendicular directions. Reflow solder the capacitors on a P.C.Board shown in Appendix 1a or Appendix 1b before testing. Expose the capacitors in the condition step1 through step 4 and repeat 1,000 times consecutively. Temperature(°C) 1 Min. operating temp. ±3 2 Reference Temp. ±2 3 Max. operating temp. ±2 4 Reference Temp. ±2 Time (min.) 30 ± 3 2-5 30 ± 2 2-5 Reflow solder the capacitors on a P.C.Board shown in Appendix 1a or Appendix 1b before testing. Leave at temperature 40±2°C, 90 to 95%RH for 500 +24,0h. Leave the capacitors in ambient condition for 6 to 24h (Class1) before measurement. (Class1) Insulation Resistance Vibrate the capacitor with following conditions. Step Moisture External No mechanical damage. Resistance appearance (Steady Capacitance Change from the Characteristics State) value before test C0G NP0 Reflow solder the capacitors on a P.C.Board shown in Appendix1 before testing. Leave the capacitors in ambient condition for 6 to 24h (Class 1) before measurement. 1,000 min. (Class1) 13 Test or inspection method 1,000MΩ min. —5— (continued) No. Item 14 Moisture External Resistance appearance Performance Test or inspection method No mechanical damage. Reflow solder the capacitors on a P.C.Board shown in Appendix 1a or Appendix 1b before testing. Capacitance Q Characteristics Change from the value before test C0G NP0 ± 7.5% Charge/discharge current shall not exceed 50mA. 200 min. (Class1) 15 Life Insulation Resistance External appearance Q Leave the capacitors in ambient condition for 6 to 24h (Class1) before measurement 500MΩ min. No mechanical damage. Capacitance Reflow solder the capacitors on a P.C.Board shown in Appendix 1a or Appendix 1b before testing. Characteristics Change from the value before test C0G NP0 ± 7.5% Below the voltage shall be applied at maximum operating temperature ±2°C for 1,000 +48, 0h. Applied voltage 350 min. Rated voltage x2 (Class1) Insulation Resistance Apply the rated voltage at temperature 85°C and 85%RH for 1000 +24,0h. 1,000MΩ min. Rated voltage x1 For information which product has which applied voltage, please contact with our sales representative. Charge/discharge current shall not exceed 50mA. 15 ESD Withstand ESD voltage insulation breakdown. Leave the capacitors in ambient condition for 6 to 24h (Class1) before measurement. without Solder the capacitors on a P.C.Board shown in Appendix3 before testing. Circuit condition : IEC 61000-4-2 ( Cs : 150pF / Rd : 330Ω) Test method : Direct contact Number of ESD pulse : ±10 times Rc : Change current limit registor Rd : Discharge registor Cs : Energy storage capacitor As for applied ESD level, please refer to the table A in the end of the specification. After each ESD pulse, dissipation of residual change shall be done with applying 1MΩ registance for 1 sec min. —6— Appendix - 1 Appendix - 2 P.C. Board for reliability test P.C. Board for bending test 100 100 c b c Solder resist 40 40 a b 1.0 a Copper Copper Solder resist (Unit : mm) (Unit：mm) Appendix - 3 P.C. Board for ESD test Appendix 1, 2 Material : Glass Epoxy ( As per JIS C6484 GE4 ) P.C. Board thickness : Appendix-1, 2, 3 TDK (EIA style) 1.6mm CGA3 (CC0603) Dimensions (mm) a b c 1.0 3.0 1.2 Appendix 3 Copper ( thickness 0.035mm ) Solder resist TDK (EIA style) CGA3 (CC0603) —7— Dimensions (mm) a b c 1.0 3.0 0.75 7. INSIDE STRUCTURE AND MATERIAL 3 4 5 2 1 No. NAME MATERIAL 1 Dielectric CaZrO 3 2 Electrode Nickel (Ni) 3 4 Copper (Cu) Nickel (Ni) Termination 5 Tin (Sn) 8. Setting up for ESD test ESD Gun (150pF/330Ω ) Horizonal coupling plane (HPC) Non-conductive (wooden) table Cable for dissipation of residual change (1MΩ ) Test board 470kΩ 470kΩ Power supply Resistor Ground reference plane (GRP) —8— 9. Caution No. Process 1 Operating Condition (Storage, Transportation) Condition 1-1. Storage 1) The capacitors must be stored in an ambient temperature of 5 to 40°C with a relative humidity of 20 to 70%RH. The products should be used within 6 months upon receipt. 2) The capacitors must be operated and stored in an environment free of dew condensation and these gases such as Hydrogen Sulphide, Hydrogen Sulphate, Chlorine, Ammonia and sulfur. 3) Avoid storing in sun light and falling of dew. 4) Do not use capacitors under high humidity and high and low atmospheric pressure which may affect capacitors reliability. 2 Circuit design ! Caution 5) Capacitors should be tested for the solderability when they are stored for long time. 1-2. Handling in transportation In case of the transportation of the capacitors, the performance of the capacitors may be deteriorated depending on the transportation condition. (Refer to JEITA RCR-2335B 9.2 Handling in transportation) 2-1. Operating temperature Operating temperature should be followed strictly within this specification, especially be careful with maximum temperature. 1) Do not use capacitors above the maximum allowable operating temperature. 2) Surface temperature including self heating should be below maximum operating temperature. (Due to dielectric loss, capacitors will heat itself when AC is applied. Especially at high frequencies around its SRF, the heat might be so extreme that it may damage itself or the product mounted on. Please design the circuit so that the maximum temperature of the capacitors including the self heating to be below the maximum allowable operating temperature. Temperature rise at capacitor surface shall be below 20°C) 3） The electrical characteristics of the capacitors will vary depending on the temperature. The capacitors should be selected and designed in taking the temperature into consideration. 2-2. Operating voltage 1) Operating voltage across the terminals should be below the rated voltage. When AC and DC are super imposed, V0-P must be below the rated voltage. ——— (1) and (2) AC or pulse with overshooting, VP-P must be below the rated voltage. ——— (3), (4) and (5) When the voltage is started to apply to the circuit or it is stopped applying, the irregular voltage may be generated for a transit period because of resonance or switching. Be sure to use the capacitors within rated voltage containing these Irregular voltage. Voltage (1) DC voltage (2) DC+AC voltage (3) AC voltage Positional Measurement V0-P (Rated voltage) 0 Voltage VP-P V0-P 0 (4) Pulse voltage (A) (5) Pulse voltage (B) Positional Measurement VP-P (Rated voltage) 0 VP-P —9— 0 0 No. Process Condition 2 Circuit design ! Caution 2) Even below the rated voltage, if repetitive high frequency AC or pulse is applied, the reliability of the capacitors may be reduced. 3) The effective capacitance will vary depending on applied DC and AC voltages. The capacitors should be selected and designed in taking the voltages into consideration. 2-3. Frequency When the capacitors (Class 2) are used in AC and/or pulse voltages, the capacitors may vibrate themselves and generate audible sound. 3 Designing P.C.board The amount of solder at the terminations has a direct effect on the reliability of the capacitors. 1) The greater the amount of solder, the higher the stress on the chip capacitors, and the more likely that it will break. When designing a P.C.board, determine the shape and size of the solder lands to have proper amount of solder on the terminations. 2) Avoid using common solder land for multiple terminations and provide individual solder land for each terminations. 3) Size and recommended land dimensions. Chip capacitors Solder land C Solder resist A B Flow soldering Type Symbol (mm) CGA3 (CC0603) A 0.7 - 1.0 B 0.8 - 1.0 C 0.6 - 0.8 Reflow soldering Type Symbol (mm) CGA3 (CC0603) A 0.6 - 0.8 B 0.6 - 0.8 C 0.6 - 0.8 — 10 — No. 3 Process Designing P.C.board Condition 4) Recommended chip capacitors layout is as following. Disadvantage against bending stress Advantage against bending stress Perforation or slit Perforation or slit Break P.C.board with mounted side up. Break P.C.board with mounted side down. Mounting face Mount perpendicularly to perforation or slit Perforation or slit Mount in parallel with perforation or slit Perforation or slit Chip arrangement (Direction) Closer to slit is higher stress Away from slit is less stress ℓ2 ℓ1 Distance from slit (ℓ1 < ℓ2 ) — 11 — (ℓ1 < ℓ2 ) No. 3 Process Designing P.C.board Condition 5) Mechanical stress varies according to location of chip capacitors on the P.C.board. E Perforation D C B A Slit The stress in capacitors is in the following order. A>B=C>D>E 6) Layout recommendation Example Use of common solder land Soldering with chassis Lead wire Chassis chip Solder Use of common solder land with other SMD Solder land Excessive solder Need to avoid Excessive solder PCB Adhesive Solder land ℓ1 Missing solder Lead wire Solder land Solder resist Solder resist Recommendation Solder resist ℓ2 ℓ2 > ℓ1 — 12 — 4 Process Mounting Condition 4-1. Stress from mounting head If the mounting head is adjusted too low, it may induce excessive stress in the chip capacitors to result in cracking. Please take following precautions. 1) Adjust the bottom dead center of the mounting head to reach on the P.C.board surface and not press it. 2) Adjust the mounting head pressure to be 1 to 3N of static weight. 3) To minimize the impact energy from mounting head, it is important to provide support from the bottom side of the P.C.board. See following examples. Not recommended Single sided mounting Recommended Crack Support pin Double-sides mounting Solder peeling Crack Support pin When the centering jaw is worn out, it may give mechanical impact on the capacitors to cause crack. Please control the close up dimension of the centering jaw and provide sufficient preventive maintenance and replacement of it. 4-2. Amount of adhesive a a c c b No. — 13 — Soldering 5-1. Flux selection Although highly-activated flux gives better solderability, substances which increase activity may also degrade the insulation of the chip capacitors. To avoid such degradation, it is recommended following. 1) It is recommended to use a mildly activated rosin flux (less than 0.1wt% chlorine). Strong flux is not recommended. 2) Excessive flux must be avoided. Please provide proper amount of flux. 3) When water-soluble flux is used, enough washing is necessary. 5-2. Recommended soldering profile by various methods Reflow soldering Wave soldering Soldering Preheating Natural cooling Peak Temp Peak Temp △T 0 Soldering Natural cooling Preheating Temp.. (°C) 5 Condition Temp. (°C) Process Over 60 sec. Over 60 sec. 0 ∆T Over 60 sec. Peak Temp time Peak Temp time Manual soldering (Solder iron) 300 Temp.. (°C) No. ∆T Preheating 0 3sec. (As short as possible) 5-3. Recommended soldering peak temp and peak temp duration Temp./Duration Wave soldering Reflow soldering Peak temp(°C) Duration(sec.) Peak temp(°C) Duration(sec.) Pb-Sn Solder 250 max. 3 max. 230 max. 20 max. Lead Free Solder 260 max. 5 max. 260 max. 10 max. Solder Recommended solder compositions Sn-37Pb (Pb-Sn solder) Sn-3.0Ag-0.5Cu (Lead Free Solder) — 14 — No. Process 5 Soldering Condition 5-4. Avoiding thermal shock 1) Preheating condition Soldering 2) Type Temp. (°C) Wave soldering CGA3(CC0603) ∆T ≤ 150 Reflow soldering CGA3(CC0603) ∆T ≤ 150 Manual soldering CGA3(CC0603) ∆T ≤ 150 Cooling condition Natural cooling using air is recommended. If the chips are dipped into a solvent for cleaning, the temperature difference (∆T) must be less than 100°C. 5-5. Amount of solder Excessive solder will induce higher tensile force in chip capacitors when temperature changes and it may result in chip cracking. In sufficient solder may detach the capacitors from the P.C.board. Higher tensile force in chip capacitors to cause crack Excessive solder Maximum amount Minimum amount Adequate Low robustness may cause contact failure or chip capacitors come off the P.C.board. Insufficient solder 5-6. Solder repair by solder iron 1) Selection of the soldering iron tip Tip temperature of solder iron varies by its type, P.C.board material and solder land size. The higher the tip temperature, the quicker the operation. However, heat shock may cause a crack in the chip capacitors. Please make sure the tip temp. before soldering and keep the peak temp and time in accordance with following recommended condition. (Please preheat the chip capacitors with the condition in 5-4 to avoid the thermal shock.) — 15 — No. Process 5 Soldering Condition Recommended solder iron condition (Pb-Sn Solder and Lead Free Solder) Temp. (°C) Duration (sec.) Wattage (W) Shape (mm) 300 max. 3 max. 20 max. Ø 3.0 max. 2) Direct contact of the soldering iron with ceramic dielectric of chip capacitors may cause crack. Do not touch the ceramic dielectric and the terminations by solder iron. 5-7. Sn-Zn solder Sn-Zn solder affects product reliability. Please contact TDK in advance when utilize Sn-Zn solder. 5-8. Countermeasure for tombstone The misalignment between the mounted positions of the capacitors and the land patterns should be minimized. The tombstone phenomenon may occur especially the capacitors are mounted (in longitudinal direction) in the same direction of the reflow soldering. (Refer to JEITA RCR-2335B Annex A (Informative) Recommendations to prevent the tombstone phenomenon) 6 Cleaning 1) If an unsuitable cleaning fluid is used, flux residue or some foreign articles may stick to chip capacitors surface to deteriorate especially the insulation resistance. 2) If cleaning condition is not suitable, it may damage the chip capacitors. 2)-1. Insufficient washing (1) Terminal electrodes may corrode by Halogen in the flux. (2) Halogen in the flux may adhere on the surface of capacitors, and lower the insulation resistance. (3) Water soluble flux has higher tendency to have above mentioned problems (1) and (2). 2)-2. Excessive washing When ultrasonic cleaning is used, excessively high ultrasonic energy output can affect the connection between the ceramic chip capacitor's body and the terminal electrode. To avoid this, following is the recommended condition. Power : 20 W/ℓ max. Frequency : 40 kHz max. Washing time : 5 minutes max. 2)-3. If the cleaning fluid is contaminated, density of Halogen increases, and it may bring the same result as insufficient cleaning. — 16 — No. 7 Process Coating and molding of the P.C.board Condition 1) When the P.C.board is coated, please verify the quality influence on the product. 2) Please verify carefully that there is no harmful decomposing or reaction gas emission during curing which may damage the chip capacitors. 3) Please verify the curing temperature. 8 Handling after chip mounted ! Caution 1) Please pay attention not to bend or distort the P.C.board after soldering in handling otherwise the chip capacitors may crack. Bend Twist 2) When functional check of the P.C.board is performed, check pin pressure tends to be adjusted higher for fear of loose contact. But if the pressure is excessive and bend the P.C.board, it may crack the chip capacitors or peel the terminations off. Please adjust the check pins not to bend the P.C.board. Item Not recommended Recommended Termination peeling Support pin Board bending Check pin Check pin 9 Handling of loose chip capacitors 1) If dropped the chip capacitors may crack. Once dropped do not use it. Especially, the large case sized chip capacitors are tendency to have cracks easily, so please handle with care. Crack Floor 2) Piling the P.C.board after mounting for storage or handling, the corner of the P.C. board may hit the chip capacitors of another board to cause crack. P.C.board Crack — 17 — No. Process Condition 10 Capacitance aging The capacitors (Class 2) have aging in the capacitance. They may not be used in precision time constant circuit. In case of the time constant circuit, the evaluation should be done well. 11 Estimated life and estimated failure rate of capacitors As per the estimated life and the estimated failure rate depend on the temperature and the voltage. This can be calculated by the equation described in JEITA RCR-2335B Annex 6 (Informative) Calculation of the estimated lifetime and the estimated failure rate ( Voltage acceleration coefficient : 3 multiplication rule, Temperature acceleration coefficient : 10°C rule) The failure rate can be decreased by reducing the temperature and the voltage but they will not be guaranteed. 12 Others ! Caution The products listed on this specification sheet are intended for use in general electronic equipment (AV equipment, telecommunications equipment, home appliances, amusement equipment, computer equipment, personal equipment, office equipment, measurement equipment, industrial robots) under a normal operation and use condition. The products are not designed or warranted to meet the requirements of the applications listed below, whose performance and/or quality require a more stringent level of safety or reliability, or whose failure, malfunction or trouble could cause serious damage to society, person or property. Please understand that we are not responsible for any damage or liability caused by use of the products in any of the applications below or for any other use exceeding the range or conditions set forth in this specification sheet. If you intend to use the products in the applications listed below or if you have special requirements exceeding the range or conditions set forth in this specification, please contact us. (1) Aerospace/Aviation equipment (2) Transportation equipment (cars, electric trains, ships, etc.) (3) Medical equipment (4) Power-generation control equipment (5) Atomic energy-related equipment (6) Seabed equipment (7) Transportation control equipment (8) Public information-processing equipment (9) Military equipment (10) Electric heating apparatus, burning equipment (11) Disaster prevention/crime prevention equipment (12) Safety equipment (13) Other applications that are not considered general-purpose applications When designing your equipment even for general-purpose applications, you are kindly requested to take into consideration securing protection circuit/device or providing backup circuits in your equipment. — 18 — 10. PACKAGING LABEL Packaging shall be done to protect the components from the damage during transportation and storing, and a label which has the following information shall be attached. 1) Inspection No. 2) TDK P/N 3) Customer's P/N 4) Quantity *Composition of Inspection No. Example F 2 A – ΟΟ – ΟΟΟ (a) (b) (c) (d) (e) a) Line code b) Last digit of the year c) Month and A for January and B for February and so on. (Skip I) d) Inspection Date of the month. e) Serial No. of the day 11. BULK PACKAGING QUANTITY Total number of components in a plastic bag for bulk packaging : 1,000pcs. — 19 — 12. TAPE PACKAGING SPECIFICATION 1. CONSTRUCTION AND DIMENSION OF TAPING 1-1. Dimensions of carrier tape Dimensions of paper tape shall be according to Appendix 4. 1-2. Bulk part and leader of taping Bulk 160mm Chips Bulk 160mm min Leader Drawing direction 400mm min 1-3. Dimensions of reel Dimensions of Ø178 reel shall be according to Appendix 5. Dimensions of Ø330 reel shall be according to Appendix 6. 1-4. Structure of taping Top cover tape Pitch hole Paper carrier tape Bottom cover tape (Bottom cover tape is not always applied.) 2. CHIP QUANTITY Chip quantity(pcs.) Type Thickness of chip Taping Material Ø 178mm reel Ø 330mm reel CGA3(CC0603) 0.80 mm Paper 4,000 10,000 — 20 — 3. PERFORMANCE SPECIFICATIONS 3-1. Fixing peeling strength (top tape) 0.05-0.7N. (See the following figure.) TYPE 1 (Paper) Direction of cover tape pulling Carrier tape Top cover tape 0~15° Direction of pulling 3-2. Carrier tape shall be flexible enough to be wound around a minimum radius of 30mm with components in tape. 3-3. The missing of components shall be less than 0.1% 3-4. Components shall not stick to fixing tape. 3-5. The fixing tapes shall not protrude beyond the edges of the carrier tape not shall cover the sprocket holes. — 21 — Appendix 4 Paper Tape Pitch hole J E A D B T H C F G (Unit : mm) Symbol Type A B C D E F CGA3 (CC0603) ( 1.10 ) ( 1.90 ) 8.00 ± 0.30 3.50 ± 0.05 1.75 ± 0.10 4.00 ± 0.10 Symbol Type G H J T CGA3 (CC0603) 2.00 ± 0.05 4.00 ± 0.10 Ø 1.5 +0.10 0 * The values in the parentheses ( ) are for reference. — 22 — 1.20 max. Appendix 5 (Material : Polystyrene) E W2 C B D r W1 A (Unit : mm) Symbol A B C D E W1 Dimension Ø178 ± 2.0 Ø60 ± 2.0 Ø13 ± 0.5 Ø21 ± 0.8 2.0 ± 0.5 9.0 ± 0.3 Symbol W2 r Dimension 13.0 ± 1.4 1.0 Appendix 6 (Material : Polystyrene) E C B D r t W A (Unit : mm) Symbol A B C D E W Dimension Ø382 max. (Nominal Ø330) Ø50 min. Ø13 ± 0.5 Ø21 ± 0.8 2.0 ± 0.5 10.0 ± 1.5 Symbol t r Dimension 2.0 ± 0.5 1.0 — 23 —