DATA SHEET SURFACE-MOUNT CERAMIC MULTILAYER CAPACITORS C-Array NP0/X7R/Y5V 16 V TO 50 V sizes 0508 (4 x 0402) / 0612 (4 x 0603) Product Specification – May 22, 2014 V. 3 RoHS compliant & Halogen Free Product specification Surface-Mount Ceramic Multilayer Capacitors 4C-Array NP0/X7R/Y5V 16 V to 50 V SCOPE ORDERING INFORMATION - GLOBAL PART NUMBER, PHYCOMP This specification describes NP0/X7R/Y5V 4-capacitor Array with lead-free terminations. CTC & 12NC APPLICATIONS Professional electronics High density consumer electronics All part numbers are identified by the series, size, tolerance, TC material, packing style, voltage, process code, termination and capacitance value. Please note that 12 digits ordering code will expire at the end of 2010. YAGEO BRAND ordering code GLOBAL PART NUMBER (PREFERRED ) CA XXXX X X XXX X (1) FEATURES Supplied in tape on reel Nickel-barrier end termination 0508 (4x0402) / 0612 (4x0603) capacitors (of the same capacitance value) per array Less than 50% board space of an equivalent discrete component High volumetric efficiency Increased throughout, by time saved in mounting RoHS compliant Halogen Free compliant 2 17 (2) (3) (4) (5) B X XXX (6) (7) (1) SIZE – INCH BASED (METRIC) 0508 (1220) 0612 (1632) (2) TOLERANCE J = ± 5% K = ± 10% M = ± 20% Z = -20% to +80% (3) PACKING STYLE R = Paper/PE taping reel; Reel 7 inch P = Paper/PE taping reel; Reel 13 inch (4) TC MATERIAL NPO X7R Y5V (5) RATED VOLTAGE 7 = 16 V 8 = 25 V 9 = 50 V (6) PROCESS N = NP0 B = class 2 material (7) CAPACITANCE VALUE 2 significant digits+number of zeros The 3rd digit signifies the multiplying factor, and letter R is decimal point Example: 121 = 12 x 101 = 120 pF www.yageo.com May. 22, 2014 V.3 Product specification Surface-Mount Ceramic Multilayer Capacitors 4C-Array NP0/X7R/Y5V 16 V to 50 V 3 17 CONSTRUCTION The capacitor consists of a rectangular block of ceramic dielectric in which a number of interleaved metal electrodes are contained. This structure gives rise to a high capacitance per unit volume. The inner electrodes are connected to the two end terminations and finally covered with a layer of plated tin (NiSn). Fig. 1 Simplified outline The terminations are lead-free. An outline of the structure is shown in Fig.1. DIMENSIONS OUTLINES Table 1 TYPE 0508 (4 X 0402) 0612 (4 X 0603) L (mm) 2.0 ± 0.15 3.2 ± 0.15 W (mm) 1.25 ± 0.15 1.60 ± 0.15 Tmin. (mm) 0.50 0.70 Tmax. (mm) 0.70 0.90 A (mm) 0.28 ± 0.10 0.4 ± 0.10 B (mm) 0.2 ± 0.10 0.3 ± 0.20 P (mm) 0.5 ± 0.10 0.8 ± 0.10 For dimensions see Table 1 Fig. 2 Surface mounted multilayer ceramic capacitor dimension www.yageo.com May. 22, 2014 V.3 Product specification Surface-Mount Ceramic Multilayer Capacitors 4C-Array NP0/X7R/Y5V 16 V to 50 V 4 17 CAPACITANCE RANGE & THICKNESS FOR 4C-ARRAY Table 2 Temperature characteristic material from NP0 CAPACITANCE 0508 (4 x 0402) 0612 (4 x 0603) 50 V 50 V 100V 0.8± 0.1 0.8± 0.1 10 pF 15 pF 18 pF 22 pF 33 pF 39 pF 47 pF 56 pF 0.6± 0.1 68 pF 82 pF 100 pF 120 pF 150 pF 180 pF 220 pF 270 pF 330 pF 390 pF 470 pF 560 pF 680 pF 820 pF 1.0 nF NOTE Values in shaded cells indicate thickness class in mm www.yageo.com May. 22, 2014 V.3 Product specification Surface-Mount Ceramic Multilayer Capacitors 4C-Array NP0/X7R/Y5V 16 V to 50 V 5 17 CAPACITANCE RANGE & THICKNESS FOR 4C-ARRAY Table 3 Temperature characteristic material from X7R CAPACITANCE 0508 (4 x 0402) 16 V 0612 (4 x 0603) 25 V 50 V 16 V 25 V 50 V 180 pF 220 pF 270 pF 330 pF 390 pF 470 pF 560 pF 680 pF 820 pF 0.6± 0.1 1.0 nF 1.2 nF 0.8± 0.1 1.5 nF 1.8 nF 2.2 nF 2.7 nF 0.8± 0.1 3.3 nF 0.6± 0.1 3.9 nF 0.8± 0.1 4.7 nF 5.6 nF 6.8 nF 8.2 nF 10 nF 0.6± 0.1 12 nF 15 nF 18 nF 22 nF 27 nF 33 nF 47 nF 56 nF 68 nF 82 nF 100 nF NOTE Values in shaded cells indicate thickness class in mm www.yageo.com May. 22, 2014 V.3 Product specification Surface-Mount Ceramic Multilayer Capacitors 4C-Array NP0/X7R/Y5V 16 V to 50 V 6 17 CAPACITANCE RANGE & THICKNESS FOR 4C-ARRAY Table 4 Temperature characteristic material from Y5V 0612 (4 x 0603) CAPACITANCE 25 V 10 nF 22 nF 0.6± 0.1 47 nF 100 nF NOTE Values in shaded cells indicate thickness class in mm THICKNESS CLASSES AND PACKING QUANTITY Table 5 THICKNESS TAPE WIDTH QUANTITY Ø 180 MM / 7 INCH Ø 180 MM / 13 INCH CLASSIFICATION PER REEL Paper Paper 0508 0.6 ± 0.1 mm 8 mm 4,000 20,000 0612 0.8 ± 0.1 mm 8 mm 4,000 15,000 SIZE CODE www.yageo.com May. 22, 2014 V.3 Product specification Surface-Mount Ceramic Multilayer Capacitors 4C-Array NP0/X7R/Y5V 7 17 16 V to 50 V ELECTRICAL CHARACTERISTICS 4C-ARRAY DIELECTRIC CAPACITORS; NISN TERMINATIONS Unless otherwise stated all electrical values apply at an ambient temperature of 20± 1 °C, an atmospheric pressure of 86 to 106 kPa, and a relative humidity of 63 to 67%. Table 6 VALUE DESCRIPTION Capacitance range 10 pF to 100 nF Rated voltage NP0 50 V X7R 0508: 16 V, 0612: 16 V to 50 V Y5V 0612: 25 V NP0 ± 5%, ± 10% X7R ± 10%, ± 20% Y5V –20% to +80% NP0 ≤ 0.1% Capacitance tolerance Dissipation factor (D.F.) X7R Y5V Insulation resistance after 1 minute at Ur (DC) 16 V ≤ 3.5%, 25V ≤ 2.5%, 50V ≤ 2.5% 12nF~100nF, Df ≤5% 0508 ≤ 9%, 0612 ≤ 7% Rins ≥ 10 GΩ or Rins × Cr ≥ 500 seconds whichever is less Maximum capacitance change as a function of temperature (temperature characteristic/coefficient): NP0 ± 30 ppm/°C X7R ± 15% Y5V +22% to –82% NP0 –55 °C to +125 °C X7R –55 °C to +125 °C Y5V –30 °C to +85 °C Operating temperature range: www.yageo.com May. 22, 2014 V.3 Product specification Surface-Mount Ceramic Multilayer Capacitors 4C-Array NP0/X7R/Y5V 16 V to 50 V 8 17 NP0 0508/0612 50 V Sample limits (broken lines) Requirement levels (dotted lines) Fig. 3 Typical temperature coefficient as a function of temperature Fig. 5 Typical capacitance change with respect to the capacitance at 1 V as a function of DC voltage Fig. 4 Typical tan δ as a function of temperature www.yageo.com May. 22, 2014 V.3 Product specification Surface-Mount Ceramic Multilayer Capacitors 4C-Array NP0/X7R/Y5V 16 V to 50 V 9 17 X7R 0508 16 V Fig. 6 Typical capacitance change with respect to the capacitance at 1 V as a function of DC voltage at 20 °C Fig. 8 Typical capacitance change as a function of temperature Fig. 7 Typical tan δ as a function of temperature www.yageo.com May. 22, 2014 V.3 Product specification Surface-Mount Ceramic Multilayer Capacitors 4C-Array NP0/X7R/Y5V 16 V to 50 V 10 17 X7R 0612 16 V to 50 V Curve 1 = 16 V product Curve 2 = 25 V product Curve 3 = 50 V product Fig. 9 Typical capacitance change with respect to the capacitance at 1 V as a function of DC voltage at 25 °C Curve 1 = 16 V product Curve 2 = 25 V product Curve 3 = 50 V product Fig. 10 Typical tan δ as a function of temperature Fig. 11 Typical capacitance change as a function of temperature www.yageo.com May. 22, 2014 V.3 Product specification Surface-Mount Ceramic Multilayer Capacitors 4C-Array NP0/X7R/Y5V 16 V to 50 V 11 17 Y5V 0612 25 V Fig. 12 Typical capacitance change with respect to the capacitance at 1 V as a function of DC voltage at 25 °C Fig. 13 Typical tan δ as a function of temperature Fig. 14 Typical capacitance change as a function of temperature www.yageo.com May. 22, 2014 V.3 Product specification Surface-Mount Ceramic Multilayer Capacitors 4C-Array NP0/X7R/Y5V 16 V to 50 V 12 17 TESTS AND REQUIREMENTS Table 7 Test procedures and requirements TEST TEST METHOD PROCEDURE REQUIREMENTS Mounting IEC 60384- 4.3 21/22 The capacitors may be mounted on printed-circuit boards or ceramic substrates No visible damage Visual Inspection and Dimension Check 4.4 Any applicable method using × 10 magnification In accordance with specification Capacitance 4.5.1 Class 1: f = 1 MHz for C ≤ 1 nF, measuring at voltage 1 Vrms at 20 °C Within specified tolerance f = 1 KHz for C > 1 nF, measuring at voltage 1 Vrms at 20 °C Class 2: f = 1 KHz for C ≤ 10 µF, measuring at voltage 1 Vrms at 20 °C f = 120 Hz for C >10 µF, measuring at voltage 0.5 Vrms at 20 °C Dissipation Factor (D.F.) 4.5.2 Class 1: f = 1 MHz for C ≤ 1 nF , measuring at voltage 1 V rms at 20 °C In accordance with specification f = 1 KHz for C > 1 nF, measuring at voltage 1 Vrms at 20 °C Class 2: f = 1 KHz for C ≤ 10 µF, measuring at voltage 1 Vrms at 20 °C f = 120 Hz for C > 10 µF, measuring at voltage 0.5 Vrms at 20 °C Insulation Resistance 4.5.3 At Ur (DC) for 1 minute In accordance with specification www.yageo.com May. 22, 2014 V.3 Product specification Surface-Mount Ceramic Multilayer Capacitors TEST Temperature Coefficient TEST METHOD 4.6 4C-Array NP0/X7R/Y5V 16 V to 50 V PROCEDURE REQUIREMENTS Capacitance shall be measured by the steps shown in the following table. <General purpose series> Class1: ∆ C/C: ± 30ppm The capacitance change should be measured after 5 min at each specified temperature stage. Step Temperature(℃) a 25± 2 b Lower temperature± 3℃ c 25± 2 d Upper Temperature± 2℃ e 25± 2 13 17 Class2: X7R: ∆ C/C: ±15% Y5V: ∆ C/C: 22~-82% <High Capacitance series> Class2: X7R/X5R: ∆ C/C: ±15% Y5V: ∆ C/C: 22~-82% (1) Class I Temperature Coefficient shall be calculated from the formula as below C2 - C1 Temp, Coefficient = 106 [ppm/℃] C1 xΔT C1: Capacitance at step c C2: Capacitance at 125℃ ∆T: 100℃(=125℃-25℃) (2) Class II Capacitance Change shall be calculated from the formula as below ∆C = C2 - C1 x 100% C1 C1: Capacitance at step c C2: Capacitance at step b or d Adhesion 4.7 A force applied for 10 seconds to the line joining the terminations and in a plane parallel to the substrate Force size ≥ 0603: 5N size = 0402: 2.5N size = 0201: 1N www.yageo.com May. 22, 2014 V.3 Product specification Surface-Mount Ceramic Multilayer Capacitors 4C-Array NP0/X7R/Y5V 16 V to 50 V TEST TEST METHOD PROCEDURE REQUIREMENTS Bond Strength of Plating on End Face IEC 6038421/22 Mounting in accordance with IEC 60384-22 paragraph 4.3 No visible damage Conditions: bending 1 mm at a rate of 1 mm/s, radius jig 340 mm <General purpose series> 4.8 14 17 ∆C/C Class 1: NP0: within ± 1% or 0.5 pF, whichever is greater Class2: X5R/X7R/Y5V: ± 10% <High Capacitance series> ∆C/C Class2: X5R/X7R/Y5V: ± 10% Resistance to Soldering Heat 4.9 Precondition: 150 +0/–10 °C for 1 hour, then keep for 24 ± 1 hours at room temperature Preheating: for size ≤ 1206: 120 °C to 150 °C for 1 minute Preheating: for size >1206: 100 °C to 120 °C for 1 minute and 170 °C to 200 °C for 1 minute Solder bath temperature: 260 ± 5 °C Dipping time: 10 ± 0.5 seconds Recovery time: 24 ± 2 hours Dissolution of the end face plating shall not exceed 25% of the length of the edge concerned <General purpose series> ∆C/C Class 1: NP0: within ± 0.5% or 0.5 pF, whichever is greater Class2: X5R/X7R: ± 10% Y5V: ± 20% <High Capacitance series> ∆C/C Class2: X5R/X7R: ± 10% Y5V: ± 20% D.F. within initial specified value Rins within initial specified value Solderability 4.10 Preheated the temperature of 80 °C to 140 °C and maintained for 30 seconds to 60 seconds. The solder should cover over 95% of the critical area of each termination Test conditions for lead containing solder alloy Temperature: 235 ± 5 °C Dipping time: 2 ± 0.2 seconds Depth of immersion: 10 mm Alloy Composition: 60/40 Sn/Pb Number of immersions: 1 Test conditions for leadfree containing solder alloy Temperature: 245 ± 5 °C Dipping time: 3 ± 0.3 seconds Depth of immersion: 10 mm Alloy Composition: SAC305 Number of immersions: 1 www.yageo.com May. 22, 2014 V.3 Product specification Surface-Mount Ceramic Multilayer Capacitors 4C-Array NP0/X7R/Y5V TEST TEST METHOD PROCEDURE REQUIREMENTS Rapid Change of Temperature IEC 6038421/22 Preconditioning; 150 +0/–10 °C for 1 hour, then keep for 24 ± 1 hours at room temperature No visual damage 4.11 16 V to 50 V 15 17 <General purpose series> ∆C/C 5 cycles with following detail: 30 minutes at lower category temperature 30 minutes at upper category temperature Recovery time 24 ± 2 hours Class 1: NP0: within ± 1% or 1 pF, whichever is greater Class2: X5R/X7R: ± 15% Y5V: ± 20% <High Capacitance series> ∆C/C Class2: X5R/X7R: ± 15% Y5V: ± 20% D.F. meet initial specified value Rins meet initial specified value Damp Heat with Ur Load 4.13 1. Preconditioning, class 2 only: 150 +0/-10 °C /1 hour, then keep for 24 ± 1 hour at room temp 2. Initial measure: Spec: refer initial spec C, D, IR 3. Damp heat test: 500 ± 12 hours at 40 ± 2 °C; 90 to 95% R.H. 1.0 Ur applied 4. Recovery: Class 1: 6 to 24 hours Class 2: 24 ± 2 hours 5. Final measure: C, D, IR P.S. If the capacitance value is less than the minimum value permitted, then after the other measurements have been made the capacitor shall be precondition according to “IEC 60384 4.1” and then the requirement shall be met. No visual damage after recovery <General purpose series> ∆C/C Class 1: NP0: within ± 2% or 1 pF, whichever is greater Class2: X5R/X7R: ± 15%; Y5V: ± 30% D.F. Class 1: NP0: ≤ 2 x specified value Class2: X5R/X7R: ≤ 16V: ≤ 7% ≥ 25V: ≤ 5% Y5V: ≤ 15% Rins Class 1: NP0: ≥ 2,500 MΩ or Rins x Cr ≥ 25s whichever is less Class2: X5R/X7R/Y5V: ≥ 500 MΩ or Rins x Cr ≥ 25s whichever is less <High Capacitance series> ∆C/C Class2: X5R/X7R: ± 20%; Y5V: ± 30% D.F. Class2: 2 x initial value max Rins Class2: 500 MΩ or Rins x Cr ≥ 25s, whichever is less www.yageo.com May. 22, 2014 V.3 Product specification Surface-Mount Ceramic Multilayer Capacitors 4C-Array NP0/X7R/Y5V TEST TEST METHOD PROCEDURE REQUIREMENTS Endurance IEC 6038421/22 1. Preconditioning, class 2 only: No visual damage 4.14 150 +0/-10 °C /1 hour, then keep for 24 ± 1 hour at room temp 2. Initial measure: Spec: refer initial spec C, D, IR 3. Endurance test: Temperature: NP0/X7R: 125 °C X5R/Y5V: 85 °C Specified stress voltage applied for 1,000 hours: Applied 2.0 x Ur for general product. Applied 1.5 x Ur for high cap. product. High voltage series follows with below stress condition: Applied 1.3 x Ur for 500V series Applied 1.2 x Ur for 1KV, 2KV, 3KV series 4. Recovery time: 24 ± 2 hours 16 V to 50 V 16 17 <General purpose series> ∆C/C Class1: NP0: within ± 2% or 1 pF, whichever is greater Class2: X5R/X7R: ± 15%; Y5V: ± 30% D.F. Class1: NP0: ≤ 2 x specified value Class2: X5R/X7R: ≤ 16V: ≤ 7% ≥ 25V: ≤ 5% Y5V: ≤ 15% 5. Final measure: C, D, IR Rins P.S. If the capacitance value is less than the minimum value permitted, then after the other measurements have been made the capacitor shall be precondition according to “IEC 60384 4.1” and then the requirement shall be met. Class2: X5R/X7R/Y5V: ≥ 1,000 MΩ or Rins x Cr ≥ 50s whichever is less Class1: NP0: ≥ 4,000 MΩ or Rins x Cr ≥ 40s whichever is less <High Capacitance series> ∆C/C Class 2: X5R/X7R: ± 20%; Y5V: ± 30% D.F. Class 2: 2 x initial value max Rins Class 2: 1,000 MΩ or Rins x Cr ≥ 50s, whichever is less Voltage Proof IEC 60384-1 4.6 Specified stress voltage applied for 1 minute Ur ≤ 100 V: series applied 2.5 Ur 100 V < Ur ≤ 200 V series applied (1.5 Ur + 100) 200 V < Ur ≤ 500 V series applied (1.3 Ur + 100) Ur > 500 V: 1.3 Ur I: 7.5 mA No breakdown or flashover www.yageo.com May. 22, 2014 V.3 Product specification Surface-Mount Ceramic Multilayer Capacitors 4C-Array NP0/X7R/Y5V 16 V to 50 V 17 17 REVISION HISTORY REVISION DATE CHANGE NOTIFICATION DESCRIPTION Version 3 May 21, 2014 - - Product range updated Version 2 Jun. 17, 2013 - - Product range updated Version 1 Feb 05, 2010 - - The statement of "Halogen Free" on the cover added Version 0 Jun 22, 2009 - - New datasheet for 4C-Array series with RoHS compliant - Replace from pdf files: 0508_16V to 50V_1, 0612_16V to 50V_0, C-Array_NP0_50V_0508_7, C-Array_NP0_50V_0612_7, C-Array_X7R_16V_25V_50V_0612_6, C-Array_X7R_16V_0508_5, C-Array_Y5V_25V_0508_0, C-Array_Y5V_25V_0612_5 - Define global part number - Description of "Halogen Free compliant" added - Test method and procedure updated www.yageo.com May. 22, 2014 V.3

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