TS1001 THE ONLY 0.8V/0.6µA RAIL-TO-RAIL OP AMP FEATURES Single 0.65V to 2.5V Operation Supply current: 0.6μA (typ) Offset voltage: 0.5mV (typ) Low TCVOS: 20µV/°C (typ) AVOL Driving 100kΩ Load: 90dB (min) Unity Gain Stable Rail-to-rail Input and Output No Output Phase Reversal 5-pin SC70 Package APPLICATIONS Battery/Solar-Powered Instrumentation Portable Gas Monitors Low-voltage Signal Processing Nanopower Active Filters Wireless Remote Sensors Battery-powered Industrial Sensors Active RFID Readers Powerline or Battery Current Sensing Handheld/Portable POS Terminals DESCRIPTION The TS1001 is the industry’s first sub-1µA supply current, precision CMOS operational amplifier rated to operate at a nominal supply voltage of 0.8V. Optimized for ultra-long-life battery-powered applications, the TS1001 is an operational amplifier in the “NanoWatt Analog™” high-performance analog integrated circuits portfolio. The TS1001 exhibits a typical input offset voltage of 0.5mV, a typical input bias current of 25pA, and rail-to-rail input and output stages. The TS1001 can operate from single-supply voltages from 0.65V to 2.5V. The TS1001’s combined features make it an excellent choice in applications where very low supply current and low operating supply voltage translate into very long equipment operating time. Applications include: nanopower active filters, wireless remote sensors, battery and powerline current sensors, portable gas monitors, and handheld/portable POS terminals. The TS1001 is fully specified at VDD = 0.8V and over the industrial temperature range (−40°C to +85°C) and is available in a PCB-space saving 5-lead SC70 surface-mount package. TYPICAL APPLICATION CIRCUIT A NanoWatt 2-Pole Sallen Key Low Pass Filter 30% Supply Current Distribution VDD = 0.8V Percent of Units - % 25% 20% 15% 10% 5% 0% 0.53 0.58 0.63 0.68 Supply Current - µA 0.73 Page 1 © 2014 Silicon Laboratories, Inc. All rights reserved. TS1001 ABSOLUTE MAXIMUM RATINGS Total Supply Voltage (VDD to VSS) ........................... +2.75 V Voltage Inputs (IN+, IN-) ........... (VSS - 0.3V) to (VDD + 0.3V) Differential Input Voltage .......................................... ±2.75 V Input Current (IN+, IN-) .............................................. 20 mA Output Short-Circuit Duration to GND .................... Indefinite Continuous Power Dissipation (TA = +70°C) 5-Pin SC70 (Derate 3.87mW/°C above +70°C) .. 310 mW Operating Temperature Range .................... -40°C to +85°C Junction Temperature .............................................. +150°C Storage Temperature Range ..................... -65°C to +150°C Lead Temperature (soldering, 10s) ............................. +300° Electrical and thermal stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other condition beyond those indicated in the operational sections of the specifications is not implied. Exposure to any absolute maximum rating conditions for extended periods may affect device reliability and lifetime. PACKAGE/ORDERING INFORMATION TAPE & REEL ORDER NUMBER TS1001IJ5 TS1001IJ5T PART PACKAGE MARKING QUANTITY TAE ----3000 Lead-free Program: Silicon Labs supplies only lead-free packaging. Consult Silicon Labs for products specified with wider operating temperature ranges. Page 2 TS1001 Rev. 1.0 TS1001 ELECTRICAL CHARACTERISTICS VDD = +0.8V, VSS = 0V, VINCM = VSS; RL = 100kΩ to (VDD-VSS)/2; TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C. See Note 1 Parameters Supply Voltage Range Symbol VDD-VSS Conditions Supply Current ISY RL = Open circuit Input Offset Voltage VOS VIN = VSS or VDD Input Offset Voltage Drift TCVOS Input Bias Current IIN+, IIN- Input Offset Current Input Voltage Range Common-Mode Rejection Ratio Power Supply Rejection Ratio Output Voltage High Output Voltage Low Short-circuit Current IOS IVR CMRR PSRR VOH VOL ISC+ ISC- Open-loop Voltage Gain AVOL Gain-Bandwidth Product GBWP Phase Margin Slew Rate Full-power Bandwidth Input Voltage Noise Density Input Current Noise Density φM SR FPBW en in TA = 25°C -40°C ≤ TA ≤ 85°C TA = 25°C -40°C ≤ TA ≤ 85°C TA = 25°C VIN+, VIN- = (VDD - VSS)/2 -40°C ≤ TA ≤ 85°C TA = 25°C Specified as IIN+ - IINVIN+, VIN- = (VDD - VSS)/2 -40°C ≤ TA ≤ 85°C Guaranteed by Input Offset Voltage Test 0V ≤ VIN(CM) ≤ 0.4V 0.65V ≤ (VDD - VSS) ≤ 2.5V TA = 25°C Specified as VDD - VOUT, RL = 100kΩ to VSS -40°C ≤ TA ≤ 85°C TA = 25°C Specified as VDD - VOUT, RL = 10kΩ to VSS -40°C ≤ TA ≤ 85°C TA = 25°C Specified as VOUT - VSS, RL = 100kΩ to VDD -40°C ≤ TA ≤ 85°C TA = 25°C Specified as VOUT - VSS, RL = 10kΩ to VDD -40°C ≤ TA ≤ 85°C TA = 25°C VOUT = VSS -40°C ≤ TA ≤ 85°C TA = 25°C VOUT = VDD -40°C ≤ TA ≤ 85°C TA = 25°C VSS+50mV ≤ VOUT ≤ VDD-50mV -40°C ≤ TA ≤ 85°C RL = 100kΩ to VSS, CL = 20pF Unity-gain Crossover, RL = 100kΩ to VSS, CL = 20pF RL = 100kΩ to VSS, AVCL = +1V/V FPBW = SR/(π • VOUT,PP); VOUT,PP = 0.7VPP f = 1kHz f = 1kHz Min 0.65 Typ 0.8 0.6 0.5 20 0.025 0.01 VSS 50 50 74 74 1.2 10 0.4 5 0.5 0.3 4.5 3 90 85 1.5 Max 2.5 0.8 1 3 6 Units V µA mV µV/°C nA 20 nA 2 VDD V dB dB 2 2.5 16 20 0.6 1 7 10 mV mV mA 11 104 dB 4 kHz 70 degrees 1.5 680 0.6 10 V/ms Hz µV/√Hz pA/√Hz Note 1: All specifications are 100% tested at TA = +25°C. Specification limits over temperature (TA = TMIN to TMAX) are guaranteed by device characterization, not production tested. TS1001 Rev. 1.0 Page 3 TS1001 TYPICAL PERFORMANCE CHARACTERISTICS Supply Current vs Supply Voltage 0.8 Supply Current vs Input Common-Mode Voltage 0.65 TA = +25°C 0.7 SUPPLY CURENT - µA SUPPLY CURENT - µA +85°C +25°C 0.6 0.5 -40°C 0.4 0.3 0.65 0.8 1.2 0 0.4 0.2 0.6 0.8 SUPPLY VOLTAGE - Volt INPUT COMMON-MODE VOLTAGE - Volt Supply Current vs Input Common-Mode Voltage Input Offset Voltage vs Supply Voltage 0.65 INPUT OFFSET VOLTAGE - mV TA = +25°C SUPPLY CURENT - µA 0.55 0.5 2.5 0.65 0.6 0.55 0.5 0 0.5 1 1.5 2 TA = +25°C VINCM = VDD 0.6 0.55 VINCM = 0V 0.55 0.5 2.5 1 0.5 1.5 2.5 2 INPUT COMMON-MODE VOLTAGE - Volt SUPPLY VOLTAGE - Volt Input Offset Voltage vs Input Common-Mode Voltage Input Offset Voltage vs Input Common-Mode Voltage 1 1 VDD =0.8V TA = +25°C INPUT OFFSET VOLTAGE - mV INPUT OFFSET VOLTAGE - mV 0.6 0.5 0 -0.5 -1 0 0.2 0.4 0.6 0.8 INPUT COMMON-MODE VOLTAGE - Volt Page 4 VDD = 2.5V TA = +25°C 0.5 0 -0.5 -1 0 0.5 1 1.5 2 2.5 INPUT COMMON-MODE VOLTAGE - Volt TS1001 Rev. 1.0 TS1001 TYPICAL PERFORMANCE CHARACTERISTICS Input Bias Current (IIN+, IIN-) vs Input Common-Mode Voltage Input Bias Current (IIN+, IIN-) vs Input Common-Mode Voltage 250 VDD =0.8V TA = +25°C 75 INPUT BIAS CURRENT - pA INPUT BIAS CURRENT - pA 100 50 25 0 -25 VDD = 2.5V TA = +25°C 200 150 100 50 0 -50 -50 0 0.2 0.4 0.6 0 0.8 1 0.5 1.5 2 2.5 Output Voltage High (VOH) vs Temperature, RLOAD =100kΩ 4.5 Output Voltage Low (VOL) vs Temperature, RLOAD =100kΩ 4 RL = 100kΩ VDD = 2.5V 3.5 3 2.5 2 VDD = 0.8V 1.5 1 0.5 0 +25 -40 OUTPUT SATURATION VOLTAGE - mV INPUT COMMON-MODE VOLTAGE - Volt OUTPUT SATURATION VOLTAGE - mV INPUT COMMON-MODE VOLTAGE - Volt +85 1.8 1.6 VDD = 2.5V 1.4 1.2 1 0.8 0.6 VDD = 0.8V 0.4 0.2 0 RL = 100kΩ 35 OUTPUT SATURATION VOLTAGE - mV OUTPUT SATURATION VOLTAGE - mV Output Voltage High (VOH) vs Temperature, RLOAD =10kΩ RL = 10kΩ VDD = 2.5V 25 20 15 VDD = 0.8V 10 5 0 -40 +25 TEMPERATURE - °C TS1001 Rev. 1.0 +85 TEMPERATURE - °C TEMPERATURE - °C 30 +25 -40 +85 Output Voltage Low (VOL) vs Temperature, RLOAD =10kΩ 20 VDD = 2.5V 16 12 8 VDD = 0.8V 4 RL = 10kΩ 0 -40 +25 +85 TEMPERATURE - °C Page 5 TS1001 Output Short Circuit Current, ISC+ vs Temperature 25 OUTPUT SHORT-CIRCUIT CURRENT - mA OUTPUT SHORT-CIRCUIT CURRENT - mA TYPICAL PERFORMANCE CHARACTERISTICS VOUT = 0V 20 VDD = 2.5V 15 10 5 VDD = 0.8V 0 +25 -40 +85 VDD = 2.5V 50 40 30 20 VDD = 0.8V 10 0 -40 +25 +85 TEMPERATURE - °C TEMPERATURE - °C 0.1Hz to 10Hz Output Voltage Noise Gain and Phase vs. Frequency 60 Output Short Circuit Current, ISC- vs Temperature 70 VOUT = VDD 60 150 PHASE 50 GAIN - dB GAIN 20 0 -20 -50 VDD = 0.8V TA = +25°C RL = 100kΩ CL = 20pF AVCL = 1000 V/V 10 100 4kHz 1k 10k -150 VOUT(N) - 100µV/DIV 40 PHASE - Degrees 70° 130µVPP -250 100k 1 Second/DIV Small-Signal Transient Response VDD = 2.5V, VSS = GND, RLOAD = 100kΩ, CLOAD = 15pF Large-Signal Transient Response VDD = 2.5V, VSS = GND, RLOAD = 100kΩ, CLOAD = 15pF OUTPUT OUTPUT INPUT INPUT FREQUENCY - Hz 200µs/DIV Page 6 2ms/DIV TS1001 Rev. 1.0 TS1001 PIN FUNCTIONS Pin 1 Label OUT 2 VSS 3 4 +IN -IN 5 VDD Function Amplifier Output. Negative Supply or Analog GND. If applying a negative voltage to this pin, connect a 0.1µF capacitor from this pin to analog GND. Amplifier Non-inverting Input. Amplifier Inverting Input. Positive Supply Connection. Connect a 0.1µF bypass capacitor from this pin to analog GND. THEORY OF OPERATION The TS1001 is fully functional for an input signal from the negative supply (VSS or GND) to the positive supply (VDD). The input stage consists of two differential amplifiers, a p-channel CMOS stage and an n-channel CMOS stage that are active over different ranges of the input common mode voltage. The p-channel input pair is active for input common mode voltages, VINCM, between the negative supply to approximately 0.4V below the positive supply. As the common-mode input voltage moves closer towards VDD, an internal current mirror activates the n-channel input pair differential pair. The p-channel input pair becomes inactive for the balance of the input common mode voltage range up to the positive supply. Because both input stages have their own offset voltage (VOS) characteristic, the offset voltage of the TS1001 is a function of the applied input common-mode voltage, VINCM. The VOS has a crossover point at ~0.4V from VDD (Refer to the VOS vs. VCM curve in the Typical Operating Characteristics section). Caution should be taken in applications where the input signal amplitude is comparable to the TS1001’s VOS value and/or the design requires high accuracy. In these situations, it is necessary for the input signal to avoid the crossover point. In addition, amplifier parameters such as PSRR and CMRR which involve the input offset voltage will also be affected by changes in the input common-mode voltage across the differential pair transition region. The second stage is a folded-cascode transistor arrangement that converts the input stage differential signals into a single-ended output. A complementary drive generator supplies current to the output transistors that swing rail to rail. The TS1001 output stages voltage swings within 1.2mV from the rails at 0.8V supply when driving an output load of 100kΩ - which provides the maximum possible dynamic range at the output. This is particularly important when operating on low supply voltages. When driving a stiffer 10kΩ load, the TS1001 swings within 10mV of VDD and within 5mV of VSS (or GND). APPLICATIONS INFORMATION Portable Gas Detection Sensor Amplifier Gas sensors are used in many different industrial and medical applications. Gas sensors generate a current that is proportional to the percentage of a particular gas concentration sensed in an air sample. This output current flows through a load resistor and the resultant voltage drop is amplified. Depending on the sensed gas and sensitivity of the sensor, the output current can be in the range of tens of microamperes to a few milliamperes. Gas sensor datasheets often specify a recommended load resistor value or a range of load resistors from which to choose. TS1001 Rev. 1.0 There are two main applications for oxygen sensors – applications which sense oxygen when it is abundantly present (that is, in air or near an oxygen tank) and those which detect traces of oxygen in parts-per-million concentration. In medical applications, oxygen sensors are used when air quality or oxygen delivered to a patient needs to be monitored. In fresh air, the concentration of oxygen is 20.9% and air samples containing less than 18% oxygen are considered dangerous. In industrial applications, oxygen sensors are used to detect the absence of oxygen; for example, vacuum-packaging of food products is one example. Page 7 TS1001 The circuit in Figure 1 illustrates a typical implementation used to amplify the output of an oxygen detector. The TS1001 makes an excellent choice for this application as it only draws often required. As shown in Figure 2, the simplest way to achieve this objective is to use an RC filter at the noninverting terminal of the TS1001. If additional attenuation is needed, a two-pole Sallen-Key filter can be used to provide the additional attenuation as shown in Figure 3. Figure 3: A Nanopower 2-Pole Sallen-Key Low-Pass Filter. Figure 1: A Nanopower, Precision Oxygen Gas Sensor Amplifier. 0.6µA of supply current and operates on supply voltages down to 0.65V. With the components shown in the figure, the circuit consumes less than 0.7 μA of supply current ensuring that small formfactor single- or button-cell batteries (exhibiting low mAh charge ratings) could last beyond the operating life of the oxygen sensor. The precision specifications of the TS1001, such as its low offset voltage, low TCVOS, low input bias current, high CMRR, and high PSRR are other factors which make the TS1001 an excellent choice for this application. Since oxygen sensors typically exhibit an operating life of one to two years, an oxygen sensor amplifier built around a TS1001 can operate from a conventionally-available single 1.5-V alkaline AA battery for over 290 years! At such low power consumption from a single cell, the oxygen sensor could be replaced over 150 times before the battery requires replacing! NanoWatt, Buffered Single-pole Low-Pass Filters For best results, the filter’s cutoff frequency should be 8 to 10 times lower than the TS1001’s crossover frequency. Additional operational amplifier phase margin shift can be avoided if the amplifier bandwidth-to-signal bandwidth ratio is greater than 8. The design equations for the 2-pole Sallen-Key lowpass filter are given below with component values selected to set a 400Hz low-pass filter cutoff frequency: R1 = R2 = R = 1MΩ C1 = C2 = C = 400pF Q = Filter Peaking Factor = 1 f–3dB = 1/(2 x π x RC) = 400 Hz R3 = R4/(2-1/Q); with Q = 1, R3 = R4. A Single +1.5 V Supply, Two Op Amp Instrumentation Amplifier The TS1001’s ultra-low supply current and ultra-low voltage operation make it ideal for battery-powered applications such as the instrumentation amplifier shown in Figure 4. When receiving low-level signals, limiting the bandwidth of the incoming signals into the system is Figure 4: A Two Op Amp Instrumentation Amplifier. Figure 2: A Simple, Single-pole Active Low-Pass Filter. Page 8 The circuit utilizes the classic two op amp instrumentation amplifier topology with four resistors TS1001 Rev. 1.0 TS1001 to set the gain. The equation is simply that of a noninverting amplifier as shown in the figure. The two resistors labeled R1 should be closely matched to each other as well as both resistors labeled R2 to ensure acceptable common-mode rejection performance. Resistor networks ensure the closest matching as well as matched drifts for good temperature stability. Capacitor C1 is included to limit the bandwidth and, therefore, the noise in sensitive applications. The value of this capacitor should be adjusted depending on the desired closed-loop bandwidth of the instrumentation amplifier. The RC combination creates a pole at a frequency equal to 1/(2 π × R1C1). If the AC-CMRR is critical, then a matched capacitor to C1 should be included across the second resistor labeled R1. Because the TS1001 accepts rail-to-rail inputs, the input common mode range includes both ground and the positive supply of 1.5V. Furthermore, the rail-to-rail output range ensures the widest signal range possible and maximizes the dynamic range of the system. Also, with its low supply current of 0.6μA, this circuit consumes a quiescent current of only ~1.3μA, yet it still exhibits a 1-kHz bandwidth at a circuit gain of 2. Driving Capacitive Loads While the TS1001’s internal gain-bandwidth product is 4kHz, it is capable of driving capacitive loads up to 50pF in voltage follower configurations without any additional components. In many applications, however, an operational amplifier is required to drive much larger capacitive loads. The amplifier’s output impedance and a large capacitive load create additional phase lag that further reduces the amplifier’s phase margin. If enough phase delay is introduced, the amplifier’s phase margin is reduced. The effect is quite evident when the transient response is observed as there will appear noticeable peaking/ringing in the output transient response. If the TS1001 is used in an application that requires driving larger capacitive loads, an isolation resistor between the output and the capacitive load should be used as illustrated in Figure 5. transient response obtained with a CLOAD = 500pF and an RISO = 50kΩ. Note that as CLOAD is increased a smaller RISO is needed for optimal transient response. Figure 5: Using an External Resistor to Isolate a CLOAD from the TS1001’s Output External Capacitive Load, CLOAD 0-50pF 100pF 500pF 1nF 5nF 10nF External Output Isolation Resistor, RISO Not Required 120kΩ 50kΩ 33kΩ 18kΩ 13kΩ In the event that an external RLOAD in parallel with CLOAD appears in the application, the use of an RISO results in gain accuracy loss because the external series RISO forms a voltage-divider with the external load resistor RLOAD. VIN VOUT Figure 6: TS1001 Transient Response for RISO = 50kΩ and CLOAD = 500pF. Table 1 illustrates a range of RISO values as a function of the external CLOAD on the output of the TS1001. The power supply voltage used on the TS1001 at which these resistor values were determined empirically was 1.8V. The oscilloscope capture shown in Figure 6 illustrates a typical TS1001 Rev. 1.0 Page 9 TS1001 Configuring the TS1001 as Nanowatt Analog Comparator Although optimized for use as an operational amplifier, the TS1001 can also be used as a rail-torail I/O comparator as illustrated in Figure 7. of an analog comparator using the TS1001 should also use as little current as practical. The first step in the design, therefore, was to set the feedback resistor R3: R3 = 10MΩ Calculating a value for R1 is given by the following expression: R1 = R3 x (VHYB/VDD) Substituting VHYB = 100mV, VDD = 1.5V, and R3 = 10MΩ into the equation above yields: R1 = 667kΩ Figure 7: A NanoWatt Analog Comparator with UserProgrammable Hysteresis. External hysteresis can be employed to minimize the risk of output oscillation. The positive feedback circuit causes the input threshold to change when the output voltage changes state. The diagram in Figure 8 illustrates the TS1001’s analog comparator The following expression was then used to calculate a value for R2: R2 = 1/[VHI/(VREF x R1) – (1/R1) – (1/R3)] Substituting VHI = 1V, VREF = 0.75V, R1 = 667kΩ, and R3 = 10MΩ into the above expression yields: R2 = 2.5MΩ Printed Circuit Board Layout Considerations Figure 8: Analog Comparator Hysteresis Band and Output Switching Points. hysteresis band and output transfer characteristic. The design of an analog comparator using the TS1001 is straightforward. In this application, a 1.5V power supply (VDD) was used and the resistor divider network formed by RD1 and RD2 generated a convenient reference voltage (VREF) for the circuit at ½ the supply voltage, or 0.75V, while keeping the current drawn by this resistor divider low. Capacitor C1 is used to filter any extraneous noise that could couple into the TS1001’s inverting input. In this application, the desired hysteresis band was set to 100mV (VHYB) with a desired high trip-point (VHI) set at 1V and a desired low trip-point (VLO) set at 0.9V. Even though the TS1001 operates from a single 0.65V to 2.5V power supply and consumes very little supply current, it is always good engineering practice to bypass the power supplies with a 0.1μF ceramic capacitor placed in close proximity to the VDD and VSS (or GND) pins. Good pcb layout techniques and analog ground plane management improve the performance of any analog circuit by decreasing the amount of stray capacitance that could be introduced at the op amp's inputs and outputs. Excess stray capacitance can easily couple noise into the input leads of the op amp and excess stray capacitance at the output will add to any external capacitive load. Therefore, PC board trace lengths and external component leads should be kept a short as practical to any of the TS1001’s package pins. Second, it is also good engineering practice to route/remove any analog ground plane from the inputs and the output pins of the TS1001. Since the TS1001 is a very low supply current amplifier (0.6µA, typical), it is desired that the design Page 10 TS1001 Rev. 1.0 TS1001 PACKAGE OUTLINE DRAWING 5-Pin SC70 Package Outline Drawing (N.B., Drawings are not to scale) 0.65 TYP. 0.15 - 0.30 5 2 4 1.80 - 2.40 1 3 2 1.30 TYP. 1.80 - 2.20 1 8º - 12º ALL SIDE 0.800 – 0.925 LEAD FRAME THICKNESS 0.10 - 0.18 0.40 – 0.55 0.15 TYP. GAUGE PLANE 1.00 MAX 0.00 - 0.10 1.15 - 1.35 0.10 MAX 0º - 8º 0.26 - 0.46 0.275 - 0.575 NOTES: 1 DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. 2 DOES NOT INCLUDE INTER-LEAD FLASH OR PROTRUSIONS. 3. DIE IS FACING UP FOR MOLDING. DIE IS FACING DOWN FOR TRIM/FORM. 4 ALL SPECIFICATION COMPLY TO JEDEC SPEC MO-203 AA 5. CONTROLLING DIMENSIONS IN MILIMITERS. 6. ALL SPECIFICATIONS REFER TO JEDEC MO-203 AA 7. LEAD SPAN/STAND OFF HEIGHT/COPLANARITY ARE CONSIDERED AS SPECIAL CHARACTERISTIC Patent Notice Silicon Labs invests in research and development to help our customers differentiate in the market with innovative low-power, small size, analog-intensive mixed-signal solutions. Silicon Labs' extensive patent portfolio is a testament to our unique approach and world-class engineering team. The information in this document is believed to be accurate in all respects at the time of publication but is subject to change without notice. Silicon Laboratories assumes no responsibility for errors and omissions, and disclaims responsibility for any consequences resulting from the use of information included herein. Additionally, Silicon Laboratories assumes no responsibility for the functioning of undescribed features or parameters. Silicon Laboratories reserves the right to make changes without further notice. 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Other products or brandnames mentioned herein are trademarks or registered trademarks of their respective holders. Silicon Laboratories, Inc. 400 West Cesar Chavez, Austin, TX 78701 +1 (512) 416-8500 ▪ www.silabs.com Page 11 TS1001 Rev. 1.0