Data Sheet

Data Sheet
Rev. 1.01 / October 2014
ZSPM1025C / ZSPM1025D
True Digital PWM Controller (Single-Phase, Single-Rail)
Smart Power Management ICs
Power and Precision
ZSPM1025C / ZSPM1025D
True Digital PWM Controller (Single-Phase, Single-Rail)
Brief Description
Benefits
The ZSPM1025C and ZSPM1025D are true-digital
single-phase PWM controllers optimally configured
for use with the Murata Power Solutions 25A Power
Block OKLP-X/25 in smart digital power solutions.

The ZSPM1025C and ZSPM1025D integrate a
digital control loop, optimized for maximum flexibility
and stability as well as load step and steady-state
performance. In addition, a rich set of protection
functions is provided.

To simplify the system design, a set of optimized
configuration options have been pre-programmed in
the devices. These configurations can be selected
by setting the values of two external resistors.

Reference solutions are available complete with
layout recommendations, example circuit board
layouts, complete bill of materials and more.




Available Support



Features







Application-optimized digital control loop
Advanced, digital control techniques

Tru-sample Technology™

State-Law Control™ (SLC)

Sub-cycle Response™ (SCR)
Improved transient response and noise immunity
Protection features

Over-current protection

Over-voltage protection (VIN, VOUT)

Under-voltage protection (VIN, VOUT)

Overloaded startup

Continuous retry (“hiccup”) mode for fault
conditions
Pre-programmed for optimized use with Murata
Power Solutions 25A Power Block OKLP-X/25
2-pin configuration for loop compensation, output
voltage, and slew rate.
Operation from a single 5V or 3.3V supply
Fast time-to-market using off-the-shelf, optimally
configured controller and power block
Fast configuration and design flexibility
Simplified design and integration
FPGA designer-friendly solution
Highest power density with smallest footprint
Pin-to-pin compatible with the ZSPM1025A PWM
controller enabling point-of-load platform designs
with or without digital communication
Higher energy efficiency across all output loading
conditions
Evaluation Kit
Reference Solutions
PC-based Pink Power Designer™ Graphic User
Interface (GUI)
Physical Characteristics




Operation temperature: -40°C to +125°C
ZSPM1025C VOUT: 0.62V to 1.20V
ZSPM1025D VOUT: 1.25V to 3.40V
Lead free (RoHS compliant) 24-pin QFN package
(4mm x 4mm)
ZSPM1025C/D Typical Application Diagram
ZSPM1025
QFN 4x4 mm
Murata
OKLP-X/25-W12-C
Current Sensing
Digital Control Loop
Power Management
(Sequencing, Protection,…)
Driver
Driver
Housekeeping
and
Communication
For more information, contact ZMDI via [email protected]
© 2014 Zentrum Mikroelektronik Dresden AG — Rev.1.01 — October 15, 2014. All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated,
stored, or used without the prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
ZSPM1025C / ZSPM1025D
True Digital PWM Controller (Single-Phase, Single-Rail)
Current Sensing
ZSPM1025C/D Block Diagram
ISNSP
Average Current
Sensing
ISNSN
Digital Control Loop
VFBP
VFB
FLASH
ADC
VFBN
PWM
Adaptive Digital
Controller
PWM
LSE
DAC
Typical Applications
OC Detection
Sequencer
 Telecom Switches
OV Detection
 Servers and Storage
DAC
 Network Routers
Bias
Current
Source
 Industrial Applications
Configurable
Error Handler
OT Detection
 Base Stations
Vin OV/UV
Detection
Int. Temp
Sense
Vout UV Detection
 FPGA Designs
 Point-of-load power solutions
 Telecommunications
TEMP
CONFIG0
HKADC
CPU Core
VIN
1.8V Reg
Analog
AVDD18
1.8V Reg
Digital
VDD18
3.3V
Reg
VDD33
VDD50
GPIO3
Clock
Generation
GPIO2
GPIO1
CONTROL
GPIO0
PGOOD
GPIO
ADCVREF
VREFP
NVM
(OTP)
CONFIG1
 Single-Rail/Single-Phase
supplies for Processors,
ASICs, DSP’s, etc.
VREF
Ordering Information
Sales Code
Description
Package
ZSPM1025CA1W 0
ZSPM1025C Lead-free QFN24 — Temperature range: -40°C to +125°C
7” Reel
ZSPM1025DA1W 0
ZSPM1025D Lead-free QFN24 — Temperature range: -40°C to +125°C
7” Reel
ZSPM8725-KIT
Evaluation Kit for ZSPM1025C with PMBus™ Communication Interface *
Kit
ZSPM8825-KIT
Evaluation Kit for ZSPM1025D with PMBus™ Communication Interface *
Kit
* Pink Power Designer™ GUI for kit can be downloaded from the ZMDI web site at www.zmdi.com/zspm1025c or www.zmdi.com/zspm1025d.
Sales and Further Information
www.zmdi.com
[email protected]
Zentrum Mikroelektronik
Dresden AG
Global Headquarters
Grenzstrasse 28
01109 Dresden, Germany
ZMD America, Inc.
1525 McCarthy Blvd., #212
Milpitas, CA 95035-7453
USA
Central Office:
Phone +49.351.8822.306
Fax
+49.351.8822.337
USA Phone 1.855.275.9634
Phone +1.408.883.6310
Fax
+1.408.883.6358
European Technical Support
Phone +49.351.8822.7.772
Fax
+49.351.8822.87.772
DISCLAIMER: This information applies to a product under development. Its characteristics and specifications are subject to change without notice.
Zentrum Mikroelektronik Dresden AG (ZMD AG) assumes no obligation regarding future manufacture unless otherwise agreed to in writing. The
information furnished hereby is believed to be true and accurate. However, under no circumstances shall ZMD AG be liable to any customer,
licensee, or any other third party for any special, indirect, incidental, or consequential damages of any kind or nature whatsoever arising out of or in
any way related to the furnishing, performance, or use of this technical data. ZMD AG hereby expressly disclaims any liability of ZMD AG to any
customer, licensee or any other third party, and any such customer, licensee and any other third party hereby waives any liability of ZMD AG for
any damages in connection with or arising out of the furnishing, performance or use of this technical data, whether based on contract, warranty,
tort (including negligence), strict liability, or otherwise.
European Sales (Stuttgart)
Phone +49.711.674517.55
Fax
+49.711.674517.87955
Zentrum Mikroelektronik
Dresden AG, Japan Office
2nd Floor, Shinbashi Tokyu Bldg.
4-21-3, Shinbashi, Minato-ku
Tokyo, 105-0004
Japan
ZMD FAR EAST, Ltd.
3F, No. 51, Sec. 2,
Keelung Road
11052 Taipei
Taiwan
Phone +81.3.6895.7410
Fax
+81.3.6895.7301
Phone +886.2.2377.8189
Fax
+886.2.2377.8199
Zentrum Mikroelektronik
Dresden AG, Korea Office
U-space 1 Building
11th Floor, Unit JA-1102
670 Sampyeong-dong
Bundang-gu, Seongnam-si
Gyeonggi-do, 463-400
Korea
Phone +82.31.950.7679
Fax
+82.504.841.3026
© 2014 Zentrum Mikroelektronik Dresden AG — Rev.1.01 — October 15, 2014.
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner.
ZSPM1025C / ZSPM1025D
True Digital PWM Controller (Single-Phase, Single-Rail)
Contents
Features ................................................................................................................................................................... 2
Benefits .................................................................................................................................................................... 2
List of Figures .......................................................................................................................................................... 5
List of Tables ........................................................................................................................................................... 6
1 IC Characteristics ............................................................................................................................................. 7
1.1. Absolute Maximum Ratings ....................................................................................................................... 7
1.2. Recommended Operating Conditions ....................................................................................................... 8
1.3. Electrical Parameters ................................................................................................................................ 8
2 Product Summary........................................................................................................................................... 11
2.1. Overview .................................................................................................................................................. 11
2.2. Pin Description......................................................................................................................................... 13
2.3. Available Packages ................................................................................................................................. 14
3 Functional Description .................................................................................................................................... 14
3.1. Power Supply Circuitry, Reference Decoupling, and Grounding ............................................................ 14
3.2. Reset/Start-up Behavior .......................................................................................................................... 15
3.3. Digital Power Control ............................................................................................................................... 15
3.3.1. Overview ........................................................................................................................................... 15
3.3.2. Output Voltage Feedback ................................................................................................................. 15
3.3.3. Digital Compensator ......................................................................................................................... 15
3.3.4. Power Sequencing and the CONTROL Pin ...................................................................................... 16
3.3.5. Pre-biased Start-up and Soft-Off ...................................................................................................... 18
3.3.6. Current Sensing ................................................................................................................................ 18
3.3.7. Temperature Measurement .............................................................................................................. 19
3.4. Fault Monitoring and Response Generation ............................................................................................ 19
3.4.1. Output Over/Under Voltage .............................................................................................................. 19
3.4.2. Output Current Protection ................................................................................................................. 20
3.4.3. Over-Temperature Protection ........................................................................................................... 20
2
3.5. Monitoring and Debugging via I C™ ....................................................................................................... 20
4 Application Information ................................................................................................................................... 21
4.1. Typical Application Circuit ....................................................................................................................... 21
4.2. Pin Strap Options of the ZSPM1025C/D ................................................................................................. 24
4.2.1. CONFIG0 – Output Voltage .............................................................................................................. 24
4.2.2. CONFIG1 – Compensation Loop and Output Voltage Slew Rate .................................................... 25
4.3. Typical Performance Measurements for the ZSPM1025C and ZSPM1025D ......................................... 28
4.3.1. Typical Load Transient Response – ZSPM1025C – Capacitor Range #1 – Comp0........................ 29
4.3.2. Typical Load Transient Response – ZSPM1025C – Capacitor Range #2 – Comp1........................ 30
4.3.3. Typical Load Transient Response – ZSPM1025C – Capacitor Range #3 – Comp2........................ 31
4.3.4. Typical Load Transient Response – ZSPM1025C – Capacitor Range #4 – Comp3........................ 32
4.3.5. Typical Load Transient Response – ZSPM1025D – Capacitor Range #1 – Comp0........................ 33
4.3.6. Typical Load Transient Response – ZSPM1025D – Capacitor Range #2 – Comp1........................ 34
Data Sheet
October 15, 2014
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.01
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
4 of 39
ZSPM1025C / ZSPM1025D
True Digital PWM Controller (Single-Phase, Single-Rail)
5
6
7
8
9
4.3.7. Typical Load Transient Response – ZSPM1025D – Capacitor Range #3 – Comp2........................ 35
4.3.8. Typical Load Transient Response – ZSPM1025D – Capacitor Range #4 – Comp3........................ 36
Mechanical Specifications .............................................................................................................................. 37
Glossary ......................................................................................................................................................... 38
Ordering Information ...................................................................................................................................... 38
Related Documents ........................................................................................................................................ 39
Document Revision History ............................................................................................................................ 39
List of Figures
Figure 2.1
Figure 2.2
Figure 2.3
Figure 3.1
Figure 3.2
Figure 3.3
Figure 4.1
Figure 4.2
Figure 4-3
Figure 4-4
Figure 4-5
Figure 4-6
Figure 4-7
Figure 4-8
Figure 4-9
Figure 4-10
Figure 4-11
Figure 4-12
Figure 4-13
Figure 4-14
Figure 4-15
Figure 4-16
Figure 4-17
Figure 4-18
Figure 4-19
Figure 4-20
Figure 4-21
Figure 4-22
Figure 4-23
Figure 4-24
Figure 4-25
Figure 4-26
Data Sheet
October 15, 2014
Typical Application Circuit with a 5 V Supply Voltage ...................................................................... 11
Block Diagram................................................................................................................................... 12
Pin-Out QFN24 Package .................................................................................................................. 14
Simplified Block Diagram for the Digital Compensation ................................................................... 16
Power Sequencing ............................................................................................................................ 17
Inductor Current Sensing Using the DCR Method............................................................................ 18
ZSPM1025C – Application Circuit with a 5V Supply Voltage ........................................................... 21
ZSPM1025D – Application Circuit with a 5V Supply Voltage ........................................................... 22
5 to 15A Load Step – Min. Capacitance ........................................................................................... 29
15 to 5A Load Step – Min. Capacitance ........................................................................................... 29
5 to 15A Load Step – Max. Capacitance .......................................................................................... 29
15 to 5A Load Step – Max. Capacitance .......................................................................................... 29
Open Loop Bode Plots ...................................................................................................................... 29
5 to 15A Load Step – Min. Capacitance ........................................................................................... 30
15 to 5A Load Step – Min. Capacitance ........................................................................................... 30
5 to 15A Load Step – Max. Capacitance .......................................................................................... 30
15 to 5A Load Step – Max. Capacitance .......................................................................................... 30
Open Loop Bode Plots ...................................................................................................................... 30
5 to 15A Load Step – Min. Capacitance ........................................................................................... 31
15 to 5A Load Step – Min. Capacitance ........................................................................................... 31
5 to 15A Load Step – Max. Capacitance .......................................................................................... 31
15 to 5A Load Step – Max. Capacitance .......................................................................................... 31
Open Loop Bode Plots ...................................................................................................................... 31
5 to 15A Load Step – Min. Capacitance ........................................................................................... 32
15 to 5A Load Step – Min. Capacitance ........................................................................................... 32
5 to 15A Load Step – Max. Capacitance .......................................................................................... 32
15 to 5A Load Step – Max. Capacitance .......................................................................................... 32
Open Loop Bode Plots ...................................................................................................................... 32
5 to 20A Load Step – Min. Capacitance ........................................................................................... 33
20 to 5A Load Step – Min. Capacitance ........................................................................................... 33
5 to 20A Load Step – Max. Capacitance .......................................................................................... 33
20 to 5A Load Step – Max. Capacitance .......................................................................................... 33
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.01
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
5 of 39
ZSPM1025C / ZSPM1025D
True Digital PWM Controller (Single-Phase, Single-Rail)
Figure 4-27
Figure 4-28
Figure 4-29
Figure 4-30
Figure 4-31
Figure 4-32
Figure 4-33
Figure 4-34
Figure 4-35
Figure 4-36
Figure 4-37
Figure 4-38
Figure 4-39
Figure 4-40
Figure 4-41
Figure 4-42
Figure 5.1
Open Loop Bode Plots ...................................................................................................................... 33
5 to 20A Load Step – Min. Capacitance ........................................................................................... 34
20 to 5A Load Step – Min. Capacitance ........................................................................................... 34
5 to 20A Load Step – Max. Capacitance .......................................................................................... 34
20 to 5A Load Step – Max. Capacitance .......................................................................................... 34
Open Loop Bode Plots ...................................................................................................................... 34
5 to 20A Load Step – Min. Capacitance ........................................................................................... 35
20 to 5A Load Step – Min. Capacitance ........................................................................................... 35
5 to 20A Load Step – Max. Capacitance .......................................................................................... 35
20 to 5A Load Step – Max. Capacitance .......................................................................................... 35
Open Loop Bode Plots ...................................................................................................................... 35
5 to 20A Load Step – Min. Capacitance ........................................................................................... 36
20 to 5A Load Step – Min. Capacitance ........................................................................................... 36
5 to 20A Load Step – Max. Capacitance .......................................................................................... 36
20 to 5A Load Step – Max. Capacitance .......................................................................................... 36
Open Loop Bode Plots ...................................................................................................................... 36
24-pin QFN Package Drawing .......................................................................................................... 37
List of Tables
Table 3.1
Table 3.2
Table 3.3
Table 4.1
Table 4.2
Table 4.3
Table 4.4
Table 4.5
Data Sheet
October 15, 2014
Power Sequencing Timing ................................................................................................................ 17
Power Good (PGOOD) Output Thresholds ...................................................................................... 17
Fault Configuration Overview ........................................................................................................... 19
Passive Component Values for the Application Circuits .................................................................. 23
Pin Strap Resistor Values ................................................................................................................. 24
ZSPM1025C and ZSPM1025D - Nominal VOUT Pin-Strap Resistor Selection (CONFIG0 Pin) ..... 25
Recommended Output Capacitor Ranges ........................................................................................ 26
ZSPM1025C and ZSPM1025D - Compensator and VOUT Slew Rate Pin Strap Resistor
Selection ........................................................................................................................................... 27
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.01
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
6 of 39
ZSPM1025C / ZSPM1025D
True Digital PWM Controller (Single-Phase, Single-Rail)
1
IC Characteristics
Note: The absolute maximum ratings are stress ratings only. The ZSPM1025C/D might not function or be
operable above the recommended operating conditions. Stresses exceeding the absolute maximum ratings might
also damage the device. In addition, extended exposure to stresses above the recommended operating
conditions might affect device reliability. ZMDI does not recommend designing to the “Absolute Maximum
Ratings.”
1.1.
Absolute Maximum Ratings
PARAMETER
PINS
CONDITIONS
MIN
TYP
MAX
UNITS
5.5
V
0.15
V/µs
Supply voltages
5 V supply voltage
VDD50
dV/dt < 0.15V/µs
-0.3
Maximum slew rate
3.3 V supply voltage
VDD33
-0.3
3.6
V
1.8 V supply voltage
VDD18
AVDD18
-0.3
2.0
V
GPIOx
CONTROL
PGOOD
LSE
PWM
-0.3
5.5
V
Current sensing
ISNSP
ISNSN
-0.3
5.5
V
Voltage feedback
VFBP
VFBN
-0.3
2.0
V
All other analog pins
ADCVREF
VREFP
TEMP
VIN
CONFIGx
-0.3
2.0
V
Digital pins
Digital I/O pins
Analog pins
Ambient conditions
Storage temperature
150
°C
Electrostatic discharge –
1)
Human Body Model
+/-2k
V
Electrostatic discharge –
1)
Charge Device Model
+/- 500
V
1)
-40
ESD testing is performed according to the respective JESD22 JEDEC standard.
Data Sheet
October 15, 2014
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.01
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
7 of 39
ZSPM1025C / ZSPM1025D
True Digital PWM Controller (Single-Phase, Single-Rail)
1.2.
Recommended Operating Conditions
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Ambient conditions
Operation temperature
TAMB
JA
Thermal resistance junction to
ambient
1.3.
-40
125
40
°C
K/W
Electrical Parameters
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
4.75
5.0
5.25
V
Supply voltages
5 V supply voltage—VDD50 pin
VVDD50
5 V supply current
IVDD50
VDD50=5.0 V
3.3 V supply voltage
VVDD33
Supply for both the VDD33
and VDD50 pins if the internal
3.3V regulator is not used.
3.3 V supply current
IVDD33
VDD50=VDD33=3.3 V
23
3.0
3.3
mA
3.6
23
V
mA
Internally generated supply voltages
3.3 V supply voltage—VDD33 pin
VVDD33
VDD50=5.0 V
3.3 V output current
IVDD33
VDD50=5.0 V
VAVDD18
VVDD18
VDD50=5.0 V
1.8 V supply voltages—AVDD18
and VDD18 pins
3.0
1.72
3.3
1.80
1.8 V output current
3.6
V
2.0
mA
1.98
V
0
mA
Power-on reset threshold for
VDD33 pin – on
VTH_POR_ON
2.8
V
Power-on reset threshold for
VDD33 pin – off
VTH_POR_OFF
2.6
V
Digital IO pins (GPIOx, CONTROL, PGOOD)
Input high voltage
VDD33=3.3 V
Input low voltage
VDD33=3.3 V
Output high voltage
VDD33=3.3 V
2.0
V
0.8
V
VDD33
V
Output low voltage
0.5
V
Input leakage current
±1
µA
Output current - high
2.0
mA
Output current - low
2.0
mA
Data Sheet
October 15, 2014
2.4
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.01
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
8 of 39
ZSPM1025C / ZSPM1025D
True Digital PWM Controller (Single-Phase, Single-Rail)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
VDD33
V
Output low voltage
0.5
V
Output current - high
2.0
mA
Output current - low
2.0
mA
Tri-state leakage current
±1.0
µA
1.4
V
Digital IO pins with tri-state capability (LSE, PWM)
Output high voltage
VDD33=3.3 V
2.4
Output voltage (without external feedback divider; see section 3.3.2)
Set-point voltage
0
Set-point resolution
Set-point accuracy
VOUT=1.2 V
1.4
mV
1
%
Inductor current measurement
Common mode voltage - ISNSP
and ISNSN pins to AGND
0
Differential voltage range across
ISNSP and ISNSN pins
Accuracy
5.0
V
±100
mV
10
%
500
kHz
Resolution
163
ps
Frequency accuracy
2.0
%
Digital pulse width modulator
Switching frequency
fSW
Duty Cycle
2.5
100
%
0
1.58
V
Over-voltage protection
Reference DAC
Set-point voltage
Resolution
25
mV
Set point accuracy
2
%
35
mV
Comparator
Hysteresis
Housekeeping analog-to-digital converter (HKADC) input pins
Input voltage—TEMP, VIN,
CONFIG0, and CONFIG1 pins
0
Source impedance Vin sensing
ADC resolution
Data Sheet
October 15, 2014
1.44
V
3
kΩ
0.7
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.01
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
mV
9 of 39
ZSPM1025C / ZSPM1025D
True Digital PWM Controller (Single-Phase, Single-Rail)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
External temperature measurement (Note: Only PN-junction sense elements are supported)
Bias currents for external
temperature sensing—TEMP pin
60
µA
Resolution—TEMP pin
0.16
K
Accuracy of measurement—
TEMP pin
±5.0
K
Resolution
0.22
K
Accuracy of measurement
±5.0
K
Internal temperature measurement
Data Sheet
October 15, 2014
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.01
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
10 of 39
ZSPM1025C / ZSPM1025D
True Digital PWM Controller (Single-Phase, Single-Rail)
2
2.1.
Product Summary
Overview
The ZSPM1025C and ZSPM1025D are true-digital single-phase PWM controllers optimally configured for use
with the Murata Power Solutions 25A Power Block OKLP-X/25 in smart digital power solutions. The
ZSPM1025C/D has a digital power control loop incorporating output voltage sensing, average inductor current
sensing, and extensive fault monitoring and handling features. Several different functional units are integrated in
the device. A dedicated digital control loop is used to provide fast loop response and optimal output voltage
regulation. This includes output voltage sensing, average inductor current sensing, a digital control law, and a
digital pulse-width modulator (DPWM). In parallel, a dedicated error handler allows fast and flexible detection of
error signals and their appropriate handling. A housekeeping analog-to-digital converter (HKADC) ensures the
reliable and efficient measurement of environmental signals, such as input voltage and temperature.
An application-specific, low-energy integrated microcontroller is used to control the overall system. It manages
configuration of the various logic units according to the preprogrammed configuration look-up tables and the
external configuration resistors connected to the CONFIG0 and CONFIG1 pins. These pin-strapping resistors
expedite configuration of output voltage, compensation, and rise time without requiring digital communication.
ZMDI’s Pink Power Designer™ graphical user interface (GUI) allows the user to monitor the controller’s
measurements of the environmental signals and the status of the error handler via the GPIO2 and GPIO3 pins.
Figure 2.1
Typical Application Circuit with a 5 V Supply Voltage
+5V
VDD50
VDD33
VDD18
C1,C2,C3
Vin
+5V
GND
AVDD18
VREFP
R7
VIN
R1
C4,C5,C6
+5V ENABLE
R8
ADCVREF
AGND
CONFIG0
CONFIG1
VIN
PWM
LSE
Murata
OKLP-X/25-W12-C
VOUT
PWM
+Vout
COUT
CIN
GND
TEMP
R2,R3
GND
+CS
PGND
-CS
TEMP
GPIO0
GPIO1
GPIO2
GPIO3
CONTROL
PGOOD
C8
ISNSP
ISNSN
VFBP
VFBN
R6
C7
R4
R5
ZSPM1025C/D
Data Sheet
October 15, 2014
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.01
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
11 of 39
ZSPM1025C / ZSPM1025D
True Digital PWM Controller (Single-Phase, Single-Rail)
A high-reliability, high-temperature one-time programmable memory (OTP) is used to store configuration parameters. All required bias and reference voltages are internally derived from the external supply voltage.
Figure 2.2
Block Diagram
Current Sensing
ISNSP
Average Current
Sensing
ISNSN
Digital Control Loop
VFBP
VFB
FLASH
ADC
VFBN
Adaptive Digital
Controller
PWM
PWM
LSE
DAC
OC Detection
Sequencer
OV Detection
DAC
Vin OV/UV
Detection
Int. Temp
Sense
Vout UV Detection
TEMP
CONFIG0
HKADC
VIN
GPIO3
Clock
Generation
GPIO2
GPIO1
CONTROL
GPIO0
PGOOD
ADCVREF
GPIO
October 15, 2014
VREFP
1.8V Reg
Analog
AVDD18
1.8V Reg
Digital
VDD18
3.3V
Reg
VDD33
NVM
(OTP)
CPU Core
CONFIG1
Data Sheet
VREF
VDD50
Bias
Current
Source
Configurable
Error Handler
OT Detection
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.01
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
12 of 39
ZSPM1025C / ZSPM1025D
True Digital PWM Controller (Single-Phase, Single-Rail)
2.2.
Pin Description
Pin
Name
Direction
Type
1
AGND
Input
Supply
Analog Ground
2
VREFP
Output
Supply
Reference Terminal
3
VFBP
Input
Analog
Positive Input of Differential Feedback Voltage Sensing
4
VFBN
Input
Analog
Negative Input of Differential Feedback Voltage Sensing
5
ISNSP
Input
Analog
Positive Input of Differential Current Sensing
6
ISNSN
Input
Analog
Negative Input of Differential Current Sensing
7
TEMP
Input
Analog
Connection to External Temperature Sensing Element
8
VIN
Input
Analog
Power Supply Input Voltage Sensing
9
CONFIG0
Input
Analog
Configuration Selection 0
10
CONFIG1
Input
Analog
Configuration Selection 1
11
PWM
Output
Digital
High-Side FET Control Signal
12
LSE
Output
Digital
Low-Side FET Control Signal
13
PGOOD
Output
Digital
PGOOD Output (Internal Pull-Down)
14
CONTROL
Input
Digital
Control Input – Active High
15
GPIO0
Input/Output
Digital
General Purpose Input/Output Pin
16
GPIO1
Input/Output
Digital
General Purpose Input/Output Pin
17
GPIO2
Input/Output
Digital
General Purpose Input/Output Pin
18
GPIO3
Input/Output
Digital
General Purpose Input/Output Pin
19
GND
Input
Supply
Digital Ground
20
VDD18
Output
Supply
Internal 1.8 V Digital Supply Terminal
21
VDD33
Input/Output
Supply
3.3 V Supply Voltage Terminal
22
VDD50
Input
Supply
5.0 V Supply Voltage Terminal
23
AVDD18
Output
Supply
Internal 1.8 V Analog Supply Terminal
24
ADCVREF
Input
Analog
Analog-to-Digital Converter (ADC) Reference Terminal
PAD
PAD
Input
Analog
Exposed Pad, Digital Ground
Data Sheet
October 15, 2014
Description
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.01
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
13 of 39
ZSPM1025C / ZSPM1025D
True Digital PWM Controller (Single-Phase, Single-Rail)
2.3.
Available Packages
The ZSPM1025C/D is available in a 24-pin QFN package. The pin-out is shown in Figure 2.3. The mechanical
drawing of the package can be found in Figure 5.1.
GND
VDD18
VDD33
VDD50
AVDD18
Pin-Out QFN24 Package
ADCVREF
Figure 2.3
24 23 22 21 20 19
AGND 1
18 GPIO3
VREFP 2
17 GPIO2
VFBP 3
16 GPIO1
PAD
VFBN 4
15 GPIO0
ISNSP 5
14 CONTROL
ISNSN 6
3
3.1.
10 11 12
VIN
CONFIG0
CONFIG1
LSE
9
PWM
8
TEMP
13 PGOOD
7
Functional Description
Power Supply Circuitry, Reference Decoupling, and Grounding
The ZSPM1025C/D incorporates several internal power regulators in order to derive all required supply and bias
voltages from a single external supply voltage. This supply voltage can be either 5V or 3.3V depending on
whether the internal 3.3V regulator should be used. If the internal 3.3V regulator is not used, 3.3V must be
supplied to the 3.3V and 5V supply pins. Decoupling capacitors are required at the VDD33, VDD18, and AVDD18
pins (1.0µF minimum; 4.7µF recommended). If the 5.0V supply voltage is used, i.e., the internal 3.3V regulator is
used, a small load current can be drawn from the VDD33 pin. This can be used to supply pull-up resistors, for
example.
The reference voltages required for the analog-to-digital converters are generated within the ZSPM1025C/D.
External decoupling must be provided between the VREFP and ADCVREF pins. Therefore, a 4.7µF capacitor is
required at the VREFP pin, and a 100nF capacitor is required at the ADCVREF pin. The two pins should be
connected with approximately 50Ω resistance in order to provide sufficient decoupling between the pins.
Three different ground connections (the pad, AGND pin, and GND pin) are available on the outside of the
package. These should be connected together to a single ground tie. A differentiation between analog and digital
ground is not required.
Data Sheet
October 15, 2014
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.01
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
14 of 39
ZSPM1025C / ZSPM1025D
True Digital PWM Controller (Single-Phase, Single-Rail)
3.2.
Reset/Start-up Behavior
The ZSPM1025C/D employs an internal power-on-reset (POR) circuit to ensure proper start up and shut down
with a changing supply voltage. Once the supply voltage increases above the POR threshold voltage (see section
1.3), the ZSPM1025C/D begins the internal start-up process. Upon its completion, the device is ready for
operation.
3.3.
3.3.1.
Digital Power Control
Overview
The digital power control loop consists of the integral parts required for the control functionality of the
ZSPM1025C/D. A high-speed analog front-end is used to digitize the output voltage. A digital control core uses
the acquired information to provide duty-cycle information to the PWM that controls the drive signals to the power
stage.
3.3.2.
Output Voltage Feedback
The voltage feedback signal is sampled with a high-speed analog front-end. The feedback voltage is differentially
measured and subtracted from the voltage reference provided by a reference digital-to-analog converter (DAC)
using an error amplifier. A flash ADC is then used to convert the voltage into its digital equivalent. This is followed
by internal digital filtering to improve the system’s noise rejection.
3.3.2.1. ZSPM1025C
The ZSPM1025C has been designed for an output voltage range from 0.62 to 1.20V. The VFBP pin should be
connected to the converter output through a 1.75kΩ resistor, and a small filter capacitor, typically 22pF, should be
connected between the VFBP and VFBN pins of the ZSPM1025C.
3.3.2.2. ZSPM1025D
The ZSPM1025D has been designed for an output voltage range from 1.25 to 3.40V. An external feedback divider
is required for the ZSPM1025D. The VFBP pin should be connected to the converter output through a 1.75kΩ
resistor, and a 1kΩ resistor should be connected between the VFBP and VFBN pin of the ZSPM1025D. A small
filter capacitor, typically 22pF, should also be connected between the VFBP and VFBN pins of the ZSPM1025D.
3.3.3.
Digital Compensator
The sampled output voltage is processed by a digital control loop in order to modulate the DPWM output signals
controlling the power stage. This digital control loop works as a voltage-mode controller using a PID-type
compensation. The basic structure of the controller is shown in Figure 3.1. The proprietary State-Law™ Control
(SLC) concept features two parallel compensators, steady-state operation, and fast transient operation. The
ZSPM1025C/D implements fast, reliable switching between the different compensation modes in order to ensure
good transient performance and quiet steady state. This has been utilized to tune the compensators individually
for the respective needs; i.e. quiet steady-state and fast transient performance.
Data Sheet
October 15, 2014
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.01
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
15 of 39
ZSPM1025C / ZSPM1025D
True Digital PWM Controller (Single-Phase, Single-Rail)
Figure 3.1
Simplified Block Diagram for the Digital Compensation
Three different techniques are used to improve transient performance further:



Tru-sample Technology™ is used to acquire fast, accurate, and continuous information about the output voltage so that the device can react quickly to any change in output voltage. Tru-sample Technology™ reduces
phase-lag caused by sampling delays, reduces noise sensitivity, and improves transient performance.
The Sub-cycle Response™ (SCR) technique, a method to drive the DPWM asynchronously during load transients, allows limiting the maximum deviation of the output voltage and recharging the output capacitors
faster.
A nonlinear gain adjustment is used during large load transients to boost the loop gain and reduce the
settling time.
3.3.4.
Power Sequencing and the CONTROL Pin
The ZSPM1025C/D has a set of pre-configured power-sequencing features. The typical sequence of events is
shown in Figure 3.2. The individual values for the delay, ramp time, and post ramp time are listed in Table 3.1.
Note that the device is slew-rate controlled for ramping. Hence, when pin-strapping options for the output voltage
are used, the ramp time can change based on the configured slew-rate and the actual selected output voltage.
The slew rate can be selected in the application circuit using the pin-strap options as explained in section 4.1.
The CONTROL pin is pre-configured for active high operation.
The ZSPM1025C/D features a power good (PGOOD) output, which can be used to indicate the state of the power
rail. If the output voltage level is above the power good ON threshold, the pin is set to active, indicating a stable
output voltage on the rail. The thresholds for the power good output turn-on and turn-off are listed in Table 3.2.
Note that the power good thresholds are stored in the device as factors relative to the nominal output voltage.
Hence, using the strapping options (see section 4.1) to change the output voltage level also changes the PGOOD
thresholds.
Data Sheet
October 15, 2014
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.01
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
16 of 39
ZSPM1025C / ZSPM1025D
True Digital PWM Controller (Single-Phase, Single-Rail)
Figure 3.2
Power Sequencing
VOUTnom
VPGOOD_ON
VPGOOD_OFF
0V
t
tON_DELAY
tON_RISE
tOFF_DELAY
Control pin
Control pin
tON_MAX
Table 3.1
tOFF_FALL
tOFF_MAX
Power Sequencing Timing
Parameter
ZSPM1025C
ZSPM1025D
tON_DELAY
10ms
10ms
tON_RISE
Pin Strap Selectable
(see section 4.1)
Pin Strap Selectable
(see section 4.1)
tON_MAX
188ms
188ms
tOFF_DELAY
10ms
10ms
tOFF_FALL*
50ms (VOUT = 1.20V)
Ramp down slew rate is 0.024V/ms
50ms (VOUT = 1.80V)
Ramp down slew rate is 0.036V/ms
tOFF_MAX
188ms
188ms
* tOFF_FALL is implemented as a slew rate by the ZSPM1025C/D. Use the device-specific slew rate and the selected
nominal output voltage to calculate the actual tOFF_FALL in milliseconds.
Table 3.2
Power Good (PGOOD) Output Thresholds
Parameter
Value
ON level
95% of VOUT Nominal
VOUT nominal is pin-strap selectable (see section 4.1)
OFF level
90% of VOUT Nominal
VOUT nominal is pin-strap selectable (see section 4.1)
Data Sheet
October 15, 2014
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.01
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
17 of 39
ZSPM1025C / ZSPM1025D
True Digital PWM Controller (Single-Phase, Single-Rail)
3.3.5.
Pre-biased Start-up and Soft-Off
Dedicated pre-biased start-up logic ensures proper start-up of the power converter when the output capacitors are
pre-charged to a non-zero output voltage. Closed-loop stability is ensured during this phase.
When the DC/DC converter output is disabled, i.e. when the CONTROL pin is set low, the ZSPM1025C/D will
execute the soft-off sequence. The soft-off sequence will ramp down the output voltage to 0V and set the PWM
output in a tri-state condition.
3.3.6.
Current Sensing
The ZSPM1025C/D offers cycle-by-cycle average current sensing and over-current protection. A dedicated ADC
is used to provide fast and accurate current information over the switching period. The acquired information is
compared with the pre-configured over-current threshold to trigger an over-current fault event. DCR current
sensing across the inductor on the Murata OKLP-X/25-W12-C is supported. Additionally, the device uses DCR
temperature compensation via the external temperature sense element. This increases the accuracy of the
current sense method by counteracting the significant change of the DCR over temperature.
The schematic of the required current sensing circuitry is shown in Figure 3.3 for the widely-used DCR currentsensing method, which uses the parasitic resistance of the inductor to acquire the current information. The
principle is based on a matched time-constant between the inductor and the low-pass filter built from a 2.15kΩ
resistor mounted on the Murata OKLP-X/25-W12-C Power Block and C8. Resistor R6 should be a precision
2.15kΩ resistor in order to provide good DC voltage rejection, .i.e. reduce the influence of the output voltage level
on the current measurement.
Figure 3.3
Inductor Current Sensing Using the DCR Method
Murata
OKLP-X/25-W12-C
L
DCR
+Vout
2.15 kOhm
+CS
-CS
C8
220nF
ZSPM1025
R6
2.15 kOhm
ISNSP
ISNSN
Data Sheet
October 15, 2014
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.01
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
18 of 39
ZSPM1025C / ZSPM1025D
True Digital PWM Controller (Single-Phase, Single-Rail)
To improve the accuracy of the current measurement, which can be adversely affected by the temperature
coefficient of the inductor’s DCR, the ZSPM1025C/D features temperature compensation via the external
temperature sensing. The temperature of the inductor can be measured with an external temperature sense
element placed close to the inductor. This information is used to adapt the gain of the current sense path to
compensate for the increase in actual DCR.
3.3.7.
Temperature Measurement
The ZSPM1025C/D features two independent temperature measurement units. The internal temperature sensing
measures the temperature inside the IC; the external temperature sensing element is placed on the Murata
OKLP-X/25-W12-C Power Block. The ZSPM1025C/D drives 60µA into the external temperature sensing element
and measures the voltage on the TEMP pin.
3.4.
Fault Monitoring and Response Generation
The ZSPM1025C/D monitors various signals for possible fault conditions during operation. The fault thresholds of
the ZSPM1025C/D controllers are given in Table 3.3.
Table 3.3
Fault Configuration Overview
Signal
Fault Threshold
Output Over-Voltage Fault
125% of Nominal VOUT*
Output Under-Voltage Fault
75% of Nominal VOUT*
Input Over-Voltage Fault
13.80V
Input Under-Voltage Fault
7.00V
Over-Current Fault
30.0A
External Over-Temperature Fault
105°C
Internal Over-Temperature Fault
100°C
*Nominal VOUT is selected by the pin-strap resistor on the CONFIG0 pin.
The controller fault handling will infinitely try to restart the converter on a fault condition. In analog controllers, this
infinite re-try feature is also known as “hiccup mode.”
3.4.1.
Output Over/Under Voltage
To prevent damage to the load, the ZSPM1025C/D utilizes an output over-voltage protection circuit. The voltage
at VFBP is continuously compared with a configurable threshold using a high-speed analog comparator. If the
voltage exceeds the configured threshold, the fault response is generated and the PWM output is set to low.
The ZSPM1025C/D also monitors the output voltage with a lower threshold. If the output voltage falls below the
under-voltage fault level, a fault event is generated and the PWM output is set to low.
Note that the fault thresholds are stored in the ZSPM1025C/D as factors relative to the nominal output voltage.
Hence, using the strapping options (see section 4.1) to change the output voltage level, also changes the fault
thresholds.
Data Sheet
October 15, 2014
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.01
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
19 of 39
ZSPM1025C / ZSPM1025D
True Digital PWM Controller (Single-Phase, Single-Rail)
3.4.2.
Output Current Protection
The ZSPM1025C/D continuously monitors the average inductor current and utilizes this information to protect the
power supply against excessive output current.
3.4.3.
Over-Temperature Protection
The ZSPM1025C/D monitors internal and external temperature. For the temperature fault conditions a soft-off
sequence is started. The soft-off sequence will ramp down the output voltage to 0V and set the PWM output in a
tri-state condition.
3.5.
Monitoring and Debugging via I2C™
The Pink Power Designer™ GUI can be used to monitor the internal measurement signals of the ZSPM1025C/D
during the development phase. The status of the internal fault handler can also be monitored within the Pink
Power Designer™ GUI.
2
The Pink Power Designer™ GUI communicates with the ZSPM1025C/D via an I C™* interface in which the SCL
signal is connected to the GPIO3 pin and the SDA signal is connected to the GPIO2 pin.
* I2C™ is a trademark of NXP.
Data Sheet
October 15, 2014
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.01
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
20 of 39
ZSPM1025C / ZSPM1025D
True Digital PWM Controller (Single-Phase, Single-Rail)
4
Application Information
The ZSPM1025C/D controllers have been designed and pre-configured to operate with the Murata OKLP-X/25W12-C Power Block, which is a complete point-of-load solution for 25A output currents. This section includes
information about the typical application circuits and recommended component values.
The pin-strap configuration options for the ZSPM1025C/D are also documented in this section.
4.1.
Typical Application Circuit
Schematics for the typical application circuits for the ZSPM1025C and ZSPM1025D respectively are shown in
Figure 4.1 and Figure 4.2. A list of recommended component values for the passive components can be found in
Table 4.1.
Figure 4.1
ZSPM1025C – Application Circuit with a 5V Supply Voltage
U1
+5V
VDD50
VDD33
VDD18
C1,C2,C3
Vin
+5V
GND
AVDD18
VREFP
R7
R1
C4,C5,C6
U2
VIN
+5V ENABLE
R8
ADCVREF
AGND
CONFIG0
CONFIG1
VIN
PWM
LSE
Murata
OKLP-X/25-W12-C
VOUT
PWM
+Vout
COUT
CIN
GND
TEMP
R2,R3
GND
+CS
PGND
-CS
TEMP
ON/OFF
PGOOD
GPIO0
GPIO1
GPIO2
GPIO3
CONTROL
PGOOD
C8
ISNSP
ISNSN
VFBP
VFBN
R6
R5
C7
ZSPM1025C
Data Sheet
October 15, 2014
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.01
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
21 of 39
ZSPM1025C / ZSPM1025D
True Digital PWM Controller (Single-Phase, Single-Rail)
Figure 4.2
ZSPM1025D – Application Circuit with a 5V Supply Voltage
U1
+5V
VDD50
VDD33
VDD18
C1,C2,C3
Vin
+5V
GND
AVDD18
VREFP
R7
R1
C4,C5,C6
U2
VIN
+5V ENABLE
R8
ADCVREF
VIN
AGND
CONFIG0
CONFIG1
PWM
LSE
Murata
OKLP-X/25-W12-C
VOUT
PWM
+Vout
COUT
CIN
GND
TEMP
R2,R3
GND
+CS
PGND
-CS
TEMP
ON/OFF
PGOOD
GPIO0
GPIO1
GPIO2
GPIO3
CONTROL
PGOOD
C8
ISNSP
ISNSN
VFBP
VFBN
R6
C7
R4
R5
ZSPM1025D
Data Sheet
October 15, 2014
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.01
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
22 of 39
ZSPM1025C / ZSPM1025D
True Digital PWM Controller (Single-Phase, Single-Rail)
Table 4.1
Passive Component Values for the Application Circuits
Reference
Designator
Component
value
C1
1.0µF
Ceramic capacitor.
C2
4.7µF
Ceramic capacitor. Recommended 4.7µF; minimum 1.0µF.
C3
4.7µF
Ceramic capacitor. Recommended 4.7µF; minimum 1.0µF.
C4
4.7µF
Ceramic capacitor. Recommended 4.7µF; minimum 1.0µF.
C5
4.7µF
Ceramic capacitor. Recommended 4.7µF; minimum 1.0µF.
C6
100nF
C7
22pF
C8
220nF*
CIN
Output voltage sense filtering capacitor.
Recommended 22pF; maximum 1nF.
DCR current-sense filter capacitor.
Input filter capacitors. Can be a combination of ceramic and electrolytic capacitors.
COUT
R1
Description
Output filter capacitors. See section 4.2.2 for more information on the output capacitor
selection.
51Ω*
R2, R3
Pin-strap configuration resistors. See sections 4.2.1 and 4.2.2 for information on
application-specific values.
R4
1.0kΩ*
Output voltage feedback divider bottom resistor. Connect between the VFBP and
VFBN pins.
Important: R4 must not be used with the ZSPM1025C. If R4 is used with the
ZSPM1025C, the output voltage will be much higher than the nominal output voltage.
R5
1.75kΩ*
Output voltage feedback divider top resistor. Connect between the output terminal and
the VFBP pin.
R6
2.15kΩ*
DCR current sense filter resistor.
R7
9.1kΩ*
Input voltage divider top resistor. Connect between the main power input and the VIN
pin of the ZSPM1025C/D.
R8
1.0kΩ*
Input voltage divider bottom resistor. Connect between the VIN and AGND pins of the
ZSPM1025C/D.
Notes:
* Fixed component values that must not be changed.
Data Sheet
October 15, 2014
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.01
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
23 of 39
ZSPM1025C / ZSPM1025D
True Digital PWM Controller (Single-Phase, Single-Rail)
4.2.
Pin Strap Options of the ZSPM1025C/D
The ZSPM1025C/D provides two pin-strap configuration pins. The CONFIG0 pin is used to select the nominal
output voltage of the non-isolated DC/DC converter. The CONFIG1 is used to select a set of compensation loop
parameters in combination with the slew rate for the output voltage during the power-up sequence. There are four
sets of compensation loop parameters that have been optimized for different ranges of output capacitance.
The CONFIG0 and CONFIG1 pins are used to determine the index of the selected values using the resistor
values listed in Table 4.2. Each pin provides 30 configuration indexes based on resistor values from the E96
series. A resistor variation of ~2% is taken into account for initial tolerance and temperature dependency. The
values are read during the initialization phase after a POR event and are then used to look up the selected index
from the pre-configured look-up tables. Based on the index read by the ZSPM1025C/D, the controller will load the
corresponding configuration from the OTP memory of the device.
Table 4.2
Pin Strap Resistor Values
Index
Resistor Value
Using the E96 Series
Index
Resistor Value
Using the E96 Series
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
0Ω
392Ω
576Ω
787Ω
1.000kΩ
1.240kΩ
1.500kΩ
1.780kΩ
2.100kΩ
2.430kΩ
2.800kΩ
3.240kΩ
3.740kΩ
4.220kΩ
4.750kΩ
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
5.360kΩ
6.040kΩ
6.810kΩ
7.680kΩ
8.660kΩ
9.530kΩ
10.50kΩ
11.80kΩ
13.00kΩ
14.30kΩ
15.80kΩ
17.40kΩ
19.10kΩ
21.00kΩ
23.20kΩ
4.2.1.
CONFIG0 – Output Voltage
The nominal output voltage of the ZSPM1025C/D is set with a pin-strap resistor on the CONFIG0 pin. The
selectable output voltages and the corresponding pin-strap resistor index are given in Table 4.3.
The nominal output voltage set points given for the ZSPM1025C are valid without an output voltage feedback
divider. To achieve optimal performance the low pass filter consisting of resistor R5 and C7 (see Figure 4.1)
should be included in the application circuit.
The nominal output voltage set points given for the ZSPM1025D are only valid if the resistors in the output voltage
feedback divider, R4 and R5 (see Figure 4.2), have the resistances specified in Table 4.1.
Data Sheet
October 15, 2014
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.01
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
24 of 39
ZSPM1025C / ZSPM1025D
True Digital PWM Controller (Single-Phase, Single-Rail)
Table 4.3
ZSPM1025C and ZSPM1025D - Nominal VOUT Pin-Strap Resistor Selection (CONFIG0 Pin)
Index
Resistor Value
Using the E96 Series
Nominal VOUT – ZSPM1025C
Nominal VOUT – ZSPM1025D
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
0Ω
392Ω
576Ω
787Ω
1.000kΩ
1.240kΩ
1.500kΩ
1.780kΩ
2.100kΩ
2.430kΩ
2.800kΩ
3.240kΩ
3.740kΩ
4.220kΩ
4.750kΩ
5.360kΩ
6.040kΩ
6.810kΩ
7.680kΩ
8.660kΩ
9.530kΩ
10.50kΩ
11.80kΩ
13.00kΩ
14.30kΩ
15.80kΩ
17.40kΩ
19.10kΩ
21.00kΩ
23.20kΩ
0.62 V
0.64 V
0.66 V
0.68 V
0.70V
0.72V
0.74V
0.76 V
0.78 V
0.80 V
0.82V
0.84 V
0.86V
0.88 V
0.90 V
0.92 V
0.94 V
0.96 V
0.98 V
1.00 V
1.02 V
1.04 V
1.06 V
1.08 V
1.10 V
1.12 V
1.14V
1.16V
1.18 V
1.20 V
1.25 V
1.30 V
1.35 V
1.40 V
1.45 V
1.50 V
1.55 V
1.60 V
1.65 V
1.70 V
1.75 V
1.80 V
1.85 V
1.90 V
1.95 V
2.00 V
2.10 V
2.20 V
2.30 V
2.40 V
2.50 V
2.60 V
2.70 V
2.80 V
2.90 V
3.00 V
3.10 V
3.20 V
3.30 V
3.40 V
4.2.2.
CONFIG1 – Compensation Loop and Output Voltage Slew Rate
The ZSPM1025C/D controllers can be configured to operate over a wide range of output capacitance. Four
ranges of output capacitance have been specified to match typical customer requirements (see Table 4.4).
Typical performance measurements for both load transient performance and open-loop Bode plots can be found
in section 4.3. Using less output capacitance than the minimum capacitance given in Table 4.4 is not
recommended.
Data Sheet
October 15, 2014
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.01
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
25 of 39
ZSPM1025C / ZSPM1025D
True Digital PWM Controller (Single-Phase, Single-Rail)
Table 4.4
Recommended Output Capacitor Ranges
Capacitor Range
Ceramic Capacitor
Bulk Electrolytic Capacitors
#1
Minimum 200µF
Maximum 400µF
None
#2
Minimum 400µF
Maximum 1000µF
None
#3
Minimum 100µF
Maximum 600µF
Minimum 2 x 470µF, 7mΩ ESR
Maximum 5 x 470µF, 7mΩ ESR
#4
Minimum 400µF
Maximum 1000µF
Minimum 4 x 470µF, 7mΩ ESR
Maximum 10 x 470µF, 7mΩ ESR
To get the optimal performance for a given output capacitor range, one of four sets of compensation loop
parameters, Comp0 to Comp3, should be selected with a resistor between CONFIG1 and GND. The
compensation loop parameters have been configured to ensure optimal transient performance and good control
loop stability margins.
For each set of compensation loop parameters, there is a choice of seven slew rates for the output voltage during
power-up. The selection of the slew rate can be used to limit the input current of the DC/DC converter while it is
ramping up the output voltage. The current needed to charge the output capacitors increases in direct proportion
to the slew rate.
Table 4.5 gives a complete list of the selectable compensation loop parameters and slew rates together with the
equivalent pin-strap resistor values.
Data Sheet
October 15, 2014
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.01
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
26 of 39
ZSPM1025C / ZSPM1025D
True Digital PWM Controller (Single-Phase, Single-Rail)
Table 4.5
ZSPM1025C and ZSPM1025D - Compensator and VOUT Slew Rate Pin Strap Resistor Selection
Index
Resistor Value
Using the E96 Series
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
0Ω
392Ω
576Ω
787Ω
1.000kΩ
1.240kΩ
1.500kΩ
1.780kΩ
2.100kΩ
2.430kΩ
2.800kΩ
3.240kΩ
3.740kΩ
4.220kΩ
4.750kΩ
5.360kΩ
6.040kΩ
6.810kΩ
7.680kΩ
8.660kΩ
9.530kΩ
10.50kΩ
11.80kΩ
13.00kΩ
14.30kΩ
15.80kΩ
17.40kΩ
19.10kΩ
21.00kΩ
23.20kΩ
Data Sheet
October 15, 2014
Compensator
Comp0
(Capacitor Range #1)
Comp1
(Capacitor Range #2)
Comp2
(Capacitor Range #3)
Comp3
(Capacitor Range #4)
Comp0
VOUT Slew Rate
0.10 V/ms
0.20 V/ms
0.50 V/ms
1.00 V/ms
2.00 V/ms
5.00 V/ms
10.00 V/ms
0.10 V/ms
0.20 V/ms
0.50 V/ms
1.00 V/ms
2.00 V/ms
5.00 V/ms
10.00 V/ms
0.10 V/ms
0.20 V/ms
0.50 V/ms
1.00 V/ms
2.00 V/ms
5.00 V/ms
10.00 V/ms
0.10 V/ms
0.20 V/ms
0.50 V/ms
1.00 V/ms
2.00 V/ms
5.00 V/ms
10.00 V/ms
0.10 V/ms
0.10 V/ms
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.01
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
27 of 39
ZSPM1025C / ZSPM1025D
True Digital PWM Controller (Single-Phase, Single-Rail)
4.3.
Typical Performance Measurements for the ZSPM1025C and ZSPM1025D
The pre-programmed compensation loop parameters for the ZSPM1025C and ZSPM1025D have been designed
to ensure stability and optimal transient performance for the OKLP-X/25-W12-C Power Block from Murata in
combination with one of the four output capacitor ranges (see Table 4.4).
Load transient performance measurements and open-loop Bode plots for the ZSPM1025C can be found in
sections 4.3.1 to 4.3.4. The transient load steps have been generated with a load resistor and a power MOSFET
located on the same circuit board as the ZSPM1025C and the Murata OKLP-X/25-W12-C Power Block. The
ZSPM8725-KIT evaluation kit can be used to further evaluate the performance of the ZSPM1025C for the four
output capacitor ranges.
Load transient performance measurements and open-loop Bode plots for the ZSPM1025D are shown in sections
4.3.5 to 4.3.8. The transient load steps have been generated with a load resistor and a power MOSFET located
on the same circuit board as the ZSPM1025D and the Murata OKLP-X/25-W12-C Power Block. The ZSPM8825KIT evaluation kit can be used to further evaluate the performance of the ZSPM1025D for the four output
capacitor ranges.
Data Sheet
October 15, 2014
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.01
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
28 of 39
ZSPM1025C / ZSPM1025D
True Digital PWM Controller (Single-Phase, Single-Rail)
4.3.1.
Typical Load Transient Response – ZSPM1025C – Capacitor Range #1 – Comp0
Test conditions: VIN = 12.0V, VOUT = 1.20V
Minimum output capacitance: 2 x 100µF/6.3V X5R
Maximum output capacitance: 3 x 100µF/6.3V X5R + 2 x 47µF/10V X7R
Ch1 (Blue):
Ch2 (Cyan):
Ch3: (Violet):
Time Scale:
Ch1 (Blue):
Ch2 (Cyan):
Ch3: (Violet):
Time Scale:
Ch1 (Blue):
Ch2 (Cyan):
Ch3: (Violet):
Time Scale:
Figure 4-6
VOUT 100mV/div AC
PWM 5V/div DC
Load Trigger 5V/div DC
8µs/div
15 to 5A Load Step – Max. Capacitance
VOUT 100mV/div AC
PWM 5V/div DC
Load Trigger 5V/div DC
8µs/div
Figure 4-7
Gain [dB]
15 to 5A Load Step – Min. Capacitance
VOUT 100mV/div AC
PWM 5V/div DC
Load Trigger 5V/div DC
8µs/div
5 to 15A Load Step – Max. Capacitance
Figure 4-5
Figure 4-4
Ch1 (Blue):
Ch2 (Cyan):
Ch3: (Violet):
Time Scale:
VOUT 100mV/div AC
PWM 5V/div DC
Load Trigger 5V/div DC
8µs/div
Open Loop Bode Plots
40
Max Caps - Gain
30
Min Caps - Gain
20
Max Caps - Phase
Min Caps - Phase
10
0
0
-30
-60
-90
-10
-120
Phase [degrees]
5 to 15A Load Step – Min. Capacitance
Figure 4-3
-20
-150
-30
-40
-180
1
Data Sheet
October 15, 2014
10
Frequency [kHz]
100
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.01
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
29 of 39
ZSPM1025C / ZSPM1025D
True Digital PWM Controller (Single-Phase, Single-Rail)
4.3.2.
Typical Load Transient Response – ZSPM1025C – Capacitor Range #2 – Comp1
Test conditions: VIN = 12.0V, VOUT = 1.20V
Minimum output capacitance: 3 x 100µF/6.3V X5R + 2 x 47µF/10V X7R
Maximum output capacitance: 7 x 100µF/6.3V X5R + 4 x 47µF/10V X7R
5 to 15A Load Step – Min. Capacitance
Figure 4-8
Ch1 (Blue):
Ch2 (Cyan):
Ch3: (Violet):
Time Scale:
15 to 5A Load Step – Min. Capacitance
VOUT 50mV/div AC
PWM 5V/div DC
Load Trigger 5V/div DC
8µs/div
Figure 4-10 5 to 15A Load Step – Max. Capacitance
Ch1 (Blue):
Ch2 (Cyan):
Ch3: (Violet):
Time Scale:
Figure 4-9
Ch1 (Blue):
Ch2 (Cyan):
Ch3: (Violet):
Time Scale:
VOUT 50mV/div AC
PWM 5V/div DC
Load Trigger 5V/div DC
8µs/div
Figure 4-11 15 to 5A Load Step – Max. Capacitance
VOUT 50mV/div AC
PWM 5V/div DC
Load Trigger 5V/div DC
8µs/div
Ch1 (Blue):
Ch2 (Cyan):
Ch3: (Violet):
Time Scale:
VOUT 50mV/div AC
PWM 5V/div DC
Load Trigger 5V/div DC
8µs/div
40
Max Caps - Gain
30
Min Caps - Gain
20
Max Caps - Phase
Min Caps - Phase
10
0
0
-30
-60
-90
-10
-120
-20
-150
-30
-40
-180
1
Data Sheet
October 15, 2014
Phase [degrees]
Gain [dB]
Figure 4-12 Open Loop Bode Plots
10
Frequency [kHz]
100
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.01
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
30 of 39
ZSPM1025C / ZSPM1025D
True Digital PWM Controller (Single-Phase, Single-Rail)
4.3.3.
Typical Load Transient Response – ZSPM1025C – Capacitor Range #3 – Comp2
Test conditions: VIN = 12.0V, VOUT = 1.20V
Minimum output capacitance: 1 x 100µF/6.3V X5R + 2 x 470 µF/6.3V/7mΩ Aluminum Electrolytic Capacitor
Maximum output capacitance: 6 x 100 µF/6.3V X5R + 5 x 470 µF/6.3V/7mΩ Aluminum Electrolytic Capacitor
Figure 4-13 5 to 15A Load Step – Min. Capacitance
Ch1 (Blue):
Ch2 (Cyan):
Ch3: (Violet):
Time Scale:
VOUT 20mV/div AC
PWM 5V/div DC
Load Trigger 5V/div DC
20µs/div
Figure 4-15 5 to 15A Load Step – Max. Capacitance
Ch1 (Blue):
Ch2 (Cyan):
Ch3: (Violet):
Time Scale:
Figure 4-14 15 to 5A Load Step – Min. Capacitance
Ch1 (Blue):
Ch2 (Cyan):
Ch3: (Violet):
Time Scale:
VOUT 20mV/div AC
PWM 5V/div DC
Load Trigger 5V/div DC
20µs/div
Figure 4-16 15 to 5A Load Step – Max. Capacitance
VOUT 20mV/div AC
PWM 5V/div DC
Load Trigger 5V/div DC
20µs/div
Ch1 (Blue):
Ch2 (Cyan):
Ch3: (Violet):
Time Scale:
VOUT 20mV/div AC
PWM 5V/div DC
Load Trigger 5V/div DC
20µs/div
Figure 4-17 Open Loop Bode Plots
Max Caps - Gain
Gain [dB]
30
Min Caps - Gain
20
Max Caps - Phase
10
Min Caps - Phase
0
0
-30
-60
-90
-10
-120
-20
-150
-30
-40
-180
1
Data Sheet
October 15, 2014
Phase [degrees]
40
10
Frequency [kHz]
100
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.01
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
31 of 39
ZSPM1025C / ZSPM1025D
True Digital PWM Controller (Single-Phase, Single-Rail)
4.3.4.
Typical Load Transient Response – ZSPM1025C – Capacitor Range #4 – Comp3
Test conditions: VIN = 12.0V, VOUT = 1.20V
Minimum output capacitance: 3 x 100µF/6.3V X5R + 2 x 47µF/10V X7R + 4 x 470 µF/6.3V/7mΩ Aluminum Electrolytic Capacitor
Maximum output capacitance: 7 x 100 µF/6.3V X5R + 4 x 47µF/10V X7R + 10 x 470 µF/6.3V/7mΩ Aluminum Electrolytic Capacitor
Figure 4-18 5 to 15A Load Step – Min. Capacitance
Ch1 (Blue):
Ch2 (Cyan):
Ch3: (Violet):
Time Scale:
VOUT 20mV/div AC
PWM 5V/div DC
Load Trigger 5V/div DC
20µs/div
Ch1 (Blue):
Ch2 (Cyan):
Ch3: (Violet):
Time Scale:
Figure 4-20 5 to 15A Load Step – Max. Capacitance
Ch1 (Blue):
Ch2 (Cyan):
Ch3: (Violet):
Time Scale:
Figure 4-19 15 to 5A Load Step – Min. Capacitance
VOUT 20mV/div AC
PWM 5V/div DC
Load Trigger 5V/div DC
20µs/div
Figure 4-21 15 to 5A Load Step – Max. Capacitance
VOUT 20mV/div AC
PWM 5V/div DC
Load Trigger 5V/div DC
20µs/div
Ch1 (Blue):
Ch2 (Cyan):
Ch3: (Violet):
Time Scale:
VOUT 20mV/div AC
PWM 5V/div DC
Load Trigger 5V/div DC
20µs/div
Figure 4-22 Open Loop Bode Plots
Max Caps - Gain
Gain [dB]
30
Min Caps - Gain
20
Max Caps - Phase
10
Min Caps - Phase
0
0
-30
-60
-90
-10
-120
-20
-150
-30
-40
-180
1
Data Sheet
October 15, 2014
Phase [degrees]
40
10
Frequency [kHz]
100
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.01
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
32 of 39
ZSPM1025C / ZSPM1025D
True Digital PWM Controller (Single-Phase, Single-Rail)
4.3.5.
Typical Load Transient Response – ZSPM1025D – Capacitor Range #1 – Comp0
Test conditions: VIN = 12.0V, VOUT = 1.80V
Minimum output capacitance: 2 x 100µF/6.3V X5R
Maximum output capacitance: 3 x 100µF/6.3V X5R + 2 x 47µF/10V X7R
Figure 4-23 5 to 20A Load Step – Min. Capacitance
Ch1 (Blue):
Ch2 (Cyan):
Ch3: (Violet):
Time Scale:
Ch1 (Blue):
Ch2 (Cyan):
Ch3: (Violet):
Time Scale:
VOUT 100mV/div AC
PWM 5V/div DC
Load Trigger 5V/div DC
8µs/div
Figure 4-25 5 to 20A Load Step – Max. Capacitance
Ch1 (Blue):
Ch2 (Cyan):
Ch3: (Violet):
Time Scale:
Figure 4-24 20 to 5A Load Step – Min. Capacitance
VOUT 100mV/div AC
PWM 5V/div DC
Load Trigger 5V/div DC
8µs/div
Figure 4-26 20 to 5A Load Step – Max. Capacitance
VOUT 100mV/div AC
PWM 5V/div DC
Load Trigger 5V/div DC
8µs/div
Ch1 (Blue):
Ch2 (Cyan):
Ch3: (Violet):
Time Scale:
VOUT 100mV/div AC
PWM 5V/div DC
Load Trigger 5V/div DC
8µs/div
Figure 4-27 Open Loop Bode Plots
Max Caps - Gain
Gain [dB]
30
Min Caps - Gain
20
Max Caps - Phase
10
Min Caps - Phase
0
0
-30
-60
-90
-10
-120
-20
-150
-30
-40
-180
1
Data Sheet
October 15, 2014
Phase [degrees]
40
10
Frequency [kHz]
100
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.01
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
33 of 39
ZSPM1025C / ZSPM1025D
True Digital PWM Controller (Single-Phase, Single-Rail)
4.3.6.
Typical Load Transient Response – ZSPM1025D – Capacitor Range #2 – Comp1
Test conditions: VIN = 12.0V, VOUT = 1.80V
Minimum output capacitance: 3 x 100µF/6.3V X5R + 2 x 47µF/10V X7R
Maximum output capacitance: 7 x 100µF/6.3V X5R + 4 x 47µF/10V X7R
Figure 4-28 5 to 20A Load Step – Min. Capacitance
Ch1 (Blue):
Ch2 (Cyan):
Ch3: (Violet):
Time Scale:
VOUT 50mV/div AC
PWM 5V/div DC
Load Trigger 5V/div DC
8µs/div
Figure 4-30 5 to 20A Load Step – Max. Capacitance
Ch1 (Blue):
Ch2 (Cyan):
Ch3: (Violet):
Time Scale:
Figure 4-29 20 to 5A Load Step – Min. Capacitance
Ch1 (Blue):
Ch2 (Cyan):
Ch3: (Violet):
Time Scale:
VOUT 50mV/div AC
PWM 5V/div DC
Load Trigger 5V/div DC
8µs/div
Figure 4-31 20 to 5A Load Step – Max. Capacitance
VOUT 50mV/div AC
PWM 5V/div DC
Load Trigger 5V/div DC
8µs/div
Ch1 (Blue):
Ch2 (Cyan):
Ch3: (Violet):
Time Scale:
VOUT 50mV/div AC
PWM 5V/div DC
Load Trigger 5V/div DC
8µs/div
Figure 4-32 Open Loop Bode Plots
Max Caps - Gain
30
Gain [dB]
20
10
0
Min Caps - Gain
-30
Max Caps - Phase
-60
Min Caps - Phase
0
-90
-10
-120
-20
-150
-30
-40
-180
1
Data Sheet
October 15, 2014
Phase [degrees]
40
10
Frequency [kHz]
100
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.01
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
34 of 39
ZSPM1025C / ZSPM1025D
True Digital PWM Controller (Single-Phase, Single-Rail)
4.3.7.
Typical Load Transient Response – ZSPM1025D – Capacitor Range #3 – Comp2
Test conditions: VIN = 12.0V, VOUT = 1.80V
Minimum output capacitance: 1 x 100µF/6.3V X5R + 2 x 470 µF/6.3V/7mΩ Aluminum Electrolytic Capacitor
Maximum output capacitance: 6 x 100 µF/6.3V X5R + 5 x 470 µF/6.3V/7mΩ Aluminum Electrolytic Capacitor
Figure 4-33 5 to 20A Load Step – Min. Capacitance
Ch1 (Blue):
Ch2 (Cyan):
Ch3: (Violet):
Time Scale:
VOUT 50mV/div AC
PWM 5V/div DC
Load Trigger 5V/div DC
20µs/div
Figure 4-35 5 to 20A Load Step – Max. Capacitance
Ch1 (Blue):
Ch2 (Cyan):
Ch3: (Violet):
Time Scale:
Figure 4-34 20 to 5A Load Step – Min. Capacitance
Ch1 (Blue):
Ch2 (Cyan):
Ch3: (Violet):
Time Scale:
VOUT 50mV/div AC
PWM 5V/div DC
Load Trigger 5V/div DC
20µs/div
Figure 4-36 20 to 5A Load Step – Max. Capacitance
VOUT 50mV/div AC
PWM 5V/div DC
Load Trigger 5V/div DC
20µs/div
Ch1 (Blue):
Ch2 (Cyan):
Ch3: (Violet):
Time Scale:
VOUT 50mV/div AC
PWM 5V/div DC
Load Trigger 5V/div DC
20µs/div
Figure 4-37 Open Loop Bode Plots
40
0
30
Gain [dB]
20
10
Min Caps - Gain
-30
Max Caps - Phase
-60
Min Caps - Phase
0
-90
-10
-120
-20
-150
-30
-40
-180
1
Data Sheet
October 15, 2014
Phase [degrees]
Max Caps - Gain
10
Frequency [kHz]
100
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.01
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
35 of 39
ZSPM1025C / ZSPM1025D
True Digital PWM Controller (Single-Phase, Single-Rail)
4.3.8.
Typical Load Transient Response – ZSPM1025D – Capacitor Range #4 – Comp3
Test conditions: VIN = 12.0V, VOUT = 1.80V
Minimum output capacitance: 3 x 100µF/6.3V X5R + 2 x 47µF/10V X7R + 4 x 470 µF/6.3V/7mΩ Aluminum Electrolytic Capacitor
Maximum output capacitance: 7 x 100 µF/6.3V X5R + 4 x 47µF/10V X7R + 10 x 470 µF/6.3V/7mΩ Aluminum Electrolytic Capacitor
Figure 4-38 5 to 20A Load Step – Min. Capacitance
Ch1 (Blue):
Ch2 (Cyan):
Ch3: (Violet):
Time Scale:
VOUT 20mV/div AC
PWM 5V/div DC
Load Trigger 5V/div DC
20µs/div
Figure 4-40 5 to 20A Load Step – Max. Capacitance
Ch1 (Blue):
Ch2 (Cyan):
Ch3: (Violet):
Time Scale:
Figure 4-39 20 to 5A Load Step – Min. Capacitance
Ch1 (Blue):
Ch2 (Cyan):
Ch3: (Violet):
Time Scale:
VOUT 20mV/div AC
PWM 5V/div DC
Load Trigger 5V/div DC
20µs/div
Figure 4-41 20 to 5A Load Step – Max. Capacitance
VOUT 20mV/div AC
PWM 5V/div DC
Load Trigger 5V/div DC
20µs/div
Ch1 (Blue):
Ch2 (Cyan):
Ch3: (Violet):
Time Scale:
VOUT 20mV/div AC
PWM 5V/div DC
Load Trigger 5V/div DC
20µs/div
40
30
20
10
0
-10
-20
-30
-40
0
Max Caps - Gain
October 15, 2014
-30
Max Caps - Phase
-60
Min Caps - Phase
-90
-120
-150
-180
1
Data Sheet
Min Caps - Gain
Phase [degrees]
Gain [dB]
Figure 4-42 Open Loop Bode Plots
10
Frequency [kHz]
100
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.01
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
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ZSPM1025C / ZSPM1025D
True Digital PWM Controller (Single-Phase, Single-Rail)
5
Mechanical Specifications
Based on JEDEC MO-220. All dimensions are in millimeters.
Figure 5.1
24-pin QFN Package Drawing
Dimension
Min (mm)
Max (mm)
A
0.8
0.90
A1
0.00
0.05
b
0.18
0.30
e
0.5 nominal
HD
3.90
4.1
HE
3.90
4.1
L
0.35
0.45
Data Sheet
October 15, 2014
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.01
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
37 of 39
ZSPM1025C / ZSPM1025D
True Digital PWM Controller (Single-Phase, Single-Rail)
6
Glossary
Term
Description
DPWM
Digital Pulse-Width Modulator
DCR
DC Resistance
FET
Field-Effect Transistor
FPGA
Field-Programmable Gate Array
GPIO
General Purpose Input/Output
GUI
Graphical User Interface
HKADC
Housekeeping Analog-To-Digital Converter
OT
Over-Temperature
OTP
One-Time Programmable Memory
OV
Over-Voltage
PID
Proportional/Integral/Derivative
POR
Power-On-Reset
SCR
Sub-cycle Response™
SLC
State-Law Control™
SPM
Smart Power Management
7
Ordering Information
Sales Code
Description
Package
ZSPM1025CA1W 0
ZSPM1025C Lead-free QFN24 — Temperature range: -40°C to +125°C
7” Reel
ZSPM1025DA1W 0
ZSPM1025D Lead-free QFN24 — Temperature range: -40°C to +125°C
7” Reel
ZSPM8725-KIT
Evaluation Kit for ZSPM1025C with PMBus™ Communication Interface *
Kit
ZSPM8825-KIT
Evaluation Kit for ZSPM1025D with PMBus™ Communication Interface *
Kit
* Pink Power Designer™ GUI for kit can be downloaded from the ZMDI web site at www.zmdi.com/zspm1025c or www.zmdi.com/zspm1025d.
Data Sheet
October 15, 2014
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.01
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
38 of 39
ZSPM1025C / ZSPM1025D
True Digital PWM Controller (Single-Phase, Single-Rail)
8
Related Documents
Note: “RevX_xx” refers to the current revision of the document.
Document
File Name
ZSPM1025C/D Feature Sheet
ZSPM1025CD_Feature_Sheet_RevX_xy.pdf
ZSPM1025 and ZSPM1035 Family Feature Sheet
ZSPM10x5_Family_Feature_Sheet_RevX_xy.pdf
ZSPM8725 Kit Description (for ZSPM1025C only)
ZSPM8725-KIT_Description_RevX_xy.pdf
ZSPM8825 Kit Description (for ZSPM1025D only)
ZSPM8825-KIT_Description_RevX_xy.pdf
ZSPM1025C/D Pink Power Designer™ GUI Guide
PPD_GUI_UserGuide_ZSPM1025C-D+35C-D_RevX_xy.pdf
Visit the following product pages on ZMDI’s website www.zmdi.com or contact your nearest sales office for the
latest version of these documents.
Product pages:
www.zmdi.com/zspm1025c
www.zmdi.com/zspm1025d
9
Document Revision History
Revision
Date
Description
1.00
October 28, 2013
First release.
1.01
October 15, 2014
Update for cover/header imagery and contacts.
Update for kit contents.
Update for related documents in section 8.
Sales and Further Information
www.zmdi.com
[email protected]
Zentrum Mikroelektronik
Dresden AG
Global Headquarters
Grenzstrasse 28
01109 Dresden, Germany
ZMD America, Inc.
1525 McCarthy Blvd., #212
Milpitas, CA 95035-7453
USA
Central Office:
Phone +49.351.8822.306
Fax
+49.351.8822.337
USA Phone 1.855.275.9634
Phone +1.408.883.6310
Fax
+1.408.883.6358
European Technical Support
Phone +49.351.8822.7.772
Fax
+49.351.8822.87.772
DISCLAIMER: This information applies to a product under development. Its characteristics and specifications are subject to change without notice.
Zentrum Mikroelektronik Dresden AG (ZMD AG) assumes no obligation regarding future manufacture unless otherwise agreed to in writing. The
information furnished hereby is believed to be true and accurate. However, under no circumstances shall ZMD AG be liable to any customer,
licensee, or any other third party for any special, indirect, incidental, or consequential damages of any kind or nature whatsoever arising out of or in
any way related to the furnishing, performance, or use of this technical data. ZMD AG hereby expressly disclaims any liability of ZMD AG to any
customer, licensee or any other third party, and any such customer, licensee and any other third party hereby waives any liability of ZMD AG for
any damages in connection with or arising out of the furnishing, performance or use of this technical data, whether based on contract, warranty,
tort (including negligence), strict liability, or otherwise.
European Sales (Stuttgart)
Phone +49.711.674517.55
Fax
+49.711.674517.87955
Data Sheet
October 15, 2014
Zentrum Mikroelektronik
Dresden AG, Japan Office
2nd Floor, Shinbashi Tokyu Bldg.
4-21-3, Shinbashi, Minato-ku
Tokyo, 105-0004
Japan
ZMD FAR EAST, Ltd.
3F, No. 51, Sec. 2,
Keelung Road
11052 Taipei
Taiwan
Phone +81.3.6895.7410
Fax
+81.3.6895.7301
Phone +886.2.2377.8189
Fax
+886.2.2377.8199
Zentrum Mikroelektronik
Dresden AG, Korea Office
U-space 1 Building
11th Floor, Unit JA-1102
670 Sampyeong-dong
Bundang-gu, Seongnam-si
Gyeonggi-do, 463-400
Korea
Phone +82.31.950.7679
Fax
+82.504.841.3026
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.01
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
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