Data Sheet

Data Sheet
Rev.1.21 / October 2014
ZSPM1025A
True Digital PWM Controller (Single-Phase, Single-Rail)
Power Management
Power and Precision
ZSPM1025A
True Digital PWM Controller (Single-Phase, Single-Rail)
Brief Description
Benefits
The ZSPM1025A is a flexible true-digital singlephase PWM controller optimally configured for use
with the Murata Power Solutions 25A Power Block
OKLP-X/25-W12-C in smart digital power solutions.

The ZSPM1025A integrates a digital control loop,
optimized for maximum flexibility and stability, as
well as load step and steady-state performance. In
addition, a rich set of protection and monitoring
functions is provided. On-chip, non-volatile memory
2
*
(NVM) and an I C™ interface facilitate configuration.
ZMDI’s PC-based Pink Power Designer™ graphic
user interface (GUI) provides a user-friendly and
easy-to-use interface to the ZSPM1025A for
communication, monitoring, and configuration of the
protection and sequencing features.
A downloadable reference solution is available,
including a graphical user interface, layout guidelines, bill of materials, and step-by-step instructions.






Available Support

Features







Programmable digital control loop
Advanced digital control techniques

Tru-sample Technology™

State-Law Control™ (SLC)

Sub-cycle Response™ (SCR)
Improved transient response and noise immunity
Protection features

Over-current protection

Over-voltage protection (VIN, VOUT)

Under-voltage protection (VIN, VOUT)

Overloaded startup

Continuous retry (“hiccup”) mode for fault
conditions
Fuse-based NVM for improved reliability
Operation from a single 5V or 3.3V supply
Optional PMBus™ address selection without
external resistors
Fast time-to-market using off-the-shelf, optimally
configured controller and power block
Fast configurability and design flexibility
Simplified design flow and high reliability via
proven system design solution
Reduced component count through system level
integration
Simplified monitoring for system power and
thermal management
Pin-to-pin compatible with the ZSPM1025C and
ZSPM1025D PWM controllers, enabling point-ofload platform designs with or without digital
communication
Higher energy efficiency across all output loading
conditions


Evaluation Kit
Reference Solution
PC-based Pink Power Designer™ GUI
Physical Characteristics



Operation temperature: -40°C to +125°C
VOUT: 0.35V to 3.6V
Lead free (RoHS compliant) 24-pin QFN package
(4 mm x 4 mm)
ZSPM1025A Typical Application Diagram
ZSPM1025
QFN 4x4 mm
Murata
OKLP-X/25-W12-C
Current Sensing
Digital Control Loop
Power Management
(Sequencing, Protection,…)
Driver
Driver
Housekeeping
and
Communication
* I2C™ is a registered trademark of NXP.
For more information, contact ZMDI via [email protected]
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.21— October 15, 2014. All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated,
stored, or used without the prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
ZSPM1025A
True Digital PWM Controller (Single-Phase, Single-Rail)
ZSPM1025A Block Diagram
Current Sensing
ISNSP
Current
Limiting
Average Current
Sensing
ISNSN
Digital Control Loop
VFBP
VFB
FLASH
ADC
VFBN
PWM
Adaptive Digital
Controller
PWM
LSE
DAC
OC Detection
Sequencer
OV Detection
DAC
Configurable
Error Handler
OT Detection
Typical Applications
 Telecom Switches
Bias
Current
Source
 Servers and Storage
Vin OV/UV
Detection
Int. Temp
Sense
Vout UV Detection
 Base Stations
 Network Routers
TEMP
ADDR0
VIN
SCL
Clock
Generation
SMBALERT
SMBus
SDA
CONTROL
GPIO0
PGOOD
ADCVREF
GPIO
1.8V Reg
Analog
AVDD18
1.8V Reg
Digital
VDD18
3.3V
Reg
VDD33
NVM
(OTP)
CPU Core
ADDR1
 Single-Rail/Single-Phase
Supplies for Processors,
ASICs, FPGAs, DSPs
VREFP
VDD50
 Industrial Applications
HKADC
VREF
Ordering Information
Sales Code
Description
Package
ZSPM1025AA1W 1 ZSPM1025A Lead-free QFN24 — Temperature range: -40°C to +125°C
ZSPM8025-KIT
Reel
Evaluation Kit for ZSPM1025A with PMBus™ Communication Interface — Pink Power Designer™ GUI
for kit can be downloaded from the ZMDI web site at www.zmdi.com/zspm1025a
Kit
* This product is sold under a limited license from PowerOne, Inc. related to digital power technology as set forth in U.S. Patent 7000125 and other related
patents owned by PowerOne, Inc. This license does not extend to stand-alone power supply products.
Sales and Further Information
www.zmdi.com
[email protected]
Zentrum Mikroelektronik
Dresden AG
Global Headquarters
Grenzstrasse 28
01109 Dresden, Germany
ZMD America, Inc.
1525 McCarthy Blvd., #212
Milpitas, CA 95035-7453
USA
Central Office:
Phone +49.351.8822.306
Fax
+49.351.8822.337
European Technical Support
Phone +49.351.8822.7.772
Fax
+49.351.8822.87.772
DISCLAIMER: This information applies to a product under development. Its characteristics and specifications are subject to change without notice.
Zentrum Mikroelektronik Dresden AG (ZMD AG) assumes no obligation regarding future manufacture unless otherwise agreed to in writing. The
information furnished hereby is believed to be true and accurate. However, under no circumstances shall ZMD AG be liable to any customer,
licensee, or any other third party for any special, indirect, incidental, or consequential damages of any kind or nature whatsoever arising out of or in
any way related to the furnishing, performance, or use of this technical data. ZMD AG hereby expressly disclaims any liability of ZMD AG to any
customer, licensee or any other third party, and any such customer, licensee and any other third party hereby waives any liability of ZMD AG for
any damages in connection with or arising out of the furnishing, performance or use of this technical data, whether based on contract, warranty,
tort (including negligence), strict liability, or otherwise.
European Sales (Stuttgart)
Phone +49.711.674517.55
Fax
+49.711.674517.87955
ZMD FAR EAST, Ltd.
3F, No. 51, Sec. 2,
Keelung Road
11052 Taipei
Taiwan
USA Phone 1.855.275.9634
Zentrum Mikroelektronik
Dresden AG, Japan Office
2nd Floor, Shinbashi Tokyu Bldg.
4-21-3, Shinbashi, Minato-ku
Tokyo, 105-0004
Japan
Phone +1.408.883.6310
Fax
+1.408.883.6358
Phone +81.3.6895.7410
Fax
+81.3.6895.7301
Phone +886.2.2377.8189
Fax
+886.2.2377.8199
Zentrum Mikroelektronik
Dresden AG, Korea Office
U-space 1 Building
11th Floor, Unit JA-1102
670 Sampyeong-dong
Bundang-gu, Seongnam-si
Gyeonggi-do, 463-400
Korea
Phone +82.31.950.7679
Fax
+82.504.841.3026
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.21— October 15, 2014.
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner.
ZSPM1025A
True Digital PWM Controller (Single-Phase, Single-Rail)
Contents
List of Figures .......................................................................................................................................................... 5
List of Tables ........................................................................................................................................................... 7
1 IC Characteristics ............................................................................................................................................. 8
1.1. Absolute Maximum Ratings ....................................................................................................................... 8
1.2. Recommended Operating Conditions ....................................................................................................... 9
1.3. Electrical Parameters ................................................................................................................................ 9
2 Product Summary........................................................................................................................................... 12
2.1. Overview .................................................................................................................................................. 12
2.2. Pin Description......................................................................................................................................... 14
2.3. Available Packages ................................................................................................................................. 15
3 Functional Description .................................................................................................................................... 16
3.1. Power Supply Circuitry, Reference Decoupling, and Grounding ............................................................ 16
3.2. Reset/Start-up Behavior .......................................................................................................................... 16
3.3. Digital Power Control ............................................................................................................................... 16
3.3.1. Overview ........................................................................................................................................... 16
3.3.2. Output Voltage Feedback ................................................................................................................. 16
3.3.3. Digital Compensator ......................................................................................................................... 17
3.3.4. Power Sequencing and the CONTROL Pin ...................................................................................... 17
3.3.5. Pre-biased Start-up and Soft Stop .................................................................................................... 18
3.3.6. Current Sensing ................................................................................................................................ 19
3.3.7. Temperature Measurement .............................................................................................................. 20
3.4. Fault Monitoring and Response Generation ............................................................................................ 20
3.4.1. Output Over/Under-Voltage .............................................................................................................. 21
3.4.2. Output Current Protection and Limiting ............................................................................................ 21
3.4.3. Over-Temperature Protection ........................................................................................................... 21
3.5. Configuration ........................................................................................................................................... 21
4 PMBus™ Functionality ................................................................................................................................... 22
4.1. Introduction .............................................................................................................................................. 22
4.2. Timing and Bus Specification .................................................................................................................. 22
4.3. Address Selection via External Resistors ................................................................................................ 23
4.4. Configuration Registers ........................................................................................................................... 24
4.5. Monitoring ................................................................................................................................................ 26
4.6. Additional Registers ................................................................................................................................. 26
4.7. Detailed Description of the Supported PMBus™ Commands ................................................................. 27
4.7.1. OPERATION ..................................................................................................................................... 27
4.7.2. ON_OFF_CONFIG............................................................................................................................ 27
4.7.3. CLEAR_FAULTS .............................................................................................................................. 27
4.7.4. VOUT_MODE ................................................................................................................................... 28
4.7.5. VOUT_COMMAND ........................................................................................................................... 28
4.7.6. STATUS_BYTE................................................................................................................................. 28
4.7.7. STATUS_WORD............................................................................................................................... 29
Data Sheet
October 15, 2014
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.21
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
4 of 46
ZSPM1025A
True Digital PWM Controller (Single-Phase, Single-Rail)
4.7.8. STATUS_VOUT ................................................................................................................................ 29
4.7.9. STATUS_IOUT ................................................................................................................................. 30
4.7.10. STATUS_INPUT ............................................................................................................................... 30
4.7.11. STATUS_TEMPERATURE ............................................................................................................... 30
4.7.12. STATUS_CML .................................................................................................................................. 31
4.7.13. STATUS_MFR_SPECIFIC ............................................................................................................... 31
4.7.14. READ_VIN ........................................................................................................................................ 31
4.7.15. READ_VOUT .................................................................................................................................... 31
4.7.16. READ_IOUT ...................................................................................................................................... 32
4.7.17. READ_TEMPERATURE1 ................................................................................................................. 32
4.7.18. READ_TEMPERATURE2 ................................................................................................................. 32
5 Application Information ................................................................................................................................... 33
5.1. Typical Application Circuit ....................................................................................................................... 33
5.1.1. Output Voltage Selection .................................................................................................................. 35
5.1.2. Output Capacitor Selection ............................................................................................................... 35
5.2. Typical Performance Measurements for the ZSPM1025A ...................................................................... 35
5.2.1. Typical Load Transient Response – Capacitor Range #1 – VOUT Range #1 ................................. 36
5.2.2. Typical Load Transient Response – Capacitor Range #2 – VOUT Range #1 ................................. 37
5.2.3. Typical Load Transient Response – Capacitor Range #3 – VOUT Range #1 ................................. 38
5.2.4. Typical Load Transient Response – Capacitor Range #4 – VOUT Range #1 ................................. 39
5.2.5. Typical Load Transient Response – Capacitor Range #1 – VOUT Range #2 ................................. 40
5.2.6. Typical Load Transient Response – Capacitor Range #2 – VOUT Range #2 ................................. 41
5.2.7. Typical Load Transient Response – Capacitor Range #3 – VOUT Range #2 ................................. 42
5.2.8. Typical Load Transient Response – Capacitor Range #4 – VOUT Range #2 ................................. 43
6 Mechanical Specifications .............................................................................................................................. 44
7 Ordering Information ...................................................................................................................................... 45
8 Related Documents ........................................................................................................................................ 45
9 Glossary ......................................................................................................................................................... 45
10 Document Revision History ............................................................................................................................ 46
List of Figures
Figure 2.1
Figure 2.2
Figure 2.3
Figure 3.1
Figure 3.2
Figure 3.3
Figure 3.4
Figure 4.1
Figure 5.1
Data Sheet
October 15, 2014
Typical Application Circuit with a 5V Supply Voltage ....................................................................... 12
Block Diagram................................................................................................................................... 13
Pin-out QFN24 Package ................................................................................................................... 15
Simplified Block Diagram of the Digital Compensation .................................................................... 17
Power Sequencing ............................................................................................................................ 18
Power Sequencing with Non-zero Off Voltage ................................................................................. 18
Inductor Current Sensing Using the DCR Method............................................................................ 19
PMBus™ Timing Diagram ................................................................................................................ 22
Application Circuit with a 5V Supply Voltage .................................................................................... 33
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.21
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
5 of 46
ZSPM1025A
True Digital PWM Controller (Single-Phase, Single-Rail)
Figure 5.2
Figure 5.3
Figure 5.4
Figure 5.5
Figure 5.6
Figure 5.7
Figure 5.8
Figure 5.9
Figure 5.10
Figure 5.11
Figure 5.12
Figure 5.13
Figure 5.14
Figure 5.15
Figure 5.16
Figure 5.17
Figure 5.18
Figure 5.19
Figure 5.20
Figure 5.21
Figure 5.22
Figure 5.23
Figure 5.24
Figure 5.25
Figure 5.26
Figure 5.27
Figure 5.28
Figure 5.29
Figure 5.30
Figure 5.31
Figure 5.32
Figure 5.33
Figure 5.34
Figure 5.35
Figure 5.36
Figure 5.37
Figure 5.38
Figure 5.39
Figure 5.40
Figure 5.41
Figure 6.1
Data Sheet
October 15, 2014
5 to 15A Load Step – Min. Capacitance ........................................................................................... 36
15 to 5A Load Step – Min. Capacitance ........................................................................................... 36
5 to 15A Load Step – Max. Capacitance .......................................................................................... 36
15 to 5A Load Step – Max. Capacitance .......................................................................................... 36
Open Loop Bode Plots ...................................................................................................................... 36
5 to 15A Load Step – Min. Capacitance ........................................................................................... 37
15 to 5A Load Step – Min. Capacitance ........................................................................................... 37
5 to 15A Load Step – Max. Capacitance .......................................................................................... 37
15 to 5A Load Step – Min. Capacitance ........................................................................................... 37
Open Loop Bode Plots ...................................................................................................................... 37
5 to 15A Load Step – Min. Capacitance ........................................................................................... 38
15 to 5A Load Step – Min. Capacitance ........................................................................................... 38
5 to 15A Load Step – Max. Capacitance .......................................................................................... 38
15 to 5A Load Step – Max. Capacitance .......................................................................................... 38
Open Loop Bode Plots ...................................................................................................................... 38
5 to 15A Load Step – Min. Capacitance ........................................................................................... 39
15 to 5A Load Step – Min. Capacitance ........................................................................................... 39
5 to 15A Load Step – Max. Capacitance .......................................................................................... 39
15 to 5A Load Step – Max. Capacitance .......................................................................................... 39
Open Loop Bode Plots ...................................................................................................................... 39
5 to 20A Load Step – Min. Capacitance ........................................................................................... 40
20 to 5A Load Step – Min. Capacitance ........................................................................................... 40
5 to 20A Load Step – Max. Capacitance .......................................................................................... 40
20 to 5A Load Step – Max. Capacitance .......................................................................................... 40
Open Loop Bode Plots ...................................................................................................................... 40
5 to 20A Load Step – Min. Capacitance ........................................................................................... 41
20 to 5A Load Step – Min. Capacitance ........................................................................................... 41
5 to 20A Load Step – Max. Capacitance .......................................................................................... 41
20 to 5A Load Step – Max. Capacitance .......................................................................................... 41
Open Loop Bode Plots ...................................................................................................................... 41
5 to 20A Load Step – Min. Capacitance ........................................................................................... 42
20 to 5A Load Step – Min. Capacitance ........................................................................................... 42
5 to 20A Load Step – Max. Capacitance .......................................................................................... 42
20 to 5A Load Step – Max. Capacitance .......................................................................................... 42
Open Loop Bode Plots ...................................................................................................................... 42
5 to 20A Load Step – Min. Capacitance ........................................................................................... 43
20 to 5A Load Step – Min. Capacitance ........................................................................................... 43
5 to 20A Load Step – Max. Capacitance .......................................................................................... 43
20 to 5A Load Step – Max. Capacitance .......................................................................................... 43
Open Loop Bode Plots ...................................................................................................................... 43
Package Drawing .............................................................................................................................. 44
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.21
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
6 of 46
ZSPM1025A
True Digital PWM Controller (Single-Phase, Single-Rail)
List of Tables
Table 3.1
Table 4.1
Table 4.2
Table 4.3
Table 4.4
Table 4.5
Table 4.6
Table 4.7
Table 4.8
Table 5.1
Table 5.2
Table 5.3
Data Sheet
October 15, 2014
Fault Configuration Overview ........................................................................................................... 20
PMBus™ Timing Specification ......................................................................................................... 22
Supported Resistor Values for PMBus™ Address Selection ........................................................... 23
PMBus™ Address Selection without Resistors ................................................................................ 24
List of Supported PMBus™ Configuration Registers........................................................................ 24
List of Supported PMBus™ Status Registers ................................................................................... 26
Additional Supported PMBus™ Registers ........................................................................................ 26
Supported PMBus™ Operation Modes ............................................................................................ 27
Supported PMBus™ ON_OFF_CONFIG Options ............................................................................ 27
Passive Component Values for the Application Circuit .................................................................... 34
Output Voltage Ranges .................................................................................................................... 35
Recommended Output Capacitor Ranges ........................................................................................ 35
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.21
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
7 of 46
ZSPM1025A
True Digital PWM Controller (Single-Phase, Single-Rail)
1
IC Characteristics
Note: The absolute maximum ratings are stress ratings only. The ZSPM1025A might not function or be operable
above the recommended operating conditions. Stresses exceeding the absolute maximum ratings might also
damage the device. In addition, extended exposure to stresses above the recommended operating conditions
might affect device reliability. ZMDI does not recommend designing to the “Absolute Maximum Ratings.”
1.1.
Absolute Maximum Ratings
PARAMETER
PINS
CONDITIONS
MIN
TYP
MAX
UNITS
5.5
V
0.15
V/µs
Supply voltages
5 V supply voltage
VDD50
dV/dt < 0.15V/µs
-0.3
Maximum slew rate
3.3 V supply voltage
VDD33
-0.3
3.6
V
1.8 V supply voltage
VDD18
AVDD18
-0.3
2.0
V
SCL
SDA
SMBALERT
GPIO0
CONTROL
PGOOD
LSE
PWM
-0.3
5.5
V
Current sensing
ISNSP,
ISNSN
-0.3
5.5
V
Voltage feedback
VFBP
VFBN
-0.3
2.0
V
All other analog pins
ADCVREF
VREFP
TEMP
VIN
ADDR0
ADDR1
-0.3
2.0
V
Digital pins
Digital I/O pins
Analog pins
Ambient conditions
Storage temperature TSTOR
Data Sheet
October 15, 2014
-40
150
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.21
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
°C
8 of 46
ZSPM1025A
True Digital PWM Controller (Single-Phase, Single-Rail)
1.2.
Recommended Operating Conditions
PARAMETER
Symbol
Ambient operation temperature
TAMB
Thermal resistance junction to ambient
1.3.
CONDITIONS
MIN
TYP
-40
JA
MAX
125
40
UNITS
°C
K/W
Electrical Parameters
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
4.75
5.0
5.25
V
Supply voltages
5 V supply voltage —VDD50 pin
VVDD50
5 V supply current
IVDD50
VDD50=5.0 V
3.3 V supply voltage
VVDD33
Supply for both the VDD33
and VDD50 pins if the internal
3.3V regulator is not used.
3.3 V supply current
IVDD33
VDD50=VDD33=3.3 V
23
3.0
mA
3.3
3.6
23
V
mA
Internally generated supply voltages
3.3 V supply voltage—VDD33 pin
VVDD33
VDD50=5.0 V
3.3 V output current
IVDD33
VDD50=5.0 V
VAVDD18
VVDD18
VDD50=5.0 V
1.8 V supply voltages—AVDD18
and VDD18 pins
3.0
1.72
3.3
1.80
1.8 V output current
3.6
V
2.0
mA
1.98
V
0
mA
Power on reset (POR) threshold
for VDD33 pin – on
VTH_POR_ON
2.8
V
Power on reset threshold for
VDD33 pin – off
VTH_POR_OFF
2.6
V
Digital IO pins (GPIO0, CONTROL, PGOOD)
Input high voltage
VDD33=3.3 V
Input low voltage
VDD33=3.3 V
Output high voltage
VDD33=3.3 V
2.0
V
0.8
V
VDD33
V
Output low voltage
0.5
V
Input leakage current
±1.0
µA
Output current – high
2.0
mA
Output current – low
2.0
mA
VDD33
V
0.5
V
2.4
Digital IO pins with tri-state capability (LSE, PWM)
Output high voltage
VDD33=3.3 V
2.4
Output low voltage
Data Sheet
October 15, 2014
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.21
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
9 of 46
ZSPM1025A
True Digital PWM Controller (Single-Phase, Single-Rail)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Output current – high
2.0
mA
Output current – low
2.0
mA
Tri-state leakage current
±1.0
µA
SMBus pins (SCL, SDA, SMBALERT) – open drain
Input high voltage
VDD33=3.3 V
Input low voltage
VDD33=3.3 V
2.0
V
0.8
V
Maximum bus voltage
5.25
V
Output current – low
2.0
mA
1.4
V
Output voltage*
Set-point voltage
0
Set-point resolution
Set-point accuracy
VOUT=1.2 V
1.4
mV
1
%
*Without external voltage divider (see section 3.3.2)
Inductor current measurement
Common mode voltage — ISNSP
and ISNSN pins relative to AGND
0
Differential voltage range across
ISNSP and ISNSN pins
Accuracy
5.0
V
±100
mV
5
Recommended DCR sense
voltage for maximum output
current
%
10
mV
Digital pulse width modulator
Switching frequency
fSW
500
kHz
Resolution
163
ps
Frequency accuracy
2.0
%
Over-voltage protection
Reference DAC
Set-point voltage
0
1.58
V
Resolution
25
mV
Set point accuracy
2
%
35
mV
Comparator
Hysteresis
Data Sheet
October 15, 2014
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.21
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
10 of 46
ZSPM1025A
True Digital PWM Controller (Single-Phase, Single-Rail)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
1.44
V
3
kΩ
Housekeeping analog-to-digital converter (HKADC) input pins
Input voltage—TEMP, VIN,
ADDR0, and ADDR1 pins
0
Source impedance Vin sensing
ADC resolution
0.7
mV
60
µA
Resolution—TEMP pin
0.16
K
Accuracy of measurement—
TEMP pin
±5.0
K
Resolution
0.22
K
Accuracy of measurement
±5.0
K
External temperature measurement **
Bias currents for external
temperature sensing —TEMP pin
** Supported sense elements: PN-junction
Internal temperature measurement
Data Sheet
October 15, 2014
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.21
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
11 of 46
ZSPM1025A
True Digital PWM Controller (Single-Phase, Single-Rail)
2
2.1.
Product Summary
Overview
The ZSPM1025A is a flexible true-digital single-phase PWM controller optimally configured for use with the
Murata Power Solutions 25A Power Block OKLP-X/25-W12-C in smart digital power solutions. It offers a
PMBus™-configurable digital power control loop, incorporating output voltage sensing and average inductor
current sensing, bundled with extensive fault monitoring and handling options.
Several different functional units are integrated in the device. A dedicated digital control loop is used to provide
fast loop response and optimal output voltage regulation. This includes output voltage sensing, average inductor
current sensing, a digital control law, and a digital pulse-width modulator (DPWM). In parallel, a dedicated,
configurable error handler allows for fast and flexible detection of error signals and their appropriate handling. A
housekeeping analog-to-digital converter (HKADC) ensures the reliable and efficient measurement of
environmental signals, such as input voltage and temperature. An application-specific, low-energy integrated
microcontroller is used to control the overall system. Among other things, it manages configuration of the various
logic units and handles the PMBus™ communication protocol. A PMBus™/SMBus/I²C™ interface is incorporated
to connect with the outside world; supported by control and power-good signals.
Figure 2.1
Typical Application Circuit with a 5V Supply Voltage
+5V
VDD50
VDD33
VDD18
C1,C2,C3
Vin
+5V
GND
AVDD18
VREFP
R7
VIN
R1
C4,C5,C6
+5V ENABLE
R8
ADCVREF
VIN
AGND
PWM
LSE
Murata
OKLP-X/25-W12-C
VOUT
PWM
+Vout
COUT
CIN
ADDR0
ADDR1
GND
TEMP
R2,R3
GND
+CS
PGND
-CS
TEMP
PMBus™
Interface
SCL
SDA
SMBALERT
GPIO0
CONTROL
PGOOD
C8
ISNSP
ISNSN
VFBP
VFBN
R6
C7
R4
R5
ZSPM1025A
Data Sheet
October 15, 2014
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.21
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
12 of 46
ZSPM1025A
True Digital PWM Controller (Single-Phase, Single-Rail)
A high-reliability, high-temperature one-time programmable memory (OTP) is used to store configuration parameters. All required bias and reference voltages are internally derived from the external supply voltage.
Figure 2.2
Block Diagram
Current Sensing
ISNSP
Current
Limiting
Average Current
Sensing
ISNSN
Digital Control Loop
VFBP
VFB
FLASH
ADC
VFBN
Adaptive Digital
Controller
PWM
PWM
LSE
DAC
OC Detection
Sequencer
OV Detection
DAC
Vin OV/UV
Detection
Int. Temp
Sense
Vout UV Detection
TEMP
ADDR0
HKADC
ADDR1
VIN
October 15, 2014
SCL
SMBALERT
SMBus
SDA
CONTROL
GPIO0
PGOOD
ADCVREF
Data Sheet
VREFP
1.8V Reg
Analog
AVDD18
1.8V Reg
Digital
VDD18
3.3V
Reg
VDD33
NVM
(OTP)
CPU Core
GPIO
VREF
Clock
Generation
VDD50
Bias
Current
Source
Configurable
Error Handler
OT Detection
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.21
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prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
13 of 46
ZSPM1025A
True Digital PWM Controller (Single-Phase, Single-Rail)
2.2.
Pin Description
Pin
Name
Direction
Type
1
AGND
Input
Supply
Analog Ground
2
VREFP
Output
Supply
Reference Terminal
3
VFBP
Input
Analog
Positive Input of Differential Feedback Voltage Sensing
4
VFBN
Input
Analog
Negative Input of Differential Feedback Voltage Sensing
5
ISNSP
Input
Analog
Positive Input of Differential Current Sensing
6
ISNSN
Input
Analog
Negative Input of Differential Current Sensing
7
TEMP
Input
Analog
Connection to External Temperature Sensing Element
8
VIN
Input
Analog
Power Supply Input Voltage Sensing
9
ADDR0
Input
Analog
SMBus Address Selection 0
10
ADDR1
Input
Analog
SMBus Address Selection 1
11
PWM
Output
Digital
High-side FET Control Signal
12
LSE
Output
Digital
Low-side FET Control Signal
13
PGOOD
Output
Digital
PGOOD Output (Internal Pull-Down)
14
CONTROL
Input
Digital
Control Input
15
GPIO0
Input/Output
Digital
General Purpose Input/Output Pin
16
SMBALERT
Output
PMBus™
SMBus Alert Output
17
SDA
Input/Output
PMBus™
SMBus Shift Data I/O
18
SCL
Input
PMBus™
SMBus Shift Clock Input (Slave-only)
19
GND
Input
Supply
Digital Ground
20
VDD18
Output
Supply
Internal 1.8 V Digital Supply Terminal
21
VDD33
Input/Output
Supply
3.3 V Supply Voltage Terminal
22
VDD50
Input
Supply
5.0 V Supply Voltage Terminal
23
AVDD18
Output
Supply
Internal 1.8 V Analog Supply Terminal
24
ADCVREF
Input
Analog
Analog-to-Digital Converter (ADC) Reference Terminal
PAD
PAD
Input
Supply
Exposed PAD, Digital Ground
Data Sheet
October 15, 2014
Description
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.21
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
14 of 46
ZSPM1025A
True Digital PWM Controller (Single-Phase, Single-Rail)
2.3.
Available Packages
The ZSPM1025A is available in a 24-pin QFN package. The pin-out is shown in Figure 2.3. The mechanical
drawing of the package can be found in Figure 6.1.
GND
VDD18
VDD33
VDD50
AVDD18
Pin-out QFN24 Package
ADCVREF
Figure 2.3
24 23 22 21 20 19
AGND 1
18 SCL
VREFP 2
17 SDA
VFBP 3
16 SMBALERT
PAD
VFBN 4
15 GPIO0
ISNSP 5
14 CONTROL
ISNSN 6
Data Sheet
October 15, 2014
10 11 12
VIN
ADDR0
ADDR1
LSE
9
PWM
8
TEMP
13 PGOOD
7
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.21
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prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
15 of 46
ZSPM1025A
True Digital PWM Controller (Single-Phase, Single-Rail)
3
3.1.
Functional Description
Power Supply Circuitry, Reference Decoupling, and Grounding
The ZSPM1025A incorporates several internal power regulators in order to derive all required supply and bias
voltages from a single external supply voltage. This supply voltage can be either 5 V or 3.3 V depending on
whether the internal 3.3 V regulator should be used. If the internal 3.3 V regulator is not used, 3.3 V must be
supplied to the 3.3 and 5 V supply pins. Decoupling capacitors are required at the VDD33, VDD18, and AVDD18
pins (1.0 µF minimum; 4.7 µF recommended). If the 5.0 V supply voltage is used, i.e. the internal 3.3 V regulator
is used, a small load current can be drawn from the VDD33 pin. This can be used to supply pull-up resistors, for
example.
The reference voltages required for the analog-to-digital converters are generated within the ZSPM1025A.
External decoupling must be provided between the VREFP and ADCVREF pins. Therefore, a 4.7 µF capacitor is
required at the VREFP pin and a 100 nF capacitor is required at the ADCVREF pin. The two pins should be
connected with approximately 50 Ω resistance in order to provide sufficient decoupling between the pins.
Three different ground connections (the pad, AGND pin, and GND pin) are available on the outside of the package. These should be connected together to a single ground tie. A differentiation between analog and digital
ground is not required.
3.2.
Reset/Start-up Behavior
The ZSPM1025A employs an internal power-on-reset (POR) circuit to ensure proper start up and shut down with
a changing supply voltage. Once the supply voltage increases above the POR threshold voltage, the ZSPM1025A
begins the internal start-up process. Upon its completion, the device is ready for operation.
3.3.
3.3.1.
Digital Power Control
Overview
The digital power control loop consists of the integral parts required for the control functionality of the
ZSPM1025A. A high-speed analog front-end is used to digitize the output voltage. A digital control core uses the
acquired information to provide duty-cycle information to the PWM, which controls the drive signals to the power
stage.
3.3.2.
Output Voltage Feedback
The voltage feedback signal is sampled with a high-speed analog front-end. The feedback voltage is differentially
measured and subtracted from the voltage reference provided by a reference digital-to-analog converter (DAC)
using an error amplifier. A flash ADC is then used to convert the voltage into its digital equivalent. This is followed
by internal digital filtering to improve the system’s noise rejection.
An external feedback divider is required for output voltages above 1.20V. The reference DAC generates a voltage
up to 1.44 V. Keeping the voltage on the feedback pin (VFBP) below 1.20 V guarantees sufficient headroom for
the output voltage compensation loop.
Data Sheet
October 15, 2014
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.21
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
16 of 46
ZSPM1025A
True Digital PWM Controller (Single-Phase, Single-Rail)
3.3.3.
Digital Compensator
The sampled output voltage is processed by a digital control loop in order to modulate the DPWM output signals
controlling the power stage. This digital control loop works as a voltage-mode controller using a PID-type
compensation. The basic structure of the controller is shown in Figure 3.1. The proprietary State-Law™ Control
(SLC) concept features two parallel compensators, steady-state operation, and fast transient operation. The
ZSPM1025A implements fast, reliable switching between the different compensation modes in order to ensure
good transient performance and quiet steady state. This allows tuning the compensators individually for the
respective needs; i.e. quiet steady-state and fast transient performance.
Figure 3.1
Simplified Block Diagram of the Digital Compensation
Coefficients
Steady-state
Operation
Mode
Detection
Digital Error Signal
Transient
Digital PID
Compensator
Non-linear
Gain
Duty Cycle
Three additional techniques are used to improve transient performance further.

Tru-sample Technology™ is used to acquire fast, accurate, and continuous information about the output
voltage so that the device can react quickly to any change in output voltage. Tru-sample Technology™
reduces phase-lag caused by sampling delays, reduces noise sensitivity, and improves transient
performance.

The Sub-cycle Response™ (SCR) technique, a method to drive the DPWM asynchronously during load
transients, allows limiting the maximum deviation of the output voltage and recharging the output
capacitors faster.

A non-linear gain adjustment is used during large load transients to boost the loop gain and reduce the
settling time.
3.3.4.
Power Sequencing and the CONTROL Pin
The ZSPM1025A supports power-sequencing features including programmable ramp up/down and delays. The
typical sequence of events is shown in Figure 3.2 and follows the PMBus™ standard. The individual values can
be set using the appropriate configuration setting, which can be selected using the Pink Power Designer™ GUI.
Three different configuration options are supported to turn the device on. The device can be configured to turn on
immediately after POR, on an OPERATION_ON command, or on an edge on the CONTROL pin.
Data Sheet
October 15, 2014
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.21
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
17 of 46
ZSPM1025A
True Digital PWM Controller (Single-Phase, Single-Rail)
Figure 3.2
Power Sequencing
VOUTnom
0V
t
tON_DELAY
tON_RISE
tOFF_DELAY
OPERATION_ON
Control pin
tON_MAX
3.3.5.
OPERATION_OFF
Control pin
tOFF_FALL
tOFF_MAX
Pre-biased Start-up and Soft Stop
Dedicated pre-biased start-up logic ensures proper start-up of the power converter when the output capacitors are
pre-charged to a non-zero output voltage. Closed-loop stability is ensured during this phase.
The ZSPM1025A also supports pre-biased off, i.e. the output voltage is not ramped down to zero and instead
remains at a predefined level (VOFF_nom). This value can be configured via the Pink Power Designer™. After
receiving the shutdown command via the PMBus™ or the CONTROL pin, the ZSPM1025A ramps down the
output voltage value to the predefined value. Once the value is reached, the PWM output will be put into tri-state
mode in order to put the output driver into its tri-state mode.
Figure 3.3
Power Sequencing with Non-zero Off Voltage
VONnom
Tri-state
VOFFnom
0V
t
tON_DELAY
tON_RISE
tOFF_DELAY
tON_MAX
Data Sheet
October 15, 2014
tOFF_FALL
tOFF_MAX
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.21
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prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
18 of 46
ZSPM1025A
True Digital PWM Controller (Single-Phase, Single-Rail)
3.3.6.
Current Sensing
The ZSPM1025A offers cycle-by-cycle average current sensing with configurable over-current protection. A
dedicated ADC is used to provide fast and accurate current information over the switching period. The acquired
information is compared with configurable current thresholds to report warning and error levels to the user. DCR
current sensing across the inductor and dedicated shunt resistors is supported. Additionally, the device uses DCR
temperature compensation via the external temperature-sensing element. This increases the accuracy of the
current sense method by counteracting the significant change of the DCR over temperature.
To acquire accurate current information, the selection of the current-sensing circuit is of critical importance. The
schematic of the required current-sensing circuitry is shown in Figure 3.4 for the widely used DCR current-sensing
method, which uses the parasitic resistance of the inductor to acquire the current information. The principle is
based on a matched time-constant between the inductor and the low-pass filter built from a 2.15kΩ resistor
mounted on the Murata Power Block and C8. Resistor R6 should be a precision 2.15kΩ resistor in order to
provide good DC voltage rejection, .i.e. reduce the influence of the output voltage level in the current measurement.
Figure 3.4
Inductor Current Sensing Using the DCR Method
Murata
OKLP-X/25-W12-C
L
DCR
+Vout
2.15 kOhm
+CS
-CS
C8
220nF
ZSPM1025
R6
2.15 kOhm
ISNSP
ISNSN
End-of-line calibration is supported so that the ZSPM1025A can achieve improved accuracy over the full output
current range. The full calibration method is detailed in the ZSPM10xx Application Note—Programming and
Calibration. This allows the user to correct mismatches between the nominal DCR value used to configure the
device and the actual DCR value in the application caused by effects such as manufacturing variations. The
calibration range is limited to +/- 50% of the nominal DCR value.
Data Sheet
October 15, 2014
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.21
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prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
19 of 46
ZSPM1025A
True Digital PWM Controller (Single-Phase, Single-Rail)
Additionally, in order to improve the accuracy of the current measurement, which can be adversely affected by the
temperature coefficient of the inductor’s DCR, the ZSPM1025A features temperature compensation via external
temperature sensing. The temperature of the inductors is measured with an external temperature-sensing
element placed close to the inductor. This information is used to adapt the gain of the current sense path to
compensate for the increase in actual DCR.
3.3.7.
Temperature Measurement
The ZSPM1025A features two independent temperature measurement units. The internal temperature sensing
measures the temperatures inside the ZSPM1025A. The external temperature sensor is placed on the Murata
Power Block. The ZSPM1025A drives 60µA into the external temperature-sensing element and measures the
voltage on the TEMP pin. The Pink Power Designer™ GUI must be used to select the offset for configuration of
the external temperature measurement. A temperature-offset calibration is highly recommended.
3.4.
Fault Monitoring and Response Generation
The ZSPM1025A monitors various signals during operation. Depending on the selected configuration, it can
respond to events generated by these signals. A wide range of options is configurable via the Pink Power
Designer™. Typical monitoring within the ZSPM1025A is a three-step process. First, an event is detected via a
configurable set of thresholds. This event is then digitally filtered before the ZSPM1025A reacts with a defined
response depending on the fault condition. For most monitored signals, a warning and a fault threshold can be
configured. A warning typically sets a status flag (see section 4.7.6) but does not trigger a response; whereas a
fault also generates a response.
The warning and fault events can be enabled for each parameter that the ZSPM1025 monitors (see Table 3.1).
The SMBALERT signal is asserted by the ZSPM1025A for any warning or fault that has been enabled. An
overview of the faults that the ZSPM1025A can detect and the response to each fault is given in Table 3.1.
Table 3.1
Fault Configuration Overview
Fault
Response Type
Output Over-Voltage
Low impedance
Output Under-Voltage
Low impedance
Input Over-Voltage
Off
Input Under-Voltage
Off
Over-Current
Low impedance
External Over-Temperature
Off
Internal Over-Temperature
Off
The ZSPM1025A supports different response types depending on the fault detected. An “Off” response ramps the
output voltage down using the falling-edge sequencer settings. The final state of the output signals depends on
the value selected for VOFF_nom. The “low-impedance” response clamps the PWM output to PGND.
The controller fault handling will infinitely try to restart the converter on a fault condition. In analog controllers, this
infinite re-try feature is also known as “hiccup mode.”
Data Sheet
October 15, 2014
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.21
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
20 of 46
ZSPM1025A
True Digital PWM Controller (Single-Phase, Single-Rail)
3.4.1.
Output Over/Under-Voltage
To prevent damage to the load, the ZSPM1025A utilizes an output over-voltage protection circuit. The voltage at
VFBP is continuously compared with a configurable fault threshold using a high-speed analog comparator. The
fault threshold can be configured using the Pink Power Designer™ GUI. If the voltage exceeds the configured
threshold, the fault response is generated and the PWM output is set to low impedance (clamped to PGND). The
voltage fault level is generated by a 6-bit DAC with a reference voltage of 1.60 V resulting in 25 mV resolution.
The output voltage is also sampled using the HKADC and continuously compared to a configurable output overvoltage warning threshold. The warning threshold can be configured using the Pink Power Designer™ GUI. If the
output voltage exceeds this threshold, a warning is generated.
The ZSPM1025A also monitors the output voltage with two lower thresholds. If the output voltage is below the
under-voltage warning level and above the under-voltage fault level, an output voltage under-voltage warning is
triggered. If the output voltage falls below the fault level, a fault event is generated and the output is set to low
impedance.
3.4.2.
Output Current Protection and Limiting
The ZSPM1025A continuously monitors the average inductor current and utilizes this information to protect the
power supply against excessive output current. The output over-current warning and fault threshold levels can be
configured using the Pink Power Designer™ GUI. If the fault level is exceeded, the PWM output is set to low
impedance.
3.4.3.
Over-Temperature Protection
The ZSPM1025A monitors internal and external temperature. For each, a warning and a fault level can be
configured and an appropriate response can be enabled.
3.5.
Configuration
The ZSPM1025A incorporates two different sets of configuration parameters (see section 4.4). The first set of
configuration parameters can be configured during design time and cannot be changed during run-time. The
second set of configuration parameters can be configured during design time, but can also be reconfigured during
run-time using the appropriate PMBus™ command. Note that the second set of reconfigured values is not stored
in the OTP memory, so they are lost during power cycling the device.
In order to evaluate the device and its configuration on the bench, a special engineering mode is supported by the
device and Pink Power Designer™. In this engineering mode, the device can be reconfigured multiple times
without writing the configuration into the OTP. During this mode, the device starts up after power-on reset in an
unconfigured state. The Pink Power Designer™ then provides the configuration to the ZSPM1025A, enabling full
operation without actually configuring the OTP. The engineer can use this mode to evaluate the configuration on
the bench. However, the configuration will be lost upon power-on-reset.
After the design engineer has determined the final configuration options, an OTP image can be created that is
then written into the ZSPM1025A. This can be either on the bench using the Pink Power Designer™ or in end–ofline testing during mass production.
Data Sheet
October 15, 2014
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.21
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
21 of 46
ZSPM1025A
True Digital PWM Controller (Single-Phase, Single-Rail)
4
4.1.
PMBus™ Functionality
Introduction
The ZSPM1025A supports the PMBus™ protocol to enable configuration, monitoring, and fault management
during run-time.
The PMBus™ host controller is connected to the ZSPM1025A via the PMBus™ pins (SDA and SCL). A dedicated
SMBALERT pin is provided to notify the host that new status information is present.
The ZSPM1025A supports packet error correction (PEC) according to the PMBus™ specification.
4.2.
Timing and Bus Specification
Timing for the PMBus™ signals is given in Figure 4.1. The PMBus™ signal SMBCLK is the shift clock input on
the SCL pin on the ZSPM1025A (slave only) and the SMBDAT signal is the shift data input/output on the SDA pin.
Figure 4.1
PMBus™ Timing Diagram
tLOW
tHIGH
tR
tF
SMBCLK
tBUF
tHD:DAT
tSU:STA
tSU:STO
tHD:STA
SMBDAT
S
Table 4.1
P
tSU:DAT
P
S
PMBus™ Timing Specification
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
400
500
kHz
SMBus operation frequency
fSMB
10
Bus free time between start and stop
tBUF
1.3
µs
Hold time after start condition
tHD:STA
0.6
µs
Repeat start condition setup time
tSU:STA
0.6
µs
Stop condition setup time
tSU:STO
0.6
µs
Data hold time
tHD:DAT
300
ns
Data setup time
tSU:DAT
100
ns
Clock low time-out
tTIMEOUT
Clock low period
tLOW
1.3
µs
Clock high period
tHIGH
0.6
µs
Cumulative clock low extend time
tLOW:SEXT
25
ms
Clock or data fall time
tF
300
ns
Clock or data rise time
tR
300
ns
Data Sheet
October 15, 2014
25
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.21
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prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
35
µs
22 of 46
ZSPM1025A
True Digital PWM Controller (Single-Phase, Single-Rail)
4.3.
Address Selection via External Resistors
PMBus™ uses a 7-bit device address to identify different devices connected to the bus. This address can be
selected via external resistors connected to the ADDRx pins.
The resistor values are sensed using the internal ADC during the initialization phase and the appropriate
PMBus™ address is selected. Note that the respective circuitry is only active during the initialization phase; hence
no DC voltage can be measured at the pins. The supported PMBus™ addresses and the values of the respective
required resistors are listed in Table 4.2.
Table 4.2
Supported Resistor Values for PMBus™ Address Selection
Address
(Hex)
ADDR1
Ω
ADDR0
Ω
Address
(Hex)
ADDR1
Ω
ADDR0
Ω
Address
(Hex)
ADDR1
Ω
ADDR0
Ω
Address
(Hex)
ADDR1
Ω
ADDR0
Ω
64
1*
2*
3*
4*
5*
6*
7*
8*
9
10
11
12*
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
680
680
680
680
680
680
680
680
680
680
680
680
680
680
680
680
0
680
1.2 k
1.8 k
2.7 k
3.9 k
4.7 k
5.6 k
6.8 k
8.2 k
10 k
12 k
15 k
18 k
22 k
27 k
0
680
1.2 k
1.8 k
2.7 k
3.9 k
4.7 k
5.6 k
6.8 k
8.2 k
10 k
12 k
15 k
18 k
22 k
27 k
32
33
34
35
36
37
38
39
40*
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55*
56
57
58
59
60
61
62
63
1.2 k
1.2 k
1.2 k
1.2 k
1.2 k
1.2 k
1.2 k
1.2 k
1.2 k
1.2 k
1.2 k
1.2 k
1.2 k
1.2 k
1.2 k
1.2 k
1.8 k
1.8 k
1.8 k
1.8 k
1.8 k
1.8 k
1.8 k
1.8 k
1.8 k
1.8 k
1.8 k
1.8 k
1.8 k
1.8 k
1.8 k
1.8 k
0
680
1.2 k
1.8 k
2.7 k
3.9 k
4.7 k
5.6 k
6.8 k
8.2 k
10 k
12 k
15 k
18 k
22 k
27 k
0
680
1.2 k
1.8 k
2.7 k
3.9 k
4.7 k
5.6 k
6.8 k
8.2 k
10 k
12 k
15 k
18 k
22 k
27 k
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
2.7 k
2.7 k
2.7 k
2.7 k
2.7 k
2.7 k
2.7 k
2.7 k
2.7 k
2.7 k
2.7 k
2.7 k
2.7 k
2.7 k
2.7 k
2.7 k
3.9 k
3.9 k
3.9 k
3.9 k
3.9 k
3.9 k
3.9 k
3.9 k
3.9 k
3.9 k
3.9 k
3.9 k
3.9 k
3.9 k
3.9 k
3.9 k
0
680
1.2 k
1.8 k
2.7 k
3.9 k
4.7 k
5.6 k
6.8 k
8.2 k
10 k
12 k
15 k
18 k
22 k
27 k
0
680
1.2 k
1.8 k
2.7 k
3.9 k
4.7 k
5.6 k
6.8 k
8.2 k
10 k
12 k
15 k
18 k
22 k
27 k
96
97*
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120*
121*
122*
123*
124*
125*
126*
127*
4.7 k
4.7 k
4.7 k
4.7 k
4.7 k
4.7 k
4.7 k
4.7 k
4.7 k
4.7 k
4.7 k
4.7 k
4.7 k
4.7 k
4.7 k
4.7 k
5.6 k
5.6 k
5.6 k
5.6 k
5.6 k
5.6 k
5.6 k
5.6 k
5.6 k
5.6 k
5.6 k
5.6 k
5.6 k
5.6 k
5.6 k
5.6 k
0
680
1.2 k
1.8 k
2.7 k
3.9 k
4.7 k
5.6 k
6.8 k
8.2 k
10 k
12 k
15 k
18 k
22 k
27 k
0
680
1.2 k
1.8 k
2.7 k
3.9 k
4.7 k
5.6 k
6.8 k
8.2 k
10 k
12 k
15 k
18 k
22 k
27 k
Note: The addresses marked with an asterisk (*) are reserved by the SMBus specification.
Data Sheet
October 15, 2014
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.21
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
23 of 46
ZSPM1025A
True Digital PWM Controller (Single-Phase, Single-Rail)
If only four devices are used in a system, their respective addresses can alternatively be configured without
resistors by connecting the pins to GND or the AVDD18 pin. The PMBus™ addresses selectable in this fashion
are listed in Table 4.3.
Table 4.3
4.4.
PMBus™ Address Selection without Resistors
Address
ADDR1
ADDR0
15
GND
AVDD18
48
AVDD18
GND
63
AVDD18
AVDD18
64
GND
GND
Configuration Registers
Two different sets of configuration parameters are supported by the ZSPM1025A. The first set of parameters can
only be configured during the configuration phase of the ZSPM1025A. These values are written into the OTP
memory and cannot be changed using PMBus™ commands during run-time. A second set of parameters can
also be configured during run-time using the appropriate PMBus™ commands. The two groups are classified in
the PMBus™ configuration table (Table 4.4).
Table 4.4
List of Supported PMBus™ Configuration Registers
Note: See important notes at the end of the table.
PMBus™ Parameter
Description
Data Format
Classification
Output Voltage
ON_OFF_CONFIG
On/off configuration
N/A
VOUT_MODE
Exponent of the VOUT_COMMAND value
N/A
PMBus™
Read only
( )
VOUT_COMMAND
Set output voltage
LINEAR 1
PMBus™
VOUT_OV_FAULT_LIMIT
Over-voltage fault limit
N/A
OTP
VOUT_OV_WARN_LIMIT
Over-voltage warning level
N/A
OTP
VOUT_UV_WARN_LIMIT
Under-voltage warning level
N/A
OTP
VOUT_UV_FAULT_LIMIT
Under-voltage fault level
N/A
OTP
IOUT_OC_FAULT_LIMIT
Over-current fault limit
N/A
OTP
IOUT_OC_WARN_LIMIT
Over-current warning level
N/A
OTP
OT_FAULT_LIMIT
External over-temperature fault level
N/A
OTP
OT_WARN_LIMIT
External over-temperature warning level
N/A
OTP
Output Current
Temperature – External
Data Sheet
October 15, 2014
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.21
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
24 of 46
ZSPM1025A
True Digital PWM Controller (Single-Phase, Single-Rail)
PMBus™ Parameter
Description
Data Format
Classification
Temperature – Internal
IOT_FAULT_LIMIT
Internal over-temperature fault level
N/A
OTP
IOT_WARN_LIMIT
Internal over-temperature warning level
N/A
OTP
VIN_OV_FAULT_LIMIT
Over-voltage fault limit
N/A
OTP
VIN_OV_WARN_LIMIT
Over-voltage warning level
N/A
OTP
VIN_UV_WARN_LIMIT
Under-voltage warning level
N/A
OTP
VIN_UV_FAULT_LIMIT
Under-voltage fault level
N/A
OTP
Input Voltage
Start-up Behavior / Power Sequencing
POWER_GOOD_ON
Power good on threshold
N/A
OTP
POWER_GOOD_OFF
Power good off threshold
N/A
OTP
TON_DELAY
Turn-on delay
N/A
OTP
TON_RISE
Turn-on rise time
N/A
OTP
TON_FAULT_MAX
Turn-on maximum fault time
N/A
OTP
TOFF_DELAY
Turn-off delay
N/A
OTP
TOFF_FALL
Turn-off fall time
N/A
OTP
TOFF_WARN_MAX
Turn-off maximum warning time
N/A
OTP
VOFF_NOM
Soft-stop off value
N/A
OTP
Output Voltage Sequencing
Notes:
1.
VOUT_MODE is read-only for this device.
The ZSPM1025A supports the LINEAR data format according to the PMBus™ specification. Note that in
accordance with the PMBus™ specification, all commands related to the output voltage are subject to the
VOUT_MODE settings. Note that VOUT_MODE is read-only for the ZSPM1025A.
Data Sheet
October 15, 2014
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.21
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
25 of 46
ZSPM1025A
True Digital PWM Controller (Single-Phase, Single-Rail)
4.5.
Monitoring
The ZSPM1025A has a dedicated set of PMBus™ registers to enable advanced power management using
extensive monitoring features. Different warning and error flags can be read by the PMBus™ master to ensure
proper operation of the power converter or monitor the converters over the product lifetime.
List of Supported PMBus™ Status Registers
Table 4.5
PMBus™ Command
Description
Data Format
CLEAR_FAULTS
Clear status information
STATUS_BYTE
Unit status byte
STATUS_WORD
Unit status word
STATUS_VOUT
Output voltage status
STATUS_IOUT
Output current status
STATUS_INPUT
Input status
STATUS_TEMPERATURE
Temperature status
STATUS_CML
Communication and memory status
READ_VIN
Input voltage read back
LINEAR
READ_VOUT
Output voltage read back
LINEAR
READ_IOUT
Output current read back
LINEAR
READ_TEMPERATURE_1
External temperature read back
LINEAR
READ_TEMPERATURE_2
Internal temperature read back
LINEAR
4.6.
Additional Registers
Table 4.6
Additional Supported PMBus™ Registers
PMBus™ Command
Description
Data Length (Byte)
Values
PMBUS_REVISION
PMBus™ revision
1
11HEX
MFR_ID
Manufacturer ID
4
“ZMDI”
(5AHEX, 4D HEX, 44 HEX, 49 HEX)
MFR_MODEL
Manufacturer model identifier
4
“1025”
(31HEX, 30HEX, 32HEX, 35HEX)
MFR_REVISION
Manufacturer product revision
4
MFR_SERIAL
Serial number
12
Data Sheet
October 15, 2014
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.21
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
26 of 46
ZSPM1025A
True Digital PWM Controller (Single-Phase, Single-Rail)
4.7.
Detailed Description of the Supported PMBus™ Commands
4.7.1.
OPERATION
The OPERATION command is used to turn the unit on and off in conjunction with the input from the CONTROL
pin. The unit stays in the commanded operating mode until a subsequent OPERATION command or change in
the state of the CONTROL pin instructs the device to change to another mode. The supported operation modes
are listed in Table 4.7.
Supported PMBus™ Operation Modes
Table 4.7
OPERATION (read/write)
Bits[7:6]
Bits[5:4]
Bits[3:2]
Bits[1:0]
Unit
On or Off
Margin
State
01
XX
XX
XX
Soft Off (With
Sequencing)
N/A
10
00
XX
XX
On
Off
4.7.2.
ON_OFF_CONFIG
The ON_OFF_CONFIG command is used to configure the combination of the CONTROL pin and the PMBus™
OPERATION command that turns the unit on or off. The supported configuration options are listed in Table 4.8.
Supported PMBus™ ON_OFF_CONFIG Options
Table 4.8
ON_OFF_CONFIG (read/write)
Bits
Name
Description
[0]
CONTROL OFF
Value ignored.
Device always uses the programmed turn off delay and fall time.
[1]
CONTROL Polarity
0: Active low (pull pin low to start the unit).
1: Active high (pull pin high to start the unit).
[2]
CONTROL Enable
0: Unit ignores the CONTROL pin.
1: Unit requires the CONTROL pin to be asserted to start the unit.*
[3]
OPERATION Enable
0: Unit ignores the on/off settings in the OPERATION command.
1: Unit requires the on/off settings in the OPERATION command to start the
unit*.
*Depending on the configuration, both conditions must be in the on state in order to turn on the unit.
4.7.3.
CLEAR_FAULTS
The CLEAR_FAULTS command is used to clear any fault bits that have been set in the status registers.
Additionally, the SMBALERT signal is cleared if it was previously asserted. Note that the device resumes operation with the currently configured state after a CLEAR_FAULTS command has been issued. If a fault/warning is
still present, the respective bit is set immediately again.
Data Sheet
October 15, 2014
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.21
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
27 of 46
ZSPM1025A
True Digital PWM Controller (Single-Phase, Single-Rail)
4.7.4.
VOUT_MODE
The VOUT_MODE command is used to retrieve information about the data format for all output voltage related
commands. Note that this is a read-only value.
VOUT_MODE (read only)
Bits
Name
Description
[4:0]
PARAMETER
2’s complement of the exponent
[7:5]
MODE
000: Linear data format
4.7.5.
VOUT_COMMAND
The VOUT_COMMAND is used to set the output voltage during run-time.
Note that the maximum output voltage is 3.6V.
VOUT_COMMAND (read/write)
Bits
[15:0]
4.7.6.
Name
MANTISSA
Description
Unsigned mantissa of output voltage in V.
Exponent can be retrieved via VOUT_MODE command.
STATUS_BYTE
The STATUS_BYTE command returns a summary of the most critical faults in one byte.
STATUS_BYTE (read only)
Bits
Name
Description
[0]
NONE OF THE ABOVE
A fault not listed in bits [7:1] has occurred.
[1]
CML
A communication fault as occurred.
[2]
TEMPERATURE
A temperature fault or warning has occurred.
[3]
VIN_UV
An input under-voltage fault has occurred.
[4]
IOUT_OC
An output over-current fault has occurred.
[5]
VOUT_OV
An output over-voltage fault has occurred.
[6]
OFF
This bit is asserted if the unit is not providing power to the output,
regardless of the reason, including simply not being enabled.
[7]
BUSY
Not supported.
Data Sheet
October 15, 2014
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.21
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
28 of 46
ZSPM1025A
True Digital PWM Controller (Single-Phase, Single-Rail)
4.7.7.
STATUS_WORD
The STATUS_WORD command returns a summary of the device status information in two data bytes.
STATUS_WORD (read only)
Bits
Name
[7:0]
Description
STATUS_BYTE
See status byte (section 4.7.6).
[8]
UNKNOWN
Not supported
[9]
OTHER
Not supported
[10]
FANS
No supported
[11]
POWER_GOOD#
The POWER_GOOD signal, if present, is negated.
[12]
MFR
A manufacturer-specific fault or warning has occurred.
[13]
INPUT
An input-related warning or fault has occurred.
[14]
IOUT/POUT
An output current or output power warning or fault has occurred.
[15]
VOUT
An output-voltage-related warning or fault has occurred.
4.7.8.
STATUS_VOUT
STATUS_VOUT (read only)
Bits
Name
Description
[0]
Not supported.
[1]
Not supported.
[2]
Not supported.
[3]
Not supported.
[4]
VOUT_UV_FLT
An output voltage under-voltage fault has occurred.
[5]
VOUT_UV_WARN
An output voltage under-voltage warning has occurred.
[6]
VOUT_OV_WARN
An output voltage over-voltage warning has occurred.
[7]
VOUT_OV_FLT
An output voltage over-voltage fault has occurred.
Data Sheet
October 15, 2014
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.21
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
29 of 46
ZSPM1025A
True Digital PWM Controller (Single-Phase, Single-Rail)
4.7.9.
STATUS_IOUT
STATUS_IOUT (read only)
Bits
Name
Description
[0]
Not supported.
[1]
Not supported.
[2]
Not supported.
[3]
Not supported.
[4]
Not supported.
[5]
IOUT_OC_WARN
An over-current warning has occurred.
[6]
.
Not supported.
[7]
IOUT_OC_FLT
An over-current fault has occurred.
4.7.10.
STATUS_INPUT
STATUS_INPUT (read only)
Bits
Name
Description
[0]
Not supported.
[1]
Not supported.
[2]
Not supported.
[3]
Not supported.
[4]
VIN_UV_FLT
An input voltage under-voltage fault has occurred.
[5]
VIN_UV_WARN
An input voltage under-voltage warning has occurred.
[6]
VIN_OV_WARN
An input voltage over-voltage warning has occurred.
[7]
VIN_OV_FLT
An input voltage over-voltage fault has occurred.
4.7.11.
STATUS_TEMPERATURE
STATUS_TEMPERATURE (read only)
Bits
Name
Description
[0]
Not supported.
[1]
Not supported.
[2]
Not supported.
[3]
Not supported.
[4]
Not supported.
[5]
Not supported.
[6]
TEMP_OV_WARN
An (external) over-temperature warning has occurred.
[7]
TEMP_OV_FLT
An (external) over-temperature fault has occurred.
Data Sheet
October 15, 2014
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.21
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
30 of 46
ZSPM1025A
True Digital PWM Controller (Single-Phase, Single-Rail)
4.7.12.
STATUS_CML
STATUS_CML (read only)
Bits
Name
[0]
Description
Not supported.
[1]
SMBUS_FLT
SMBus™ timeout or a format error has occurred.
[2]
Not supported.
[3]
Not supported.
[4]
Not supported.
[5]
PEC_FLT
A packet error check fault has occurred.
[6]
Not supported.
[7]
4.7.13.
CMD_FLT
An invalid or an unsupported command has been received.
STATUS_MFR_SPECIFIC
STATUS_MFR_SPECIFIC (read only)
Bits
Name
Description
[0]
Not supported.
[1]
Not supported.
[2]
Not supported.
[3]
Not supported.
[4]
Not supported.
[5]
Not supported.
[6]
ITEMP_OV_WARN
An (internal) over-temperature warning has occurred.
[7]
ITEMP_OV_FLT
An (internal) over-temperature fault has occurred.
4.7.14.
READ_VIN
READ_VIN (read only)
Bits
[15:0]
4.7.15.
Name
VIN
Description
Input voltage in V (linear data format).
READ_VOUT
READ_VOUT (read only)
Bits
[15:0]
Data Sheet
October 15, 2014
Name
VOUT
Description
Output voltage in V (linear data format).
Note that this command is mantissa only.
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.21
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
31 of 46
ZSPM1025A
True Digital PWM Controller (Single-Phase, Single-Rail)
4.7.16.
READ_IOUT
READ_IOUT (read only)
Bits
[15:0]
4.7.17.
Name
IOUT
Description
Output current in A (linear data format).
READ_TEMPERATURE1
READ_TEMPERATURE1 (read only)
Bits
[15:0]
4.7.18.
Name
TEMP1
Description
External temperature in °C (linear data format).
READ_TEMPERATURE2
READ_TEMPERATURE2 (read only)
Bits
[15:0]
Data Sheet
October 15, 2014
Name
TEMP2
Description
Internal temperature in °C (linear data format).
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.21
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
32 of 46
ZSPM1025A
True Digital PWM Controller (Single-Phase, Single-Rail)
5
Application Information
The ZSPM1025A has been designed and pre-configured to operate with the Murata OKLP-X/25-W12-C Power
Block, which is a complete point-of-load solution for 25A output currents. This section includes information about
the typical application circuit and recommended component values. ZMDI provides ZSPM1025A configuration
data that is downloadable from ZMDI website as part of the Pink Power Designer™ GUI. While the solution is preconfigured, the design engineer has the flexibility to configure the output voltage and select one of the four predefined and common output capacitor ranges.
Included in the Pink Power Designer™ software is a wizard dialog for guiding the user through the design process
step-by- step, which makes it a ready-made, easy, and tested solution.
5.1.
Typical Application Circuit
A schematic for the typical application circuit is shown in Figure 5.1. A list of recommended component values for
the passive components can be found in Table 5.1.
Figure 5.1
Application Circuit with a 5V Supply Voltage
+5V
VDD50
VDD33
VDD18
C1,C2,C3
Vin
+5V
GND
AVDD18
VREFP
R7
VIN
R1
C4,C5,C6
+5V ENABLE
R8
ADCVREF
VIN
AGND
ADDR0
ADDR1
PWM
LSE
PWM
GND
TEMP
ON/OFF**
+Vout
COUT
GND
+CS
PGND
-CS
TEMP
PGOOD
+3.3/5V*
R9,R10
Interface
VOUT
CIN
R2,R3
PMBus™
Murata
OKLP-X/25-W12-C
GPIO0
CONTROL
PGOOD
C8
ISNSP
ISNSN
SCL
VFBP
SDA
VFBN
SMBALERT
ZSPM1025A
R6
C7
R4
R5
Notes:
* PMBus™ SCL and SDA pull-up resistors R9/R10 can be tied to 3.3V or 5V depending on the PMBus™ master controller.
** The ON/OFF input can be active high or active low depending on the configuration of the CONTROL pin on the
ZSPM1025A.
Data Sheet
October 15, 2014
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.21
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
33 of 46
ZSPM1025A
True Digital PWM Controller (Single-Phase, Single-Rail)
Table 5.1
Passive Component Values for the Application Circuit
Reference
Designator
Component
Value
C1
1.0µF
Ceramic capacitor.
C2
4.7µF
Ceramic capacitor. Recommended 4.7µF, Minimum 1.0µF.
C3
4.7µF
Ceramic capacitor. Recommended 4.7µF, Minimum 1.0µF.
C4
4.7µF
Ceramic capacitor. Recommended 4.7µF, Minimum 1.0µF.
C5
4.7µF
Ceramic capacitor. Recommended 4.7µF, Minimum 1.0µF.
C6
100nF
C7
22pF
C8
220nF*
CIN
Output voltage sense filtering capacitor.
Recommended 22pF, maximum 1 nF.
DCR current-sense filter capacitor.
Input filter capacitors. Can be a combination of ceramic and electrolytic capacitors.
Output filter capacitors. See section 5.1.2 for more information on the output capacitor
selection.
COUT
R1
Description
51Ω*
R2, R3
Select PMBus™ address resistor value from Table 4.2.
R4
1.0kΩ*
Output voltage divider bottom resistor. Connect between the VFBP and VFBN pins.
Populate R4 only if the output voltage range is from 1.20V to 3.60V. Do not populate R4 if
the output voltage is below 1.20V. See section 5.1.1.
R5
1.74kΩ*
Output voltage divider top resistor. Connect between the output terminal and the VFBP
pin.
R6
2.15kΩ*
DCR current sense filter resistor.
R7
9.1kΩ*
Input voltage divider top resistor. Connect between the main power input and the VIN pin
of the ZSPM1025A.
R8
1.0kΩ*
Input voltage divider bottom resistor. Connect between the VIN and AGND pins of the
ZSPM1025A.
R9, R10
15kΩ*
PMBus™ SCL and SDA line pull-up resistors.
The pull-up resistors can be tied to 3.3V or 5V depending on the supply voltage of the
PMBus™ master.
* Values marked with an asterisk are fixed component values that must not be changed.
Data Sheet
October 15, 2014
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.21
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
34 of 46
ZSPM1025A
True Digital PWM Controller (Single-Phase, Single-Rail)
5.1.1.
Output Voltage Selection
The ZSPM1025A can be configured to operate within two output voltage ranges (see Table 5.2). If the required
output voltage is within range #1 resistor R4 should not be placed on the application board. For output voltages
within range #2, resistor R4 should be placed on the application board.
Table 5.2
Output Voltage Ranges
Output voltage
Range
Minimum VOUT
Maximum VOUT
#1
0.35V
1.20V
#2
1.20V
3.60V
5.1.2.
Output Capacitor Selection
The ZSPM1025A Digital PWM controller can be configured to operate over a wide range of output capacitance.
Four ranges of output capacitance have been specified to match typical customer requirements (see Table 5.3).
Typical performance measurements for both load transient performance and open-loop Bode plots can be found
in section 5.2. Using less output capacitance than the minimum capacitance given in Table 5.3 is not recommended.
Table 5.3
Recommended Output Capacitor Ranges
Capacitor Range
Ceramic Capacitor
Bulk Electrolytic Capacitors
#1
Minimum 200µF
Maximum 400µF
None
#2
Minimum 400µF
Maximum 1000µF
None
#3
Minimum 100µF
Maximum 600µF
Minimum 2 x 470µF, 7mΩ ESR
Maximum 5 x 470µF, 7mΩ ESR
#4
Minimum 400µF
Maximum 1000µF
Minimum 4 x 470µF, 7mΩ ESR
Maximum 10 x 470µF, 7mΩ ESR
5.2.
Typical Performance Measurements for the ZSPM1025A
ZMDI has designed eight sets of compensation loop parameters for the ZSPM1025A. The compensation loop
parameters have been designed for each of the two output-voltage ranges (see Table 5.2) in combination with
one of the four ranges of output capacitors (see Table 5.3). The Pink Power Designer™ GUI wizard can guide the
user through a selection process and load the correct set of parameters for the selected output voltage and output
capacitor range. Please see the Pink Power Designer™ GUI User Guide for more information on the wizard.
Load transient performance measurements and open loop Bode plots for the eight configurations can be found in
sections 5.2.1 to 5.2.8. The transient load steps have been generated with a load resistor and a power MOSFET
located on the same circuit board as the ZSPM1025A and the Murata OKLP-X/25-W12-C Power Block.
The ZSPM8025 Evaluation Kit can be used to further evaluate the performance of the ZSPM1025A for the four
capacitor ranges.
Data Sheet
October 15, 2014
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.21
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
35 of 46
ZSPM1025A
True Digital PWM Controller (Single-Phase, Single-Rail)
5.2.1.
Typical Load Transient Response – Capacitor Range #1 – VOUT Range #1
Test conditions: VIN = 12.0V, VOUT = 1.20V
Minimum output capacitance: 2 x 100µF/6.3V X5R
Maximum output capacitance: 3 x 100µF/6.3V X5R + 2 x 47µF/10V X7R
Ch1 (Blue):
Ch2 (Cyan):
Ch3: (Violet):
Time Scale:
Ch1 (Blue):
Ch2 (Cyan):
Ch3: (Violet):
Time Scale:
Ch1 (Blue):
Ch2 (Cyan):
Ch3: (Violet):
Time Scale:
Figure 5.5
VOUT 100mV/div AC
PWM 5V/div DC
Load Trigger 5V/div DC
8µs/div
15 to 5A Load Step – Max. Capacitance
VOUT 100mV/div AC
PWM 5V/div DC
Load Trigger 5V/div DC
8µs/div
Figure 5.6
Gain [dB]
15 to 5A Load Step – Min. Capacitance
VOUT 100mV/div AC
PWM 5V/div DC
Load Trigger 5V/div DC
8µs/div
5 to 15A Load Step – Max. Capacitance
Figure 5.4
Figure 5.3
Ch1 (Blue):
Ch2 (Cyan):
Ch3: (Violet):
Time Scale:
VOUT 100mV/div AC
PWM 5V/div DC
Load Trigger 5V/div DC
8µs/div
Open Loop Bode Plots
40
Max Caps - Gain
30
Min Caps - Gain
20
Max Caps - Phase
Min Caps - Phase
10
0
0
-30
-60
-90
-10
-120
Phase [degrees]
5 to 15A Load Step – Min. Capacitance
Figure 5.2
-20
-150
-30
-40
-180
1
Data Sheet
October 15, 2014
10
Frequency [kHz]
100
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.21
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
36 of 46
ZSPM1025A
True Digital PWM Controller (Single-Phase, Single-Rail)
5.2.2.
Typical Load Transient Response – Capacitor Range #2 – VOUT Range #1
Test conditions: VIN = 12.0V, VOUT = 1.20V
Minimum output capacitance: 3 x 100µF/6.3V X5R + 2 x 47µF/10V X7R
Maximum output capacitance: 7 x 100µF/6.3V X5R + 4 x 47µF/10V X7R
Ch1 (Blue):
Ch2 (Cyan):
Ch3: (Violet):
Time Scale:
Ch1 (Blue):
Ch2 (Cyan):
Ch3: (Violet):
Time Scale:
Ch1 (Blue):
Ch2 (Cyan):
Ch3: (Violet):
Time Scale:
Figure 5.10
VOUT 50mV/div AC
PWM 5V/div DC
Load Trigger 5V/div DC
8µs/div
15 to 5A Load Step – Min. Capacitance
VOUT 50mV/div AC
PWM 5V/div DC
Load Trigger 5V/div DC
8µs/div
Figure 5.11
Gain [dB]
15 to 5A Load Step – Min. Capacitance
VOUT 50mV/div AC
PWM 5V/div DC
Load Trigger 5V/div DC
8µs/div
5 to 15A Load Step – Max. Capacitance
Figure 5.9
Figure 5.8
Ch1 (Blue):
Ch2 (Cyan):
Ch3: (Violet):
Time Scale:
VOUT 50mV/div AC
PWM 5V/div DC
Load Trigger 5V/div DC
8µs/div
Open Loop Bode Plots
40
Max Caps - Gain
30
Min Caps - Gain
20
Max Caps - Phase
Min Caps - Phase
10
0
0
-30
-60
-90
-10
-120
-20
-150
-30
-40
-180
1
Data Sheet
October 15, 2014
Phase [degrees]
5 to 15A Load Step – Min. Capacitance
Figure 5.7
10
Frequency [kHz]
100
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.21
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
37 of 46
ZSPM1025A
True Digital PWM Controller (Single-Phase, Single-Rail)
Typical Load Transient Response – Capacitor Range #3 – VOUT Range #1
5.2.3.
Test conditions: VIN = 12.0V, VOUT = 1.20V
Minimum output capacitance: 1 x 100µF/6.3V X5R + 2 x 470 µF/6.3V/7mΩ Aluminum Electrolytic Capacitor
Maximum output capacitance: 6 x 100 µF/6.3V X5R + 5 x 470 µF/6.3V/7mΩ Aluminum Electrolytic Capacitor
5 to 15A Load Step – Min. Capacitance
Ch1 (Blue):
Ch2 (Cyan):
Ch3: (Violet):
Time Scale:
Figure 5.14
Ch1 (Blue):
Ch2 (Cyan):
Ch3: (Violet):
Time Scale:
Figure 5.15
VOUT 20mV/div AC
PWM 5V/div DC
Load Trigger 5V/div DC
20µs/div
15 to 5A Load Step – Max. Capacitance
VOUT 20mV/div AC
PWM 5V/div DC
Load Trigger 5V/div DC
20µs/div
Figure 5.16
Ch1 (Blue):
Ch2 (Cyan):
Ch3: (Violet):
Time Scale:
VOUT 20mV/div AC
PWM 5V/div DC
Load Trigger 5V/div DC
20µs/div
Open Loop Bode Plots
40
Max Caps - Gain
30
Gain [dB]
15 to 5A Load Step – Min. Capacitance
VOUT 20mV/div AC
PWM 5V/div DC
Load Trigger 5V/div DC
20µs/div
5 to 15A Load Step – Max. Capacitance
Ch1 (Blue):
Ch2 (Cyan):
Ch3: (Violet):
Time Scale:
Figure 5.13
Min Caps - Gain
20
Max Caps - Phase
10
Min Caps - Phase
0
0
-30
-60
-90
-10
-120
-20
-150
-30
-40
-180
1
Data Sheet
October 15, 2014
Phase [degrees]
Figure 5.12
10
Frequency [kHz]
100
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.21
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
38 of 46
ZSPM1025A
True Digital PWM Controller (Single-Phase, Single-Rail)
5.2.4.
Typical Load Transient Response – Capacitor Range #4 – VOUT Range #1
Test conditions: VIN = 12.0V, VOUT = 1.20V
Minimum output capacitance: 3 x 100µF/6.3V X5R + 2 x 47µF/10V X7R + 4 x 470 µF/6.3V/7mΩ Aluminum Electrolytic Capacitor
Maximum output capacitance: 7 x 100 µF/6.3V X5R + 4 x 47µF/10V X7R + 10 x 470 µF/6.3V/7mΩ Aluminum Electrolytic Capacitor
Ch1 (Blue):
Ch2 (Cyan):
Ch3: (Violet):
Time Scale:
Ch1 (Blue):
Ch2 (Cyan):
Ch3: (Violet):
Time Scale:
Ch1 (Blue):
Ch2 (Cyan):
Ch3: (Violet):
Time Scale:
Figure 5.20
VOUT 20mV/div AC
PWM 5V/div DC
Load Trigger 5V/div DC
20µs/div
15 to 5A Load Step – Max. Capacitance
Ch1 (Blue):
Ch2 (Cyan):
Ch3: (Violet):
Time Scale:
VOUT 20mV/div AC
PWM 5V/div DC
Load Trigger 5V/div DC
20µs/div
Figure 5.21
VOUT 20mV/div AC
PWM 5V/div DC
Load Trigger 5V/div DC
20µs/div
Open Loop Bode Plots
40
Max Caps - Gain
30
Gain [dB]
15 to 5A Load Step – Min. Capacitance
VOUT 20mV/div AC
PWM 5V/div DC
Load Trigger 5V/div DC
20µs/div
5 to 15A Load Step – Max. Capacitance
Figure 5.19
Figure 5.18
Min Caps - Gain
20
Max Caps - Phase
10
Min Caps - Phase
0
0
-30
-60
-90
-10
-120
-20
-150
-30
-40
-180
1
Data Sheet
October 15, 2014
Phase [degrees]
5 to 15A Load Step – Min. Capacitance
Figure 5.17
10
Frequency [kHz]
100
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.21
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
39 of 46
ZSPM1025A
True Digital PWM Controller (Single-Phase, Single-Rail)
5.2.5.
Typical Load Transient Response – Capacitor Range #1 – VOUT Range #2
Test conditions: VIN = 12.0V, VOUT = 1.80V
Minimum output capacitance: 2 x 100µF/6.3V X5R
Maximum output capacitance: 3 x 100µF/6.3V X5R + 2 x 47µF/10V X7R
5 to 20A Load Step – Min. Capacitance
Ch1 (Blue):
Ch2 (Cyan):
Ch3: (Violet):
Time Scale:
Figure 5.24
Ch1 (Blue):
Ch2 (Cyan):
Ch3: (Violet):
Time Scale:
Figure 5.25
Ch1 (Blue):
Ch2 (Cyan):
Ch3: (Violet):
Time Scale:
Figure 5.26
VOUT 100mV/div AC
PWM 5V/div DC
Load Trigger 5V/div DC
8µs/div
20 to 5A Load Step – Max. Capacitance
VOUT 100mV/div AC
PWM 5V/div DC
Load Trigger 5V/div DC
8µs/div
VOUT 100mV/div AC
PWM 5V/div DC
Load Trigger 5V/div DC
8µs/div
Open Loop Bode Plots
40
Max Caps - Gain
30
Gain [dB]
20 to 5A Load Step – Min. Capacitance
VOUT 100mV/div AC
PWM 5V/div DC
Load Trigger 5V/div DC
8µs/div
5 to 20A Load Step – Max. Capacitance
Ch1 (Blue):
Ch2 (Cyan):
Ch3: (Violet):
Time Scale:
Figure 5.23
Min Caps - Gain
20
Max Caps - Phase
10
Min Caps - Phase
0
0
-30
-60
-90
-10
-120
-20
-150
-30
-40
-180
1
Data Sheet
October 15, 2014
Phase [degrees]
Figure 5.22
10
Frequency [kHz]
100
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.21
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
40 of 46
ZSPM1025A
True Digital PWM Controller (Single-Phase, Single-Rail)
5.2.6.
Typical Load Transient Response – Capacitor Range #2 – VOUT Range #2
Test conditions: VIN = 12.0V, VOUT = 1.80V
Minimum output capacitance: 3 x 100µF/6.3V X5R + 2 x 47µF/10V X7R
Maximum output capacitance: 7 x 100µF/6.3V X5R + 4 x 47µF/10V X7R
5 to 20A Load Step – Min. Capacitance
Ch1 (Blue):
Ch2 (Cyan):
Ch3: (Violet):
Time Scale:
Figure 5.29
Ch1 (Blue):
Ch2 (Cyan):
Ch3: (Violet):
Time Scale:
Figure 5.30
VOUT 50mV/div AC
PWM 5V/div DC
Load Trigger 5V/div DC
8µs/div
20 to 5A Load Step – Max. Capacitance
VOUT 50mV/div AC
PWM 5V/div DC
Load Trigger 5V/div DC
8µs/div
Figure 5.31
Ch1 (Blue):
Ch2 (Cyan):
Ch3: (Violet):
Time Scale:
VOUT 50mV/div AC
PWM 5V/div DC
Load Trigger 5V/div DC
8µs/div
Open Loop Bode Plots
40
Max Caps - Gain
30
20
Gain [dB]
20 to 5A Load Step – Min. Capacitance
VOUT 50mV/div AC
PWM 5V/div DC
Load Trigger 5V/div DC
8µs/div
5 to 20A Load Step – Max. Capacitance
Ch1 (Blue):
Ch2 (Cyan):
Ch3: (Violet):
Time Scale:
Figure 5.28
10
0
Min Caps - Gain
-30
Max Caps - Phase
-60
Min Caps - Phase
0
-90
-10
-120
-20
-150
-30
-40
-180
1
Data Sheet
October 15, 2014
Phase [degrees]
Figure 5.27
10
Frequency [kHz]
100
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.21
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
41 of 46
ZSPM1025A
True Digital PWM Controller (Single-Phase, Single-Rail)
5.2.7.
Typical Load Transient Response – Capacitor Range #3 – VOUT Range #2
Test conditions: VIN = 12.0V, VOUT = 1.80V
Minimum output capacitance: 1 x 100µF/6.3V X5R + 2 x 470 µF/6.3V/7mΩ Aluminum Electrolytic Capacitor
Maximum output capacitance: 6 x 100 µF/6.3V X5R + 5 x 470 µF/6.3V/7mΩ Aluminum Electrolytic Capacitor
5 to 20A Load Step – Min. Capacitance
Ch1 (Blue):
Ch2 (LCyan):
Ch3: (Violet):
Time Scale:
Ch1 (Blue):
Ch2 (LCyan):
Ch3: (Violet):
Time Scale:
20 to 5A Load Step – Min. Capacitance
Ch1 (Blue):
Ch2 (LCyan):
Ch3: (Violet):
Time Scale:
VOUT 50mV/div AC
PWM 5V/div DC
Load Trigger 5V/div DC
20µs/div
5 to 20A Load Step – Max. Capacitance
Figure 5.34
Figure 5.33
Figure 5.35
20 to 5A Load Step – Max. Capacitance
VOUT 50mV/div AC
PWM 5V/div DC
Load Trigger 5V/div DC
20µs/div
Figure 5.36
VOUT 50mV/div AC
PWM 5V/div DC
Load Trigger 5V/div DC
20µs/div
Ch1 (Blue):
Ch2 (LCyan):
Ch3: (Violet):
Time Scale:
VOUT 50mV/div AC
PWM 5V/div DC
Load Trigger 5V/div DC
20µs/div
Open Loop Bode Plots
40
0
Max Caps - Gain
30
Gain [dB]
20
10
Min Caps - Gain
-30
Max Caps - Phase
-60
Min Caps - Phase
0
-90
-10
-120
-20
-150
-30
-40
-180
1
Data Sheet
October 15, 2014
Phase [degrees]
Figure 5.32
10
Frequency [kHz]
100
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.21
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
42 of 46
ZSPM1025A
True Digital PWM Controller (Single-Phase, Single-Rail)
5.2.8.
Typical Load Transient Response – Capacitor Range #4 – VOUT Range #2
Test conditions: VIN = 12.0V, VOUT = 1.80V
Minimum output capacitance: 3 x 100µF/6.3V X5R + 2 x 47µF/10V X7R + 4 x 470 µF/6.3V/7mΩ Aluminum Electrolytic Capacitor
Maximum output capacitance: 7 x 100 µF/6.3V X5R + 4 x 47µF/10V X7R + 10 x 470 µF/6.3V/7mΩ Aluminum Electrolytic Capacitor
5 to 20A Load Step – Min. Capacitance
Ch1 (Blue):
Ch2 (LCyan):
Ch3: (Violet):
Time Scale:
Ch1 (Blue):
Ch2 (LCyan):
Ch3: (Violet):
Time Scale:
20 to 5A Load Step – Min. Capacitance
Ch1 (Blue):
Ch2 (LCyan):
Ch3: (Violet):
Time Scale:
VOUT 20mV/div AC
PWM 5V/div DC
Load Trigger 5V/div DC
20µs/div
5 to 20A Load Step – Max. Capacitance
Figure 5.39
Figure 5.38
Figure 5.40
20 to 5A Load Step – Max. Capacitance
VOUT 20mV/div AC
PWM 5V/div DC
Load Trigger 5V/div DC
20µs/div
Figure 5.41
VOUT 20mV/div AC
PWM 5V/div DC
Load Trigger 5V/div DC
20µs/div
Ch1 (Blue):
Ch2 (LCyan):
Ch3: (Violet):
Time Scale:
VOUT 20mV/div AC
PWM 5V/div DC
Load Trigger 5V/div DC
20µs/div
Open Loop Bode Plots
40
0
Max Caps - Gain
30
Gain [dB]
20
10
Min Caps - Gain
-30
Max Caps - Phase
-60
Min Caps - Phase
0
-10
-90
-120
-20
-150
-30
-40
-180
1
Data Sheet
October 15, 2014
Phase [degrees]
Figure 5.37
10
Frequency [kHz]
100
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.21
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
43 of 46
ZSPM1025A
True Digital PWM Controller (Single-Phase, Single-Rail)
6
Mechanical Specifications
Based on JEDEC MO-220. All dimensions are in millimeters.
Figure 6.1
Package Drawing
Dimensions [mm]
Min
Max
A
0.8
0.90
A1
0.00
0.05
b
0.18
0.30
e
0.5 nominal
HD
3.90
4.1
HE
3.90
4.1
L
0.35
0.45
Data Sheet
October 15, 2014
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.21
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
44 of 46
ZSPM1025A
True Digital PWM Controller (Single-Phase, Single-Rail)
7
Ordering Information
This product is sold under a limited license from PowerOne, Inc. related to digital power technology as set forth in
U.S. Patent 7000125 and other related patents owned by PowerOne, Inc. This license does not extend to standalone power supply products.
Sales Code
Description
Package
ZSPM1025AA1W 1
ZSPM1025A Lead-free QFN24 — Temperature range: -40°C to +125°C
Reel
ZSPM8025-KIT
Evaluation Kit for ZSPM1025A with PMBus™ Communication Interface — Pink Power Designer™ GUI
for kit can be downloaded from the ZMDI web site at www.zmdi.com/zspm1025a
Kit
8
Related Documents
Note: X_xy refers to the current revision of the document.
Document
File Name
ZSPM8025A Feature Sheet
ZSPM1025A_Feature_Sheet_Rev_X_xy.pdf
ZSPM8025-KIT Evaluation Kit Description
ZSPM8025_Eval_Kit_Rev_X_xy.pdf
Pink Power Designer™ Graphic User Interface (GUI)
ZSPM1025A_PPD_GUI_User_Guide_Rev_X_xy.pdf
ZSPM10x5A Application Note—Programming and Calibration
ZSPM10x5A_Calibration_Procedures_RevX_xx.pdf
Visit the ZSPM1025 product page (www.zmdi.com/zspm1025) on ZMDI’s website www.zmdi.com or contact your
nearest sales office for the latest version of these documents.
9
Glossary
Term
Description
ASIC
Application Specific Integrated Circuit
DPWM
Digital Pulse-Width Modulator
DCR
DC Resistance
DSP
Digital Signal Processing
FET
Field-Effect Transistor
FPGA
Field-Programmable Gate Array
GPIO
General Purpose Input/Output
GUI
Graphical User Interface
HKADC
Housekeeping Analog-To-Digital Converter
NVM
Non-volatile Memory
OT
Over-Temperature
OTP
One-Time Programmable Memory
Data Sheet
October 15, 2014
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.21
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
45 of 46
ZSPM1025A
True Digital PWM Controller (Single-Phase, Single-Rail)
Term
Description
OV
Over-Voltage
PEC
Packet Error Correction
PID
Proportional/Integral/Derivative
POR
Power-On-Reset
SCR
Sub-cycle Response™
SLC
State-Law Control™
SPM
Smart Power Management
10 Document Revision History
Revision
Date
Description
1.00
October 25, 2013
First release.
1.10
January 16, 2014
Addition of description of reference solution on page 2.
Revision for kit contents: GUI is now downloaded from the product web page.
Correction for the hexadecimal code for the ZSPM1025 for the MFR_MODEL
register in Table 4.6.
Update for glossary.
1.20
February 5, 2014
Correction for page 2: ZSPM1025A supports continuous retry (“hiccup”) mode.
Update for imagery for cover and headers.
1.21
October 15, 2014
Addition of information about PowerOne, Inc. license.
Update for contact information.
Sales and Further Information
www.zmdi.com
[email protected]
Zentrum Mikroelektronik
Dresden AG
Global Headquarters
Grenzstrasse 28
01109 Dresden, Germany
ZMD America, Inc.
1525 McCarthy Blvd., #212
Milpitas, CA 95035-7453
USA
Central Office:
Phone +49.351.8822.306
Fax
+49.351.8822.337
USA Phone 1.855.275.9634
Phone +1.408.883.6310
Fax
+1.408.883.6358
European Technical Support
Phone +49.351.8822.7.772
Fax
+49.351.8822.87.772
DISCLAIMER: This information applies to a product under development. Its characteristics and specifications are subject to change without notice.
Zentrum Mikroelektronik Dresden AG (ZMD AG) assumes no obligation regarding future manufacture unless otherwise agreed to in writing. The
information furnished hereby is believed to be true and accurate. However, under no circumstances shall ZMD AG be liable to any customer,
licensee, or any other third party for any special, indirect, incidental, or consequential damages of any kind or nature whatsoever arising out of or
in any way related to the furnishing, performance, or use of this technical data. ZMD AG hereby expressly disclaims any liability of ZMD AG to any
customer, licensee or any other third party, and any such customer, licensee and any other third party hereby waives any liability of ZMD AG for
any damages in connection with or arising out of the furnishing, performance or use of this technical data, whether based on contract, warranty,
tort (including negligence), strict liability, or otherwise.
European Sales (Stuttgart)
Phone +49.711.674517.55
Fax
+49.711.674517.87955
Data Sheet
October 15, 2014
Zentrum Mikroelektronik
Dresden AG, Japan Office
2nd Floor, Shinbashi Tokyu Bldg.
4-21-3, Shinbashi, Minato-ku
Tokyo, 105-0004
Japan
ZMD FAR EAST, Ltd.
3F, No. 51, Sec. 2,
Keelung Road
11052 Taipei
Taiwan
Phone +81.3.6895.7410
Fax
+81.3.6895.7301
Phone +886.2.2377.8189
Fax
+886.2.2377.8199
Zentrum Mikroelektronik
Dresden AG, Korea Office
U-space 1 Building
11th Floor, Unit JA-1102
670 Sampyeong-dong
Bundang-gu, Seongnam-si
Gyeonggi-do, 463-400
Korea
Phone +82.31.950.7679
Fax
+82.504.841.3026
© 2014 Zentrum Mikroelektronik Dresden AG — Rev. 1.21
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
46 of 46