ROHM BD35231HFN

Hi-performance Regulator IC Series for PCs
Nch FET Ultra LDOs
for Desktop PCs
BD3523HFN, BD35230HFN, BD35231HFN
No.09030EBT01
●Description
The BD3523HFN, BD35230HFN, BD35231HFN ultra low-dropout linear chipset regulator operates from a very low input
supply, and offers ideal performance in low input voltage to low output voltage applications. It incorporates a built-in
N-MOSFET power transistor to minimize the input-to-output voltage differential to the ON resistance (RON=150mΩ) level. By
lowering the dropout voltage in this way, the regulator realizes high current output (Iomax=2.0A) with reduced conversion
loss, and thereby obviates the switching regulator and its power transistor, choke coil, and rectifier diode. Thus, the
BD3523HFN, BD35230HFN, BD35231HFN designed to enable significant package profile downsizing and cost reduction. In
BD3523HFN, an external resistor allows the entire range of output voltage configurations between 0.65 and 2.7V, while the
NRCS (soft start) function enables a controlled output voltage ramp-up, which can be programmed to whatever power supply
sequence is required.
●Features
1) Internal high-precision reference voltage circuit(0.65V±1%)
2) Internal high-precision output voltage circuit <BD35230HFN/BD35231HFN>
3) Built-in VCC undervoltage lockout circuit (VCC=3.80V)
4) NRCS (soft start) function reduces the magnitude of in-rush current
5) Internal Nch MOSFET driver offers low ON resistance (100mΩ typ)
6) Built-in short circuit protection (SCP)
7) Built-in current limit circuit (2.0A min)
8) Built-in thermal shutdown (TSD) circuit
9) Variable output (0.65～2.7V) <BD3523HFN>
10) High-power package HSON8 : 2.9mm×3.0mm×0.6mm
11) Tracking function
●Applications
Notebook computers, Desktop computers, LCD-TV, DVD, Digital appliances
●Line-up
Maximum Output Voltage
Adjustable (0.65～2.7V)
1.0V (fixed)
1.2V (fixed)
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© 2009 ROHM Co., Ltd. All rights reserved.
Package
HSON8
1/20
Product name
BD3523HFN
BD35230HFN
BD35231HFN
2009.04 - Rev.B
Technical Note
BD3523HFN, BD35230HFN, BD35231HFN
●Absolute maximum ratings
Parameter
Limit
Symbol
Input Voltage 1
Input Voltage 2
BD3523HFN
BD35230HFN
Unit
VCC
+6.0 *1
V
VIN
*1
V
+6.0
*1
IO
Maximum Output Current
BD35231HFN
2
A
-0.3～+6.0
V
Enable Input Voltage
VEN
Power Dissipation 1
Pd1
0.63
*2
W
Power Dissipation 2
Pd2
1.35
*3
W
*4
W
Power Dissipation 3
Pd3
Operating Temperature Range
Topr
-10～+100
℃
Storage Temperature Range
Tstg
-55～+125
℃
Tjmax
+150
℃
Maximum Junction Temperature
1.75
*1 Should not exceed Pd.
*2 Reduced by 5.04mW/℃ for each increase in Ta≧25℃ (when mounted on a 70mm×70mm×1.6mm glass-epoxy board, 1-layer,
copper foil area : less than 0.2%)
*3 Reduced by 10.8mW/℃ for each increase in Ta≧25℃ (when mounted on a 70mm×70mm×1.6mm glass-epoxy board, 1-layer,
copper foil area : less than 7.0%)
*4 Reduced by 14.0mW/℃ for each increase in Ta≧25℃ (when mounted on a 70mm×70mm×1.6mm glass-epoxy board, 1-layer,
copper foil area : less than 65.0%)
●Operating Voltage(Ta=25℃)
Parameter
Symbol
BD3522EFV
Min.
Max.
BD35221EFV
Min.
Max.
BD35222EFV
Min.
Max.
Unit
Input Voltage 1
VCC
4.3
5.5
4.3
5.5
4.3
5.5
V
Input Voltage 2
VIN
0.95
VCC-1 *5
1.3
VCC-1 *5
1.5
VCC-1 *5
V
Output Voltage Setting Range
IO
VFB
2.7
VEN
-0.3
5.5
-0.3
5.5
-0.3
5.5
V
CNRCS
0.001
1
0.001
1
0.001
1
μF
Enable Input Voltage
NRCS Capacity
1.0 (fixed)
1.2 (fixed)
V
*5 VCC and VIN do not have to be implemented in the order listed.
*This product is not designed for use in radioactive environments.
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© 2009 ROHM Co., Ltd. All rights reserved.
2/20
2009.04 - Rev.B
Technical Note
BD3523HFN, BD35230HFN, BD35231HFN
●Electrical Characteristics
BD3523HFN (Unless otherwise specified, Ta=25℃, VCC=5V, VEN=3V, VIN=1.7V, R1=3.9kΩ, R2=3.3kΩ)
Parameter
Symbol
Limit
Min.
Typ.
Max.
Unit
Bias Current
ICC
-
0.7
1.2
mA
VCC Shutdown Mode Current
IST
-
0
10
μA
Output Voltage
IO
2.0
Condition
VEN=0V
-
-
A
Feedback Voltage 1
VFB1
0.643
0.650
0.657
V
Feedback Voltage 2
VFB2
0.637
0.650
0.663
V
Line Regulation 1
Reg.l1
-
0.1
0.5
%/V
VCC=4.3V to 5.5V
Line Regulation 2
Reg.l2
-
0.1
0.5
%/V
VIN=1.2V to 3.3V
Load Regulation
Reg.L
-
0.5
10
mV
IO=0 to 2A
Tj=-10 to 100℃
Output ON Resistance
RON
-
100
150
mΩ
IO=2A,VIN=1.2V, Tj=-10 to 100℃
Standby Discharge Current
IDEN
1
-
-
mA
VEN=0V, VO=1V
Enable Pin Input Voltage High
ENHIGH
2
-
-
V
Enable Pin Input Voltage Low
ENLOW
0
-
0.8
V
IEN
-
7
10
μA
IFB
-100
0
100
nA
NRCS Charge Current
INRCS
12
20
28
μA
NRCS Standby Voltage
VSTB
-
0
50
mV
VCCUVLO
3.5
3.8
4.1
V
VCChys
100
160
220
mV
VINUVLO
0.55
0.65
0.75
V
VOSCP
VO×0.3
VO×0.4
VO×0.5
V
TSCP
45
90
200
μsec
[ENABLE]
Enable Input Bias Current
VEN=3V
[FEEDBACK]
Feedback Pin Bias Current
[NRCS]
[UVLO]
VCC Undervoltage Lockout
Threshold Voltage
VCC Undervoltage Lockout
Hysteresis Voltage
VINUndervoltage Lockout
Threshold Voltage
[SCP]
SCP Start up Voltage
SCP Threshold Voltage
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© 2009 ROHM Co., Ltd. All rights reserved.
3/20
VEN=0V
VCC:Sweep-up
VCC:Sweep-down
VIN:Sweep-up
2009.04 - Rev.B
Technical Note
BD3523HFN, BD35230HFN, BD35231HFN
●Electrical Characteristics
BD35230HFN (Unless otherwise specified, Ta=25℃, VCC=5V, VEN=3V, VIN=1.7V)
Limit
Parameter
Symbol
Unit
Min.
Typ.
Max.
Bias Current
ICC
-
0.7
1.2
mA
VCC Shutdown Mode Current
IST
-
0
10
μA
Output Voltage
Condition
VEN=0V
IO
2.0
-
-
A
Feedback Voltage 1
VOS1
0.990
1.000
1.010
V
Feedback Voltage 2
VOS2
0.980
1.000
1.020
V
Line Regulation 1
Reg.l1
-
0.1
0.5
%/V
VCC=4.3V to 5.5V
Line Regulation 2
Reg.l2
-
0.1
0.5
%/V
VIN=1.3V to 3.3V
Load Regulation
Reg.L
-
0.5
10
mV
IO=0 to 2A
Tj=-10 to 100℃
Output ON Resistance
RON
-
100
150
mΩ
IO=2A,VIN=1.0V, Tj=-10 to 100℃
Standby Discharge Current
IDEN
1
-
-
mA
VEN=0V, VO=1V
Enable Pin Input Voltage High
ENHIGH
2
-
-
V
Enable Pin Input Voltage Low
ENLOW
0
-
0.8
V
IEN
-
7
10
μA
NRCS Charge Current
INRCS
12
20
28
μA
NRCS Standby Voltage
VSTB
-
0
50
mV
VCCUVLO
3.5
3.8
4.1
V
VCCHYS
100
160
220
mV
VINUVLO
0.60
0.70
0.80
V
VOSCP
VO×0.3
VO×0.4
VO×0.5
V
TSCP
45
90
200
μsec
[ENABLE]
Enable Input Bias Current
VEN=3V
[NRCS]
[UVLO]
VCC Undervoltage Lockout
Threshold Voltage
VCC Undervoltage Lockout
Hysteresis Voltage
VIN Undervoltage Lockout
Threshold Voltage
[SCP]
SCP Start up Voltage
SCP Threshold Voltage
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© 2009 ROHM Co., Ltd. All rights reserved.
4/20
VEN=0V
VCC:Sweep-up
VCC:Sweep-down
VIN:Sweep-up
2009.04 - Rev.B
Technical Note
BD3523HFN, BD35230HFN, BD35231HFN
●Electrical Characteristics
BD35231HFN(Unless otherwise specified, Ta=25℃, VCC=5V, VEN=3V, VIN=1.7V)
Limit
Parameter
Symbol
Unit
Min.
Typ.
Max.
Bias Current
ICC
-
0.7
1.2
mA
VCC Shutdown Mode Current
IST
-
0
10
μA
Output Voltage
Condition
VEN=0V
IO
2.0
-
-
A
Feedback Voltage 1
VOS1
1.188
1.200
1.212
V
Feedback Voltage 2
VOS2
1.176
1.200
1.224
V
Line Regulation 1
Reg.l1
-
0.1
0.5
%/V
VCC=4.3V to 5.5V
Line Regulation 2
Reg.l2
-
0.1
0.5
%/V
VIN=1.5V to 3.3V
Load Regulation
Reg.L
-
0.5
10
mV
IO=0 to 2A
Tj=-10 to 100℃
Output ON Resistance
RON
-
100
150
mΩ
IO=2A,VIN=1.2V, Tj=-10 to 100℃
Standby Discharge Current
IDEN
1
-
-
mA
VEN=0V, VO=1V
Enable PinInput Voltage High
ENHIGH
2
-
-
V
Enable PinInput Voltage Low
ENLOW
0
-
0.8
V
IEN
-
7
10
μA
NRCS Charge Current
INRCS
12
20
28
μA
NRCS Standby Voltage
VSTB
-
0
50
mV
VCCUVLO
3.5
3.8
4.1
V
VCCHYS
100
160
220
mV
VINUVLO
0.72
0.84
0.96
V
VOSCP
VO×0.3
VO×0.4
VO×0.5
V
TSCP
45
90
200
μsec
[ENABLE]
Enable Input Bias Current
VEN=3V
[NRCS]
[UVLO]
VCC Undervoltage Lockout
Threshold Voltage
VCC Undervoltage Lockout
Hysteresis Voltage
VIN Undervoltage Lockout
Threshold Voltage
[SCP]
SCP Start up Voltage
SCP Threshold Voltage
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© 2009 ROHM Co., Ltd. All rights reserved.
5/20
VEN=0V
VCC:Sweep-up
VCC:Sweep-down
VIN:Sweep-up
2009.04 - Rev.B
Technical Note
BD3523HFN, BD35230HFN, BD35231HFN
●Reference Data
BD35231HFN
Vo
50mV/div
Vo
50mV/div
66mV
Vo
50mV/div
91mV
108mV
2A
Io
2A/div
Io
2A/div
Io
2A/div
2A
T(10μsec/div)
T(10μsec/div)
Fig.1 Transient Response
(0A→2A)
Co=100μF
Cfb=1000pF
Vo
50mV/div
Io
2A/div
Io
2A/div
2A
T(10μsec/div)
Fig.2 Transient Response
(0A→2A)
Co=47μF
Cfb=1000pF
Vo
50mV/div
51mV
2A
Fig.3 Transient Response
(0A→2A)
Co=22μF
Cfb=1000pF
Vo
50mV/div
80mV
Io
2A/div
2A
T(10μsec/div)
T(10μsec/div)
2A
T(10μsec/div)
Fig.5 Transient Response
(2A→0A)
Co=47
Cfb=1000pF
Fig.4 Transient Response
(2A→0A)
Co=100μF
Cfb=1000pF
98mV
Fig.6 Transient Response
(2A→0A)
Co=22
Cfb=1000pF
VCC
Ven
Ven
VNRCS
VNRCS
Vo
Vo
Ven
VIN
Vo
T(200μsec/div)
T(200μsec/div)
Fig.7 Waveform at output start
VCC→VIN→Ven
Fig.8 Waveform at output OFF
Fig.9 Input sequence
VCC
VCC
VCC
Ven
Ven
Ven
VIN
VIN
VIN
Vo
Vo
Vo
VIN→VCC→Ven
Fig.10 Input sequence
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© 2009 ROHM Co., Ltd. All rights reserved.
Ven→VCC→VIN
Fig.11 Input sequence
6/20
VCC→Ven→VIN
Fig.12 Input sequence
2009.04 - Rev.B
Technical Note
BD3523HFN, BD35230HFN, BD35231HFN
●Reference Data
BD35231HFN
1.25
VCC
1.23
Ven
Ven
1.21
VIN
VIN
Vo
Vo
Vo [V]
VCC
1.19
1.17
1.15
VIN→Ven→VCC
Ven→VIN→VCC
-50
-25
0
25
50
75
100
125
150
Tj [℃]
Fig.14 Input sequence
Fig.13 Input sequence
0.9
2.0
0.8
1.8
0.7
1.6
Fig.15 Tj-Vo (Io=0mA)
3.0
2.5
0.6
ISTB [μA]
IIN [mA]
Icc [mA]
2.0
1.4
1.5
1.0
0.5
1.2
0.4
0.5
1.0
-50
-25
0
25
50
75
100
125
150
0.0
-50
-25
0
25
Tj [℃]
75
100
125
150
INRCS [μA]
20
15
10
5
25
50
25
75
100
125
20
10
19
9
18
8
17
7
16
6
15
14
100
125
150
4
3
12
2
11
1
0
-50
-25
0
25
50
75
100
125
150
Tj [℃]
Tj [℃]
Fig.19 Tj-IINSTB
-50
-25
0
25
50
75
100
125
150
Tj [℃]
Fig.20 Tj-NRSC
150
75
5
13
150
50
Fig.18 Tj-ICCSTB
10
0
0
0
Tj [℃]
IEN [ μA]
25
-25
-25
Fig.17 Tj-IIN
30
-50
-50
Tj [℃]
Fig.16 Tj-ICC
IINSTB [μA]
50
Fig.21 Tj-IEN
135
125
130
Vo=2.5V
RON [mΩ]
RON [mΩ]
115
110
90
Vo=1.8V
105
Vo=1.5V
Vo=1.2V
95
Vo=1.0V
70
85
50
75
-50
-25
0
25
50
75
100
125
150
Tj [℃]
Fig.22 Tj-RON
(Vcc=5V/Vo=1.2V)
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© 2009 ROHM Co., Ltd. All rights reserved.
3
4
5
6
7
8
Tj [℃]
Fig.23 Vcc- RON
7/20
2009.04 - Rev.B
Technical Note
BD3523HFN, BD35230HFN, BD35231HFN
●Block Diagram
BD3523HFN
VCC
C1
VCC
1
UVLO2
VCC
EN
Reference
Block
2
VIN
UVLOLATCH
VCC
EN
UVLO1
CL
UVLO1
VREF2
Current
Limit
VIN
4
VIN
C2
VCC
VREF1
NRCS
SCP/TSD
LATCH
NRCS0.3.
VREF1×0.4
FB
LATCH
EN
UVLO1
TSD
CL
UVLO1
UVLO2
TSD
SCP
VO
VO
5
6
EN
R2
CFB
C3
7
FB
R1
NRCS
3
CNRCS
NRCS
EN/UVLO
8
GND
BD35230HFN/BD35231HFN
VCC
C1
VCC
1
UVLO2
VCC
EN
2
Reference
Block
R2
VIN
UVLOLATCH
VCC
EN
UVLO1
CL
UVLO1
VREF2
R1
Current
Limit
4
VIN
VIN
C2
VCC
VREF1
NRCS
NRCS0.3.
VREF1×0.4
FB
TSD
SCP/TSD
LATCH
LATCH
EN
UVLO1
CL
UVLO1
UVLO2
TSD
SCP
5
EN
VO
VO
CFB
6
C3
VOS
R2
7
R1
NRCS
CNRCS
3
FB
NRCS
EN/UVLO
8
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8/20
GND
2009.04 - Rev.B
Technical Note
BD3523HFN, BD35230HFN, BD35231HFN
●Pin Layout
BD3523HFN
BD35230HFN/BD35231HFN
6
6
Vcc
1
8
GND
Vcc
EN
2
7
FB
EN
1
8
GND
2
7
FB
FIN
FIN
NRCS
3
6
Vo
NRCS
3
6
Vos
VIN
4
5
Vo
VIN
4
5
Vo
●Pin Function Table
BD3523HFN
BD35230HFN/BD35231HFN
PIN No.
1
2
PIN name
VCC
EN
3
NRCS
4
5
6
7
8
-
VIN
VO
VO
FB
GND
FIN
PIN Function
Power Supply Pin
Enable Input Pin
In-rush Current Protection (NRCS)
Capacitor Connection Pin
Input Voltage Pin
Output Voltage Pin
Output Voltage Pin
Reference Voltage Feedback Pin
Ground Pin
Connected to heatsink and GND
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9/20
PIN No.
1
2
PIN name
VCC
EN
3
NRCS
4
5
6
7
8
-
VIN
VO
VOS
FB
GND
FIN
PIN Function
Power Supply Pin
Enable Input Pin
In-rush Current Protection (NRCS)
Capacitor Connection Pin
Input Voltage Pin
Output Voltage Pin
Output Voltage Control Pin
Reference Voltage Feedback Pin
Ground Pin
Connected to heatsink and GND
2009.04 - Rev.B
Technical Note
BD3523HFN, BD35230HFN, BD35231HFN
●Operation of Each Block
・AMP
This is an error amp that compares the reference voltage (0.65V) with VO to drive the output Nch FET (Ron=150mΩ).
Frequency optimization helps to realize rapid transient response, and to support the use of ceramic capacitors on the output
capacitors. AMP input voltage ranges from GND to 2.7V, while the AMP output ranges from GND to VCC. When EN is OFF,
or when UVLO is active, output goes LOW and the output of the NchFET switches OFF.
・EN
The EN block controls the regulator’s ON/OFF state via the EN logic input pin. In the OFF position, circuit voltage is
maintained at 0μA, thus minimizing current consumption at standby. The FET is switched ON to enable discharge of the
NRCS pin VO, thereby draining the excess charge and preventing the IC on the load side from malfunctioning. Since no
electrical connection is required (e.g. between the VCC pin and the ESD prevention diode), module operation is
independent of the input sequence.
・VCCUVLO
To prevent malfunctions that can occur during a momentary decrease in VCC, the UVLO circuit switches the output OFF,
and (like the EN block) discharges NRCS and VO. Once the UVLO threshold voltage (TYP3.80V) is reached, the power-on
reset is triggered and output continues.
・VINUVLO
When VD voltage exceeds the threshold voltage, VDUVLO becomes active. Once active, the status of output voltage
remains ON even if VD voltage drops. (When VIN voltage drops, SCP engages and output switches OFF.)
Unlike EN and VCC, it is effective at output startup. VDUVLO can be restored either by reconnecting the EN pin or VCC pin.
・CURRENT LIMIT
When output is ON, the current limit function monitors the internal IC output current against the parameter value. When
current exceeds this level, the current limit module lowers the output current to protect the load IC. When the overcurrent
state is eliminated, output voltage is restored to the parameter value. However, when output voltage falls to or below the
SCP startup voltage, the SCP function becomes active and the output switches OFF.
・NRCS (Non Rush Current on Start-up)
The soft start function enabled by connecting an external capacitor between the NRCS pin and ground. Output ramp-up can
be set for any period up to the time the NRCS pin reaches VFB (0.65V). During startup, the NRCS pin serves as a 20μA
(TYP) constant current source to charge the external capacitor. Output start time is calculated via the formula below.
TNRCS (typ.) =
CNRCS×VFB
INRCS
・TSD (Thermal Shut down)
The shutdown (TSD) circuit automatically is latched OFF when the chip temperature exceeds the threshold temperature
after the programmed time period elapses, thus serving to protect the IC against “thermal runaway” and heat damage.
Because the TSD circuit is intended to shut down the IC only in the presence of extreme heat, it is crucial that the Tj (max)
parameter not be exceeded in the thermal design ,in order to avoid potential problems with the TSD.
TTSD (typ.) =
CSCP×VSCPTH
20uA
・VIN
The VIN line acts as the major current supply line, and is connected to the output NchFET drain. Since no electrical
connection (such as between the VCC pin and the ESD protection diode) is necessary, VIN operates independent of the
input sequence. However, since an output NchFET body diode exists between VIN and VO, a VIN-VO electric (diode)
connection is present. Note, therefore, that when output is switched ON or OFF, reverse current may flow to VIN from VO.
・SCP
When output voltage (Vo) drops, the IC assumes that VO pin is shorted to GND and switches the output voltage OFF. After
the GND short has been detected and the programmed delay time has elapsed, output is latched OFF. It is also effective
during output startup. SCP can be cleared either by reconnecting the EN pin or VCC pin. Delay time is calculated via the
formula below.
TSCP (typ.) =
CSCP×VSCPTH
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© 2009 ROHM Co., Ltd. All rights reserved.
ISCP
10/20
2009.04 - Rev.B
Technical Note
BD3523HFN, BD35230HFN, BD35231HFN
●Timing Chart
EN ON/OFF
VIN
VCC
EN
0.65V(typ)
NRCS
Startup
Vo
t
VCC ON/OFF
VIN
UVLO
Hysteresis
VCC
EN
0.65V(typ)
NRCS
Startup
Vo
t
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© 2009 ROHM Co., Ltd. All rights reserved.
11/20
2009.04 - Rev.B
Technical Note
BD3523HFN, BD35230HFN, BD35231HFN
●Timing Chart
VIN ON
VINUVLO
VIN
VCC
EN
NRCS
Vo
SCP OFF
VIN
VCC
EN
NRCS
Vo
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© 2009 ROHM Co., Ltd. All rights reserved.
SCP startup voltage
12/20
SCP delay time
2009.04 - Rev.B
Technical Note
BD3523HFN, BD35230HFN, BD35231HFN
●Evaluation Board
■ BD3523HFN Evaluation Board Schematic
GND_S
VCC
1
VCC
VCC
8
GND
C1
SW1
R8
GND
U1
GND
2
EN
C12
R1
FB
7
BD3523HFN
GND
3
R4
C11
C13
R2
GND
6
Vo
NRCS
Vo S
VIN_S
GND
4
VIN
C4
GND
C7
GND
C3
GND
Vo
5
C5
C2
GND
GND
GND
C8
C6
GND
GND
R3
R5
C9
7568
R6
4
TP1
GND U2
TP2
321
VCC
GND
U3
GND
GND
GND
5
2
3
C14
■ BD3523HFN Evaluation Board List
Component Rating Manufacturer
U1
C1
C3
C5
C11
1μF
10μF
22μF
0.01μF
ROHM
MURATA
KYOCERA
KYOCERA
MURATA
R7
JPF1
GND
JPF2
4
R9
Product Name
Component
Rating
Manufacturer
Product Name
BD3523XHFN
GRM188B11A105KD
CM32X5R226M10A
CM32X5R226M10A
GRM188B11H103KD
C13
R1
R2
R4
R8
1000pF
3.9kΩ
3.3kΩ
0Ω
0Ω
MURATA
ROHM
ROHM
-
GRM188B11H102KD
MCR03EZPF3301
MCR03EAPF3901
Jumper
Jumper
■ BD3523HFN Evaluation Board Layout
(2nd layer and 3rd layer are GND line.)
Silk Screen
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TOP Layer
13/20
Bottom Layer
2009.04 - Rev.B
Technical Note
BD3523HFN, BD35230HFN, BD35231HFN
●Evaluation Board
■ BD35230HFN / BD35231HFN Evaluation Board Schematic
GND_S
VCC
8
1
VCC
VCC
GND
C1
SW1
R8
2
EN
C12
GND
U1
GND
GND
GND
7
BD35230HFN/
C13
BD35231HFN
3
R4
C11
FB
6
Vos
NRCS
Vo_S
VIN_S
GND
4
VIN
C7
C4
C3
5
Vo
C5
C2
C6
C8
R3
R5
C9
GND
GND
GND
GND
GND
GND
GND
GND
GND
VCC
TP2
7568
U2
GND
GND
GND
JPF2
5
2
TP1
4
R7
321
GND
U3
R6
JPF1
GND
4
3
C14
R9
■ BD35230HFN / BD35231HFN Evaluation Board List
Component Rating
Manufacturer
Product Name
Component
Rating
Manufacturer
Product Name
U1
-
ROHM
BD3523XHFN
C13
1000pF
MURATA
GRM188B11H102KD
C1
1μF
MURATA
GRM188B11A105KD
R1
3.9kΩ
ROHM
MCR03EZPF3301
C3
10μF
KYOCERA
CM32X5R226M10A
R2
3.3kΩ
ROHM
MCR03EAPF3901
C5
22μF
KYOCERA
CM32X5R226M10A
R4
0Ω
-
Jumper
■ BD35230HFN / BD35231HFN Evaluation Board Layout
(2nd layer and 3rd layer are GND line.)
Silk Screen
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TOP Layer
14/20
Bottom Layer
2009.04 - Rev.B
Technical Note
BD3523HFN, BD35230HFN, BD35231HFN
●Recommended Circuit Example (BD3523HFN)
Vcc
1
Vcc
2
EN
6 GND
8
GND
C1
R1
FB
7
FB
R4
EN
R2
3
Vo
NRCS
6
4
Component
3.3k /3.9k
C3
22μF
C1/ C2
C4
C5
R4
1μF/22μF
0.01μF
Several kΩ
～several 10kΩ
Vo
VIN
5
C2
Recommended
Value
R1/R2
Vo
C3
C4
VIN
C5
Programming Notes and Precautions
IC output voltage can be set with a configuration formula VFB×(R1+R2)/R7 using the values
for the internal reference output voltage (VFB) and the output voltage resistors (R6, R7).
Select resistance values that will avoid the impact of the FB bias current (±100nA). The
recommended total resistance value is 10kΩ.
To assure output voltage stability, please be certain the output capacitors are connected
between Vo1, Vo2, Vo3 pin and GND. Output capacitors play a role in loop gain phase
compensation and in mitigating output fluctuation during rapid changes in load level.
Insufficient capacitance may cause oscillation, while high equivalent series reisistance (ESR)
will exacerbate output voltage fluctuation under rapid load change conditions. While a 47μF
ceramic capacitor is recomended, actual stability is highly dependent on temperature and
load conditions. Also, note that connecting different types of capacitors in series may result in
insufficient total phase compensation, thus causing oscillation. In light of this information,
please confirm operation across a variety of temperature and load conditions.
Input capacitors reduce the output impedance of the voltage supply source connected to the
input pin (VCC,). If the impedance of this power supply were to increase, input voltage (VCC)
could become unstable, leading to oscillation or lowered ripple rejection function. While a
low-ESR 1μF capacitor with minimal susceptibility to temperature is recommended, stability
is highly dependent on the input power supply characteristics and the substrate wiring
pattern. In light of this information, please confirm operation across a variety of temperature
and load conditions.
The Non Rush Current on Startup (NRCS) function is built into the IC to prevent rush current
from going through the load (VIN to VO) and impacting output capacitors at power supply
start-up. Constant current comes from the NRCS pin when EN is HIGH or the UVLO function
is deactivated. The temporary reference voltage is proportionate to time, due to the current
charge of the NRCS pin capacitor, and output voltage start-up is proportionate to this
reference voltage. Capacitors with low susceptibility to temperature are recommended, in
order to assure a stable soft-start time.
This component is employed when the C3 capacitor causes, or may cause, oscillation. It
provides more precise internal phase correction.
It is recommended that a resistance (several kΩ to several 10kΩ) be put in R4, in case
negative voltage is applied in EN pin.
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15/20
2009.04 - Rev.B
Technical Note
BD3523HFN, BD35230HFN, BD35231HFN
●Recommended Circuit Example (BD35230HFN/BD35231HFN)
Vcc
1
Vcc
2
EN
6 GND
8
GND
C1
R4
FB
7
EN
FB
C5
3
Vo
NRCS
6
C4
C3
4
VIN
Vo
Vo
VIN
5
C2
Recommended
Value
Programming Notes and Precautions
22μF
To assure output voltage stability, please be certain the output capacitors are connected
between Vo pin and GND. Output capacitors play a role in loop gain phase compensation
and in mitigating output fluctuation during rapid changes in load level. Insufficient
capacitance may cause oscillation, while high equivalent series reisistance (ESR) will
exacerbate output voltage fluctuation under rapid load change conditions. While a 22μF
ceramic capacitor is recomended, actual stability is highly dependent on temperature and
load conditions. Also, note that connecting different types of capacitors in series may result in
insufficient total phase compensation, thus causing oscillation. In light of this information,
please confirm operation across a variety of temperature and load conditions.
1μF/10μF
Input capacitors reduce the output impedance of the voltage supply source connected to the
(VCC, VIN) input pins. If the impedance of this power supply were to increase, input voltage
(VCC, VIN) could become unstable, leading to oscillation or lowered ripple rejection function.
While a low-ESR 1μF/10μF capacitor with minimal susceptibility to temperature is
recommended, stability is highly dependent on the input power supply characteristics and the
substrate wiring pattern. In light of this information, please confirm operation across a variety
of temperature and load conditions.
C4
0.01μF
The Non Rush Current on Startup (NRCS) function is built into the IC to prevent rush current
from going through the load (VIN to VO) and impacting output capacitors at power supply
start-up. Constant current comes from the NRCS pin when EN is HIGH or the UVLO function
is deactivated. The temporary reference voltage is proportionate to time, due to the current
charge of the NRCS pin capacitor, and output voltage start-up is proportionate to this
reference voltage. Capacitors with low susceptibility to temperature are recommended, in
order to assure a stable soft-start time.
C5
1000pF
This component is employed when the C16 capacitor causes, or may cause, oscillation. It
provides more precise internal phase correction.
Component
C3
C1/C2
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© 2009 ROHM Co., Ltd. All rights reserved.
16/20
2009.04 - Rev.B
Technical Note
BD3523HFN, BD35230HFN, BD35231HFN
●Input-Output Equivalent Circuit Diagram (BD3523HFN)
VCC
VCC
1kΩ
EN
VIN
1kΩ
NRCS
1kΩ 1kΩ
VIN
210kΩ
1kΩ
1kΩ
400kΩ
VIN
1kΩ
VIN
VIN
90kΩ
VIN
VCC
VCC
10kΩ
Vo
50kΩ
1kΩ
FB
Vo
1kΩ
Vo
1kΩ
Vo
Vo
Vo
●Operation Notes
1. Absolute maximum ratings
An excess in the absolute maximum ratings, such as supply voltage, temperature range of operating conditions, etc., can
break down the devices, thus making impossible to identify breaking mode, such as a short circuit or an open circuit. If any
over rated values will expect to exceed the absolute maximum ratings, consider adding circuit protection devices, such as
fuses.
2. Connecting the power supply connector backward
Connecting of the power supply in reverse polarity can damage IC. Take precautions when connecting the power supply
lines. An external direction diode can be added.
3. Power supply lines
Design PCB layout pattern to provide low impedance GND and supply lines. To obtain a low noise ground and supply line,
separate the ground section and supply lines of the digital and analog blocks. Furthermore, for all power supply terminals to
ICs, connect a capacitor between the power supply and the GND terminal. When applying electrolytic capacitors in the
circuit, not that capacitance characteristic values are reduced at low temperatures.
4. GND voltage
The potential of GND pin must be minimum potential in all operating conditions.
5. Thermal design
Use a thermal design that allows for a sufficient margin in light of the power dissipation (Pd) in actual operating conditions.
6. Inter-pin shorts and mounting errors
Use caution when positioning the IC for mounting on printed circuit boards. The IC may be damaged if there is any
connection error or if pins are shorted together.
7. Actions in strong electromagnetic field
Use caution when using the IC in the presence of a strong electromagnetic field as doing so may cause the IC to
malfunction.
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17/20
2009.04 - Rev.B
Technical Note
BD3523HFN, BD35230HFN, BD35231HFN
8. ASO
When using the IC, set the output transistor so that it does not exceed absolute maximum ratings or ASO.
9. Thermal shutdown circuit
The IC incorporates a built-in thermal shutdown circuit (TSD circuit). The thermal shutdown circuit (TSD circuit) is designed
only to shut the IC off to prevent thermal runaway. It is not designed to protect the IC or guarantee its operation. Do not
continue to use the IC after operating this circuit or use the IC in an environment where the operation of this circuit is
assumed.
BD3523HFN/BD35230HFN/BD35231HFN
TSD on temperature [°C] (typ.)
175
10. Testing on application boards
When testing the IC on an application board, connecting a capacitor to a pin with low impedance subjects the IC to stress.
Always discharge capacitors after each process or step. Always turn the IC's power supply off before connecting it to or
removing it from a jig or fixture during the inspection process. Ground the IC during assembly steps as an antistatic measure.
Use similar precaution when transporting or storing the IC.
11. Regarding input pin of the IC
This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them isolated.
P-N junctions are formed at the intersection of these P layers with the N layers of other elements, creating a parasitic diode
or transistor. For example, the relation between each potential is as follows:
When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode.
When GND > Pin B, the P-N junction operates as a parasitic transistor.
Parasitic diodes can occur inevitable in the structure of the IC. The operation of parasitic diodes can result in mutual
interference among circuits, operational faults, or physical damage. Accordingly, methods by which parasitic diodes operate,
such as applying a voltage that is lower than the GND (P substrate) voltage to an input pin, should not be used.
Resistor
Transistor (NPN)
Pin A
Pin B
C
Pin B
B
E
Pin A
N
P
+
N
P
P
+
N
Parasitic
element
N
P+
P substrate
Parasitic element
GND
B
N
P
P
C
+
N
E
Parasitic
element
P substrate
Parasitic element
GND
GND
GND
Other adjacent elements
Example of IC structure
12. Ground Wiring Pattern.
When using both small signal and large current GND patterns, it is recommended to isolate the two ground patterns, placing
a single ground point at the ground potential of application so that the pattern wiring resistance and voltage variations
caused by large currents do not cause variations in the small signal ground voltage. Be careful not to change the GND wiring
pattern of any external components, either.
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18/20
2009.04 - Rev.B
Technical Note
BD3523HFN, BD35230HFN, BD35231HFN
●Heat Loss
Thermal design should allow operation within the following conditions. Note that the temperatures listed are the allowed
temperature limits, and thermal design should allow sufficient margin from the limits.
1. Ambient temperature Ta can be no higher than 100℃.
2. Chip junction temperature (Tj) can be no higher than 150℃.
Chip junction temperature can be determined as follows:
① Calculation based on ambient temperature (Ta)
Tj=Ta+θj-a×W
＜Reference values＞
θj-a: HSON8
198.4℃/W
1-layer substrate (copper foil area : below 0.2%)
92.4℃/W
1-layer substrate (copper foil area : 7%)
71.4℃/W
2-layer substrate (copper foil area : 65%)
3
Substrate size: 70×70×1.6mm (substrate with thermal via)
It is recommended to layout the VIA for heat radiation in the GND pattern of reverse (of IC) when there is the GND pattern in
the inner layer (in using multiplayer substrate). This package is so small (size: 2.9mm×3.0mm) that it is not available to layout
the VIA in the bottom of IC. Spreading the pattern and being increased the number of VIA like the figure below enable to get
the superior heat radiation characteristic. (This figure is the image. It is recommended that the VIA size and the number is
designed suitable for the actual situation.).
Most of the heat loss that occurs in the BD3523XHFN is generated from the output Nch FET. Power loss is determined by the
total VIN-Vo voltage and output current. Be sure to confirm the system input and output voltage and the output current
conditions in relation to the heat dissipation characteristics of the VIN and Vo in the design. Bearing in mind that heat
dissipation may vary substantially depending on the substrate employed (due to the power package incorporated in the
BD3523XHFN) make certain to factor conditions such as substrate size into the thermal design.
Power consumption (W) =
Input voltage (VIN)- Output voltage (Vo) ×Io(Ave)
Example) Where VIN=1.7V, Vo=1.2V, Io(Ave) = 2A,
Power consumption (W) = 1.7(V)-1.2(V) ×2.0(A)
= 1.0(W)
●Heat Dissipation Characteristics
◎HSON8
Power Dissipation [Pd]
[W] 2.0
(3) 1.75W
(1) 1 layer substrate (substrate surface copper foil area: below 0.2%)
θj-a=198.4℃/W
(2) 2 layer substrate (substrate surface copper foil area:7%)
θj-a=92.4℃/W
(3) 2 layer substrate (substrate surface copper foil area:65%)
θj-a=71.4℃/W
1.5 (2) 1.35W
1.0
(1) 0.63W
0.5
0
0
25
50
75
100
Ambient Temperature [Ta]
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125
150
[℃]
19/20
2009.04 - Rev.B
Technical Note
BD3523HFN, BD35230HFN, BD35231HFN
●Ordering part number
B
D
3
Part No.
5
2
3
H
Part No.
3523
35230
35231
F
N
-
Package
HFN : HSON8
T
R
Packaging and forming specification
TR: Embossed tape and reel
HSON8
<Tape and Reel information>
(0.05)
(0.3)
(0.2)
1234
5678
(0.45)
(0.2) (1.8)
8 765
2.8 ± 0.1
3.0 ± 0.2
0.475
(2.2)
(0.15)
2.9±0.1
(MAX 3.1 include BURR)
4321
Tape
Embossed carrier tape
Quantity
3000pcs
Direction
of feed
+0.1
0.13 –0.05
TR
The direction is the 1pin of product is at the upper right when you hold
( reel on the left hand and you pull out the tape on the right hand
1pin
1PIN MARK
S
+0.03
0.02 –0.02
0.6MAX
)
0.1
S
0.65
0.32±0.1
0.08
Direction of feed
M
(Unit : mm)
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© 2009 ROHM Co., Ltd. All rights reserved.
Reel
20/20
∗ Order quantity needs to be multiple of the minimum quantity.
2009.04 - Rev.B
Notice
Notes
No copying or reproduction of this document, in part or in whole, is permitted without the
consent of ROHM Co.,Ltd.
The content specified herein is subject to change for improvement without notice.
The content specified herein is for the purpose of introducing ROHM's products (hereinafter
"Products"). If you wish to use any such Product, please be sure to refer to the specifications,
which can be obtained from ROHM upon request.
Examples of application circuits, circuit constants and any other information contained herein
illustrate the standard usage and operations of the Products. The peripheral conditions must
be taken into account when designing circuits for mass production.
Great care was taken in ensuring the accuracy of the information specified in this document.
However, should you incur any damage arising from any inaccuracy or misprint of such
information, ROHM shall bear no responsibility for such damage.
The technical information specified herein is intended only to show the typical functions of and
examples of application circuits for the Products. ROHM does not grant you, explicitly or
implicitly, any license to use or exercise intellectual property or other rights held by ROHM and
other parties. ROHM shall bear no responsibility whatsoever for any dispute arising from the
use of such technical information.
The Products specified in this document are intended to be used with general-use electronic
equipment or devices (such as audio visual equipment, office-automation equipment, communication devices, electronic appliances and amusement devices).
The Products specified in this document are not designed to be radiation tolerant.
While ROHM always makes efforts to enhance the quality and reliability of its Products, a
Product may fail or malfunction for a variety of reasons.
Please be sure to implement in your equipment using the Products safety measures to guard
against the possibility of physical injury, fire or any other damage caused in the event of the
failure of any Product, such as derating, redundancy, fire control and fail-safe designs. ROHM
shall bear no responsibility whatsoever for your use of any Product outside of the prescribed
scope or not in accordance with the instruction manual.
The Products are not designed or manufactured to be used with any equipment, device or
system which requires an extremely high level of reliability the failure or malfunction of which
may result in a direct threat to human life or create a risk of human injury (such as a medical
instrument, transportation equipment, aerospace machinery, nuclear-reactor controller,
fuel-controller or other safety device). ROHM shall bear no responsibility in any way for use of
any of the Products for the above special purposes. If a Product is intended to be used for any
such special purpose, please contact a ROHM sales representative before purchasing.
If you intend to export or ship overseas any Product or technology specified herein that may
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More detail product informations and catalogs are available, please contact us.
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R0039A