Introduction bus ic dc/dc converter motor driver ic ripple counter driver ic I/O ic Sensor interface ic sensor ic ip’s E 157.01 FET - driver ÿ E 910.01 Low side driver E 910.32|13 Low side driver E 910.37 LCD controller E910.89 IGBT driver ÿ Low side driver (8 channel, serial interface) E910.01 ÿ Lamps / LEDs ÿ Cascadable ÿ DC and stepper motors ÿ Output status detection ÿ TTL - compatible input levels with threshold hysteresis 1 description The IC is developed for automotive applications and can also ÿ 8 high current outputs be used in several other application areas. The IC is well suited (RON typ. 1.5 Ý / Imax=350mA) ÿ Wide output operating voltage range to drive relays, lamps, bus systems etc. with medium power consumption. 1 GND Ground 2 19 TEST Connect to ground 3 20 OUT3 Open - drain low - side driver 4 2 OUT2 Open - drain low - side driver 5 3 OUT1 Open - drain low - side driver 6 5 OUT0 Open - drain low - side driver ÿ Output open- and short - circuit detection The device provides a serial data bus for comunication with a µC ÿ Individual output short - circuit protection and 8 identical power drivers. All outputs are short circuit pro- ÿ Thermal overload protection tected. A thermal shut-off protects the device against thermal ÿ – 40°C to + 125°C operating temperature overload. Readback capability enables fault detection as well as ÿ SO20w package or QFN 5x5 20Ld package simple switch monitoring. 6 CE 8 7 SCLK 9 8 SI 10 4 GND Serial data input 11 13 GND Ground 12 9 SO Serial data output 13 10 VDD Serial data output (high impendence when CE = High) 14 11 1 20 GND TEST 2 19 NC OUT3 3 18 OUT4 OUT2 4 17 OUT5 OUT1 5 16 OUT6 OUT0 6 15 OUT7 CE 7 14 RESET SCLK 8 13 VDD SI 9 12 SO 10 11 GND GND 7 (5.5 to 25.5V) Chip enable - active low (output data is read back on the falling edge of the pulse and only after 8x n falling edges on SCLK is the output data clocked on the next rising edge) Serial data input/output clock. (Data are clocked by falling edge of the pulse.) GND So20 Serial clock input RESET Supply voltage 15 14 13 12 RESET Description OUT7 ÿ Serial structure for direct µC interfacing Pin Name QFN5x5 11 NC 16 15 12 OUT7 External reset - active low (= internal power on reset) 16 14 OUT6 Open - drain low - side driver 17 15 OUT5 Open - drain low - side driver 18 17 OUT4 Open - drain low - side driver 19 16 NC Not connected 20 18 GND Ground 10 VDD OUT4 17 9 SO GND 18 8 SI TEST 19 7 SCLK OUT3 20 6 CE 1 2 3 4 5 OUT0 Pin SO20 GND ÿ Relays GND OUT6 Driver for: ÿ Low standby current (typical < 1µA) OUT1 ÿ Supply voltage range VDD 4.5V to 5.5V package OUT5 pinning GND application OUT2 features QFN 5x5 Block diagram VBAT VDD VDD VDD 8 Reset control 8 overload M external µC OUT0 CE OUT1 SCLK SI OUT2 Interface OUT3 SO OUT4 OUT5 OUT6 OUT7 E910.01 70 Note ELMOS Semiconductor AG (below ELMOS) reserves the right to make changes to the product contained in this publication without notice. ELMOS assumes no responsibility for the use of any circuits described herein, conveys no licence under any patent or other right, and makes no representation that the circuits are free of patent infringement. While the information in this publication has been checked, no responsibility, however, is assumed for inaccuracies. ELMOS does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be expected to cause failure of a life-support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications. Copyright © 2007 ELMOS Reproduction, in part or whole, without the prior written consent of ELMOS, is prohibited. www.elmos.de | [email protected] elmos product catalog 2007/2008 71