ßßDRIVENßBY E910.63A 8-fold half bridge driver Features General Description ÿ ÿ ÿ ÿ ÿ ÿ ÿ ÿ ÿ ÿ ÿ ÿ The ELMOS IC E910.63A is an 8-fold half-bridge-driver. Two half bridge driver outputs can be used to create a full bridge driver. The load between the two outputs could be, for example, a DC motor. These 8 single power half bridges can be used to drive servomotors and single ended resistive or inductive loads referenced to ground or battery. All loads can be activated at the same time with a continuous current load of 250mA each. In case of only two active half bridges, the continuous current load is increased to 500mA each. An over temperature protection circuit is integrated into the ASIC and deactivates the half bridge outputs (high impedance) in case of thermal overload. In case of over current the low and high side driver of each single half bridge are current limited and deactivated with a 100 ms delay. This information can also be read through the diagnosis pin Supply voltage VDD 4.5V to 5.5V Serial µP data interface Cascadable Full duplex serial interface: control on input; diagnostic on output Short-circuit current protection Short-circuit current limited Thermal overload-protection (switching alloutputs to high impedance) Under-and over voltage protection Reverse battery protection (up to 16 V) Output slew rate limited ( < 200 mV/µs) –40°C to +125°C operating temperature SO28 package Applications ÿ DC-Motor driver ÿ Servo motor driver V Bat V CP 5V VDD VDD2 Charge Pump POR Driver 8 OUT1 STRIBIN DATIN Serial Interface With Latch DATOUT CLK 16 Level Shift 8 T= 100ms STRBOUT Test Mode Driver 1 OUT3 M OUT4 16 Current Observe OUT5 M M OUT6 OSC TEST OUT2 Temp. Observe OUT7 T OUT8 Band Cap Current Reference VSS RBIAS ELMOS Semiconductor AG Specification /19 QM-No.: 03SP0346E.00 E910.63A 1 Pinout 1.1 Pin Description Name Pin-No.: Type 1) Description OUT2 1 O Driver-output VSS 2 S Supply-ground DATIN 3 I Serial data-input DATOUT 4 O Serial data-out VSS 5 S Supply-ground OUT3 6 O Driver-output VDD2 7 S Battery-voltage OUT4 8 O Driver-output VSS 9 S Supply-ground VDD 10 S Logic-supply-voltage RBIAS 11 Resistor for current reference TEST 12 Test-pin for measuring the temperature protection OUT5 13 O Driver-output VDD2 14 S Battery-voltage OUT6 15 O Driver-output VSS 16 S Supply-ground STRBIN 17 I Activation of IC (High active), the data are read back at rising edge STRBOUT 18 O Cascading-signal (High active) VSS 19 S Supply-ground OUT7 20 O Driver-output VDD2 21 S Battery-voltage OUT8 22 O Driver-output VSS 23 S Supply-ground VCP 24 CLK 25 I Clock for feeding /selecting of the data, data are latched on at falling edge VSS 26 S Supply-ground OUT1 27 O Driver-output VDD2 28 S Battery-voltage Extrenal capacitor for the charge-pump 1) D= Digital, A = Analog, S = Supply, I = Input, O = Output ELMOS Semiconductor AG Specification /19 QM-No.: 03SP0346E.00 E910.63A 1.2 Package Pinout OUT2 1 28 VDD2 VSS 2 27 OUT1 DATIN 3 26 VSS DATOUT 4 25 CLK VSS 5 24 VCP OUT3 6 23 VSS VDD2 7 22 OUT8 OUT4 8 21 VDD2 VSS 9 20 OUT7 VDD 10 19 VSS RBIAS 11 18 STRBOUT TEST 12 17 STRBIN OUT5 13 16 VSS VDD2 14 15 OUT6 Figure 1: Pinout QFN package on demand ELMOS Semiconductor AG Specification /19 QM-No.: 03SP0346E.00 E910.63A 2 Operating Conditions 2.1 Absolute Maximum Ratings (non-operating) Operating the device beyond these limits may cause its permanent damage. Condition Symbol Min. Max. Unit Battery voltage (1 t < 0.5s VDD2 - 45 V Battery voltage (1 static VDD2 - 28 V Logic supply voltage (1 VDD - 7 V Output current OUT 1....8 (1 I OUT DC -1.5 1.5 A V OX –0.3 VDD+0.3 V V IX -0.3 VDD+0.3 V I IXDC -10 +10 mA I OXDC -10 +10 mA Junction temperature TJ - +150 ºC Operating temperature T OP -40 +125 ºC Storage temperature T STG -55 +150 ºC Output voltage (DATAOUT, STRBOUT) (1 Input voltage (1 (DATIN, CLK, STRBIN) (at VIX < -0.3V or VIX > VDD+0.3V) Input voltage (1 (DATIN, CLK, STRBIN) Output current (1 (DATAOUT, STRBOUT) (1 measured only during characterization 2.2 Recommended Operating Conditions 2.2.1 Conditions which apply to all data (if not specified separately) (1 Parameter Condition Symbol Min. Typ. Max. Unit Power supply voltage VDD 4.5 5 5.5 V Battery voltage (2 VDD2 7.5 12 17 V Environmental temperature Tamb -40 +25 +85 ºC Bias resistance RBias - 120 - kΩ (1 measured only during characterization (2 Over-voltage shut off of outputs between 17V and 26V ELMOS Semiconductor AG Specification /19 QM-No.: 03SP0346E.00 E910.63A 3 Detailed Electrical Specification 3.1 Block Diagram # #0 6$$ 6$$ Charge Pump POR $RIVER STRIBIN DATIN Serial Interface With Latch DATOUT CLK OUT1 Level Shift OUT2 OUT3 T= 100ms STRBOUT Test Mode $RIVER OUT4 Current Observe OUT5 OUT6 OUT7 OSC OUT8 TEST T Temp. Observe Band Cap Current Reference 633 2 ")!3 Figure 2: Block diagram 3.2 Identification values 3.2.1 DC-Parameter Parameter Condition Symbol Min. Typ. Max. Unit Power supply current at VDD Operating IVDD - 50 200 µA Power supply current at VDD2 Operating IVDD2 - 200 500 µA Power supply current at VDD2 Stand By (VDD=0) IVDD2 - - 100 µA POR 3.4 3.9 4.4 V Power on reset threshold Thermal protection active TJ > THS (2 (3 THSoff +145 +155 +165 °C Thermal protection inactive TJ > THS (2 (3 THSon +120 +145 +160 °C (3 THShys +5 +10 +25 °C Thermal hysteresis (2 As long as the temperature THS is exceeded, all outputs are high impedance. The Latch-content remains unchanged. (3 No production test, guaranteed by design ELMOS Semiconductor AG Specification /19 QM-No.: 03SP0346E.00 E910.63A 3.2.2 Specification of the inputs Parameter Condition Symbol Min. Typ. Max. Unit VIL - - 0.8 V VIH 2.0 - - V IIN -1 - 1 µA Condition Symbol Min. Typ. Max. Unit IOUT = 5mA VOL - - 0.5 V IOUT = -2mA VOH 4.0 - - V Input-voltage low Pin 3 DATIN Input-voltage high Pin 17 STRBIN Input-current Pin 25 CLK 0V ≤ VIN ≤ VDD 3.2.3 Specification of the outputs Parameter Output-voltage low Pin 4 DATOUT Output-voltage high Pin 18 STRBOUT ELMOS Semiconductor AG Specification /19 QM-No.: 03SP0346E.00 E910.63A 3.2.4 Specification of the outputs OUT 1 ... 8 Parameter Condition Symbol Min. Typ. Max. Unit Output-short circuit-current limit TSC ≤ 100ms ISCL 0.6 1 1.5 A VOFF 17 20 23 V VOFF_Hys - 1 - V Over-voltage active Over-voltage hysteresis Output impedance 7.5V ≤ VDD2 ≤ 10V(6 ROUT, high - 0.9 1.6 Ý Output impedance VDD2 > 10V ROUT, high - 0.8 1.5 Ý Output impedance VDD2 ≥ 7.5V ROUT, low - 0.8 1.5 Ý (4 VRev - - 16 V Drive active IRev -250 - 250 mA Transient reverse-current t < 1ms IRev -1.5 - 1.5 A Inductive turn-off-energy during over-current, over-temperature, under-voltage on VDD or over-voltage on VDD2 Only one driveroutput, single impulse, ∑ 8 driver-outputs Single impulse periodical drive, 1s cooling phase,∑ 100 mWs 300 mWs 50 mWs Output reverse-voltage Static reverse-current Wind Output slew rate Current limit delay IOUT > ISCL (1 dVOUT/dt 80 130 200 mV/µs TSC 896 68 100 1024 146 TOSC ms 1) If the output current exceeds the upper current limit threshold ISCL, an internal timer starts and activates the currentlimitation. The corresponding Bit is set and remains set until the output is reset by software and then activated again. 4) VDD2 has to be able to follow VREV unloaded 6) Maximum current limit due to High-Side-Drive-limitations is 8 x 245 mA at 7.5 V £ VDD2 £ 10 V 3.2.5 Specification of the electricity-reference Parameter Bias-resistance Condition Symbol Min. Typ. Max. Unit RBias 100 120 220 kÝ Reference-current in dependence of RBias : IBias ~128kÝ/(RBias + 8kÝ) (5 5) Oscillator frequency, current limitation and slew rate of the output drivers are proportional to the reference current ELMOS Semiconductor AG Specification /19 QM-No.: 03SP0346E.00 E910.63A 3.2.6 Specification of the timing Parameter Condition Internal Oscillator frequency Symbol Min. Typ. Max. Unit fOSC=1/TOSC 7 10 13 kHz The following parameters are guaranteed by design ( not tested during production) Parameter Condition Symbol Min. Typ. Max. Unit Interface-clock-frequency fSCLK 0 - 2 MHz Strobe Setup Time tSTS 100 ns Receive Data Setup Time tRDS 100 ns Receive Data Hold Time tRDH 200 ns Transmit Data Delay Time tTDD 200 ns Transmit Data Hold Time tTDH 200 ns Strobe High Delay Time tSHD 150 ns Strobe LOW Delay Time tSLD 200 ns Timing Diagramm at 4.3 4 Functional description 4.1 Detailed functional description 4.1.1 General description The IC E910.63A controls eight driver outputs, which can alternatively be used to drive loads to VDD2 or VSS. A full bridge driver can be implemented by using two half bridge drivers ( for example DC-motors can be controlled in both directions). The outputs are designed for an operating current of 250* mA when all drivers are active. If only two drivers are active, the operating current is increased to 500 mA. An internal temperature sense circuit switches the outputs to high impedance when exceeding the temperature limit. The over temperature disabling of the outputs is recognizable in the diagnosis data, which shows all driver outputs are in overload. After cooling phase of the IC, the malfunction has to be cleared by first turning off the outputs before reactivating. Every driver transistor that has a separate current limit with a 100 ms delay over-current shut off. After disabling the corresponding output, -the output can only be reactivated after turning it off. * Also see page 7, remark 6 ELMOS Semiconductor AG Specification /19 QM-No.: 03SP0346E.00 E910.63A Data transmission protocol: Protocol with parallel inputs and Daisy chain (Fig.3) The complete chain (Daisy Chain) of n motor-drivers is clocked in parallel by CLK. With STRBIN high only the first driver is addressed. On the rising edge of STRBIN the diagnosis-data latches into the shift-register. On every falling edge of CLK, new input data are shifted into DATIN and on every rising edge of CLK diagnostic data are shifted to DATOUT. The ninth rising CLK edge latches the new data from the internal serial shift register. The ninth falling edge produces a high level on STRBOUT. This disables the shift register of the first driver and activates the serial shift register of the next driver. The data transfer can be interrupted by a low on STRBIN of the first driver. In a non Daisy chained application, the processor puts a low signal on STRBIN, when the data has to be latched. In a Daisy chained application the processor produces a ninth falling Clock-edge and leaves the output STRBOUT high. After power-on-reset the individual driver outputs Out1-Out8 are in Tri-state. If the outputs are pulled High before the first command, the drivers are only able to get into the high-state by programming a “1” (output => High). Afterwards, “0” (output => Low) must be programmed to the corresponding driver in order to return to “0”. This condition can also be erased by a reset of the VDD-supply. E910.63 SCLK SI SO STRBIN STRBOUT Reset CE SCLK DATOUT Reset CE DATOUT SO STRBOUT DATIN SI E910.63 STRBIN CLK SCLK DATOUT DATIN STRBOUT Reset CE OUT(1:8) DATIN E910.63 STRBIN CLK STRBIN OUT(1:8) CLK OUT(1:8) SI SO CLK DATIN DATOUT Figure 3: Daisy-Chain There are two test modes to accelerate testing. By applying a 5V-Level to pin ‚test‘, the temperature threshold range changes between 25° and 85° degrees Celsius (typically 55° degrees Celsius). Under these conditions the over temperature protection circuit can be tested at low temperatures . By applying 10mA into pin “DATIN’ (Voltage on this pin is approximately 7.5V), the output of the internal oscillator is multiplexed to output ‘STRBOUT’. At the same time the internal timing functions can be stimulated through input pin ‘CLK’. ELMOS Semiconductor AG Specification /19 QM-No.: 03SP0346E.00 E910.63A 4.1.2 Protection functions Power-On-Reset: After applying supply voltage all data latches are reset and all driver outputs are high impedance. The outputs remain in the high impedance state until the first data transmission with supply voltage held above the POR threshold is completed. Under voltage detection: If VDD is below a value of typically 3.9 V, all driver outputs will be reset to high impedance. Short circuit protection: If the load-current exceeds the short circuit threshold at any output, the current-limitation will be activated. The output will be turned off typically after 100ms and the corresponding diagnostic bit will be set. Over temperature Protection: If the chip temperature exceeds 155°C, all driver outputs will be turned off. The diagnostic bits are set and all outputs must be turned off before they can be reactivated. If the temperature drops below typically 145° C, the outputs can be activated again. Over-voltage Protection: If VDD exceeds a value of typically 20V, all driver outputs will be reset to high impedance. The output control information remains unchanged so that after VDD drops below a typical value of 19 V, the IC returns into the same state as before the over voltage shut down. 4.1.3 Protocol of the serial interface The data format of the control information is fixed as follows: ÿ Bit 0 ... Bit 7 Steering of the driver outputs OUT 1 ... OUT 8 ÿ A logical “0” activates the Low-Side driver; a “1” activates the High-Side driver The data format of the diagnosis information has a following construction: ÿ Bit of 0 ... bit 7 Overload-disabling of the driver outputs OUT 1 ... OUT 8, active high The data transfer order is: the first falling edge Bit 7 and eighth falling edge Bit 0. ELMOS Semiconductor AG Specification 10 /19 QM-No.: 03SP0346E.00 E910.63A 4.2 Application circuit V Bat V CP 5V VDD VDD2 Charge Pump POR Driver 8 OUT1 STRIBIN DATIN Serial Interface With Latch DATOUT CLK 16 T= 100ms STRBOUT OUT2 OUT3 Level Shift 8 Test Mode Driver 1 M OUT4 16 Current Observe OUT5 M M OUT6 OSC TEST OUT7 T Temp. Observe OUT8 Band Cap Current Reference VSS RBIAS Figure 4: Application circuit 4.3 Timing-Diagram S TR B IN 1 9 CLK D ATIN D7 D ATO U T oD 7 oD 6 oD 5 O U Tx D6 D5 D4 D3 D2 D1 D0 oD 4 oD 3 oD 2 oD 1 oD 0 D 15 D 14 D 13 D 12 D 11 D 10 D9 D8 zzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzzz O ld D a ta O U Tx N e w D a ta O U Tx S TR B O U T Figure 5: Data format of the serial interface ELMOS Semiconductor AG Specification 11 /19 QM-No.: 03SP0346E.00 E910.63A STRBIN t STS CLK t RDS t RDH DATIN t TDD t TDH DATOUT t SHD t SLD STRBOUT Figure 6: Interface-Timing 4.4 Noise immunity 4.4.1 Latch-Up-Stability ÿ ÿ All Pins Pin 1, 6, 8, 13, 15, 20, 22, 27 (Out 1 ... Out 8) min. - 25 mA/ max. 25 mA min. - 1.5 A/ max. 1.5 A The IC E910.63A fulfils in the application the following requests of the data-sheet in accordance with DIN 40 839 part 1. Parameter Condition Test pulse 1 t1 = 5s / US = -100V 100 pulses Test pulse 2 t1 = 0.5s / US = 100V 1000 pulses Test pulse 3a/b regarding DIN 40 839 part 3 US = -150V / US = 100V 1000 Bursts Test pulse 4 US = -6V Ua = -5V t8 = 5s 10 pulses Test pulse 5 Ri = 2_tD = 250ms tr = 0.1ms UP+US = 40V 10 pulses at 1 minute intervals Values apply to the conditions for supply and data lines, according to the specified outer allocation and to the transient-stability defined conditions. ELMOS Semiconductor AG Specification 12/19 QM-No.: 03SP0346E.00 E910.63A 4.5 ESD Protection Circuit ESD robustness by design is minimum 2kV. Pins with lower ESD robustness are listed below. VDD VDD2 Input Output VSS VSS Figure 7: ESD Protection Circuit 4.5.1 Test Method The ESD Protection Circuits are verified in accordance with the MIL-STD-883C method 3015 (Human Body Model) under the following conditions: ÿ ÿ REXT = 1500 Ohm CEXT = 100 pF 5 Package 5.1 Marking 5.1.1 Top Side Elmos (Logo) E91063A XXX # YWW * @ where E/ M/ T Volume Production/ Prototype/ Test Circuit 91063 Elmos Project Number A Version XXX Lot Number # Assembler Code YWW Year and week of Fabrication * Mask Revision Number @ Elmos Internal Marking ELMOS Semiconductor AG Specification 13/19 QM-No.: 03SP0346E.00 E910.63A 5.1.2 Botton Side No marking 5.2 Package Dimensions SO14 ELMOS packages meet the requirements of the latest JEDEC outline specification. All JEDEC outline specifications can be free downloaded from http://www.jedec.org or please contact your local ELMOS-Key-Account-Manager. 6 Storage, Handling and Packing 6.1 Storage The conditions of storing the described material, which were mentioned in the section 2.1, may not rice above or fall under the absolute „limiting values“. 6.2 Handling The components are ESD (Electro Static Discharge)-sensitive and may only be processed in ESD protected workplaces. 6.3 Packing The material is packed on belt for the dispatch – according to the ELMOS-Specification 02SP002 –. ELMOS Semiconductor AG Specification 14/19 QM-No.: 03SP0346E.00 E910.63A 7 Record of Revisions Chapter Rev. - 1 Change and Reason for Change Initial Revision ELMOS Semiconductor AG Specification 15 /19 Date Released 12.06.2007 RSA/ZOE QM-No.: 03SP0346E.00 E910.63A Contents 1 Pinout......................................................................................................................................................................................................... �� 2 1.1 Pin Description...................................................................................................................................................................................... �� 2 1.2 Package Pinout.................................................................................................................................................................................... �� 3 2 Operating Conditions........................................................................................................................................................................... �� 4 2.1 Absolute Maximum Ratings (non-operating)........................................................................................................................... �� 4 2.2 Recommended Operating Conditions......................................................................................................................................... �� 4 2.2.1 Conditions which apply to all data (if not specified separately) (1................................................................................... �� 4 3 Detailed Electrical Specification....................................................................................................................................................... �� 5 3.1 Block Diagram...................................................................................................................................................................................... �� 5 3.2 Identification values.......................................................................................................................................................................... �� 5 3.2.1 DC-Parameter.................................................................................................................................................................................... �� 5 3.2.2 Specification of the inputs........................................................................................................................................................... ��6 3.2.3 Specification of the outputs........................................................................................................................................................ ��6 3.2.4 Specification of the outputs OUT 1 ... 8................................................................................................................................... ���7 3.2.5 Specification of the electricity-reference................................................................................................................................ ���7 3.2.6 Specification of the timing.......................................................................................................................................................... �� 8 4 Functional description......................................................................................................................................................................... �� 8 4.1 Detailed functional description .................................................................................................................................................... �� 8 4.1.1 General description ........................................................................................................................................................................ �� 8 4.1.2 Protection functions....................................................................................................................................................................... 10 4.1.3 Protocol of the serial interface.................................................................................................................................................... 10 4.2 Application circuit.............................................................................................................................................................................. ��11 4.3 Timing-Diagram................................................................................................................................................................................. ��11 4.4 Noise immunity.................................................................................................................................................................................. �12 4.4.1 Latch-Up-Stability........................................................................................................................................................................... �12 4.5 ESD Protection Circuit....................................................................................................................................................................... � 13 4.5.1 Test Method...................................................................................................................................................................................... � 13 5 Package..................................................................................................................................................................................................... � 13 5.1 Marking.................................................................................................................................................................................................. � 13 5.1.1 Top Side................................................................................................................................................................................................ � 13 5.1.2 Botton Side........................................................................................................................................................................................ �14 5.2 Package Dimensions SO14............................................................................................................................................................... �14 6 Storage, Handling and Packing......................................................................................................................................................... �14 6.1 Storage................................................................................................................................................................................................... �14 6.2 Handling............................................................................................................................................................................................... �14 6.3 Packing.................................................................................................................................................................................................. �14 7 Record of Revisions................................................................................................................................................................................ �15 ELMOS Semiconductor AG Specification 16 /19 QM-No.: 03SP0346E.00 E910.63A List of Figures Figure 1: Pinout........................................................................................................................................................................................... �� 3 Figure 2: Block diagram........................................................................................................................................................................... �� 5 Figure 3: Daisy-Chain............................................................................................................................................................................... ��9 Figure 4: Application circuit................................................................................................................................................................... ��11 Figure 5: Data format of the serial interface.................................................................................................................................... ��11 Figure 6: Interface-Timing..................................................................................................................................................................... �12 Figure 7: ESD Protection Circuit............................................................................................................................................................ � 13 ELMOS Semiconductor AG Specification 17/19 QM-No.: 03SP0346E.00 E910.63A WARNING – Life Support Applications Policy ELMOS Semiconductor AG is continually working to improve the quality and reliability of its products. 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Copyright © 2007 ELMOS Semiconductor AG Reproduction, in part or whole, without the prior written consent of ELMOS Semiconductor AG, is prohibited. ELMOS Semiconductor AG Application Note 18 /19 QM-No.: 03SP0346E.00 ELMOS Semiconductor AG – Headquarters Heinrich-Hertz-Str. 1 | 44227 Dortmund | Germany Phone + 49 (0) 231 - 75 49 - 0 | Fax + 49 (0) 231 - 75 49 - 149 [email protected] | www.elmos.de 19/19