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TMP112
SBOS473D – MARCH 2009 – REVISED APRIL 2015
TMP112 High-Accuracy, Low-Power, Digital Temperature Sensor With SMBus™ and TwoWire Serial Interface in SOT563
1 Features
3 Description
•
The TMP112 device is a digital temperature sensor
ideal for NTC/PTC thermistor replacement where high
accuracy is required. The device offers an accuracy
of ±0.5°C without requiring calibration or external
component signal conditioning. IC temperature
sensors are highly linear and do not require complex
calculations or lookup tables to derive the
temperature. The calibrating for improved accuracy
feature allows users to calibrate for an accuracy as
good as ±0.17°C (see the Calibrating for Improved
Accuracy section). The on-chip 12-bit ADC offers
resolutions down to 0.0625°C.
1
•
•
•
•
•
SOT563 Package (1.6 mm × 1.6 mm) is 68%
smaller footprint than SOT23
Accuracy Without Calibration:
– 0.5°C (max) from 0°C to +65°C
– 1.0°C (max) from –40°C to +125°C
Low Quiescent Current:
– 10μA Active (max), 1μA Shutdown (max)
Supply Range: 1.4V to 3.6V
Resolution: 12 Bits
Digital Output: SMBus™, Two-Wire and I2C
Interface Compatibility
2 Applications
•
•
•
•
•
•
•
•
•
Portable and Battery-Powered Applications
Power-Supply Temperature Monitoring
Computer Peripheral Thermal Protection
Notebook Computers
Battery Management
Office Machines
Thermostat Controls
Electromechanical Device Temperatures
General Temperature Measurements:
– Industrial Controls
– Test Equipment
– Medical Instrumentation
The 1.6-mm × 1.6-mm SOT563 package is 68%
smaller footprint than an SOT23 package. The
TMP112 device features SMBus™, two-wire and I2C
interface compatibility, and allows up to four devices
on one bus. The device also features an SMBus alert
function. The device is specified to operate over
supply voltages from 1.4 to 3.6 V with the maximum
quiescent current of 10 µA over the full operating
range.
The TMP112 is ideal for extended temperature
measurement
in
communication,
computer,
consumer,
environmental,
industrial,
and
instrumentation applications. It is specified for
operation over a temperature range of –40°C to
+125°C.
Device Information(1)
PART NUMBER
TMP112
PACKAGE
BODY SIZE (NOM)
SOT563 (6)
1.60 mm x 1.20 mm
(1) For all available packages, see the orderable addendum at
the end of the datasheet.
Simplified Schematic
Block Diagram
Supply Voltage
1.4 V to 3.6 V
Temperature
Supply Bypass
Capacitor
0.01 µF
Pullup Resistors
SCL
1
Diode
Temp.
Sensor
Control
Logic
6
DS
A/D
Converter
Serial
Interface
5
OSC
Config.
and Temp.
Register
SDA
5 k
GND
2
TMP112
Two-Wire
Host Controller
1
2
3
SCL
SDA
GND
V+
ALERT
5
4
ADD0
V+
6
ALERT
3
4
ADD0
TMP112
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TMP112
SBOS473D – MARCH 2009 – REVISED APRIL 2015
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Table of Contents
1
2
3
4
5
6
7
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
4
6.1
6.2
6.3
6.4
6.5
6.6
6.7
4
4
4
4
5
6
7
Absolute Maximum Ratings .....................................
Handling Ratings ......................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics...........................................
Timing Requirements ................................................
Typical Characteristics ..............................................
Detailed Description .............................................. 9
7.1 Overview ................................................................... 9
7.2 Functional Block Diagram ......................................... 9
7.3 Feature Description................................................. 10
7.4 Device Functional Modes........................................ 17
7.5 Programming .......................................................... 18
8
Application and Implementation ........................ 22
8.1 Application Information............................................ 22
8.2 Typical Application ................................................. 25
9 Power Supply Recommendations...................... 26
10 Layout................................................................... 27
10.1 Layout Guidelines ................................................. 27
10.2 Layout Example .................................................... 27
11 Device and Documentation Support ................. 28
11.1
11.2
11.3
11.4
Documentation Support .......................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
28
28
28
28
12 Mechanical, Packaging, and Orderable
Information ........................................................... 28
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision C (October 2014) to Revision D
Page
•
Changed MIN, TYP, and MAX values for the Temperature Accuracy (temperature error) parameter .................................. 5
•
Changed the frequency from 2.85 to 3.4 MHz in the POWER SUPPLY section of the Electrical Characteristics table ...... 5
•
Changed the Temperature Error at 25°C graph in the Typical Characteristics section ......................................................... 7
•
Changed the Temperature Error vs Temperature graph in the Typical Characteristics section ............................................ 7
Changes from Revision B (June 2009) to Revision C
Page
•
Added Handling Rating table, Feature Description section, Device Functional Modes, Application and
Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation
Support section, and Mechanical, Packaging, and Orderable Information section ............................................................... 4
•
Changed parameters in Timing Requirements ...................................................................................................................... 6
Changes from Revision A (March 2009) to Revision B
Page
•
Changed footnote 1 of Table 14 .......................................................................................................................................... 22
•
Clarified Example 1; extended worst-case accuracy to be from –15°C to +50°C................................................................ 22
2
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5 Pin Configuration and Functions
DRL PACKAGE
SOT563
(TOP VIEW)
1
GND
2
ALERT
3
OBS
SCL
6
SDA
5
V+
4
ADD0
Pin Functions
PIN
NO.
NAME
I/O
DESCRIPTION
1
SCL
I
2
GND
—
Serial clock. Open-drain output; requires a pullup resistor.
Ground
3
ALERT
O
Overtemperature alert. Open-drain output; requires a pullup resistor.
4
ADD0
I
Address select. Connect to GND or V+
5
V+
I
Supply voltage, 1.4 to 3.6 V
6
SDA
I/O
Serial data. Open-drain output; requires a pullup resistor.
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6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
MIN
MAX
UNIT
5
V
–0.5
5
V
–0.5
(V+) + 0.5
V
Output voltage
–0.5
5
V
Operating temperature
–55
150
°C
150
°C
Supply voltage
V+
Input voltage
SCL, ADD0, and SDA
Input voltage
ALERT
Junction temperature, TJ
(1)
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
6.2 Handling Ratings
Tstg
V(ESD)
(1)
(2)
MIN
MAX
UNIT
–60
+150
°C
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all
pins (1)
-2000
2000
Charged device model (CDM), per JEDEC specification
JESD22-C101, all pins (2)
-1000
1000
Machine Model (MM)
-200
200
Storage temperature range
Electrostatic discharge
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
NOM
3.3
V+
Supply Voltage
1.4
TA
Operating free-air temperature
–40
MAX
UNIT
3.6
V
125
°C
6.4 Thermal Information
TMP112
THERMAL METRIC (1)
DRL
UNIT
6 PINS
RθJA
Junction-to-ambient thermal resistance
200
RθJC(top)
Junction-to-case (top) thermal resistance
73.7
RθJB
Junction-to-board thermal resistance
34.4
ψJT
Junction-to-top characterization parameter
3.1
ψJB
Junction-to-board characterization parameter
34.2
RθJC(bot)
Junction-to-case (bottom) thermal resistance
N/A
(1)
4
°C/W
For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
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6.5 Electrical Characteristics
At TA = +25°C and VS = +1.4V to +3.6V, unless otherwise noted.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
TEMPERATURE INPUT
Range
–40
Accuracy (Temperature Error)
+25°C, V+ = 3.3V
0°C to +65°C, V+ = 3.3V
vs Supply
Long-Term Stability
+125
°C
±0.1
±0.5
°C
±0.25
±0.5
°C
–40°C to +125°C
±0.5
±1.0
°C
–40°C to +125°C
0.0625
±0.25
°C/V
3000 Hours
<1
Resolution (LSB)
LSB
0.0625
°C
DIGITAL INPUT/OUTPUT
Input capacitance
3
pF
Input Logic Levels:
VIH
0.7 (V+)
3.6
VIL
–0.5
0.3 (V+)
V
1
μA
Input Current
IIN
0 < VIN < 3.6V
V
Output Logic Levels:
VOL SDA
VOL ALERT
V+ > 2V, IOL = 3mA
0
0.4
V
V+ < 2V, IOL = 3mA
0
0.2 (V+)
V
V+ > 2V, IOL = 3mA
0
0.4
V
V+ < 2V, IOL = 3mA
0
0.2 (V+)
Resolution
V
12
Conversion Time
26
Conversion Modes
Bits
35
ms
CR1 = 0, CR0 = 0
0.25
Conv/s
CR1 = 0, CR0 = 1
1
Conv/s
CR1 = 1, CR0 = 0 (default)
4
Conv/s
CR1 = 1, CR0 = 1
8
Timeout Time
30
Conv/s
40
ms
POWER SUPPLY
Operating Supply Range
Average Quiescent
Current
+1.4
IQ
Serial Bus Inactive, CR1 = 1, CR0 = 0 (default)
7
Serial Bus Active, SCL Frequency = 400kHz
Shutdown Current
ISD
+3.6
V
10
μA
μA
15
μA
Serial Bus Active, SCL Frequency = 3.4MHz
85
Serial Bus Inactive
0.5
Serial Bus Active, SCL Frequency = 400kHz
10
μA
Serial Bus Active, SCL Frequency = 3.4MHz
80
μA
1
μA
TEMPERATURE RANGE
Specified Range
–40
+125
°C
Operating Range
–55
+150
°C
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6.6 Timing Requirements
See the Two-Wire Timing Diagrams section for timing diagrams.
FAST MODE
MIN
MAX
MIN
MAX
0.001
0.4
0.001
2.85
UNIT
ƒ(SCL)
SCL operating frequency
t(BUF)
Bus-free time between STOP and START
condition
600
160
ns
t(HDSTA)
Hold time after repeated START condition.
After this period, the first clock is generated.
600
160
ns
t(SUSTA)
repeated start condition setup time
600
160
ns
t(SUSTO)
STOP Condition Setup Time
600
t(HDDAT)
Data hold time
100
t(SUDAT)
Data setup time
100
25
ns
t(LOW)
SCL-clock low period
V+ , see Figure 10
1300
210
ns
t(HIGH)
SCL-clock high period
See Figure 10
600
60
tFD
Data fall time
See Figure 10
tRD
Data rise time
tFC
Clock fall time
See Figure 10
300
40
ns
tRC
Clock rise time
See Figure 10
300
40
ns
6
V+
HIGH-SPEED
MODE
See Figure 10
300
See Figure 10
25
ns
105
ns
ns
80
300
SCLK ≤ 100 kHz, See Figure 10
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160
900
MHz
ns
ns
1000
ns
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6.7 Typical Characteristics
At TA = +25°C and V+ = 3.3V, unless otherwise noted.
30
25
Population
Population
20
15
10
-0.250
-0.225
-0.200
-0.175
-0.150
-0.125
-0.100
-0.075
-0.050
-0.025
0
0.025
0.050
0.075
0.100
0.125
0.150
0.175
0.200
0.225
0.250
0.3
0.35
0.2
0.25
0.1
0.15
0
0.05
-0.1
-0.05
-0.2
-0.15
-0.3
-0.25
0
-0.35
5
D001
Accuracy vs Supply (°C/V)
Temperature Error (qC)
Figure 2. Accuracy vs Supply
20
0.8
18
0.6
16
0.4
14
0.2
IQ (µA)
Temperature Error (qC)
Figure 1. Temperature Error at 25°C
1
0
10
3.6V Supply
8
-0.2
6
-0.4
4
-0.6
Mean
Mean + 3 V
Mean 3 V
-0.8
-1
-60
1.4V Supply
2
0
-60
-40
-20
0
20
40
60
80
Temperature (qC)
100
120
0
D002
80
7
70
6
60
IQ (µA)
90
8
100 120 140 160
+125°C
30
1.4V Supply
80
50
40
3
60
Figure 4. Average Quiescent Current vs Temperature
100
4
40
Four Conversions
per Second
9
3.6V Supply
20
Temperature (°C)
10
5
-40 -20
140
Figure 3. Temperature Error vs Temperature
ISD (µA)
12
2
20
1
10
+25°C
-55°C
0
0
-60
-40 -20
0
20
40
60
80
100 120 140 160
1k
10k
100k
1M
10M
Temperature (°C)
Bus Frequency (Hz)
Figure 5. Shutdown Current vs Temperature
Figure 6. Quiescent Current vs Bus Frequency
(Temperature at 3.3V Supply)
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Typical Characteristics (continued)
At TA = +25°C and V+ = 3.3V, unless otherwise noted.
40
Conversion Time (ms)
38
36
34
32
1.4V Supply
30
28
26
3.6V Supply
24
22
20
-60
-40 -20
0
20
40
60
80
100 120 140 160
Temperature (°C)
Figure 7. Conversion Time vs Temperature
8
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7 Detailed Description
7.1 Overview
The TMP112 device is a digital temperature sensor that is optimal for thermal-management and thermalprotection applications. The TMP112 device is two-wire, SMBus and I2C interface-compatible. The device is
specified over an operating temperature range of –40°C to 125°C. Figure 8 shows a block diagram of the
TMP112 device. Figure 9 shows the ESD protection circuitry contained in the TMP112 device.
The temperature sensor in the TMP112 device is the chip itself. Thermal paths run through the package leads as
well as the plastic package. The package leads provide the primary thermal path because of the lower thermal
resistance of the metal.
An alternative version of the TMP112 device is available. The TMP102 device has reduced accuracy, the same
micro-package, and is pin-to-pin compatible.
Table 1. Advantages of TMP112 Versus TMP102
Device
Compatible
Interfaces
Package
Supply
Current
Supply
Voltage
(Min)
Supply
Voltage
(Max)
Resolution
Local Sensor Accuracy
(Max)
Specified
Calibration
Drift Slope
TMP112
I2C
SMBus
SOT563
1.2 × 1.6 × 0.6
10µA
1.4V
3.6V
12 Bit
0.0625°C
0.5°C: (0°C to 65°C)
1°C: (-40°C to 125°C)
Yes
TMP102
I2C
SMBus
SOT563
1.2 × 1.6 × 0.6
10µA
1.4V
3.6V
12 Bit
0.0625°C
2°C: (25°C to 85°C)
3°C: (-40°C to 125°C)
No
7.2 Functional Block Diagram
Temperature
SCL
GND
ALERT
1
2
3
Diode
Temp.
Sensor
Control
Logic
6
DS
A/D
Converter
Serial
Interface
5
OSC
Config.
and Temp.
Register
4
SDA
V+
ADD0
TMP112
Figure 8. Internal Block Diagram
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Functional Block Diagram (continued)
TMP112
SCL
SDA
V+
GND
Core
V+
ALERT
A0
Figure 9. Equivalent Internal ESD Circuitry
7.3 Feature Description
7.3.1 Digital Temperature Output
The digital output from each temperature measurement conversion is stored in the read-only temperature
register. The temperature register of the TMP112 device is configured as a 12-bit read-only register (setting the
EM bit to 0 in the configuration register; see the Extended Mode (EM) section), or as a 13-bit read-only register
(setting the EM bit to 1 in the configuration register) that stores the output of the most recent conversion. Two
bytes must be read to obtain data and are listed in Table 8 and Table 9. Byte 1 is the most significant byte
(MSB), followed by byte 2, the least significant byte (LSB). The first 12 bits (13 bits in extended mode) are used
to indicate temperature. The least significant byte does not have to be read if that information is not needed. The
data format for temperature is listed in Table 2 and Table 3. One LSB equals 0.0625°C. Negative numbers are
represented in binary twos complement format. Following power up or reset, the temperature register reads 0°C
until the first conversion is complete. Bit D0 of byte 2 indicates normal mode (EM bit equals 0) or extended mode
(EM bit equals 1), and can be used to distinguish between the two temperature register data formats. The
unused bits in the temperature register always read 0.
Table 2. 12-Bit Temperature Data Format (1)
(1)
10
TEMPERATURE (°C)
DIGITAL OUTPUT (BINARY)
HEX
128
0111 1111 1111
7FF
127.9375
0111 1111 1111
7FF
100
0110 0100 0000
640
80
0101 0000 0000
500
75
0100 1011 0000
4B0
50
0011 0010 0000
320
25
0001 1001 0000
190
0.25
0000 0000 0100
004
0
0000 0000 0000
000
–0.25
1111 1111 1100
FFC
–25
1110 0111 0000
E70
–55
1100 1001 0000
C90
The resolution for the Temp ADC in Internal Temperature mode is 0.0625°C/count.
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Table 2 does not list all temperatures. Use the following rules to obtain the digital data format for a given
temperature or the temperature for a given digital data format.
To convert positive temperatures to a digital data format:
1. Divide the temperature by the resolution
2. Convert the result to binary code with a 12-bit, left-justified format, and MSB = 0 to denote a positive sign.
Example: (50°C) / (0.0625°C / LSB) = 800 = 320h = 0011 0010 0000
To convert a positive digital data format to temperature:
1. Convert the 12-bit, left-justified binary temperature result, with the MSB = 0 to denote a positive sign, to a
decimal number.
2. Multiply the decimal number by the resolution to obtain the positive temperature.
Example: 0011 0010 0000 = 320h = 800 × (0.0625°C / LSB) = 50°C
To convert negative temperatures to a digital data format:
1. Divide the absolute value of the temperature by the resolution, and convert the result to binary code with a
12-bit, left-justified format.
2. Generate the twos complement of the result by complementing the binary number and adding one. Denote a
negative number with MSB = 1.
Example: (|–25°C|) / (0.0625°C / LSB) = 400 = 190h = 0001 1001 0000
Two's complement format: 1110 0110 1111 + 1 = 1110 0111 0000
To convert a negative digital data format to temperature:
1. Generate the twos compliment of the 12-bit, left-justified binary number of the temperature result (with MSB
= 1, denoting negative temperature result) by complementing the binary number and adding one. This
represents the binary number of the absolute value of the temperature.
2. Convert to decimal number and multiply by the resolution to get the absolute temperature, then multiply by
–1 for the negative sign.
Example: 1110 0111 0000 has twos compliment of 0001 1001 0000 = 0001 1000 1111 + 1
Convert to temperature: 0001 1001 0000 = 190h = 400; 400 × (0.0625°C / LSB) = 25°C = (|–25°C|);
(|–25°C|) × (–1) = –25°C
Table 3. 13-Bit Temperature Data Format
TEMPERATURE (°C)
DIGITAL OUTPUT (BINARY)
HEX
150
0 1001 0110 0000
0960
128
0 1000 0000 0000
0800
127.9375
0 0111 1111 1111
07FF
100
0 0110 0100 0000
0640
80
0 0101 0000 0000
0500
75
0 0100 1011 0000
04B0
50
0 0011 0010 0000
0320
25
0 0001 1001 0000
0190
0.25
0 0000 0000 0100
0004
0
0 0000 0000 0000
0000
–0.25
1 1111 1111 1100
1FFC
–25
1 1110 0111 0000
1E70
–55
1 1100 1001 0000
1C90
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7.3.2 Serial Interface
The TMP112 device operates as a slave device only on the SMBus, two-wire and I2C interface-compatible bus.
Connections to the bus are made through the open-drain I/O lines, SDA and SCL. The SDA and SCL pins
feature integrated spike suppression filters and Schmitt triggers to minimize the effects of input spikes and bus
noise. The TMP112 device supports the transmission protocol for both fast (1 kHz to 400 kHz) and high-speed (1
kHz to 2.85 MHz) modes. All data bytes are transmitted MSB first..
7.3.2.1 Bus Overview
The device that initiates the transfer is called a master, and the devices controlled by the master are slaves. The
bus must be controlled by a master device that generates the serial clock (SCL), controls the bus access, and
generates the START and STOP conditions.
To address a specific device, a START condition is initiated, indicated by pulling the data-line (SDA) from a highto low-logic level while the SCL pin is high. All slaves on the bus shift in the slave address byte on the rising
edge of the clock, with the last bit indicating whether a read or write operation is intended. During the ninth clock
pulse, the slave being addressed responds to the master by generating an acknowledge and pulling the SDA pin
low.
A data transfer is then initiated and sent over eight clock pulses followed by an acknowledge bit. During the data
transfer the SDA pin must remain stable while the SCL pin is high, because any change in the SDA pin while the
SCL pin is high is interpreted as a START or STOP signal.
When all data have been transferred, the master generates a STOP condition indicated by pulling the SDA pin
from low to high, while the SCL pin is high.
7.3.2.2 Serial Bus Address
To communicate with the TMP112 device, the master must first address slave devices through a slave-address
byte. The slave-address byte consists of seven address bits and a direction bit indicating the intent of executing
a read or write operation.
The TMP112 device features an address pin to allow up to four devices to be addressed on a single bus. Table 4
describes the pin logic levels used to properly connect up to four devices.
Table 4. Address Pin and Slave Addresses
DEVICE TWO-WIRE ADDRESS
A0 PIN CONNECTION
1001000
Ground
1001001
V+
1001010
SDA
1001011
SCL
7.3.2.3 Writing and Reading Operation
Accessing a particular register on the TMP112 device is accomplished by writing the appropriate value to the
pointer register. The value for the pointer register is the first byte transferred after the slave address byte with the
R/W bit low. Every write operation to the TMP112 device requires a value for the pointer register (see Figure 11).
When reading from the TMP112 device, the last value stored in the pointer register by a write operation is used
to determine which register is read by a read operation. To change the register pointer for a read operation, a
new value must be written to the pointer register. This action is accomplished by issuing a slave-address byte
with the R/W bit low, followed by the pointer register byte. No additional data are required. The master can then
generate a START condition and send the slave address byte with the R/W bit high to initiate the read command.
See Figure 12 for details of this sequence. If repeated reads from the same register are desired, continuously
sending the pointer register bytes is not necessary because the TMP112 device retains the pointer register value
until the value is changed by the next write operation.
Register bytes are sent with the most significant byte first, followed by the least significant byte.
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7.3.2.4 Slave Mode Operations
The TMP112 device can operate as a slave receiver or slave transmitter. As a slave device, the TMP112 device
never drives the SCL line.
7.3.2.4.1 Slave Receiver Mode
The first byte transmitted by the master is the slave address with the R/W bit low. The TMP112 device then
acknowledges reception of a valid address. The next byte transmitted by the master is the pointer register. The
TMP112 device then acknowledges reception of the pointer register byte. The next byte or bytes are written to
the register addressed by the pointer register. The TMP112 device acknowledges reception of each data byte.
The master can terminate data transfer by generating a START or STOP condition.
7.3.2.4.2 Slave Transmitter Mode
The first byte transmitted by the master is the slave address with the R/W bit high. The slave acknowledges
reception of a valid slave address. The next byte is transmitted by the slave and is the most significant byte of
the register indicated by the pointer register. The master acknowledges reception of the data byte. The next byte
transmitted by the slave is the least significant byte. The master acknowledges reception of the data byte. The
master can terminate data transfer by generating a not-acknowledge on reception of any data byte or by
generating a START or STOP condition.
7.3.2.5 SMBus Alert Function
The TMP112 device supports the SMBus alert function. When the TMP112 device operates in interrupt mode
(TM = 1), the ALERT pin can be connected as an SMBus alert signal. When a master senses that an alert
condition is present on the alert line, the master sends an SMBus ALERT command (0001 1001) to the bus. If
the ALERT pin is active, the device acknowledges the SMBus ALERT command and responds by returning the
slave address on the SDA line. The eighth bit (LSB) of the slave address byte indicates if the alert condition is
caused by the temperature exceeding T(HIGH) or falling below T(LOW). The LSB is high if the temperature is greater
than T(HIGH), or low if the temperature is less than T(LOW). Refer to the Figure 13 section for details of this
sequence.
If multiple devices on the bus respond to the SMBus ALERT command, arbitration during the slave address
portion of the SMBus ALERT command determines which device clears the alert status of that device. The
device with the lowest two-wire address wins the arbitration. If the TMP112 device wins the arbitration, the
TMP112 ALERT pin becomes inactive at the completion of the SMBus ALERT command. If the TMP112 device
loses the arbitration, the TMP112 ALERT pin remains active.
7.3.2.6 General Call
The TMP112 device responds to a two-wire general-call address (0000 000) if the eighth bit is 0. The device
acknowledges the general-call address and responds to commands in the second byte. If the second byte is
0000 0110, the TMP112 internal registers are reset to power-up values. The TMP112 device does not support
the general-address acquire command.
7.3.2.7 High-Speed (Hs) Mode
In order for the two-wire bus to operate at frequencies above 400 kHz, the master device must issue an Hs-mode
master code (0000 1xxx) as the first byte after a START condition to switch the bus to high-speed operation. The
TMP112 device does not acknowledge this byte, but switches the input filters on the SDA and SCL pins and the
output filters on the SDA pin to operate in Hs-mode thus allowing transfers at up to 2.85 MHz. After the Hs-mode
master code has been issued, the master transmits a two-wire slave address to initiate a data-transfer operation.
The bus continues to operate in Hs-mode until a STOP condition occurs on the bus. Upon receiving the STOP
condition, the TMP112 device switches the input and output filters back to fast-mode operation.
7.3.2.8 Timeout Function
The TMP112 device resets the serial interface if the SCL pin is held low for 30 ms (typical) between a start and
stop condition. The TMP112 releases the SDA line if the SCL pin is pulled low and waits for a start condition
from the host controller. To avoid activating the timeout function, maintain a communication speed of at least 1
kHz for SCL operating frequency.
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7.3.2.9 Timing Diagrams
The TMP112 device is two-wire, SMBus and I2C interface-compatible. Figure 10 to Figure 13 describe the
various operations on the TMP112. Parameters for Figure 10 are defined in Timing Requirements. Bus
definitions are:
Bus Idle: Both SDA and SCL lines remain high.
Start Data Transfer: A change in the state of the SDA line, from high to low, while the SCL line is high, defines
a START condition. Each data transfer is initiated with a START condition.
Stop Data Transfer: A change in the state of the SDA line from low to high while the SCL line is high defines a
STOP condition. Each data transfer is terminated with a repeated START or STOP condition.
Data Transfer: The number of data bytes transferred between a START and a STOP condition is not limited and
is determined by the master device. It is also possible to use the TMP112 for single byte updates. To update only
the MS byte, terminate the communication by issuing a START or STOP communication on the bus.
Acknowledge: Each receiving device, when addressed, is obliged to generate an Acknowledge bit. A device
that acknowledges must pull down the SDA line during the Acknowledge clock pulse in such a way that the SDA
line is stable low during the high period of the Acknowledge clock pulse. Setup and hold times must be taken into
account. On a master receive, the termination of the data transfer can be signaled by the master generating a
Not-Acknowledge ('1') on the last byte that has been transmitted by the slave.
7.3.2.9.1 Two-Wire Timing Diagrams
See the Timing Requirements.
t(LOW)
tFC
t(HDSTA)
tRC
SCL
t(HDSTA)
t(HIGH)
t(HDDAT)
t(SUSTO)
t(SUSTA)
t(SUDAT)
SDA
t(BUF)
P
tRD
S
tFD
S
P
Figure 10. Two-Wire Timing Diagram
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1
9
1
9
SCL
¼
1
SDA
0
0
1
0
A1(1)
A0(1)
R/W
Start By
Master
0
0
0
0
0
0
P1
P0
ACK By
TMP112
¼
ACK By
TMP112
Frame 2 Pointer Register Byte
Frame 1 Two-Wire Slave Address Byte
9
1
1
9
SCL
(Continued)
SDA
(Continued)
D7
D6
D5
D4
D3
D2
D1
D0
D7
D6
D5
D4
D3
D2
D1
D0
ACK By
TMP112
ACK By
TMP112
Stop By
Master
Frame 4 Data Byte 2
Frame 3 Data Byte 1
NOTE: (1) The values of A0 and A1 are determined by the ADD0 pin.
Figure 11. Two-Wire Timing Diagram for Write Word Format
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1
9
1
9
SCL
¼
SDA
1
0
0
1
0
A1
(1)
A0
(1)
R/W
Start By
Master
0
0
0
0
0
0
P1
P0
ACK By
TMP112
Stop By
Master
ACK By
TMP112
Frame 1 Two-Wire Slave Address Byte
Frame 2 Pointer Register Byte
1
9
1
9
SCL
(Continued)
¼
SDA
(Continued)
1
0
0
1
0
A1
(1)
A0
(1)
R/W
Start By
Master
D7
D6
D5
D4
D3
ACK By
TMP112
D1
D0
¼
ACK By
From
TMP112
Frame 3 Two-Wire Slave Address Byte
1
D2
Master
(2)
Frame 4 Data Byte 1 Read Register
9
SCL
(Continued)
SDA
(Continued)
D7
D6
D5
D4
D3
D2
D1
D0
From
TMP112
ACK By
Master
Stop By
Master
(3)
Frame 5 Data Byte 2 Read Register
NOTE: (1) The values of A0 and A1 are determined by the ADD0 pin.
(2) Master should leave SDA high to terminate a single-byte read operation.
(3) Master should leave SDA high to terminate a two-byte read operation.
Figure 12. Two-Wire Timing Diagram for Read Word Format
ALERT
1
9
1
9
SCL
SDA
0
0
0
1
Start By
Master
1
0
0
1
R/W
0
0
1
ACK By
TMP112
Frame 1 SMBus ALERT Response Address Byte
A1
A0
From
TMP112
Status
NACK By
Master
Stop By
Master
Frame 2 Slave Address From TMP112
NOTE: (1) The values of A0 and A1 are determined by the ADD0 pin.
Figure 13. Timing Diagram for SMBus ALERT
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7.4 Device Functional Modes
7.4.1 Continuos-Conversion Mode
The default mode of the TMP112 device is continuos conversion mode. During continuous-conversion mode, the
ADC performs continuos temperature conversions and stores each results to the temperature register,
overwriting the result from the previous conversion. The conversion rate bits, CR1 and CR0, configure the
TMP112 device for conversion rates of 0.25 Hz, 1 Hz, 4 Hz, or 8 Hz. The default rate is 4 Hz. The TMP112
device has a typical conversion time of 26 ms. To achieve different conversion rates, the TMP112 device makes
a conversion and then powers down and waits for the appropriate delay set by CR1 and CR0. Table 5 lists the
settings for CR1 and CR0.
Table 5. Conversion Rate Settings
CR1
CR0
CONVERSION RATE
0
0
0.25Hz
0
1
1Hz
1
0
4Hz (default)
1
1
8Hz
After a power-up or general-call reset, the TMP112 device immediately begins a conversion as shown in
Figure 14. The first result is available after 26ms (typical). The active quiescent current during conversion is
40μA (typical at +27°C). The quiescent current during delay is 2.2μA (typical at +27°C).
Delay
(1)
26ms
26ms
Startup
Start of
Conversion
(1) Delay is set by CR1 and CR0.
Figure 14. Conversion Start
7.4.2 Extended Mode (EM)
The extended mode bit configures the device for normal mode operation (EM = 0) or extended mode operation
(EM = 1). In normal mode, the temperature register and the high and low limit registers use a 12-bit data format.
Normal mode is used to make the TMP112 device compatible with the TMP75 device.
Extended mode (EM = 1) allows measurement of temperatures above 128°C by configuring the temperature
register and the high and low limit registers for 13-bit data format.
7.4.3 One-Shot/Conversion Ready Mode (OS)
The TMP112 device features a one-shot temperature-measurement mode. When the device is in shutdown
mode, writing a 1 to the OS bit begins a single temperature conversion. During the conversion, the OS bit reads
0. The device returns to the SHUTDOWN state at the completion of the single conversion. After the conversion,
the OS bit reads 1. This feature is useful for reducing power consumption in the TMP112 device when
continuous temperature monitoring is not required.
As a result of the short conversion time, the TMP112 device can achieve a higher conversion rate. A single
conversion typically occurs for 26 ms and a read can occur in less than 20 μs. When using one-shot mode, 30 or
more conversions per second are possible.
7.4.4 Thermostat Mode (TM)
The thermostat mode bit indicates to the device whether to operate in comparator mode (TM = 0 ) or interrupt
mode (TM = 1).
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7.4.4.1 Comparator Mode (TM = 0)
In Comparator mode (TM = 0), the Alert pin is activated when the temperature equals or exceeds the value in the
T(HIGH) register and it remains active until the temperature falls below the value in the T(LOW)register. For more
information on the comparator mode, see the High- and Low-Limit Register section.
7.4.4.2 Interrupt Mode (TM = 1)
In Interrupt mode (TM = 1), the Alert pin is activated when the temperature exceeds T(HIGH) or goes below T(LOW)
registers. The Alert pin is cleared when the host controller reads the temperature register. For more information
on the interrupt mode, see the High- and Low-Limit Register section.
7.5 Programming
7.5.1 Pointer Register
Figure 15 shows the internal register structure of the TMP112 device. The 8-bit Pointer Register of the device is
used to address a given data register. The Pointer Register uses the two LSBs (see Table 13) to identify which
of the data registers should respond to a read or write command. The power-up reset value of P1/P0 is '00'. By
default, the TMP112 reads the temperature on power-up.
Pointer
Register
Temperature
Register
SCL
Configuration
Register
I/O
Control
Interface
TLOW
Register
SDA
THIGH
Register
Figure 15. Internal Register Structure
Table 6 lists the pointer address of the registers available in the TMP112 device. Table 7 lists the bits of the
Pointer Register byte. During a write command, bytes P2 through P7 must always be 0.
Table 6. Pointer Addresses
P1
P0
REGISTER
0
0
Temperature Register (Read Only)
0
1
Configuration Register (Read/Write)
1
0
TLOW Register (Read/Write)
1
1
THIGH Register (Read/Write)
Table 7. Pointer Register Byte
18
P7
P6
P5
P4
P3
P2
0
0
0
0
0
0
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P1
P0
Register Bits
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7.5.2 Temperature Register
The Temperature Register of the TMP112 device is configured as a 12-bit read-only register (setting the EM bit
to 0 in the configuration register; see the Extended Mode section), or as a 13-bit read-only register (setting the
EM bit to 1 in the configuration register) that stores the output of the most recent conversion. Two bytes must be
read to obtain data and are listed in Table 8 and Table 9. Byte 1 is the most significant byte (MSB), followed by
byte 2, the least significant byte (LSB). The first 12 bits (13 bits in extended mode) are used to indicate
temperature. The least significant byte does not have to be read if that information is not needed.
Table 8. Byte 1 of Temperature Register
BYTE
D7
1
D6
D5
D4
D3
D2
D1
D0
T11
T10
T9
T8
T7
T6
T5
T4
(T12)
(T11)
(T10)
(T9)
(T8)
(T7)
(T6)
(T5)
D0
Table 9. Byte 2 of Temperature Register (1)
BYTE
2
(1)
D7
D6
D5
D4
D3
D2
D1
T3
T2
T1
T0
0
0
0
0
(T4)
(T3)
(T2)
(T1)
(T0)
(0)
(0)
(1)
Extended mode 13-bit configuration shown in parentheses.
7.5.3 Configuration Register
The Configuration Register is a 16-bit read/write register used to store bits that control the operational modes of
the temperature sensor. Read/write operations are performed MSB first. Table 10 lists the format and power-up
and reset values of the configuration register. For compatibility, the first byte corresponds to the Configuration
Register in the TMP75 and TMP275 devices. All registers are updated byte by byte.
Table 10. Configuration and Power-Up/Reset Formats
BYTE
1
2
D7
D6
D5
D4
D3
D2
D1
D0
OS
R1
R0
F1
F0
POL
TM
SD
0
1
1
0
0
0
0
0
CR1
CR0
AL
EM
0
0
0
0
1
0
1
0
0
0
0
0
7.5.3.1 Shutdown Mode (SD)
The Shutdown mode bit saves maximum power by shutting down all device circuitry other than the serial
interface, reducing current consumption to typically less than 0.5μA. Shutdown mode is enabled when the SD bit
= '1'; the device shuts down when current conversion is completed. When SD = '0', the device maintains a
continuous conversion state.
7.5.3.2 Thermostat Mode (TM)
The Thermostat mode bit indicates to the device whether to operate in Comparator mode (TM = 0) or Interrupt
mode (TM = 1). For more information on Comparator and Interrupt modes, see the High- and Low-Limit
Registers section.
7.5.3.3 Polarity (POL)
The polarity bit allows the user to adjust the polarity of the ALERT pin output. If the POL bit is set to 0 (default),
the ALERT pin becomes active low . When the POL bit is set to 1, the ALERT pin becomes active high and the
state of the ALERT pin is inverted. The operation of the ALERT pin in various modes is illustrated in Figure 16.
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THIGH
Measured
Temperature
TLOW
TMP112 ALERT PIN
(Comparator Mode)
POL = 0
TMP112 ALERT PIN
(Interrupt Mode)
POL = 0
TMP112 ALERT PIN
(Comparator Mode)
POL = 1
TMP112 ALERT PIN
(Interrupt Mode)
POL = 1
Read
Read
Read
Time
Figure 16. Output Transfer Function Diagrams
7.5.3.4 Fault Queue (F1/F0)
A fault condition exists when the measured temperature exceeds the user-defined limits set in the THIGH and
TLOW registers. Additionally, the number of fault conditions required to generate an alert may be programmed
using the fault queue. The fault queue is provided to prevent a false alert as a result of environmental noise. The
fault queue requires consecutive fault measurements in order to trigger the alert function. Table 11 lists the
number of measured faults that may be programmed to trigger an alert condition in the device. For THIGH and
TLOW register format and byte order, see the High- and Low-Limit Registers section.
Table 11. TMP112 Fault Settings
F1
F0
CONSECUTIVE FAULTS
0
0
1
0
1
2
1
0
4
1
1
6
7.5.3.5 Converter Resolution (R1 and R0)
The converter resolution bits, R1 and R0, are read-only bits. The TMP112 converter resolution is set on start up
to 11 which sets the temperature register to a 12 bit-resolution.
7.5.3.6 One-Shot (OS)
When the device is in shutdown mode, writing a 1 to the OS bit begins a single temperature conversion. During
the conversion, the OS bit reads 0. The device returns to the SHUTDOWN state at the completion of the single
conversion. For more information on the one-shot conversion mode, see the One-Shot/Conversion Ready Mode
(OS) section.
7.5.3.7 Extended Mode (EM)
The extended mode bit configures the device for normal mode operation (EM = 0) or extended mode operation
(EM = 1). In normal mode, the temperature register and the high and low limit registers use a 12-bit data format.
For more information on the extended mode, see the Extended Mode (EM) section.
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7.5.3.8 Alert (AL)
The AL bit is a read-only function. Reading the AL bit provides information about the comparator mode status.
The state of the POL bit inverts the polarity of data returned from the AL bit. When the POL bit equals 0, the AL
bit reads as 1 until the temperature equals or exceeds T(HIGH) for the programmed number of consecutive faults,
causing the AL bit to read as 0. The AL bit continues to read as 0 until the temperature falls below T(LOW) for the
programmed number of consecutive faults, when it again reads as 1. The status of the TM bit does not affect the
status of the AL bit.
7.5.4 High- and Low-Limit Register
The temperature limits are stored in the T(LOW) and T(HIGH) registers in the same format as the temperature result,
and their values are compared to the temperature result on every conversion. The outcome of the comparison
drives the behavior of the ALERT pin, which operates as a comparator output or an interrupt, and is set by the
TM bit in the configuration register.
In Comparator mode (TM = 0), the ALERT pin becomes active when the temperature equals or exceeds the
value in the T(HIGH) register and generates a consecutive number of faults according to fault bits F1 and F0. The
ALERT pin remains active until the temperature falls below the indicated T(LOW) value for the same number of
faults.
In interrupt mode (TM = 1), the ALERT pin becomes active when the temperature equals or exceeds the value in
T(HIGH) for a consecutive number of fault conditions (as shown in Table 11). The ALERT pin remains active until a
read operation of any register occurs, or the device successfully responds to the SMBus alert response address.
The ALERT pin is also cleared if the device is placed in shutdown mode. When the ALERT pin is cleared, it
becomes active again only when temperature falls below T(LOW), and remains active until cleared by a read
operation of any register or a successful response to the SMBus alert response address. When the ALERT pin is
cleared, the above cycle repeats, with the ALERT pin becoming active when the temperature equals or exceeds
T(HIGH). The ALERT pin can also be cleared by resetting the device with the general-call Reset command. This
action also clears the state of the internal registers in the device, returning the device to comparator mode
(TM = 0).
Both operating modes are represented in Figure 16. Table 12 and Table 13 list the format for the THIGH and TLOW
registers. The most significant byte is sent first, followed by the least significant byte. The power-up reset values
for T(HIGH) and T(LOW) are:
• THIGH = +80°C
• TLOW = +75°C
The format of the data for THIGH and TLOW is the same as for the Temperature Register.
Table 12. Bytes 1 and 2 of THIGH Register (1)
BYTE
1
BYTE
2
(1)
D7
D6
D5
D4
D3
D2
D1
H11
H10
H9
H8
H7
H6
H5
D0
H4
(H12)
(H11)
(H10)
(H9)
(H8)
(H7)
(H6)
(H5)
D7
D6
D5
D4
D3
D2
D1
D0
H3
H2
H1
H0
0
0
0
0
(H4)
(H3)
(H2)
(H1)
(H0)
(0)
(0)
(0)
Extended mode 13-bit configuration shown in parenthesis.
Table 13. Bytes 1 and 2 of TLOW Register (1)
BYTE
1
BYTE
2
(1)
D7
D6
D5
D4
D3
D2
D1
D0
L11
L10
L9
L8
L7
L6
L5
L4
(L12)
(L11)
(L10)
(L9)
(L8)
(L7)
(L6)
(L5)
D7
D6
D5
D4
D3
D2
D1
D0
L3
L2
L1
L0
0
0
0
0
(L4)
(L3)
(L2)
(L1)
(L0)
(0)
(0)
(0)
Extended mode 13-bit configuration shown in parenthesis.
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8 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
8.1.1 Calibrating for Improved Accuracy
Many temperature monitoring applications require better than 0.5°C accuracy over a limited temperature range.
Knowing the offset of a temperature sensor at a given temperature in conjunction with the average temperature
span (slope) error over a fixed range makes achieving this improved accuracy possible.
The TMP112 has three distinct slope regions that conservatively approximate its inherent curvature:
1. Slope1 applies over –40°C to +25°C
2. Slope2 applies over +25°C to +85°C
3. Slope3 applies over +85°C to +125°C
These slopes are defined in Table 14 and shown in Figure 17. It is important to note that each slope is increasing
with respect to 25°C.
Table 14. Specifications for User-Calibrated Systems
PARAMETER
CONDITION
Average Slope
(Temperature Error vs Temperature) (1)
(1)
MIN
MAX
UNIT
V+ = 3.3, –40°C to 25°C
–7
0
m°C/°C
V+ = 3.3, 25°C to 85°C
0
5
m°C/°C
V+ = 3.3, 85°C to 125°C
0
8
m°C/°C
User-calibrated temperature accuracy can be within ±1LSB because of quantization noise.
0.8
Slope3MAX
Slope1MAX
Temperature Error (°C)
0.6
Slope2MAX
0.4
0.2
0
-0.2
-0.4
Slope1MIN
Slope2MIN
Slope3MIN
-0.6
-40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 110 120 130
Temperature (°C)
Figure 17. Accuracy and Slope Curves versus Temperature
Equation 1 determines the worst-case accuracy at a specific temperature:
Accuracy(worst-case) = Accuracy(25°C) + DT ´ Slope
(1)
8.1.1.1 Example 1: Finding Worst-Case Accuracy From –15°C to +50°C
As an example, if the user is concerned only about the temperature accuracy between –15°C to 50°C, the worstcase accuracy could be determined by using the two slope calculations shown in Equation 2 and Equation 4:
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Accuracy(worst -case ) = Accuracy(25°C ) + DT ´ Slope
(2)
æ m°C ö
Accuracy(MAX[ -15°C to 25°C] ) = 0.3°C + (-15°C - 25°C ) ´ ç -7
÷ = 0.58°C
°C ø
è
(3)
Accuracy(MAX[25°C to 50°C] ) = Accuracy(25°C ) + DT ´ Slope2(MAX )
(4)
æ m°C ö
Accuracy(MAX[25°C to 50°C] ) = 0.3°C + (50°C - 25°C ) ´ ç 5
÷ = 0.425°C
è °C ø
(5)
The same calculations must be applied to the minimum case:
Accuracy(MIN[ -15°C to 25°C] ) = Accuracy(25°C ) + DT ´ Slope1(MIN)
é
Accuracy(MIN[ -15°C to 25°C] ) = -0.5°C + ê(-15°C - 25°C ) ´
ë
(6)
æ m°C ö ù
ç 0 °C ÷ ú = -0.5°C
è
øû
(7)
Accuracy(MIN[25°C to 50°C] ) = Accuracy(25°C ) + DT ´ Slope2(MIN)
(8)
é
Accuracy(MIN[25°C to 50°C] ) = -0.5°C + ê(50°C - 25°C ) ´
ë
(9)
æ m°C ö ù
ç 0 °C ÷ ú = -0.5°C
è
øû
Based on these calculations, a user can expect a worst-case accuracy of 0.58°C to –0.5°C in the temperature
range of –15°C to 50°C.
8.1.1.2 Example 2: Finding Worst-Case Accuracy From 25°C to 100°C
If the desired temperature range falls in the region of slope 3, first calculate the worst-case value from 25°C to
85°C and add it to the change in temperature multiplied by the span error of slope 3. As an example, consider
the temperature range of 25°C to 125°C as shown in Equation 10:
Accuracy(MAX[25°C to 100°C] ) = Accuracy(25°C ) + DT ´ Slope2(MAX ) + DT ´ Slope3(MAX )
(10)
m°C ö
æ
Accuracy(MAX[25°C to 100°C] ) = 0.3°C + (85°C - 25°C ) ´ ç 4.5
÷ + (100°C - 85°C ) ´
°C ø
è
æ m°C ö
ç8
÷ = 0.69°C
è °C ø
Then perform the same calculation for the minimum case as shown in Equation 12:
Accuracy(MIN[25°C to 100°C] ) = Accuracy(25°C ) + DT ´ Slope2(MIN) + DT ´ Slope3(MIN)
é
æ m°C ö ù é
æ m°C ö ù
Accuracy(MIN[25°C to 100°C] ) = -0.5°C + ê(85°C - 25°C ) ´ ç 0
÷ ú + ê(100°C - 85°C ) ´ ç 0 °C ÷ ú = -0.5°C
è °C ø û ë
è
øû
ë
(11)
(12)
(13)
8.1.2 Using the Slope Specifications with a 1-Point Calibration
The initial accuracy assurance at +25°C with the slope regions provides an accuracy that is high enough for most
applications; however, if higher accuracy is desired, this increase can be achieved with a 1-point calibration at
+25°C. This calibration removes the offset at room temperature, thereby reducing the source of error in a
TMP112 temperature reading down to the curvature. Figure 18 shows the error of a calibrated TMP112.
0.8
Slope3MAX
Temperature Error (°C)
0.6
0.4
Slope1MAX
Slope2MAX
0.2
0
-0.2
Calibration at +25°C Removes Offset
-0.4
-0.6
-40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 110 120 130
Temperature (°C)
Figure 18. Calibrated Accuracy and Slope Curves versus Temperature
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Using the previous example temperature range of 0°C to +50°C, the worst-case temperature error is now
reduced to the worst-case slopes because the offset at +25°C (that is, the maximum and minimum temperature
errors of +0.3°C and –0.5°C) is removed. Therefore, a user can expect the worst-case accuracy to improve to
+0.175°C.
8.1.2.1 Power Supply-Level Contribution to Accuracy
The superior accuracy that can be achieved with the TMP112 device is complemented by the immunity-to-DC
variations from a 3.3-V supply voltage. This immunity is important because it spares the user from having to use
another LDO regulator to produce 3.3 V to achieve accuracy. Nevertheless, the noise quantization that results
from changing supply can add some slight change in temperature measurement accuracy. As an example, if the
user chooses to operate the device at 1.8 V, the worst-case expected change in accuracy can be calculated with
Equation 14:
é 0.25°C ù
Accuracy(PSR ) = ± (V+ - 3.3 V ) ´ ê
ú
ë V û
(14)
é 0.25°C ù
Accuracy(PSR )= ± (1.8 V - 3.3 V ) ´ ê
ú = ±0.375°C
ë V û
(15)
This example is a worst-case accuracy contribution as a result of variation in power supply that should be added
to the accuracy plus the slope maximum.
24
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8.2 Typical Application
The TMP112 device is used to measure the PCB temperature of the board location where the device is mounted.
The programmable address options allow up to four locations on the board to be monitored on a single serial
bus.
Supply Voltage
1.4 V to 3.6 V
Supply Bypass
Capacitor
0.01 µF
Pullup Resistors
5 k
TMP112
Two-Wire
Host Controller
1
2
3
SCL
SDA
GND
V+
ALERT
6
5
4
ADD0
NOTE: The SCL, SDA, and ALERT pins require pullup resistors.
Figure 19. Typical Connections
8.2.1 Design Requirements
The TMP112 device requires pullup resistors on the SCL, SDA, and ALERT pins. The recommended value for
the pullup resistors is 5-kΩ. In some applications the pullup resistor can be lower or higher than 5 kΩ but must
not exceed 3 mA of current on any of those pins. A 0.01-μF bypass capacitor on the supply is recommended as
shown in Figure 19. The SCL and SDA lines can be pulled up to a supply that is equal to or higher than V+
through the pullup resistors. To configure one of four different addresses on the bus, connect the ADD0 pin to
either the GND, V+, SDA, or SCL pin.
8.2.2 Detailed Design Procedure
The TMP7112 device should be placed in close proximity to the heat source that must be monitored, with a
proper layout for good thermal coupling. This placement ensures that temperature changes are captured within
the shortest possible time interval. To maintain accuracy in applications that require air or surface temperature
measurement, care should be taken to isolate the package and leads from ambient air temperature. A thermallyconductive adhesive is helpful in achieving accurate surface temperature measurement.
The TMP112 device is a very low-power device and generates very low noise on the supply bus. Applying an RC
filter to the V+ pin of the TMP112 device can further reduce any noise that the TMP112 device might propagate
to other components. R(F) in Figure 20 should be less than 5 kΩ and C(F) should be greater than 10 nF.
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Typical Application (continued)
Supply Voltage
R(F) ≤ 5 kΩ
Device
SCL
SDA
GND
V+
ALERT
C(F) ≥ 10 nF
ADD0
Figure 20. Noise Reduction Techniques
8.2.3 Application Curves
Temperature (qC)
Figure 21 shows the step response of the TMP112 device to a submersion in an oil bath of 100ºC from room
temperature (27ºC). The time-constant, or the time for the output to reach 63% of the input step, is 0.8 s. The
time-constant result depends on the printed circuit board (PCB) that the TMP112 device is mounted. For this test,
the TMP112 device was soldered to a two-layer PCB that measured 0.375 in × 0.437 in.
100
95
90
85
80
75
70
65
60
55
50
45
40
35
30
25
-1
1
3
5
7
9
11
Time (s)
13
15
17
19
Figure 21. Temperature Step Response
9 Power Supply Recommendations
The TMP112 device operates with power supply in the range of 1.4 to 3.6 V. The device is optimized for
operation at 3.3-V supply but can measure temperature accurately in the full supply range. Refer to the Power
Supply-Level Contribution to Accuracy section for more information about the power supply impact on the
accuracy of the device.
A power-supply bypass capacitor is required for proper operation. Place this capacitor as close as possible to the
supply and ground pins of the device. A typical value for this supply bypass capacitor is 0.01 μF. Applications
with noisy or high-impedance power supplies may require additional decoupling capacitors to reject power-supply
noise.
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10 Layout
10.1 Layout Guidelines
Place the power-supply bypass capacitor as close as possible to the supply and ground pins. The recommended
value of this bypass capacitor is 0.01 μF. Additional decoupling capacitance can be added to compensate for
noisy or high-impedance power supplies. Pull up the open-drain output pins (SDA , SCL and ALERT) through 5kΩ pullup resistors.
10.2 Layout Example
Via to Power or Ground Plane
Via to Internal Layer
Pull-Up Resistors
SCL
SDA
GND
V+
Supply Voltage
ALERT
ADD0
Supply Bypass
Capacitor
Ground Plane for
Thermal Coupling
to Heat Source
Serial Bus Traces
Heat Source
Figure 22. Layout Example
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11 Device and Documentation Support
11.1 Documentation Support
11.1.1 Related Documentation
For related documentation see the following:
• Digital Temperature Sensor with 2-Wire Interface SBOS288
• 0.5C Digital Out Temperature Sensor SBOS363
11.2 Trademarks
SMBus is a trademark of Intel, Inc.
All other trademarks are the property of their respective owners.
11.3 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
11.4 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGE OPTION ADDENDUM
www.ti.com
7-Apr-2015
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
TMP112AIDRLR
ACTIVE
SOT
DRL
6
4000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
OBS
TMP112AIDRLT
ACTIVE
SOT
DRL
6
250
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 125
OBS
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
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7-Apr-2015
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF TMP112 :
• Automotive: TMP112-Q1
NOTE: Qualified Version Definitions:
• Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
7-Apr-2015
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
TMP112AIDRLR
SOT
DRL
6
4000
180.0
8.4
1.98
1.78
0.69
4.0
8.0
Q3
TMP112AIDRLR
SOT
DRL
6
4000
180.0
9.5
1.78
1.78
0.69
4.0
8.0
Q3
TMP112AIDRLT
SOT
DRL
6
250
180.0
8.4
1.98
1.78
0.69
4.0
8.0
Q3
TMP112AIDRLT
SOT
DRL
6
250
180.0
9.5
1.78
1.78
0.69
4.0
8.0
Q3
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
7-Apr-2015
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
TMP112AIDRLR
SOT
DRL
6
4000
202.0
201.0
28.0
TMP112AIDRLR
SOT
DRL
6
4000
184.0
184.0
19.0
TMP112AIDRLT
SOT
DRL
6
250
202.0
201.0
28.0
TMP112AIDRLT
SOT
DRL
6
250
184.0
184.0
19.0
Pack Materials-Page 2
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