Spec. No. : C304J3 Issued Date : 2010.12.06 Revised Date : 2015.04.30 Page No. : 1/7 CYStech Electronics Corp. General Purpose NPN Epitaxial Planar Transistor BTD5213J3 Features • Low collector saturation voltage • High breakdown voltage, VCEO=100V (min.) • High collector current, IC(max)=1A (DC) • Pb-free lead plating and halogen-free package Symbol Outline TO-252(DPAK) BTD5213J3 B：Base C：Collector E：Emitter B C E Ordering Information Device BTD5213J3-0-T3-G Package TO-252 (Pb-free lead plating and halogen-free package) Shipping 2500 pcs / Tape & Reel Environment friendly grade : S for RoHS compliant products, G for RoHS compliant and green compound products Packing spec, T3:2500 pcs/tape & reel, 13” reel Product rank, zero for no rank products Product name BTD5213J3 CYStek Product Specification CYStech Electronics Corp. Spec. No. : C304J3 Issued Date : 2010.12.06 Revised Date : 2015.04.30 Page No. : 2/7 Absolute Maximum Ratings (Ta=25°C) Parameter Collector-Base Voltage Collector-Emitter Voltage Emitter-Base Voltage Collector Current (DC) Collector Current (Pulse) Power Dissipation @ TA=25°C Power Dissipation @ TC=25°C Operating Junction and Storage Temperature Range Symbol VCBO VCEO VEBO IC ICP PD Tj ; Tstg Limits 120 100 5 1 2 (Note) 1 10 -55~+150 Unit V V V A A W W °C Note : Pulse test, PW ≤ 10ms, Duty ≤ 50%. Thermal Data Parameter Thermal Resistance, Junction-to-case, max Thermal Resistance, Junction-to-ambient, max Symbol Rth,j-c Rth,j-a Value 12.5 125 Unit °C/W °C/W Characteristics (Ta=25°C) Symbol BVCBO BVCEO BVEBO ICBO IEBO *VCE(SAT) *hFE fT Cob BTD5213J3 Min. 120 100 5 160 - Typ. 0.15 100 20 Max. 100 100 0.4 400 - Unit V V V nA nA V MHz pF Test Conditions IC=50μA IC=1mA IE=50μA VCB=120V, IE=0 VEB=5V, IC=0 IC=500mA, IB=20mA VCE=5V, IC=100mA VCE=10V, IC=50mA, f=100MHz VCB=10V, IE=0A, f=1MHz *Pulse Test: Pulse Width ≤380μs, Duty Cycle≤2% CYStek Product Specification CYStech Electronics Corp. Spec. No. : C304J3 Issued Date : 2010.12.06 Revised Date : 2015.04.30 Page No. : 3/7 Typical Characteristics Current Gain vs Collector Current Saturation Voltage vs Collector Current 1000 1000 Saturation Voltage---(mV) Current Gain---HFE HFE@VCE=3V 100 HFE@VCE=2V VBESAT@IC=20IB 100 VCESAT@IC=20IB 10 10 1 10 100 Collector Current---IC(mA) 1 1000 On Voltage vs Collector Current 10 100 Collector Current---IC(mA) 1000 Transition Frequency vs Collector Current 1000 Transition Frequency---fT(MHz) On Voltage---(mV) 1000 VBE(on)@VCE=2V 100 10 100 1 10 100 Collector Current---IC(mA) 1 1000 10 100 Collector Current---IC(mA) Capacitance Characteristics 1000 Power Derating Curve 1.2 100 Power Dissipation---PD(W) Capacitance---Cob(pF) f=1MHz 10 1 1 0.8 0.6 0.4 0.2 0 0.1 BTD5213J3 1 10 Collector Base Voltage-- VCB(V) 100 0 25 50 75 100 125 150 Ambient Temperature---TA(℃) 175 200 CYStek Product Specification CYStech Electronics Corp. Spec. No. : C304J3 Issued Date : 2010.12.06 Revised Date : 2015.04.30 Page No. : 4/7 Typical Characteristics(Cont.) Power Derating Curve Power Dissipation---PD(W) 12 10 8 6 4 2 0 0 25 50 75 100 125 150 Case Temperature---TC(℃) 175 200 Recommended soldering footprint BTD5213J3 CYStek Product Specification CYStech Electronics Corp. Spec. No. : C304J3 Issued Date : 2010.12.06 Revised Date : 2015.04.30 Page No. : 5/7 Reel Dimension Carrier Tape Dimension BTD5213J3 CYStek Product Specification CYStech Electronics Corp. Spec. No. : C304J3 Issued Date : 2010.12.06 Revised Date : 2015.04.30 Page No. : 6/7 Recommended wave soldering condition Product Pb-free devices Peak Temperature 260 +0/-5 °C Soldering Time 5 +1/-1 seconds Recommended temperature profile for IR reflow Profile feature Average ramp-up rate (Tsmax to Tp) Preheat −Temperature Min(TS min) −Temperature Max(TS max) −Time(ts min to ts max) Time maintained above: −Temperature (TL) − Time (tL) Peak Temperature(TP) Time within 5°C of actual peak temperature(tp) Ramp down rate Time 25 °C to peak temperature Sn-Pb eutectic Assembly Pb-free Assembly 3°C/second max. 3°C/second max. 100°C 150°C 60-120 seconds 150°C 200°C 60-180 seconds 183°C 60-150 seconds 240 +0/-5 °C 217°C 60-150 seconds 260 +0/-5 °C 10-30 seconds 20-40 seconds 6°C/second max. 6 minutes max. 6°C/second max. 8 minutes max. Note : All temperatures refer to topside of the package, measured on the package body surface. BTD5213J3 CYStek Product Specification Spec. No. : C304J3 Issued Date : 2010.12.06 Revised Date : 2015.04.30 Page No. : 7/7 CYStech Electronics Corp. TO-252 Dimension Marking: 4 Device Name D5213 Date Code □□□□ 1 3-Lead TO-252 Plastic Surface Mount Package CYStek Package Code: J3 Inches Min. Max. 0.087 0.094 0.000 0.005 0.039 0.048 0.026 0.034 0.026 0.034 0.018 0.023 0.018 0.023 0.256 0.264 0.201 0.215 0.236 0.244 DIM A A1 B b b1 C C1 D D1 E Millimeters Min. Max. 2.200 2.400 0.000 0.127 0.990 1.210 0.660 0.860 0.660 0.860 0.460 0.580 0.460 0.580 6.500 6.700 5.100 5.460 6.000 6.200 2 3 Style: Pin 1.Base 2.Collector 3.Emitter 4.Collector DIM e e1 H K L L1 L2 L3 P V Inches Min. Max. 0.086 0.094 0.172 0.188 0.163 REF 0.190 REF 0.386 0.409 0.114 REF 0.055 0.067 0.024 0.039 0.026 REF 0.211 REF Millimeters Min. Max. 2.186 2.386 4.372 4.772 4.140 REF 4.830 REF 9.800 10.400 2.900 REF 1.400 1.700 0.600 1.000 0.650 REF 5.350 REF Notes: 1.Controlling dimension: millimeters. 2.Maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.If there is any question with packing specification or packing method, please contact your local CYStek sales office. Material: • Lead : Pure tin plated. • Mold Compound: Epoxy resin family, flammability solid burning class: UL94V-0. Important Notice: • All rights are reserved. Reproduction in whole or in part is prohibited without the prior written approval of CYStek. • CYStek reserves the right to make changes to its products without notice. • CYStek semiconductor products are not warranted to be suitable for use in Life-Support Applications, or systems. • CYStek assumes no liability for any consequence of customer product design, infringement of patents, or application assistance. BTD5213J3 CYStek Product Specification