EPSON QUARTZ CRYSTAL CATALOG

Crystal oscillator
SELECTABLE-OUTPUT CRYSTAL OSCILLATOR
SPG series
• Capable of selecting 57 varieties of frequency output.
• Low current consumption.
• Easy to mount DIP 16-pin package.
Actual size
Specifications (characteristics)
Item
Specifications
Symbol
Remarks
Model name
8640AN 8640BN 8640CN 8650A 8650B 8650C 8650D 8650E 8651A 8651B 8651E
Oscillation source frequency
fo
600kHz 1MHz 768kHz 60kHz 100kHz 96kHz 153.6kHz 32.768kHz 60kHz 100kHz 32.768kHz
-0.3V to +7.0V
Power source Max. supply voltage VDD-GND
voltage
5.0V±0.5V
VDD
Operating voltage
-55˚C to +125˚C
-30˚C to +80˚C
TSTG
Temperature Storage temperature
range
-10˚C to +70˚C
-10˚C to +60˚C
TOPR
Operating temperature
Soldering condition (lead part)
TSOL
Frequency tolerance
∆f/f0
Frequency temperature characteristics
Frequency voltage characteristics
Electric characteristics
(VDD=5V±0.5V, Ta=-10 to 70˚C CL ≤ 15pF)
Symbol Min.
VIL
0
L. input voltage
Unit
Typ. Max.
0.8
Item
V
VIH
VDD-1.0
VDD
IRL
-30
-5
Reset=GND
H input current (Reset)
IRH
0.5
Reset=VDD
L. input current
(input terminal except for Reset)
IIL
-0.5
IIH
5
(input terminal except for Reset)
H. output voltage
VOH
VDD-1.0
L. output current
IOL
1.6
H. output current
IOH
Symbol
Specifications
tTLH
Output fall time
tTHL
25
40
Duty
tRW
Reset delay time
tR
Reset release synchronous error
tE
External signal input frequency
FIN
External signal input pulse width
tIN
Oscillation start up time
mA
µA
60
50
VOH=VDD-1.0V
1 MHz max.
lop
About 2 mA
50%
Output waveform
1/2VDD
60
%
1.0
µs
Except in the case
of 1/3 and 1/5
VOL
t THL
tW-∗ 1
1/2 to
tW
1M
TEST
14
Hz
8640N only
µs
12
13
(
45
8640N
) 8650D
4
3
2
CTL1 to 3
7
6
5
CTL4 to 6
SPG 8650
B
EPSON 0103B
10
1/1 to 1/12
Program
Divider
4
3
2
CTL1 to 3
1/1 to 1/10 7
Program
Divider
7
(typ.)
6
5
CTL4 to 6
SPG-8650O only
Pull-up and pull-down resistance 400 K
(Unit: mm)
9
7.62
OUT
0.1 min.
OUT
tw
TEST
14
3.0 min. 4.5 max.
11
9
B
External dimensions
20.5 max.
1/1 to 1/10 7
(1/1 to 1/2)
Program
Divider
tE
∗3
s
1
CLOCK ENABLE RESET
10
tR
VSS
A
6.65
EXC. CSEL. RESET
t TLH
VOH
∗2
0.5
0.2
VDD
20%VDD
1.0
tOSC
Duty=B/A x 100 %
RESET
RESET timing
ns
Block diagram
FOUT
No load condition
80%VDD
∗ 1 to=oscillation source cycle. ∗ 2 tw=1/2 cycle of preset frequency.
∗ 3 For more than 1ms until VDD=0→4.5V. Time at 4.5V is to be 0.
CSEL
Remarks
8650 O
IOH= -40µA
V
-40
Output rise time
1/1 to 1/12
Program
Divider
No load condition
Three drops on a hard
wooden board form 75cm
VOL=0.4V
30
Min. reset pulse width
IOL=1.6mA
0.4
VOL
O
S
C.
VDD=5V, Ta=25˚C, first year
RESET timing
µA
30
L. output voltage
13
VDD=4.5 to 5.5V
tRW
H input current
12
±5ppm
±3ppm/year max.
Divider IC (without quartz crystal)
Model name
Input clock frequency
Current consumption
L. input current (Reset)
VDD=5V, Ta=25˚C
0.5mA max.
±10ppm max.
Remarks
H. input voltage
±5ppm ∗1
VDD=5V
+10/-120ppm
±20ppm ±10ppm ±20ppm
±10ppm
±5ppm/year max.
Aging
fa
Current consumption
lop
1.0mA max. 2.0mA max. 1.5mA max.
Shock resistance
±5ppm max.
±5ppm max.
S.R.
∗1 Frequency tolerance of 8651 system shows the value guaranteed at the time of shipment.
Item
Package should be less than 150˚C
Under 260˚C within 10 sec.
±50ppm
±100ppm
For output frequency, refer to
the table in the next page
90˚ to
105˚
17.78
0.25
Crystal oscillator
Terminal connection
8650A 8651A
No. Pin terminal
1
NC
2
CTL 3
3
CTL 2
4
CTL 1
5
CTL 6
6
CTL 5
7
CTL 4
8
GND
16 15 14 13 12 11 10 9
1
2
3
4
5
6
7 8
CTL4
CTL5
Set terminal
No. Pin terminal
16
VDD
15
NC
14 RESET
13 NC (CSEL)
12 NC (EXC)
11 FOUT
10
TEST
9
OUT
CTL1
0
0
0
0
1
1
1
1
0
0
0
60K
6K
30K
20K
15K
12K
10K
5K
CTL6
CTL2 CTL3
0
0
0
1
1
0
1
1
0
0
0
1
1
0
1
1
0
0
1
6.0K
600
3.0K
2.0K
1.5K
1.2K
1.0K
500
0
1
0
600
60
300
200
150
120
100
50
0
1
1
60
6
30
20
15
12
10
5
1
0
0
6.0
0.6
3.0
2.0
1.5
1.2
1.0
0.5
1
0
1
0.6
0.06
0.3
0.2
0.15
0.12
0.1
0.05
1
1
0
0.06
0.006
0.03
0.02
0.015
0.012
0.01
0.005
0.006
0.0006
0.003
0.002
0.0015
0.0012
0.001
0.0005
1
1
1
( ) shown 8640N only
8650B 8651B
For 8650 O
11. NC 12. CLOCK 13. ENABLE
NC: Do not connect to the external terminal.
Set terminal
Explanation of terminal
Programs dividing ratio. (pull-down resistor incorporated.)
Output frequency preset by CTL1 to 6.
(refer to the procedure for setting output frequency.)
Constantly outputs the oscillation source frequency of builtin
(c) FOUT :
crystal unit.
Stops output at RESET= “L”.
(d) RESET :
(pull-up resistor incorporated.)
Used for the input terminal for testing. When CTL4 is H,
(e) TEST :
output will be 1000 times larger than the preset value at
TEST= “H”. (pull-down resistor incorporated.)
Serves as input terminal when using an external clock by
(f) EXC (8640N only) :
changing to the builtin oscillator.
Effective only when CSEL is H.
(g) CSEL (8640N only) : When this terminal is made H, the external clock is selected.
(pull-down resistor incorporated.)
(a) CTL 1 to 6 :
(b) OUT :
(Note) Treatment of empty terminals. When RESET terminal is not used, this should be connected to VDD,
and when TEST terminal, CSEL terminal, and CTL 1 to 6 terminals are not used, to GND.
Explanation of terminal (8650 O)
(a) CLOCK: Clock input (max. 1 MHz) (b) ENABLE: Be sure to connect to VDD
Setting of divider output
CTL1
0
0
0
0
1
1
1
1
CTL3
0
1
0
1
0
1
0
1
CTL2
0
0
1
1
0
0
1
1
Dividing
ratio
1/1
1/10
1/2
1/3
1/4
1/5
1/6
1/12
CTL4
0
0
0
0
1
1
1
1
CTL6
0
1
0
1
0
1
0
1
CTL5
0
0
1
1
0
0
1
1
0= “L” 1=“H”
CTL4
0
0
0
0
1
1
1
1
CTL5
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1/10
CTL6
CTL1
CTL2
0
0
0
100K
10K
1K
100
10
1
0
0
1
10K
1K
100
10
1
1/10
1/100 1/1000
0
1
0
50K
5K
500
50
5
1/2
1/20
1/200
0
1
1
33.3K
33.3
3.33
1/3
1/30
1/300
1
0
0
25K
2.5K
250
25
2.5
1/4
1/40
1/400
1
0
1
20K
2K
200
20
2
1/5
1/50
1/500
1
1
0
16.6K
1.6K 166.6
16.6
1.6
1/6
1/60
1/600
1
1
1
83.3
8.3
0.83
1/12
1/120 1/1200
CTL3
3.3K 333.3
8.3K 833.3
1
1/100
8650E 8651E
Set terminal
CTL1
0
0
CTL4
0
0
0
0
1
1
1
1
CTL5
0
0
1
1
0
0
1
1
1
0
1
0
1
0
1
3.276
0.327
1.638
1.092
0.819
0.655
0.546
0.273
0.3276
0.0327
0.1638
0.1092
0.0819
0.0655
0.0546
0.0273
0.03276
0.00327
0.01638
0.01092
0.00819
0.00655
0.00546
0.00273
0.00327
0.00032
0.00163
0.00109
0.00081
0.00065
0.00054
0.00027
CTL2 CTL3 CTL6
0
0
0
32768
0
1
3276.8
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
3276.8
327.68
1638.4
1092.26
819.2
655.36
546.13
273.06
16384
10922.6
8192
6553.6
5461.3
2730.6
327.68 32.768
32.768 3.276
163.84 16.384
109.226 10.922
81.92 8.192
65.536 6.553
54.613 5.461
27.306 2.730
Note: Lower digits are omitted.
Dividing
ratio
1/1 (1/1)
Baud rate generator
1/10 (1/2)
1/102 (1/2)2
1/103 (1/2)3
1/104 (1/2)4
5
5
1/10 (1/2)
1/106 (1/2)6
7
7
1/10 (1/2)
( )8650D
8640CN
CTL1
CTL2
CTL3
CTL4
CTL5
CTL6
Output frequency
Baud rate output
example (fo/16)
0
0
0
0
0
0
768 kHz
48000bits/sec.
1
0
1
0
0
0
153.6
9600
0
0
1
0
0
0
76.8
4800
0
1
0
0
0
1
38.4
2400
1
0
0
0
0
1
19.2
1200
Setting of output frequency
8640AN
CTL4
CTL5
Set terminal
CTL1 CTL2
0
0
0
0
1
0
1
0
0
1
0
1
1
1
1
1
(Unit: Hz)
CTL3
CTL6
0
1
0
1
0
1
0
1
0
0
0
600K
60K
300K
200K
150K
120K
100K
50K
0
0
1
60K
6K
30K
20K
15K
12K
10K
5K
0
1
0
6K
600
3K
2K
1.5K
1.2K
1K
500
0
1
1
600
60
300
200
150
120
100
50
1
0
0
60
6
30
20
15
12
10
5
1
0
1
6.0
0.6
3.0
2.0
1.5
1.2
1.0
0.5
1
1
0
0.6
0.06
0.3
0.2
0.15
0.12
0.1
0.05
1
1
1
0.06
0.006
0.03
0.02
0.015
0.012
0.01
0.005
CTL1
0
0
0
0
1
1
1
1
CTL2
0
0
1
1
0
0
1
1
CTL2
CTL3
CTL4
CTL5
CTL6
Output frequency
Baud rate output
example (to/16)
0
0
0
0
0
0
96.0 kHz
6000bits/sec.
1
0
1
0
0
0
19.2
1200
0
0
1
0
0
0
9.6
600
0
1
0
0
0
1
4.8
300
0
1
1
0
0
1
3.2
200
1
0
0
0
0
1
2.4
150
1
1
0
0
0
1
1.6
100
1
1
1
0
0
1
0.8
50
CTL3
0
0
0
0
0
0
1
0
0
0
1
CTL4
0
0
0
0
1
1
1
1
1
1
1
CTL5
0
0
1
1
0
0
0
1
0
1
0
CTL6
0
1
0
1
0
1
0
0
0
1
0
8650D
CTL1
8640BN
Set terminal
8650C
CTL1
CTL4
CTL5
CTL3
CTL6
0
1
0
1
0
1
0
1
0
0
0
0
1
1
1
0
1
1M
100K
10K 1K
10K
1K 100
100K
50K
5K 500
500K
333.3K 33.3K 3.3K 333.3
25K 2.5K 250
250K
20K
2K 200
200K
166.6K 16.6K 1.6K 166.6
8.3K 833.3 83.3
83.3K
0
0
0
1
0
0
100
10
50
33.3
25
20
16.6
8.3
1
0
1
10
1
5
3.33
2.5
2
1.6
0.83
1
1
0
1
1/10
1/2
1/3
1/4
1/5
1/6
1/12
1
1
1
1/10
1/100
1/20
1/30
1/40
1/50
1/60
1/120
0
0
0
0
0
0
0
0
1
0
1
CTL2
0
0
0
0
0
0
1
0
1
0
1
Output frequency
153.6 kHz
76.8
38.4
19.2
9.6
4.8
3.2
2.4
1.6
1.2
0.8
Baud rate output
example (fo/16)
9600bits/sec.
4800
2400
1200
600
300
200
150
100
75
50
46