Crystal Clock Oscillators
99SMOM (+1.8V, +2.5V, +3.3V or +5V FIXED MODELS)
99SMOM
STANDARD SMD CLOCK OSCILLATORS
STANDARD SPECIFICATIONS
2.5 MHz to 55.0 MHz
over all conditions
Operating Conditions
Operating temperature
Input voltage (VDD)
＋1.8V ±5%
Stand-by control voltage (Pin#1)
99SMOM
Absolute Max. Ratings
Supply voltage
Storage temperature
Input current (Pin#1=Open or VIH)
Stand-by current※2(Pin#1=VIL)
Output (-40˚C to ＋85˚C)
Symmetry
Rise and fall times
5.0±0.2
#3
#1
#2
1.0±0.2
3.2±0.2
#4
1.2 1.34 1.2
#2
1.0
#1
1.2
#3
2.54
PIN
1
2
3
4
"1" level (VOH)
CONNECTION
"L"
OPEN or "H"
GND
Z
OUTPUT
VDD
Z : high impedance
OUTPUT WAVEFORM
TR
6 ns max.
10%VDD to 90%VDD
"0" level (VOL)
1.0
#4
2.0 mA max.
3μA max.
TF
VOH ("1"Level)
VDD
90% or 80% VDD
VOL ("0"Level)
GND
10% or 20% VDD
OV DC
Load
Disable delay time
Enable delay time
Startup time
Aging(non operating)
Reflow condition
50% VDD
t
T
Specifications
99SMOM※1
2.5 MHz to 125.0 MHz
99SMOM(A) : ±100 ppm
99SMOM(B) : ±50 ppm
99SMOM(C) : ±30 ppm
99SMOM(D) : ±25 ppm
1.0 MHz to 125.0 MHz
-10˚C to ＋70˚C (standard)
-40˚C to ＋85˚C (W)
＋2.5V ±5%
＋3.3V ±10%
＋5V ±10%
VIH : ＋2V min.
VIH : 70%VDD min.
VIL : 20%VDD max.※2
VIL : ＋0.8V max.※2
-0.5V to ＋7.0V DC
-55˚C to ＋125˚C
24 mA max.
60 mA max.
10μA max.
10μA max.
50 mA max.
50μA max.
40% to 60% at 50%VDD level
5 ns max.(10%VDD to 90%VDD)2.5 / 1.0 MHz to 70 MHz
4 ns max.
20%VDD to 80%VDD
3 ns max.(20%VDD to 80%VDD)70 MHz to 125 MHz
10%VDD max.(2.5 / 1.0 MHz to 70 MHz)
10%VDD max.
20%VDD max.
20%VDD max.(70 MHz to 125 MHz)
90%VDD min.(2.5 / 1.0 MHz to 70 MHz)
90%VDD min.
80%VDD min.
80%VDD min.(70 MHz to 125 MHz)
5 pF max. (CMOS)
15 pF max. (CMOS)
100 ns max.
10 ms max.
10 ms max.
±5 ppm max. at ＋25˚C ±3˚C for first year
＋250˚C ±10˚C for 10 seconds
＋170˚C ±10˚C for 1 to 2 minutes (preheating)
(※1) Final exact part number to be determined with frequency, frequency stability, operating temperature and input voltage.
e.g. 99SMOM(2.5VC) 20.000 MHz.
(※2) Internal crystal oscillation to be halted (Pin #1=VIL).
Symmetry=t/T×100(%)
PACKAGE DATA
TEST CIRCUIT
A
#3
#4
Ceramic
#2
Sealing
Seam
Terminal
Tungsten (metalized)
Terminal plating
CL : including fixture and probe capacitance.
RoHS
Gold / Nickel
(surface) / (under)
TAPE SPECIFICATIONS
Compliant (Pb-free)
4.0±0.1
2.0±0.1
L
SOLDERING PATTERN
φ1.5 +-0.1
0
1.4
D
1.14
A
1.4
1.75±0.1
CL
GND
#1
Metal
Base
OUTPUT
TRI-STATE
E/D SW
V
0.01μF∼0.1μF
VDD
DC Power
Supply
99SMOM
Lid
C
VDD
Package
Item
Test Point
1.2
J
B
F
1.0
M
1.2
0.01μF
∼
0.1μF
A
B
C
D
F
J
L
M Reel Dia. Qty/Reel
5.4 3.5 12.0 5.5 8.0 1.5 0.3 1.4
178
1000pcs
2.54
81
CLK OSC
Item
Generic part number
Frequency range
Frequency stability
(-10˚C to ＋70˚C)
Actual Size