Eon Silicon Solution Inc. Migration Note EON Flash EN25F32 to EN25Q32B This Application Note may be revised by subsequent versions or modifications due to changes in technical specifications. 1 Rev. B, Issue Date: 2010/10/15 ©2005 Eon Silicon Solution Inc. www.eonssi.com Eon Silicon Solution Inc. 1. INTRODUCTION The application note introduces how to implement a system design from EON EN25F32 Flash to Eon EN25Q32B Flash. 2. GENERAL FUNCTION COMPARISON TABLE: 2.1 The following table is major features of these two devices. Features EN25Q32B EN25F32 voltage range 2.7 ~ 3.6 2.7 ~ 3.6 SPI frequency 104MHz (standard mode) 80MHz @ dual & quad mode 100MHz (standard mode) Secured Silicon 512 Byte 512 Byte Sector region Sector Uniform 1024 sectors of 4K byte Uniform 1024 sectors of 4K byte Architecture / 64 block of 64K byte / 64 block of 64K byte SPI mode Mode 0 / Mode 3 Mode 0 / Mode 3 Dual output fast Yes No read (3Bh) Dual I/O fast read Yes No (BBh) Quad I/O fast Yes No read (EBh) Software reset Yes No Minimum endurance cycle Package 100K 100K 8-pin SOP 200mil 8 contact VDFN 16-pin SOP 300mil 24-ball BGA (6 x 8 mm) 8-pin SOP 200mil 8 contact VDFN 8-pin PDIP 16-pin SOP 300mil This Application Note may be revised by subsequent versions or modifications due to changes in technical specifications. 2 Rev. B, Issue Date: 2010/10/15 ©2005 Eon Silicon Solution Inc. www.eonssi.com Eon Silicon Solution Inc. 2.2 The following table is pin comparison Pin number Pin1 Pin2 Pin3 Pin4 Pin5 Pin6 Pin7 Pin8 EN25Q32B CS# DO (DQ1) WP# (DQ2) VSS DI (DQ0) CLK NC (DQ3) VCC EN25F32 CS# DO WP# VSS DI CLK HOLD# VCC Note: If customers don’t use Hold# pin function on EN25F32, which can be replaced by EN25Q32B in standard SPI mode. EN25F32 only support general standard SPI mode. EN25Q32B can support general standard / dual / quad SPI mode. (Need specific SPI controller) 3. HARDWARE CONSIDERATIONS 3.1 ICC comparison EN25Q32B EN25F32 Max 25 @ 100MHz mA Page Program (PP) ICC4 Max 25 @ 104MHz 20 @ 80MHz 28 28 mA Sector Erase (SE) ICC6 25 25 mA Standby ICC1 20 20 μA Current Read ICC3 This Application Note may be revised by subsequent versions or modifications due to changes in technical specifications. 3 Rev. B, Issue Date: 2010/10/15 Unit ©2005 Eon Silicon Solution Inc. www.eonssi.com Eon Silicon Solution Inc. 4. SOFTWARE CONSIDERATIONS Except of memory type, (only difference on 9Fh command) there is no difference in Manufacture ID, Device ID 4.1 Manufacturer, Memory Type & Device Identification (M7~M0: manufacture ID, D15~ID0: memory type, ID7~ID0: memory density) For EN25F32 For EN25Q32B This Application Note may be revised by subsequent versions or modifications due to changes in technical specifications. 4 Rev. B, Issue Date: 2010/10/15 ©2005 Eon Silicon Solution Inc. www.eonssi.com Eon Silicon Solution Inc. 4.2 Different RDSR bit definition EN25F32： EN25Q32B： This Application Note may be revised by subsequent versions or modifications due to changes in technical specifications. 5 Rev. B, Issue Date: 2010/10/15 ©2005 Eon Silicon Solution Inc. www.eonssi.com Eon Silicon Solution Inc. 4.3 Software Reset There is a new function “Software Reset” in EN25Q32B, which can put the device in normal operating Ready mode. Figure 1. Reset-Enable and Reset Sequence Diagram Figure 2 . Reset-Enable and Reset Sequence Diagram under EQIO Mode This Application Note may be revised by subsequent versions or modifications due to changes in technical specifications. 6 Rev. B, Issue Date: 2010/10/15 ©2005 Eon Silicon Solution Inc. www.eonssi.com Eon Silicon Solution Inc. 5. PERFORMANCE DIFFERENCES 5.1 ERASE AND PROGRAM PERFORMANCE The erasing and programming performance comparison. Parameter EN25Q32B EN25F32 Unit Typ Max Typ Max Sector Erase Time 0.05 0.3 0.09 0.3 Sec Block Erase Time 0.2 2 0.5 2 Sec Chip Erase Time 15＊ 25 25＊ 50 Sec Page Programming Time 0.8 5 1.3 5 ms ＊NOTE: ERASE FROM “1” Æ “1”. 5.2 KEY AC PARAMETER PERFORMANCE EN25Q32B EN25F32 tCH (serial clock high time) Min@ 4ns Min@ 4ns tCL (serial clock low time) Min@ 4ns Min@ 4ns tCLCH(serial clock rise time) Min@ 0.1V / ns Min@ 0.1V / ns tCLCL(serial clock fall time) Min@ 0.1V / ns Min@ 0.1V / ns Min@ 5ns Min@ 5ns Parameter tCHSH(CS# active setup / hold time) tSHSL(CS# high time) Min, read @15ns Program/Erase @50ns Min@100ns tDSU(Data in setup time) Min@2ns Min@2ns tDH(Data in hold time) Min@5ns Min@5ns This Application Note may be revised by subsequent versions or modifications due to changes in technical specifications. 7 Rev. B, Issue Date: 2010/10/15 ©2005 Eon Silicon Solution Inc. www.eonssi.com Eon Silicon Solution Inc. Revisions List Revision No Description Date A B 2010/09/30 2010/10/15 Initial Release Add Different RDSR bit definition on page 5. This Application Note may be revised by subsequent versions or modifications due to changes in technical specifications. 8 Rev. B, Issue Date: 2010/10/15 ©2005 Eon Silicon Solution Inc. www.eonssi.com