UM232H Datasheet

Future Technology Devices
International Ltd
UM232H Single Channel USB Hi-Speed
FT232H Development Module
Datasheet
Document Reference No.: FT_000367
Version 1.3
Issue Date: 2012-010-24
Future Technology Devices International Ltd (FTDI)
Unit 1, 2 Seaward Place, Centurion Business Park, Glasgow, G41 1HH, United Kingdom
Tel: +44 (0) 141 429 2777, Fax: +44 (0) 141 429 2758
E-Mail (Support): [email protected] Web: http://www.ftdichip.com
Use of FTDI devices in life support and/or safety applications is entirely at the user’s risk, and the user agrees to defend,
indemnify and hold FTDI harmless from any and all damages, claims, suits or expense resulting from such use.
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Datasheet Version 1.3
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1
Introduction
The UM232H is a USB-to-serial/FIFO development module in the FTDI product range which utilises the
FT232H USB Hi-Speed (480Mb/s) single-port bridge chip to handle the USB signaling and protocols. The
UM232H is ideal for development purposes to quickly prove functionality of adding USB to a target design.
The UM232H is a module designed to plug into a standard 0.6” wide 28 pin DIP socket. The USB connection
to a host system is via a mini-B USB connector. All components used, including the FT232H, are Pb-free
(RoHS compliant).
Figure 1.1 : UM232H USB to Serial/FIFO Development Module
1.1 FT232H
The FT232H is a single channel USB 2.0 Hi-Speed (480Mb/s) to Serial/FIFO IC. It can be configured in a
variety of serial or parallel interfaces, such as UART, FIFO or FTDI’s MPSSE mode which can configure either
of the following interfaces: JTAG, SPI and I2C. For MPSSE mode, there is also 14 bit-banging lines available
along with the four interface lines. In addition to these, the FT232H supports a CPU-Style FIFO mode and a
fast serial interface mode. It also introduces a half-duplex FT1248 interface that provides a flexible data
communication and high performance interface between the FT232H device and external logic. For further
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details on the FT232H and the FT1248 mode, please refer to the FT232H datasheet and application note:
AN_167 FT1248 Parallel Serial Interface Basics, located at the FTDI website.
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Table of Contents
1
Introduction .................................................................... 1
1.1
2
3
Typical Applications ........................................................ 5
2.1
Driver Support .......................................................................... 5
2.2
Part Numbers ............................................................................ 5
2.3
Features .................................................................................... 6
FT232H Features and Enhancement ................................ 7
3.1
4
FT232H ..................................................................................... 1
Key Features ............................................................................. 7
UM232H Pin Out and Signal Descriptions ........................ 9
4.1
UM232H Pin Out ........................................................................ 9
4.2
Signal Descriptions ................................................................. 10
4.3
ACBUS Signal Options ............................................................. 13
5
Module Dimensions ....................................................... 14
6
FT232H Device Characteristics and Ratings .................. 15
6.1
7
DC Characteristics ................................................................... 15
Module Configurations .................................................. 16
7.1
BUS Powered Configuration .................................................... 16
7.2
USB Bus Powered with Power Switching Configuration .......... 17
7.3
Self Powered Configuration .................................................... 18
7.3.1
Self-Powered Configuration with 3V3 I/O and running on +5V external supply: 18
7.3.2
Self-Powered Configuration with 3V3 I/O and running on +3.3V external supply:20
8
UM232H Module Circuit Schematic ................................ 22
9
EEPROM Configuration .................................................. 24
10 Contact Information ...................................................... 25
Appendix A – List of Tables and Figures .......................................... 26
Appendix B – Revision History ........................................... 27
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2
Typical Applications
The UM232H module can be used for prototyping and evaluation in an application using the FT232H.

Rapid USB integration into existing and new electronic systems


USB to FT1248 interfaces (half duplex)

USB to RS232 / RS422 / RS485 Converters

USB Instrumentation

USB Industrial Control

USB Electronic Point Of Sale Control

Upgrading Legacy Peripherals to USB

Cellular and Cordless Phone USB data transfer cables and interfaces

Interfacing MCU / PLD / FPGA based designs to USB

USB Audio and Low Bandwidth Video data transfer


USB Smart Card Readers

USB MP3 Player Interface

USB FLASH Card Reader / Writers

Set Top Box PC - USB interface

USB Digital Camera Interface

USB Hardware Modems

USB Wireless Modems

USB dongle applications

USB Bar Code Readers

USB Software / Hardware Encryption Dongles

USB Medical applications
2.1 Driver Support
The UM232H development module requires USB device drivers, available free from FTDI website.
There is the Virtual Com Port driver which allows the UM232H to appear as a serial port allowing legacy
applications for serial ports to function over USB (for example TTY). Another FTDI USB driver, the D2XX
driver, can also be used with application software to directly access the FT232H on the UM232H through a
DLL.
Supported platforms include: current Microsoft® Windows® operating systems, Linux®version 2.6.39 or
later (VCP drivers), Linux®version 2.6.32 or later (D2XX drivers), Mac OS® and Microsoft Windows CE®
version 4.2 onwards.
2.2 Part Numbers
Part Number
Description
UM232H
Development module for FT232H
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2.3 Features
The UM232H has the following features:

Based on the Single chip USB Hi-Speed
FT232H device.

1kByte receive and transmit buffers for
high data throughput.

USB 2.0 Hi-Speed (480Mbits/Second) and
Full Speed (12Mbits/Second) compatible

Transmit and receive LED drive signals.

Entire USB protocol handled on the chip –
No USB-specific firmware programming
required.

Adjustable receive buffer timeout.

Synchronous and asynchronous bit bang
mode interface options with RD# and WR#

Small USB Type B connector common on
many commercial devices

USB bus or self powered options.


Asynchronous UART transfer data rate up
to 12Mbaud.


UART interface support for 7 or 8 data bits,
1 or 2 stop bits and odd / even / mark /
space / no parity.

Fully assisted hardware or X-On / X-Off
software handshaking.

Auto-transmit buffer control for RS485
applications.

Supports a half duplex FT1248 interface
with a bi-directional data bus (1, 2, 4 or 8
bits wide).

Synchronous Serial (MPSSE) data rates of
up to 30Mbps on JTAG, SPI and I2C

Support for USB suspend and resume

UHCI / OHCI / EHCI host controller
compatible

FTDI’s royalty-free VCP and D2XX drivers
eliminate the requirement for USB driver
development in most cases.
strobes.
Support for USB suspend and resume.
Integrated 3.3V level converter for USB
I/O.


USB bulk transfer mode.
+2.97V to +5.25V Single Supply
Operation.

Low operating and USB suspend current.

Low USB bandwidth consumption.

-40°C to +85°C operating temperature
range


Rapid integration into existing systems
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3
FT232H Features and Enhancement
3.1 Key Features
USB Hi-Speed to UART/FIFO Interface. The FT232H provides a USB 2.0 Hi-Speed (480Mbits/s) to
flexible and configurable UART/FIFO Interfaces.
Functional Integration. The FT232H integrates a USB protocol engine, which controls the physical
Universal Transceiver Macrocell Interface (UTMI) and handles all aspects of the USB 2.0 Hi-Speed interface.
The FT232H includes an integrated +1.8V/3.3V Low Drop-Out (LDO) regulator. It also includes 1Kbytes Tx
and Rx data buffers. The FT232H integrates the entire USB protocol on a chip with no firmware required.
MPSSE. Multi-Protocol Synchronous Serial Engines (MPSSE), capable of speeds up to 30 Mbits/s, provides
flexible synchronous interface configurations.
FT1248 interface. The FT232H supports a half-duplex FT1248 interface with a bi-directional data bus
interface that can be configured as 1, 2, 4 or 8-bits wide and this enables the flexibility to expand the size
of the data bus to 8 pins. The FT1248 interface provides flexible data communication between an FT232H
FT1248 slave and an external FT1248 master. The FT1248 interface consists of four signals called
MIOSIO, the bi-directional data lines between the FT232H and an external master controller,
SCLK, which is the external clock input for latching data in or out the device at frequency up to 30MHz,
SS_N Slave select input
MISO, which is the Master In Slave Out output from the FT232H in FT1248 mode.
An external FT1248 master selects one of the FT1248 slave devices or enables the interface by pulling the
Slave select input (SS_N) to logic 0. The FT1248 mode can be configured via the EEPROM settings with the
free utility called FT_PROG which can be downloaded from the FTDI utilities page. For further details about
FT1248 mode, see FT232H datasheet and application note AN_167 FT1248 Parallel Serial Interface Basics
at the FTDI website.
Data Transfer rate. The FT232H supports a data transfer rate up to 12 Mbaud when configured as an
RS232/RS422/RS485 UART interface or up to 40 Mbytes/second over a synchronous 245 parallel FIFO
interface or up to 8 Mbyte/Sec over an asynchronous 245 FIFO interface.
Latency Timer. A feature of the driver used as a timeout to transmit short packets of data back to the PC.
The default is 16ms, but it can be altered between 0ms and 255ms.
Bus (ACBUS) functionality, signal inversion and drive strength selection. There are 11 configurable
ACBUS I/O pins. These configurable options are:
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
TXDEN - transmit enable for RS485 designs.
PWREN# - Power control for high power, bus powered designs.
TXLED# - for pulsing an LED upon transmission of data.
RXLED# - for pulsing an LED upon receiving data.
TX&RXLED# - which will pulse an LED upon transmission OR reception of data.
SLEEP# - indicates that the device going into USB suspend mode.
CLK30 / CLK15 / CLK7.5 - 30MHz, 15MHz and 7.5MHz clock output signal options.
TriSt-PU – Input pulled up, not used
DRIVE 1 – Output driving high
DRIVE 0 - Output driving low
I/O mode – ACBUS Bit Bang
The ACBUS pins can also be individually configured as GPIO pins, similar to asynchronous bit bang mode. It
is possible to use this mode while the UART interface is being used, thus providing up to 4 general purpose
I/O pins which are available during normal operation.
The ACBUS lines can be configured with any one of these input/output options by setting bits in the
external EEPROM
Multi-Purpose UART/FIFO Controllers. The FT232H has one independent Serial/FIFO Controller. This
controls the UART data, 245 FIFO data, Fast Serial (opto isolation) or Bit-Bang mode which can be selected
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by SETUP (SetBitMode) command. Each Multi-Purpose UART/FIFO Controller also contains an MPSSE
(Multi-Protocol Synchronous Serial Engine). Using this MPSSE, the Multi-Purpose Serial/FIFO Controller can
be configured under software command, to have one of the MPSSE interfaces (SPI, I2C, and JTAG).
USB Protocol Engine and FIFO control. The USB Protocol Engine controls and manages the interface
between the UTMI PHY and the FIFOs of the chip. It also handles power management and the USB protocol
specification.
Port FIFO TX Buffer (1Kbytes). Data from the Host PC is stored in these buffers to be used by the Multipurpose UART/FIFO controllers. This is controlled by the USB Protocol Engine and FIFO control block.
Port FIFO RX Buffer (1Kbytes). Data from the Multi-purpose Serial/FIFO controllers is stored in these
blocks to be sent back to the Host PC when requested. This is controlled by the USB Protocol Engine and
FIFO control block.
RESET Generator – The integrated Reset Generator Cell provides a reliable power-on reset to the device
internal circuitry at power up. The RESET# input pin allows an external device to reset the FT232H. RESET#
should be tied to VCCIO (+3.3V) if not being used.
Baud Rate Generators – The Baud Rate Generators provides a x16 or a x10 clock input to the UART’s
from a 120MHz reference clock and consists of a 14 bit prescaler and 4 register bits which provide fine
tuning of the baud rate (used to divide by a number plus a fraction). This determines the Baud Rate of the
UART, which is programmable from 183 baud to 12 Mbaud. See FTDI application note AN_120 on the FTDI
website for more details.
EEPROM Interface. If the external EEPROM is fitted, the FT232H can be configured as an asynchronous
serial UART (default mode), parallel FIFO (245) mode, FT1248, fast serial (opto isolation) or CPU-Style
FIFO. The EEPROM should be a 16 bit wide configuration such as a 93LC56B or equivalent capable of a
1Mbit/s clock rate at VCCIO = +2.97V to 3.63V. The EEPROM is programmable in-circuit over USB using a
utility program called FT_Prog available from FTDI web site.
+1.8/3.3V LDO Regulator. The +3.3/+1.8V LDO regulator generates +1.8 volts for the core and the USB
transceiver cell and +3.3V for the IO and the internal PLL and USB PHY power supply.
UTMI PHY. The Universal Transceiver Macrocell Interface (UTMI) physical interface cell is the USB
transceiver. This block handles the Full speed / Hi-Speed SERDES (serialise – deserialise) function for the
USB TX/RX data. It also provides the clocks for the rest of the chip. A 12 MHz crystal must be connected to
the OSCI and OSCO pins or 12 MHz Oscillator must be connected to the OSCI, and the OSCO is left
unconnected. A 12K Ohm resistor should be connected between REF and GND on the PCB.
The UTMI PHY functions include:

Supports 480 Mbit/s “Hi-Speed” (HS)/ 12 Mbit/s “Full Speed” (FS).

SYNC/EOP generation and checking

Data and clock recovery from serial stream on the USB.

Bit-stuffing/unstuffing; bit stuff error detection.

Manages USB Resume, Wake Up and Suspend functions.

Single parallel data clock output with on-chip PLL to generate higher speed serial data clocks.
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4
UM232H Pin Out and Signal Descriptions
4.1 UM232H Pin Out
The signal labels and pin designators for each are pin of the UM232H are illustrated in Fig. 4.1.
FTDI 2011
GND – J1-1
J2-1 – SLD
VIO
5V0
3V3
USB
PU2
RST#
PU1
AC9
GND
AC8
AD0
AC7
AD1
AC6
AD2
AC5
AD3
AC4
AD4
AC3
AD5
AC2
GND
AD6
AC1
AC0 – J1-14
J2-14 – AD7
Figure 4.1 : Module Pin Out
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4.2 Signal Descriptions
FT232H
Pin
Pin functions (depends on configuration)
ASYNC
Serial
(RS232)
TXD
SYNC
245 FIFO
D0
STYLE
ASYNC
245 FIFO
D0
ASYNC
Bit-bang
D0
SYNC
Bit-bang
D0
MPSSE
TCK/SK
Fast Serial
interface
FSDI
CPU Style
FIFO
D0
FT1248
MIOSI0
ADBUS1
RXD
D1
D1
D1
D1
TDI/DO
FSCLK
D1
MIOSI1
ADBUS2
RTS#
D2
D2
D2
D2
TDO/DI
FSDO
D2
MIOSI2
16
ADBUS3
CTS#
D3
D3
D3
D3
TMS/CS
D3
MIOSI3
17
ADBUS4
DTR#
D4
D4
D4
D4
GPIOL0
D4
MIOSI4
18
ADBUS5
DSR#
D5
D5
D5
D5
GPIOL1
D5
MIOSI5
19
ADBUS6
DCD#
D6
D6
D6
D6
GPIOL2
D6
MIOSI6
20
ADBUS7
RI#
D7
D7
D7
D7
GPIOL3
FSCTS
**
TriSt-UP
**
TriSt-UP
**
TriSt-UP
**
TriSt-UP
D7
MIOSI7
21
ACBUS0
*
RXF#
RXF#
ACBUS0
ACBUS0
GPIOH0
CS#
SCLK
25
ACBUS1
TXE#
TXE#
WRSTB#
WRSTB#
GPIOH1
A0
SS_N
26
ACBUS2
RD#
RD#
RDSTB#
RDSTB#
GPIOH2
RD#
MISO
27
ACBUS3
WR
WR
ACBUS3
ACBUS3
GPIOH3
WR
ACBUS3
28
ACBUS4
SIWU#
SIWU#
SIWU#
SIWU#
GPIOH4
SIWU#
ACBUS4
29
ACBUS5
CLKOUT
ACBUS5
GPIOH5
**
**
ACBUS5
ACBUS5
ACBUS5
30
ACBUS6
OE#
31
ACBUS7
PWRSAV#
32
ACBUS8
33
ACBUS9
Pin
#
13
Pin
Name
ADBUS0
14
15
TXDEN
**
ACBUS1
**
ACBUS2
*
RXLED#
*
TXLED#
**
ACBUS5
**
ACBUS6
PWRSAV#
**
**
ACBUS5
ACBUS5
ACBUS6
ACBUS6
ACBUS6
GPIOH6
PWRSAV#
PWRSAV#
PWRSAV#
***
GPIOH7
**
ACBUS0
**
ACBUS1
**
ACBUS2
**
ACBUS3
SIWU#
**
**
ACBUS6
ACBUS6
PWRSAV#
PWRSAV#
PWRSAV#
**
ACBUS8
ACBUS8
**
**
**
**
**
**
**
ACBUS8
ACBUS8
ACBUS8
ACBUS8
ACBUS8
ACBUS8
ACBUS8
**
**
**
**
**
**
**
**
ACBUS9
ACBUS9
ACBUS9
ACBUS9
ACBUS9
ACBUS9
ACBUS9
ACBUS9
ACBUS6
ACBUS9
Pins marked * are EEPROM selectable
Table 4.1 : UM232H Signals
Pins marked ** default to tri-stated inputs with an internal 75KΩ (approx) pull up resistor to VCCIO.
Pin marked *** default to GPIO line with an internal 75KΩ pull down resistor to GND. Using the EEPROM
this pin can be enabled USBVCC mode instead of GPIO mode.
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The following 2 tables provide a description of the signals available on each pin of the UM232H module
Pin No.
Name
Type
Description
J1-1
GND
PWR
Module Ground Supply Pins
J1-2
5V0
Input
+5.0V or +3.3V power supply input.
5V Power output USB port. For a low power USB bus powered design, up to
100mA can be sourced from the 5V supply on the USB bus. A maximum of
500mA can be sourced from the USB bus in a high power USB bus powered
design.
Can be used by an external device to reset the FT232H. If not required can be
left unconnected, or pulled up to VCCIO
J1-3
USB
Output
J1-4
RST#
Input
J1-5
AC9
I/O
Configurable ACBUS I/O Pin. Function of this pin is configured by EEPROM. The
default configuration is TriSt-PU. See ACBUS Signal Options, Table 4.3
J1-6
AC8
I/O
Configurable ACBUS I/O Pin. Function of this pin is configured by EEPROM. The
default configuration is TriSt-PU. See ACBUS Signal Options, Table 4.3
J1-7
AC7
I/O
Configurable ACBUS I/O Pin. Function of this pin is configured by EEPROM. The
default configuration is TriSt-PD. See ACBUS Signal Options, Table 4.3
J1-8
AC6
I/O
Configurable ACBUS I/O Pin. Function of this pin is configured by EEPROM. The
default configuration is TriSt-PU. See ACBUS Signal Options, Table 4.3
J1-9
AC5
I/O
Configurable ACBUS I/O Pin. Function of this pin is configured by EEPROM. The
default configuration is TriSt-PU. See ACBUS Signal Options, Table 4.3
J1-10
AC4
I/O
Configurable ACBUS I/O Pin. Function of this pin is configured by EEPROM. The
default configuration is TriSt-PU. See ACBUS Signal Options, Table 4.3
J1-11
AC3
I/O
Configurable ACBUS I/O Pin. Function of this pin is configured by EEPROM. The
default configuration is TriSt-PU. See ACBUS Signal Options, Table 4.3
J1-12
AC2
I/O
Configurable ACBUS I/O Pin. Function of this pin is configured by EEPROM. The
default configuration is TriSt-PU. See ACBUS Signal Options, Table 4.3
J1-13
AC1
I/O
Configurable ACBUS I/O Pin. Function of this pin is configured by EEPROM. The
default configuration is TriSt-PU. See ACBUS Signal Options, Table 4.3
J1-14
AC0
I/O
Configurable ACBUS I/O Pin. Function of this pin is configured by EEPROM. The
default configuration is TriSt-PU. See ACBUS Signal Options, Table 4.3
Table 4.2 : UM232H Connector J1 Signal Description
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Pin No.
Name
Type
Description
J2-1
SLD
Shield to GND
USB Cable Shield shorted to GND via a 0Ω resistor.
J2-2
VIO
PWR
Supply to the UART Interface and ACBUS I/O pins. Nominally 3.3V. Full range
is 2.97V to 3.63V.
J2-3
3V3
J2-4
PU2
Control
Pull up resistor pin connection 1. Connect to J1-3 (USB) in a self powered
configuration.
J2-5
PU1
Control
Pull up resistor pin connection 2. Connect to J1-4 (RST#) in a self powered
configuration.
J2-6
GND
PWR
Module Ground Supply Pins
J2-7
AD0
Output
Configurable Output Pin, the default configuration is Transmit Asynchronous
Data Output / Handshake Signal..
Input
Configurable Input Pin, the default configuration is Receiving Asynchronous Data
Input / Handshake Signal..
Output
Configurable Output Pin, the default configuration is Request to Send Control
Output / Handshake Signal.
Input
Configurable Input Pin, the default configuration is Clear To Send Control Input /
Handshake Signal.
Output
Configurable Output Pin, the default configuration is Data Terminal Ready
Control Output / Handshake Signal.
Input
Configurable Input Pin, the default configuration is Data Set Ready Control Input
/ Handshake Signal.
Input
Configurable Input Pin, the default configuration is Data Carrier Detect Control
Input / Handshake Signal..
Input
Configurable Input Pin, the default configuration is RI#, Ring Indicator Control
Input/ Handshake Signal. When remote wake up is enabled in the EEPROM
taking RI# low >20ms can be used to resume the PC USB host controller from
suspend.
J2-8
J2-9
J2-10
J2-11
J2-12
J2-13
J2-14
AD1
AD2
AD3
AD4
AD5
AD6
AD7
Output/Input
+3.3V output from the integrated L.D.O. regulator if the UM232H is running on
5V self or bus powered designs. Therefore this pin can be used to supply the
FT232HL’s VCCIO pin by connecting this pin to J2-2 (VIO). This pin can also be
an input if the UM232H is running on 3.3V self powered designs.
Table 4.3 : UM232H Connector J2 Signal Description
Notes:
1. When used in Input Mode, the input pins are pulled to VCCIO via internal 75kΩ (approx.) resistors. These
pins can be programmed to gently pull low during USB suspend (PWREN# = “1”) by setting an option in the
EEPROM.
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4.3 ACBUS Signal Options
The table below describes the EEPROM options which can be configured on the ACBUS I/O pins using the
software utility FT_PROG (which can be downloaded from the FTDI utilities page) The default EEPROM
configuration is described in section 9.
ACBUS Signal
Option
Available On ACBUS Pin
Description
TXDEN
ACBUS0, ACBUS1, ACBUS2, ACBUS3,
ACBUS4, ACBUS5, ACBUS6, ACBUS8,
ACBUS9
TXDEN = (TTL level). Used with RS485 level converters to
enable the line driver during data transmit. TXDEN is
active from one-bit time before the start bit is transmitted
on TXD until one bit time after the last stop bit.
*PWREN#
ACBUS0, ACBUS1, ACBUS2, ACBUS3,
ACBUS4, ACBUS5, ACBUS6, ACBUS8,
ACBUS9
Output is low after the device has been configured by
USB, then high during USB suspend mode. This output can
be used to control power to external logic P-Channel logic
level MOSFET switch. Enable the interface pull-down
option when using the PWREN# in this way.*
TXLED#
ACBUS0, ACBUS1, ACBUS2, ACBUS3,
ACBUS4, ACBUS5, ACBUS6, ACBUS8,
ACBUS9
TXLED = Transmit signalling output. Pulses low when
transmitting data (TXD) to the external device. This can
be connected to an LED.
RXLED#
ACBUS0, ACBUS1, ACBUS2, ACBUS3,
ACBUS4, ACBUS5, ACBUS6, ACBUS8,
ACBUS9
RXLED = Receive signalling output. Pulses low when
receiving data (RXD) from the external device. This can be
connected to an LED.
TX&RXLED#
ACBUS0, ACBUS1, ACBUS2, ACBUS3,
ACBUS4, ACBUS5, ACBUS6, ACBUS8,
ACBUS9
LED drive – pulses low when transmitting or receiving data
from or to the external device. For more details, refer to
the FT232H datasheet on the FTDI website.
SLEEP#
ACBUS0, ACBUS1, ACBUS2, ACBUS3,
ACBUS4, ACBUS5, ACBUS6, ACBUS8,
ACBUS9
Goes low during USB suspend mode. Typically used to
power down an external TTL to RS232 level converter IC
in USB to RS232 converter designs.
**CLK30
ACBUS0, ACBUS5, ACBUS6,ACBUS8,
ACBUS9
30MHz Clock output.
**CLK15
ACBUS0, ACBUS5, ACBUS6,ACBUS8,
ACBUS9
15MHz Clock output.
**CLK7.5
ACBUS0, ACBUS5, ACBUS6,ACBUS8,
ACBUS9
7.5MHz Clock output.
TriSt-PU
ACBUS0, ACBUS1, ACBUS2, ACBUS3,
ACBUS4, ACBUS5, ACBUS6, ACBUS8,
ACBUS9
Input Pull Up
DRIVE 1
ACBUS0, ACBUS5, ACBUS6,ACBUS8,
ACBUS9
Output High
DRIVE 0
ACBUS0, ACBUS1, ACBUS2, ACBUS3,
ACBUS4, ACBUS5, ACBUS6, ACBUS8,
ACBUS9
Output Low
I/O mode
ACBUS5, ACBUS6,ACBUS8, ACBUS9
ACBUS BitBang
Table 4.4 : ACBUS Signal Option
* A 10kΩ resistor pull up is also recommended.
**When in USB suspend mode, the output clocks are also suspended.
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5
Module Dimensions
2.54
18.25
15.24
13.0
GND
5.3
FTDI 2011
10.0
43.0
44.5
8.0
1.6
14.9
2.0
4.1
Diameter
5.8
5.0
12.50
0.50
14.80
Figure 5.1 : UM232H Module Dimensions
All dimensions are in millimetres.
The UM232H module uses lead free components, and are fully compliant with European Union specifications
directive 2002/95/EC.
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6
FT232H Device Characteristics and Ratings
6.1 DC Characteristics
The I/O signal levels are +3.3V, and all IO pins are +5V tolerant (except the USB PHY pins).
DC Characteristics (Ambient Temperature = -40°C to +85°C)
Parameter
Description
Minimum
VCCIO*
VCCIO Operating Supply
Voltage
2.97
VREGIN
VREGIN Voltage regulator
Input
3.6
Ireg
Regulator Output Current
Icc5v0
UM232H current drawn
2
Icc3v3
UM232H current drawn
1.2
Typical
Maximum
Units
Conditions
3.63
V
Cells are 5V tolerant
5.5
V
+5V Supply
100
mA
+3V3 Output
62
mA
+5V Supply
59
mA
+3.3V Supply
5
Table 6.1 : Operating Voltage and Current (except PHY)
*NOTE: Failure to connect all VCCIO pins will result in unpredictable device behaviour.
For the electrical characteristics of the FT232H device, please refer to the FT232H datasheet
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7
Module Configurations
The UM232H Module can be configured as USB Bus-Powered or USB Self-Powered. This section describes
how to configure the UM232H for a number of different power supply arrangements.
7.1 BUS Powered Configuration
Bus powered configuration, where the +5V supply that powers the module is sourced from the USB bus,
and the 3V3 regulator output powers the core of the FT232H.
Figure 7.1 : Bus Powered Configuration
Figure 7.1 illustrates the UM232H in a typical USB bus powered design configuration, which consists of two
connections, a J1-2 to J1-3 connection and a J2-2 to J2-3 connection.
Connecting J1-2 (5V0) to J1-3 (USB) takes the power from the VBUS pin (J1-3) and supplies it to the on
chip voltage regulator input of the FT232H via pin 5V0 (J1-2).
Connecting J2-2 (VIO) (power input for core of the FT232H) and J2-3 (3V3) (power output from the
FT232H) powers the VCCIO, VPLL and VPHY pins of the FT232H chip.
A USB Bus Powered device gets its power from the USB bus. Basic rules for USB Bus power devices are as
follows –
i) On plug-in to USB, the device must draw no more than 100mA.
ii) On USB Suspend the device must draw no more than 500μA.
iii) A Bus Powered High Power USB Device (one that draws more than 100mA) should use PWREN# to keep
the current below 100mA on plug-in and 500μA on USB suspend.
iv) A device that consumes more than 100mA cannot be plugged into a USB Bus Powered Hub.
v) No device can draw more that 500mA from the USB Bus.
Interfacing the UM232H module to a microcontroller (MCU), or other logic for a bus powered design would
be done in exactly the same way as for Self-Powered designs (see Section 7.3), except that the MCU or
external logic would take its power supply from the USB bus (either the 5V on the USB pin, or 3.3V on the
3V3 pin).
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7.2 USB Bus Powered with Power Switching Configuration
Figure 7.2 : Bus Powered with Power Switching Configuration
USB Bus Powered circuits need to be able to power down in USB suspend mode in order to meet the
<=500μA total USB suspend current requirement (including external logic). Some external hardware can
power itself down into a low current state by monitoring the PWREN# signal. For external logic that cannot
power itself down in this way the FT232H provides a simple but effective way of turning off power to
external circuitry during USB suspend.
Figure 7.2 shows how to use a discrete P-Channel Logic Level MOSFET to control the power to external logic
circuits. A suitable device would be an International Rectifier (www.irf.com) IRLML6402, or equivalent. It is
recommended that a “soft start” circuit consisting of a 1kΩ series resistor and a 0.1μF capacitor are used to
limit the current surge when the MOSFET turns on. Without the soft start circuit there is a danger that the
transient power surge of the MOSFET turning on will reset the FT232H, or the USB host / hub controller.
The values used here allow attached circuitry to power up with a slew rate of ~12.5V per millisecond, in
other words the output voltage will transition from GND to 5V in approximately 400 microseconds.
A 100kΩ resistor to VBUS creates a week pull up on the gate, this can prevent current from flowing through
the transistor during a power up or power down of the FT232H.
Alternatively, a dedicated power switch I.C. with inbuilt “soft-start” can be used instead of a MOSFET. A
suitable power switch I.C. for such an application would be a Micrel (www.micrel.com) MIC2025-2BM or
equivalent.
Please note the following points in connection with power controlled designs:
i) The logic to be controlled must have its own reset circuitry so that it will automatically reset itself
when power is applied on coming out of suspend.
ii) Set the Pull-down on Suspend option in the internal EEPROM.
iii) One of the ACBUS pins should be configured as PWREN# in the internal EEPROM, and should be used
to switch the power supply to the external circuitry.
iv)
For USB high-power bus powered device (one that consumes greater than 100mA, and up to 500mA
of current from the USB bus), the power consumption of the device should be set in the max power
field in the internal EEPROM. A high-power bus powered device must use this descriptor in the
internal EEPROM to inform the system of its power requirements.
v)
For 3.3V power controlled circuits the FT232H’s VIO pin must not be powered down with the external
circuitry (the PWREN# signal gets its VCC supply from VIO). Either connect the power switch between
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the output of the 3.3V regulator and the external 3.3V logic or power VIO from the 3V3 pin of the
FT232H.
7.3 Self Powered Configuration
7.3.1 Self-Powered Configuration with 3V3 I/O and running on +5V external supply:
Figure 7.3 : Self-Powered Configuration – 5V0 External Supply
Figure 7.3 illustrates the UM232H in a typical USB Self-Powered configuration. An external supply +5.0V is
connected to the module’s 5V0 pin. J2-2 (VIO) is also connected to J2-3 (3V3) to supply the VCCIO supply
from the on board regulator but a separate supply could have been used.
A USB Self Powered device gets its power from its own power supply and does not draw current from the
USB bus. The basic rules for USB Self powered devices are as follows:
i) A Self Powered device should not force current down the USB bus when the USB Host or Hub
Controller use powered down.
ii) A Self Powered Device can use as much current as it likes during normal operation and USB suspend
as it has its own power supply.
iii) A Self Powered Device can be used with any USB Host and both Bus and Self Powered USB Hub. In
this case, the power descriptor in the internal EEPROM should be programmed to a value of zero
(Self-Powered).
In order to meet requirement (i) the USB Power is used to control the RESET# Pin of the FT232H device.
When the USB Host or Hub is powered up the internal 1.5kΩ resistor on USBDP is pulled up to 3.3V, thus
identifying the devices as a full speed device to USB. When the USB Host or Hub Power is off, RESET# will
go low and the device will be held in reset. As RESET# is low, the internal 1.5kΩ resistor will not be pulled
up to 3.3V, so no current will be forced down USBDP via the 1.5kΩ pull-up resistor when the host or hub is
powered down.
To do this J1-3 (USB) is connected to PU2 and PU1 is connected to J2-4 (RST#). Failure to do this may
cause some USB host or hub controllers to power up erratically.
Note: When the FT232H is in reset, the UART interface pins all go tri-state. These pins have internal 200kΩ
pull-up resistors to VCCIO, so they will gently pull high unless driven by some external logic.
Figure 7.3 is also an example of interfacing the FT232H to a Microcontroller (MCU) UART interface. This
example uses TXD and RXD for transmission and reception of data and RTS# / CTS# hardware
handshaking.
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Optionally, RI# can be connected to another I/O pin on the MCU and could be used to wake up the USB
host controller from suspend mode. If the MCU is handling power management functions, then an ACBUS
pin can be configured as PWREN# and should be connected to an I/O pin of the MCU.
An alternative to connecting the pull-up network to the Reset pin, to prevent current from flowing back the
USB power bus line, is to connect the network ACBUS7 pin to achieve the same results but with additional
benefits. A function called PWRSAV# is used to prevent current from flowing the USB line in the same way as
connecting the reset to the a pull-up network. However, the PWRSAV# function has the additional feature
of being able to put FT232H into sleep mode when the USB host is powered down. There is one trade of o
using reset instead of PWRSAV#, in MPSSE mode the ACBUS7 pin can be selected as a GPIO pin, using this
pin from both PWRSAV# and GPIO mode can cause a conflict. PWRSAV# is enabled and disabled using the
EEPROM, this function is disabled by default. Figure 7.4 illustrates an alternative USB Self-Power
configuration.
Figure 7.4 : Alternative Self-Powered Configuration – 5V0 External Supply
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Self-Powered Configuration with 3V3 I/O and running on +3.3V external supply:
Figure 7.5 : Self-Powered Configuration – 3V3 External Supply
Figure 7.4 illustrates the UM232H in a typical USB Self-Powered configuration similar to Figure 7.3. The
difference here is that the UM232H module is powered from an external 3.3V supply which is connected to
the 5V0 (+3V3 power supply input can also be supplied to 5V0 pin), VIO and 3V3 pins of the modules.
Please note that when the UM232H running from +3V3, the 3V3 pin becomes an input. The VIO and 3V3
pins connection provides 3V3 to the VCCIOs, VPLL and VPHY on the FT232H chip.
Simularly to the USB-Powered configuation an alternative configuration which utilised PWRSAV# can be
implemented. Figure 7.6 illustrated this configuration.
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Figure 7.6 : Alternative Self-Powered Configuration – 3V3 External Supply
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8
UM232H Module Circuit Schematic
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Figure 8.1 : Module Circuit Schematic
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9
EEPROM Configuration
The FT232H uses an external EEPROM (on the UM232H module). This EEPROM can be programmed over
USB using FT_Prog. The default settings of the EEPROM are shown in the following table:
Parameter
Value
Notes
USB Vendor ID (VID)
0403h
FTDI default VID (hex)
USB Product UD (PID)
6014h
FTDI default PID (hex)
bcd Device
009h
Serial Number Enabled?
Yes
Serial Number
See Note
A unique serial number is generated and programmed
into the EEPROM during device final test.
Pull down I/O Pins in USB
Suspend
Disabled
Enabling this option will make the device pull down
on the UART interface lines when in USB suspend
mode (PWREN# is high).
Manufacturer Name
FTDI
Product Description
UM232H
Max Bus Power Current
90mA
Power Source
Bus Powered
Device Type
FT232H
USB Version
0200
Returns USB 2.0 device description to the host.
Note: The device is a USB 2.0 Full Speed device
(12Mb/s) as opposed to a USB 2.0 Hi-Speed device
(480Mb/s).
Remote Wake Up
Enabled
Taking RI# low will wake up the USB host controller
from suspend in approximately 20 ms.
High Current I/Os
Disabled
Enables the high drive level on the UART and ACBUS
I/O pins.
Load VCP Driver
Enabled
Makes the device load the VCP driver interface for the
device.
ACBUS0
TriSt-PU
Default configuration of ACBUS0 – Input pulled up
ACBUS1
TriSt-PU
Default configuration of ACBUS1 – Input pulled up
ACBUS2
TriSt-PU
Default configuration of ACBUS2 Input pulled up
ACBUS3
TriSt-PU
Default configuration of ACBUS3 – Input pulled up
ACBUS4
TriSt-PU
Default configuration of ACBUS4 – Input pulled up
ACBUS5
TriSt-PU
Default configuration of ACBUS5 – Input pulled up
ACBUS6
TriSt-PU
Default configuration of ACBUS6 – Input pulled up
ACBUS7
TriSt-PU
Default configuration of ACBUS7 – Input pulled down
ACBUS8
PWRENn
Default configuration of ACBUS8 – PWR LED
ACBUS9
TX&RXLED
Default configuration of ACBUS9 – Tx/Rx LED
Table 9.1 : Default Internal EEPROM Configuration
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10 Contact Information
Head Office – Glasgow, UK
Branch Office – Hillsboro, Oregon, USA
Future Technology Devices International Limited
Unit 1, 2 Seaward Place, Centurion Business Park
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Tel: +44 (0) 141 429 2777
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Branch Office – Shanghai, China
Future Technology Devices International Limited (Taiwan)
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Web Site
http://ftdichip.com
Distributor and Sales Representatives
Please visit the Sales Network page of the FTDI Web site for the contact details of our distributor(s) and sales representative(s) in your
country.
System and equipment manufacturers and designers are responsible to ensure that their systems, and any Future Technology Devices International Ltd (FTDI)
devices incorporated in their systems, meet all applicable safety, regulatory and system-level performance requirements. All application-related information in
this document (including application descriptions, suggested FTDI devices and other materials) is provided for reference only. While FTDI has taken care to
assure it is accurate, this information is subject to customer confirmation, and FTDI disclaims all liability for system designs and for any applications assistance
provided by FTDI. Use of FTDI devices in life support and/or safety applications is entirely at the user’s risk, and the user agrees to defend, indemnify and hold
harmless FTDI from any and all damages, claims, suits or expense resulting from such use. This document is subject to change without notice. No freedom to
use patents or other intellectual property rights is implied by the publication of this document. Neither the whole nor any part of the information contained in, or
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holder. Future Technology Devices International Ltd, Unit 1, 2 Seaward Place, Centurion Business Park, Glasgow G41 1HH, United Kingdom. Scotland
Registered Company Number: SC136640
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Appendix A – List of Tables and Figures
List of Tables
Table 4.1 : UM232H Connector J1 Signal Description ................................................ 11
Table 4.2 : UM232H Connector J2 Signal Description ................................................ 12
Table 4.3 : ACBUS Signal Option ............................................................................... 13
Table 6.1 : Operating Voltage and Current (except PHY) .......................................... 15
Table 9.1 : Default Internal EEPROM Configuration .................................................. 24
List of Figures
Figure 1.1 : UM232H USB to Serial/FIFO Development Module .................................. 1
Figure 4.1 : Module Pin Out ........................................................................................ 9
Figure 5.1 : UM232H Module Dimensions.................................................................. 14
Figure 7.1 : Bus Powered Configuration ................................................................... 16
Figure 7.2 : Bus Powered with Power Switching Configuration ................................ 17
Figure 7.3 : Self-Powered Configuration – 5V0 External Supply ............................... 18
Figure 7.4 : Self-Powered Configuration – 5V0 External Supply ............................... 19
Figure 7.5 : Self-Powered Configuration – 3V3 External Supply ............................... 20
Figure 7.6 : Self-Powered Configuration – 3V3 External Supply ............................... 21
Figure 8.1 : Module Circuit Schematic ....................................................................... 23
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Appendix B – Revision History
Document Title:
UM232H Single Channel USB Hi-Speed FT232H Development Module
Document Reference No.:
FT_000367
Clearance No.:
FTDI# 198
Product Page:
http://www.ftdichip.com/fastlane.htm
Document Feedback:
Send Feedback
Version Draft
Initial Datasheet Created
31st January 2011
Version 1.0
Initial release
14th February 2011
Version 1.1
Additional dimensions added, EEPROM
Version 1.2
Default current limit updated
21st March 2011
Added and corrected details about ACBUS7
18th April 2011
Updated schematic
9th January 2012
Version 1.21
Updated section 2.1, Linux version
Version 1.3
Correct pin define position of ADBUS in Fig7.1 to Fig 7.6
24th Oct 2012
Corrected VIO on pg 10 (3.3V)
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