VND5E012AY-E
Double channel high-side driver with analog current sense
for automotive applications
Datasheet - production data
–
–
–
–
–
PowerSSO-36
Features
41V
Undervoltage shutdown
Overvoltage clamp
Load current limitation
Self limiting of fast thermal transients
Protection against loss of ground and loss
of VCC
– Thermal shutdown
– Reverse battery protection with self switch
of the Power MOS
– Electrostatic discharge protection
Max transient supply voltage
VCC
Operating voltage range
VCC 4.5 to 28V
Applications
Max on-state resistance (per ch.)
RON
12 mΩ
Current limitation (typ)
ILIMH
74 A
• All types of resistive, inductive and capacitive
loads
Off-state supply current
IS
2 μA(1)
• Suitable as LED driver
1. Typical value with all loads connected
Description
• General:
– Inrush current active management by
power limitation
– Very low standby current
– 3.0 V CMOS compatible input
– Optimized electromagnetic emission
– Very low electromagnetic susceptibility
– In compliance with the 2002/95/EC
european directive
– Proportional load current sense
– High current sense precision for wide range
current
– Very low current sense leakage
• Diagnostic functions:
– Off-state open-load detection
– Current sense disable
– Thermal shutdown indication
– Output short to VCC detection
– Overload and short to ground (power
limitation) indication
The VND5E012AY-E is a device made using
STMicroelectronics® VIPower® M0-5 technology.
It is intended for driving resistive or inductive
loads with one side connected to ground. Active
VCC pin voltage clamp protects the device against
low energy spikes.
This device integrates an analog current sense
which delivers a current proportional to the load
current when CS_DIS high leads the current
sense pin in high impedance.
Fault conditions such as overload,
overtemperature or openload are reported via the
current sense pin.
Output current limitation protects the device in
overload condition. In case of long overload
duration, the device limits the dissipated power to
safe level up to thermal shutdown intervention.
Thermal shutdown with automatic restart allows
the device to recover normal operation as soon as
fault condition disappears.
• Protection:
October 2013
This is information on a product in full production.
DocID13621 Rev 6
1/40
www.st.com
Contents
VND5E012AY-E
Contents
1
Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2
Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3
2.1
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2
Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.4
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
2.5
Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
3.1
Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
3.2
MCU I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
3.3
Current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
3.3.1
3.4
4
Maximum demagnetization energy (VCC = 13.5 V) . . . . . . . . . . . . . . . . . 29
Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
4.1
5
Short to VCC and off-state open-load detection . . . . . . . . . . . . . . . . . . 27
PowerSSO-36 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
5.1
ECOPACK® package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
5.2
PowerSSO-36 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
5.3
Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
6
Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
7
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
2/40
DocID13621 Rev 6
VND5E012AY-E
List of tables
List of tables
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Table 9.
Table 10.
Table 11.
Table 12.
Table 13.
Table 14.
Table 15.
Table 16.
Table 17.
Table 18.
Pin function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 6
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Switching (VCC = 13V; Tj = 25°C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Current sense (8V<VCC<18V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Open-load detection (8V<VCC<18V). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Logic input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Electrical transient requirements (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Electrical transient requirements (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Electrical transient requirements (part 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
PowerSSO-36 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
DocID13621 Rev 6
3/40
3
List of figures
VND5E012AY-E
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Figure 10.
Figure 11.
Figure 12.
Figure 13.
Figure 14.
Figure 15.
Figure 16.
Figure 17.
Figure 18.
Figure 19.
Figure 20.
Figure 21.
Figure 22.
Figure 23.
Figure 24.
Figure 25.
Figure 26.
Figure 27.
Figure 28.
Figure 29.
Figure 30.
Figure 31.
Figure 32.
Figure 33.
Figure 34.
Figure 35.
Figure 36.
Figure 37.
Figure 38.
Figure 39.
Figure 40.
Figure 41.
4/40
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Current sense delay characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Open-load off-state delay timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
IOUT/ISENSE vs IOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Maximum current sense ratio drift vs load current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Delay response time between rising edge of ouput current and rising edge of current sense
(CS enabled). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Output voltage drop limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Normal operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Overload or short to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Intermittent overload . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Off-state open-load with external circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Short to VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
TJ evolution in overload or short to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Off-state output current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Input high level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Input low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
On-state resistance vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
On-state resistance vs VCC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
ILIMH vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
CS_DIS clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Low level CS_DIS voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
High level CS_DIS voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Maximum turn-off current versus inductance(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
PowerSSO-36 PC board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Rthj-amb vs PCB copper area in open box free air condition (one channel ON) . . . . . . . . 31
PowerSSO-36 Thermal impedance junction ambient single pulse (one channel ON) . . . . 31
Thermal fitting model of a double channel HSD in PowerSSO-36(1) . . . . . . . . . . . . . . . . . 32
PowerSSO-36 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
PowerSSO-36 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
PowerSSO-36 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
DocID13621 Rev 6
VND5E012AY-E
Block diagram and pin description
Figure 1. Block diagram
9&&
5HYHUVH
%DWWHU\
3URWHFWLRQ
6LJQDO&ODPS
&RQWURO'LDJQRVWLF
8QGHUYROWDJH
,1
&RQWURO'LDJQRVWLF
3RZHU
&ODPS
'5,9(5
,1
&+
921
/LPLWDWLRQ
2YHU
WHPS
&XUUHQW
/LPLWDWLRQ
)7
1
Block diagram and pin description
&6B
',6
96(16(+
&6
&XUUHQW
6HQVH
&6
&+
)DXOW
/2*,&
287
287
29(5/2$'3527(&7,21
$&7,9(32:(5/,0,7$7,21
*1'
*$3*5,
Table 1. Pin function
Name
VCC
OUT1,2
Function
Battery connection
Power output
GND
Ground connection
IN1,2
Voltage controlled input pin with hysteresis, CMOS compatible; controls output
switch state
CS1,2
Analog current sense pin delivers a current proportional to the load current
CS_DIS
Active high CMOS compatible pin, to disable the current sense pin
DocID13621 Rev 6
5/40
39
Block diagram and pin description
VND5E012AY-E
Figure 2. Configuration diagram (top view)
36 - OUT2
35 - OUT2
34 - OUT2
33 - OUT2
32 - OUT2
31 - OUT2
30 - OUT2
29 - OUT2
28 - OUT2
27 - OUT2
26 - N.C.
25 - N.C.
24 - IN2
23 - N.C.
22 - CS2
21 - N.C.
20 - N.C.
19 - CS_DIS.
OUT1 - 1
OUT1 - 2
OUT1 - 3
OUT1 - 4
OUT1 - 5
OUT1 - 6
OUT1 - 7
OUT1 - 8
OUT1 - 9
OUT1 -10
N.C. - 11
N.C - 12
IN1 - 13
N.C. - 14
CS1 - 15
N.C. - 16
N.C. - 17
GND - 18
TAB = VCC
GAPGRI00288
Table 2. Suggested connections for unused and not connected pins
6/40
Connection /
pin
Current sense
Floating
Not allowed
X
To ground
Through 1 KΩ
resistor
X
Not
Output
connected
DocID13621 Rev 6
Input
CS_DIS
X
X
X
Not
allowed
Through 10 KΩ
resistor
Through 10 KΩ
resistor
VND5E012AY-E
2
Electrical specifications
Electrical specifications
Figure 3. Current and voltage conventions
,6
9&&
,&6'
9287
,6(16(
,,1
&6
,1
9,1
9&&
287
&6B',6
9&6'
9)Q
,287
,287
,,1
96(16(
287
,1
,6(16(
9,1
9287
&6
*1'
96(16(
,*1'
*$3*5,
2.1
Absolute maximum ratings
Applying stress which exceeds the ratings listed in theTable 3 may cause permanent
damage to the device. These are stress ratings only and operation of the device at these or
any other conditions above those indicated in the operating sections of this specification is
not implied. Exposure to the conditions in this section for extended periods may affect
device reliability.
Table 3. Absolute maximum ratings
Symbol
VCC
VCCPK
-VCC
VCC_LSC
- IGND
IOUT
- IOUT
IIN
ICSD
Parameter
Value
Unit
DC supply voltage
28
V
Transient supply voltage (T<400 ms, RLOAD > 0.5 Ω)
41
V
Reverse DC supply voltage
16
V
Maximum supply voltage for full protection to short-circuit (acc.
AEC-Q100-012)
18
V
DC reverse ground pin current
200
mA
Internally limited
A
50
A
DC input current
-1 to 10
mA
DC current sense disable input current
-1 to 10
mA
200
mA
VCC-41
+VCC
V
V
DC output current
Reverse DC output current
-ICSENSE DC Reverse CS pin current
VCSENSE Current sense maximum voltage
DocID13621 Rev 6
7/40
39
Electrical specifications
VND5E012AY-E
Table 3. Absolute maximum ratings (continued)
Symbol
Value
Unit
110
mJ
EMAX
Maximum switching energy (single pulse)
(L = 0.47 mH; RL = 0 Ω; Vbat = 13.5 V; Tjstart = 150 °C;
IOUT = IlimL(Typ.))
VESD
Electrostatic Discharge (Human Body Model: R=1.5KΩ;
C=100pF)
– VCC, OUTPUT
– INPUT, CS_DIS
– CURRENT SENSE
5000
4000
2000
V
VESD
Charge device model (CDM-AEC-Q100-011)
750
V
Junction operating temperature
-40 to 150
°C
Storage temperature
-55 to 150
°C
Tj
Tstg
2.2
Parameter
Thermal data
Table 4. Thermal data
Symbol
8/40
Parameter
Rthj-case
Thermal resistance junction-case
(With one channel ON)
Rthj-amb
Thermal resistance junction-ambient
DocID13621 Rev 6
Maximum value
Unit
2
°C/W
See Figure 36 in the
thermal section
°C/W
VND5E012AY-E
2.3
Electrical specifications
Electrical characteristics
8V<VCC<28V; -40°C< Tj <150°C, unless otherwise specified
Table 5. Power section
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
Unit
4.5
13
28
V
4.5
V
VCC
Operating supply voltage
VUSD
Undervoltage shutdown
3.5
VUSDhyst
Undervoltage shutdown
hysteresis
0.5
IOUT=5A; Tj=25°C
RON
RON REV
Vclamp
11
V
16
IOUT=5A; Tj=150°C
24
mΩ
IOUT=5A; VCC=5V; Tj=25°C
16
mΩ
Reverse battery on-state
resistance
VCC=-13V; IOUT=-5A;
Tj=25°C
12
mΩ
Clamp voltage
IS=20 mA
46
52
V
VIN=VOUT=VSENSE=VCSD=0
V
2 (1)
5(1)
µA
On-state; VCC=13V; VIN=5V;
IOUT=0A
3.5
6.5
mA
0.01
3
On-state resistance
41
Off-state; VCC=13V; Tj=25°C;
IS
IL(off)
Supply current
Off-state output current (2)
VIN=VOUT=0V; VCC=13V;
Tj=25°C
0
VIN=VOUT=0V; VCC=13V;
Tj=125°C
0
5
µA
1. PowerMOS leakage included
2. For each channel
Table 6. Switching (VCC = 13V; Tj = 25°C)
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
Unit
td(on)
Turn-on delay time
RL=2.6Ω (see Figure 8)
-
30
-
µs
td(off)
Turn-off delay time
RL=2.6Ω (see Figure 8)
-
20
-
µs
(dVOUT/dt) Turn-on voltage
slope
on
RL=2.6Ω
-
See
Figure 28
-
V/µs
(dVOUT/dt) Turn-off voltage
slope
off
RL=2.6Ω
-
See
Figure 29
-
V/µs
WON
Switching energy
losses during tWON
RL=2.6Ω (see Figure 8)
-
1
-
mJ
WOFF
Switching energy
RL=2.6Ω (see Figure 8)
losses during tWOFF
-
0.5
-
mJ
DocID13621 Rev 6
9/40
39
Electrical specifications
VND5E012AY-E
)
Table 7. Current sense (8V<VCC<18V)
Symbol
K0
K1
dK1/K1(1)
K2
dK2/K2(1)
K3
dK3/K3(1)
ISENSE0
Parameter
Test conditions
IOUT/ISENSE
IOUT=0.25A; VSENSE=0.5V
Tj= -40°C...150°C
IOUT/ISENSE
IOUT=5A; VSENSE=0.5V
Tj=-40°C...150°C
Tj=25°C...150°C
Current sense ratio
drift
IOUT=5A; VSENSE= 0.5V;
VCSD=0V;
TJ= -40 °C to 150 °C
IOUT/ISENSE
IOUT=10A; VSENSE=4V
Tj=-40°C...150°C
Tj=25°C...150°C
Current sense ratio
drift
IOUT= 10 A; VSENSE= 4 V;
VCSD=0V;
TJ= -40 °C to 150 °C
IOUT/ISENSE
IOUT=25A; VSENSE=4V
Tj=-40°C...150°C
Tj=25°C...150°C
Current sense ratio
drift
IOUT= 25 A; VSENSE= 4 V;
VCSD= 0V;
TJ= -40 °C to 150 °C
Analog sense
leakage current
IOUT=0A; VSENSE=0V;
VCSD=5V; VIN=0V;
Tj=-40°C...150°C
VCSD=0V; VIN=5V;
Tj=-40°C...150°C
IOUT=5A; VSENSE=0V;
VCSD=VIN=5V;
Typ.
Max.
2615
5130
7770
4155
4530
5330
5330
6650
6130
-8
4705
4865
8
5290
5290
-5
4935
4985
%
5950
5715
5
5250
5250
Unit
%
5565
5515
-4
4
%
0
0
1
2
µA
µA
0
1
µA
VSENSE
Max analog sense
output voltage
VSENSEH
Analog sense output
voltage in
VCC=13V; RSENSE=10KΩ
overtemperature
condition
8
V
ISENSEH
Analog sense output
current in
VCC=13V; VSENSE=5V
overtemperature
condition
9
mA
Delay response time VSENSE<4V, 1.5A<Iout<25A
ISENSE=90% of ISENSE max
from falling edge of
CS_DIS pin
(see fig Figure 4)
50
tDSENSE1H
10/40
Min.
IOUT=15A; VCSD=0V
DocID13621 Rev 6
5
V
100
µs
VND5E012AY-E
Electrical specifications
Table 7. Current sense (8V<VCC<18V) (continued)
Symbol
Parameter
Test conditions
Typ.
Max.
Unit
tDSENSE1L
VSENSE<4V, 1.5A<Iout<25A
Delay Response
time from rising edge ISENSE=10% of ISENSE max
of CS_DIS pin
(see fig Figure 4)
5
20
µs
tDSENSE2H
VSENSE<4V, 1.5A<Iout<25A
Delay Response
time from rising edge ISENSE=90% of ISENSE max
of INPUT pin
(see fig Figure 4)
70
300
µs
300
µs
250
µs
Delay response time
between rising edge
ΔtDSENSE2H of output current and
rising edge of
current sense
tDSENSE2L
Delay Response
time from falling
edge of INPUT pin
Min.
VSENSE < 4V,
ISENSE = 90% of ISENSEMAX,
IOUT = 90% of IOUTMAX
IOUTMAX= 5A (see Figure 9)
VSENSE<4V, 1.5A<Iout<25A
ISENSE=10% of ISENSE max
(see fig Figure 4)
100
1. Parameter guaranteed by design; it is not tested.
Table 8. Open-load detection (8V<VCC<18V)
Symbol
VOL
Parameter
Openload off-state
voltage detection
threshold
Output short circuit to
tDSTKON Vcc detection delay at
turn-off
Test conditions
VIN = 0V
see Figure 5
Min
Typ
Max
Unit
2
-
4
V
180
-
1200
µs
IL(off2)r
Off-state output current VIN = 0 V; VSENSE = 0 V
at VOUT = 4 V
VOUT rising from 0 V to 4 V
-120
-
90
µA
IL(off2)f
Off-state output current VIN = 0 V; VSENSE = VSENSEH
at VOUT = 2V
VOUT falling to VCC to 2 V
-50
-
90
µA
Table 9. Protections (1)
Symbol
Parameter
Test conditions
VCC=13V
5V<VCC<18V
IlimH
DC Short circuit
current
IlimL
Short circuit current
VCC=13V; TR<Tj<TTSD
during thermal cycling
TTSD
Shutdown
temperature
TR
Reset temperature
TRS
Thermal reset of
STATUS
Min.
Typ.
Max.
Unit
52
74
104
104
A
A
18.5
150
175
TRS +
1
TRS +
5
135
DocID13621 Rev 6
A
200
°C
°C
°C
11/40
39
Electrical specifications
VND5E012AY-E
Table 9. Protections (1) (continued)
Symbol
THYST
VDEMAG
VON
Parameter
Test conditions
Min.
Thermal hysteresis
(TTSD-TR)
Typ.
Max.
7
Turn-off output voltage
IOUT=2A; VIN=0; L=6mH
clamp
Output voltage drop
limitation
VCC28
IOUT=0.4A; Tj=-40°C...150°C
(see fig. Figure 10)
VCC31
Unit
°C
VCC35
25
V
mV
1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related
diagnostic signals must be used together with a proper software strategy. If the device is subjected to
abnormal conditions, this software must limit the duration and number of activation cycles
Table 10. Logic input
Symbol
Parameter
VIL
Input low level voltage
IIL
Low level input current
VIH
Input high level voltage
IIH
High level input current VIN=2.1V
VI(hyst)
VICL
Test conditions
VIN=0.9V
Input hysteresis
voltage
CS_DIS low level
voltage
ICSDL
Low level CS_DIS
current
VCSDH
CS_DIS high level
voltage
ICSDH
High level CS_DIS
current
IIN=1mA
IIN=-1mA
VCSD=0.9V
12/40
Max.
Unit
0.9
V
1
µA
2.1
V
10
5.5
7
V
V
0.9
V
-0.7
1
µA
2.1
V
10
0.25
CS_DIS clamp voltage
ICSD=1mA
ICSD=-1mA
DocID13621 Rev 6
µA
V
VCSD=2.1V
VCSD(hyst CS_DIS hysteresis
voltage
)
VCSCL
Typ.
0.25
Input clamp voltage
VCSDL
Min.
µA
V
5.5
7
-0.7
V
V
VND5E012AY-E
Electrical specifications
Figure 4. Current sense delay characteristics
,1387
&6B',6
/2$'&855(17
6(16(&855(17
W'6(16(+
W'6(16(/
W'6(16(+
W'6(16(/
*$3*5,
Figure 5. Open-load off-state delay timing
287387678&.729&&
9,1
9287!92/
96(16(+
9&6
W'67.21
*$3*5,
DocID13621 Rev 6
13/40
39
Electrical specifications
VND5E012AY-E
Figure 6. IOUT/ISENSE vs IOUT
,RXW,VHQVH
$
%
&
'
)7
(
,RXW>$@
$0D[7M &WR& '0LQ7M &WR&
%0D[7M &WR& (0LQ7M &WR&
&7\SLFDO7M &WR&
*$3*5,
Figure 7. Maximum current sense ratio drift vs load current
G..> @
$
%
,RXW>$@
0 D[
7M &W
WR&
%
0LQ
7M &W
WR
&
$0
*$3*5,
14/40
DocID13621 Rev 6
VND5E012AY-E
Electrical specifications
Table 11. Truth table
Input
Output
Sense(VCSD=0V)(1)
Normal operation
L
H
L
H
0
Nominal
Overtemperature
L
H
L
L
0
VSENSEH
Undervoltage
L
H
L
L
0
0
H
X
(no power limitation)
Cycling
(power limitation)
Nominal
Conditions
Overload
H
VSENSEH
Short circuit to GND
(Power limitation)
L
H
L
L
0
VSENSEH
Open load off-state
(with external pull up)
L
H
VSENSEH
Short circuit to VCC
(external pull up disconnected)
L
H
H
H
VSENSEH
< Nominal
Negative output voltage clamp
L
L
0
1. If the VCSD is high, the SENSE output is at a high impedance; its potential depends on leakage currents
and external circuit
Figure 8. Switching characteristics
9287
W:RQ
W:RII
G9287GWRII
G9287GWRQ
WU
WI
W
,1387
WGRQ
WGRII
W
*$3*5,
DocID13621 Rev 6
15/40
39
Electrical specifications
VND5E012AY-E
Figure 9. Delay response time between rising edge of ouput current and rising edge
of current sense (CS enabled)
9,1
ǻW'6(16(+
W
,287
,2870$;
,2870$;
W
,6(16(
,6(16(0$;
,6(16(0$;
W
*$3*&)7
Figure 10. Output voltage drop limitation
9&&9287
7M &
7M &
7M &
921
,287
9215217
$*9
16/40
DocID13621 Rev 6
VND5E012AY-E
Electrical specifications
Table 12. Electrical transient requirements (part 1)
ISO 7637-2:
2004(E)
Test levels(1)
Number of
pulses or
test times
Burst cycle/pulse
repetition time
Delays and
impedance
Test Pulse
III
IV
1
-75 V
-100 V
5000
pulses
0.5 s
5s
2 ms, 10 Ω
2a
+37 V
+50 V
5000
pulses
0.2 s
5s
50 μs, 2 Ω
3a
-100 V
-150 V
1h
90 ms
100 ms
0.1 μs, 50 Ω
3b
+75 V
+100 V
1h
90 ms
100 ms
0.1 μs, 50 Ω
4
-6 V
-7 V
1 pulse
100 ms, 0.01
Ω
5b(2)
+65 V
+87 V
1 pulse
400 ms, 2 Ω
1. The above test levels must be considered referred to VCC = 13.5 V except for pulse 5b
2. Valid in case of external load dump clamp: 40V maximum referred to ground. The protection strategy
allows PowerMOS to be cyclically switched on during load dump, so distributing the load dump energy
along the time and to transfer a part of it to the load.
Table 13. Electrical transient requirements (part 2)
Test level results(1)
ISO 7637-2:
2004(E)
Test pulse
III
IV
1
C
C
2a
C
C
3a
C
C
3b
C
C
4
C
C
5b(2) (3)
C
C
1. The above test levels must be considered referred to VCC = 13.5 V except for pulse 5b
2. Valid in case of external load dump clamp: 40V maximum referred to ground. The protection strategy
allows PowerMOS to be cyclically switched on during load dump, so distributing the load dump energy
along the time and to transfer a part of it to the load.
3. Suppressed load dump (pulse 5b) is withstood with a minimum load connected as specified in
Table 3: Absolute maximum ratings
Table 14. Electrical transient requirements (part 3)
Class
Contents
C
All functions of the device are performed as designed after exposure to disturbance.
E
One or more functions of the device are not performed as designed after exposure to
disturbance and cannot be returned to proper operation without replacing the device.
DocID13621 Rev 6
17/40
39
Electrical specifications
2.4
VND5E012AY-E
Waveforms
Figure 11. Normal operation
1RUPDORSHUDWLRQ
,1387
1RPLQDOORDG
1RPLQDOORDG
,287
96(16(
9&6B',6
$*9
Figure 12. Overload or short to GND
2YHUORDGRU6KRUWWR*1'
,1387
3RZHU/LPLWDWLRQ
, /LP+!
7KHUPDOF\FOLQJ
, /LP/!
,287
96(16(
9&6B',6
$*9
18/40
DocID13621 Rev 6
VND5E012AY-E
Electrical specifications
Figure 13. Intermittent overload
,QWHUPLWWHQW2YHUORDG
,1387
,/LP+ !
2YHUORDG
,/LP/ !
1RPLQDOORDG
,287
96(16(+ !
96(16(
9&6B',6
$*9
DocID13621 Rev 6
19/40
39
Electrical specifications
VND5E012AY-E
Figure 14. Off-state open-load with external circuitry
,1387
9287 !92/
9287
92/
,287
96(16(+!
W'67.RQ
96(16(
9&6B',6
*$3*5,
20/40
DocID13621 Rev 6
VND5E012AY-E
Electrical specifications
Figure 15. Short to VCC
5HVLVWLYH
6KRUWWR9&&
+DUG
6KRUWWR9&&
9287 !92/
92/
9287
)7
,287
W'67.RQ
9&6B',6
W'67.RQ
*$3*5,
Figure 16. TJ evolution in overload or short to GND
,1387
6HOIOLPLWDWLRQRIIDVWWKHUPDOWUDQVLHQWV
776'
7+<67
75
7-B67$57
7-
3RZHU/LPLWDWLRQ
,/LP+ !
,/LP/
,287
*$3*5,
DocID13621 Rev 6
21/40
39
Electrical specifications
2.5
VND5E012AY-E
Electrical characteristics curves
Figure 17. Off-state output current
Figure 18. High level input current
Iih [uA]
Iloff [nA]
5
3000
4.5
2500
Vin= 2.1V
4
3.5
2000
3
2.5
1500
2
1000
1.5
1
500
0.5
0
-50
0
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
Tc [°C]
50
75
100
125
150
175
Tc [°C]
Figure 19. Input clamp voltage
Figure 20. Input high level voltage
Vih [V]
Vicl [V]
4
7
6.8
3.5
6.6
Iin= 1m A
3
6.4
6.2
2.5
6
2
5.8
1.5
5.6
1
5.4
0.5
5.2
5
0
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
Tc [°C]
100
125
150
175
Figure 22. Input hysteresis voltage
Vihyst [V]
Vil [V]
2
1
1.8
0.9
1.6
0.8
1.4
0.7
1.2
0.6
1
0.5
0.8
0.4
0.6
0.3
0.4
0.2
0.2
0.1
-25
0
25
50
75
100
125
150
175
0
-50
Tc [°C]
22/40
75
Tc [°C]
Figure 21. Input low level voltage
0
-50
50
-25
0
25
50
75
Tc [°C]
DocID13621 Rev 6
100
125
150
175
VND5E012AY-E
Electrical specifications
Figure 23. On-state resistance vs Tcase
Figure 24. On-state resistance vs VCC
Ron [m Ohm ]
Ron [m Ohm ]
24
50
45
20
Tc= 150°C
16
Tc= 125°C
40
35
Iout= 5A
Vcc= 13V
30
12
25
Tc= 25°C
20
Tc= -40°C
8
15
10
4
5
0
0
-50
-25
0
25
50
75
100
125
150
0
175
5
10
15
20
25
30
35
40
150
175
Vcc [V]
Tc [°C]
Figure 25. Undervoltage shutdown
Figure 26. ILIMH vs Tcase
Vusd [V]
Ilim h [A]
16
90
14
Vcc= 13V
80
12
70
10
60
8
6
50
4
40
2
30
0
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
Figure 27. Turn-on voltage slope
75
100
125
Figure 28. Turn-off voltage slope
(dVout/dt)On [V/m s]
(dVout/dt)Off [V/m s]
1000
1000
900
900
800
800
Vcc= 13V
Rl= 2.6Ω
700
600
500
500
400
400
300
300
200
200
100
100
-25
0
25
50
75
100
Vcc= 13V
Rl= 2.6Ω
700
600
0
-50
50
Tc [°C]
Tc [°C]
125
150
175
0
-50
Tc [°C]
-25
0
25
50
75
100
125
150
175
Tc [°C]
DocID13621 Rev 6
23/40
39
Electrical specifications
VND5E012AY-E
Figure 29. CS_DIS clamp voltage
Figure 30. Low level CS_DIS voltage
Vcsdcl [V]
Vcsdl [V]
10
4
9
3.5
Iin= 1m A
8
3
7
6
2.5
5
2
4
1.5
3
1
2
0.5
1
0
0
-50
-25
0
25
50
75
100
125
150
175
-50
Tc [°C]
Vcsdh [V]
4
3.5
3
2.5
2
1.5
1
0.5
-25
0
25
50
75
100
125
150
175
Tc [°C]
24/40
0
25
50
75
Tc [°C]
Figure 31. High level CS_DIS voltage
0
-50
-25
DocID13621 Rev 6
100
125
150
175
VND5E012AY-E
3
Application information
Application information
Figure 32. Application schematic
9
9&&
5SURW
&6B',6
'OG
P&
5SURW
,,1387
287387
5SURW
&855(176(16(
*1'
56(16(
&H[W
*$3*&)7
Note:
Channel 2 has the same internal circuit as channel 1.
3.1
Load dump protection
Dld is necessary (Voltage Transient Suppressor) if the load dump peak voltage exceeds the
VCCPK max rating. The same applies if the device is subject to transients on the VCC line
that are greater than the ones shown in the ISO T/R 7637/1 table.
3.2
MCU I/Os protection
When negative transients are present on the VCC line, the control pin is pulled negative to
approximately -1.5 V. ST suggests to insert a resistor (Rprot) in line to prevent the
microcontroller I/Os pins from latching-up.
The value of these resistors is a compromise between the leakage current of microcontroller
and the current required by the HSD I/Os (input levels compatibility) with the latch-up limit of
microcontroller I/Os.
Equation 1
v ccpeak ⁄ l latchup ≤ R prot ≤ ( V OHμC – V IH ) ⁄ l IHmax
Calculation example:
For VCCpeak = - 1.5 V; Ilatchup ≥ 20 mA; VOHμC ≥ 4.5 V
75 Ω ≤ Rprot ≤ 240 kΩ.
DocID13621 Rev 6
25/40
39
Application information
VND5E012AY-E
Recommended values: Rprot =10 kΩ, CEXT =10 nF.
3.3
Current sense and diagnostic
The current sense pin performs a double function (see Figure 33: Current sense and
diagnostic):
•
Current mirror of the load current in normal operation, delivering a current
proportional to the load one according to a know ratio KX.
The current ISENSE can be easily converted to a voltage VSENSE by means of an
external resistor RSENSE. Linearity between IOUT and VSENSE is ensured up to 5 V
minimum (see parameter VSENSE in Table 7: Current sense (8V<VCC<18V)). The
current sense accuracy depends on the output current (refer to current sense electrical
characteristics Table 7: Current sense (8V<VCC<18V)).
•
Diagnostic flag in fault conditions, delivering a fixed voltage VSENSEH up to a
maximum current ISENSEH in case of the following fault conditions (refer to
Table 11: Truth table):
–
Power limitation activation
–
Overtemperature
–
Short to VCC in off-state
–
Open load in off-state with additional external components.
A logic level high on CS_DIS pin sets at the same time all the current sense pins of the
device in a high-impedance state, thus disabling the current monitoring and diagnostic
detection. This feature allows multiplexing of the microcontroller analog inputs by sharing of
sense resistance and ADC line among different devices.
26/40
DocID13621 Rev 6
VND5E012AY-E
Application information
Figure 33. Current sense and diagnostic
938
9%$7
9&&
0DLQ026Q
9
38B&0'
2YHUWHPSHUDWXUH
,287.;
538
2/2))
,6(16(+
92/
3ZUB/LP
287Q
,/RIIU
,/RIII
,1387Q
96(16(+
&6B',6
53527
7RX&$'&
56(16(
)7
&855(17
6(16(Q
*1'
/RDG
53'
96(16(
*$3*5,
3.3.1
Short to VCC and off-state open-load detection
Short to VCC
A short-circuit between VCC and output is indicated by the relevant current sense pin set to
VSENSEH during the device OFF-state. Small or no current is delivered by the current sense
during the ON-state depending on the nature of the short-circuit.
Off-state open-load with external circuitry
Detection of an open load in off mode requires an external pull-up resistor RPU connecting
the output to a positive supply voltage VPU.
It is preferable VPU to be switched off during the module standby mode in order to avoid the
overall standby current consumption to increase in normal conditions, i.e. when load is
connected.
An external pull-down resistor RPD connected between output and GND is mandatory to
avoid misdetection in case of floating outputs in off-state (see Figure 33: Current sense and
diagnostic).
RPD must be selected in order to ensure VOUT < VOLmin unless pulled-up by the external
circuitry:
DocID13621 Rev 6
27/40
39
Application information
VND5E012AY-E
Equation 2
v out
Pull – up_off
= R PD ⋅ I L ( off2 )f < V OLmin = 2V
RPD ≤ 22 kΩ is recommended.
For proper open load detection in off-state, the external pull-up resistor must be selected
according to the following formula:
Equation 3
VOUT Pull−up _ ON =
(RPD ⋅ VPU ) − (RPU ⋅ RPD ⋅ IL(off2)r )
> VOLmax = 4 V
(RPU + RPD )
For the values of VOLmin ,VOLmax, IL(off2)r and IL(off2)f (see Table 8: Open-load detection
(8V<VCC<18V)).
28/40
DocID13621 Rev 6
VND5E012AY-E
Maximum demagnetization energy (VCC = 13.5 V)
Figure 34. Maximum turn-off current versus inductance(1)
)7
91[(6L QJOH3XOVH
,$
3.4
Application information
5HSHWLWLYHSXOVH7MVWDUW &
5HSHWLWLYHSXOVH7MVWDUW &
/P +
$7MVWDUW
&VLQJOHSXOVH
%7
&UHSHWLWLYHSXOVH
A:
Tjstart
°C (single pulse)
MVWDUW = 150
&
7
&UHSHWLWLYHSXOVH
B: T MVWDUW = 100 °C (repetitive pulse)
jstart
C: Tjstart = 125 °C (repetitive pulse)
9,1,/
VIN, IL
'HPDJQHWL]DWLRQ
'HPDJQHWL]DWLRQ
'HPDJQHWL]DWLRQ
Demagnetization
Demagnetization
Demagnetization
U
t
*$3*5,
1. Values are generated with RL = 0 Ω.
In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse must not exceed
the temperature specified above for curves A and B.
DocID13621 Rev 6
29/40
39
Package and PCB thermal data
VND5E012AY-E
4
Package and PCB thermal data
4.1
PowerSSO-36 thermal data
Figure 35. PowerSSO-36 PC board
$*9
Note:
30/40
Layout condition of Rth and Zth measurements (PCB: Double layer, Thermal Vias, FR4
area= 129mm x 60mm, PCB thickness=1.6mm, Cu thickness=70μm (front and back side),
Copper areas: from minimum pad lay-out to 8cm2).
DocID13621 Rev 6
VND5E012AY-E
Package and PCB thermal data
Figure 36. Rthj-amb vs PCB copper area in open box free air condition (one channel
ON)
57+MDPE
57+MBDPE&:
57+MDPE
3&%&XKHDWVLQNFPA
*$3*&)7
Figure 37. PowerSSO-36 Thermal impedance junction ambient single pulse (one
channel ON)
=7+&:
'
5
&X FP
&X FP
&X IRR WSULQW
7LPHV
*$3*5,
DocID13621 Rev 6
31/40
39
Package and PCB thermal data
VND5E012AY-E
Figure 38. Thermal fitting model of a double channel HSD in PowerSSO-36(1)
*$3*&)7
1. The fitting model is a semplified thermal tool and is valid for transient evolutions where the embedded
protections (power limitation or thermal cycling during thermal shutdown) are not triggered
Equation 4: pulse calculation formula
Z THδ = R TH ⋅ δ + Z THtp ( 1 – δ )
where:
Equation 5
δ = tp ⁄ T
Table 15. Thermal parameter
Area/island
32/40
(cm2)
Footprint
2
8
R1 (°C/W)
0.1
R2 (°C/W)
0.3
R3 (°C/W)
5
R4 (°C/W)
8
R5 (°C/W)
18
10
10
R6 (°C/W)
27
23
14
R7 (°C/W)
0.1
R8 (°C/W)
0.3
C1 (W.s/°C)
0.0025
C2 (W.s/°C)
0.005
C3 (W.s/°C)
0.04
C4 (W.s/°C)
0.5
C5 (W.s/°C)
1
2
2
C6 (W.s/°C)
3
6
9
DocID13621 Rev 6
VND5E012AY-E
Package and PCB thermal data
Table 15. Thermal parameter (continued)
Area/island (cm2)
Footprint
C7 (W.s/°C)
0.0025
C8 (W.s/°C)
0.005
DocID13621 Rev 6
2
8
33/40
39
Package information
VND5E012AY-E
5
Package information
5.1
ECOPACK® package
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
34/40
DocID13621 Rev 6
VND5E012AY-E
5.2
Package information
PowerSSO-36 mechanical data
Figure 39. PowerSSO-36 package dimensions
("1($'5
DocID13621 Rev 6
35/40
39
Package information
VND5E012AY-E
l
Table 16. PowerSSO-36 mechanical data
millimeters
Symbol
36/40
Min
Typ
Max
A
2.15
-
2.47
A2
2.15
-
2.40
a1
0
-
0.075
b
0.18
-
0.36
c
0.23
-
0.32
D
10.10
-
10.50
E
7.4
-
7.6
e
-
0.5
-
e3
-
8.5
-
G
-
-
0.1
G1
-
-
0.06
H
10.1
-
10.5
h
-
-
0.4
L
0.55
-
0.85
N
-
-
10 deg
X
4.1
-
4.7
Y
6.5
-
7.1
DocID13621 Rev 6
VND5E012AY-E
5.3
Package information
Packing information
Figure 40. PowerSSO-36 tube shipment (no suffix)
Base Q.ty
Bulk Q.ty
Tube length (± 0.5)
A
B
C (± 0.1)
&
%
49
1225
532
3.5
13.8
0.6
All dimensions are in mm.
$
*$3*&)7
Figure 41. PowerSSO-36 tape and reel shipment (suffix “TR”)
REEL DIMENSIONS
Base Q.ty
Bulk Q.ty
A (max)
B (min)
C (± 0.2)
F
G (+ 2 / -0)
N (min)
T (max)
1000
1000
330
1.5
13
20.2
24.4
100
30.4
TAPE DIMENSIONS
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb 1986
Tape width
Tape Hole Spacing
Component Spacing
Hole Diameter
Hole Diameter
Hole Position
Compartment Depth
Hole Spacing
All dimensions are in mm.
W
P0 (± 0.1)
P
D (± 0.05)
D1 (min)
F (± 0.1)
K (max)
P1 (± 0.1)
24
4
12
1.55
1.5
11.5
2.85
2
End
Start
Top
No components
Components
No components
cover
tape
500mm min
Empty components pockets
saled with cover tape.
500mm min
User direction of feed
DocID13621 Rev 6
37/40
39
Order codes
6
VND5E012AY-E
Order codes
Table 17. Device summary
Order codes
package
PowerSSO-36
38/40
Tube
Tape and reel
VND5E012AY-E
VND5E012AYTR-E
DocID13621 Rev 6
VND5E012AY-E
7
Revision history
Revision history
Table 18. Document revision history
Date
Revision
Changes
05-Jun-2007
1
Initial release.
21-Oct-2009
2
Updated Figure 3: Current and voltage conventions.
Updated following tables:
– Table 3: Absolute maximum ratings
– Table 4: Thermal data
– Table 5: Power section
– Table 6: Switching (VCC = 13V; Tj = 25°C)
– Table 7: Current sense (8V<VCC<18V)
– Table 8: Open-load detection (8V<VCC<18V)
Added following figures:
– Figure 7: Maximum current sense ratio drift vs load current
– Figure 8: Switching characteristics
– Figure 9: Delay response time between rising edge of ouput
current and rising edge of current sense (CS enabled)
Added Section 2.4: Waveforms and Section 2.5: Electrical
characteristics curves.
Apdated Chapter 3: Application information.
Updated Section 4.1: PowerSSO-36 thermal data:
– Added Figure 35: PowerSSO-36 PC board, Figure 36: Rthjamb vs PCB copper area in open box free air condition (one
channel ON) and Figure 37: PowerSSO-36 Thermal
impedance junction ambient single pulse (one channel ON)
– Updated Figure 38: Thermal fitting model of a double channel
HSD in PowerSSO-36(1)
– Added Table 15: Thermal parameter.
Updated Section 5.1: ECOPACK® package.
03-Dec-2009
3
Updated Section 4.1: PowerSSO-36 thermal data
09-July-2012
4
Updated Figure 39: PowerSSO-36 package dimensions
20-Sep-2013
5
Updated Disclaimer
28-Oct-2013
6
Updated footnote 2 into the Table 12: Electrical transient
requirements (part 1) and Table 13: Electrical transient
requirements (part 2).
DocID13621 Rev 6
39/40
39
VND5E012AY-E
Please Read Carefully:
Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the
right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any
time, without notice.
All ST products are sold pursuant to ST’s terms and conditions of sale.
Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no
liability whatsoever relating to the choice, selection or use of the ST products and services described herein.
No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this
document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products
or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such
third party products or services or any intellectual property contained therein.
UNLESS OTHERWISE SET FORTH IN ST’S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED
WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED
WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS
OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT.
ST PRODUCTS ARE NOT DESIGNED OR AUTHORIZED FOR USE IN: (A) SAFETY CRITICAL APPLICATIONS SUCH AS LIFE
SUPPORTING, ACTIVE IMPLANTED DEVICES OR SYSTEMS WITH PRODUCT FUNCTIONAL SAFETY REQUIREMENTS; (B)
AERONAUTIC APPLICATIONS; (C) AUTOMOTIVE APPLICATIONS OR ENVIRONMENTS, AND/OR (D) AEROSPACE APPLICATIONS
OR ENVIRONMENTS. WHERE ST PRODUCTS ARE NOT DESIGNED FOR SUCH USE, THE PURCHASER SHALL USE PRODUCTS AT
PURCHASER’S SOLE RISK, EVEN IF ST HAS BEEN INFORMED IN WRITING OF SUCH USAGE, UNLESS A PRODUCT IS
EXPRESSLY DESIGNATED BY ST AS BEING INTENDED FOR “AUTOMOTIVE, AUTOMOTIVE SAFETY OR MEDICAL” INDUSTRY
DOMAINS ACCORDING TO ST PRODUCT DESIGN SPECIFICATIONS. PRODUCTS FORMALLY ESCC, QML OR JAN QUALIFIED ARE
DEEMED SUITABLE FOR USE IN AEROSPACE BY THE CORRESPONDING GOVERNMENTAL AGENCY.
Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void
any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any
liability of ST.
ST and the ST logo are trademarks or registered trademarks of ST in various countries.
Information in this document supersedes and replaces all information previously supplied.
The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners.
© 2013 STMicroelectronics - All rights reserved
STMicroelectronics group of companies
Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Philippines - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America
www.st.com
40/40
DocID13621 Rev 6