Data Sheet - STMicroelectronics

VN5E006ASP-E
Single channel high-side driver with analog current sense
for automotive applications
Datasheet - production data
–
–
–
–
–
("1($'5
PowerSO-10
Features
Max transient supply voltage
VCC
41 V
Operating voltage range
VCC
4.5 to 28 V
Max on-state resistance (per ch.)
RON
6 mΩ
Current limitation (typ)
ILIMH
90 A
Off-state supply current
IS
2
µA(1)
Undervoltage shutdown
Overvoltage clamp
Load current limitation
Self limiting of fast thermal transients
Protection against loss of ground and loss
of VCC
– Overtemperature shutdown with auto
restart (thermal shutdown)
– Reverse battery protected with self switch
of the Power MOSFET
– Electrostatic discharge protection
Applications
• All types of resistive, inductive and capacitive
loads
1. Typical value with all loads connected.
Description
• General
– Very low standby current
– 3.0 V CMOS compatible inputs
– Optimized electromagnetic emissions
– Very low electromagnetic susceptibility
– Compliance with European directive
2002/95/EC
– Very low current sense leakage
The VN5E006ASP-E is a single channel high-side
driver manufactured using ST proprietary
VIPower® M0-5 technology and housed in
PowerSO-10 package. The device is designed to
drive 12 V automotive grounded loads delivering
protection, diagnostics. It also implements a 3 V
and 5 V CMOS-compatible interface for use with
any microcontroller.
• Diagnostic functions
– Proportional load current sense
– High current sense precision for wide
currents range
– Diagnostic enable pin
– Off-state open-load detection
– Output short to VCC detection
– Overload and short to ground (power
limitation) indication
– Thermal shutdown indication
• Protection
– Inrush current active management by
power limitation
March 2015
This is information on a product in full production.
The device integrates advanced protective
functions such as load current limitation, inrush
and overload active management by power
limitation, overtemperature shut-off with autorestart and overvoltage active clamp. A dedicated
analog current sense pin is associated with every
output channel providing enhanced diagnostic
functions including fast detection of overload and
short-circuit to ground through power limitation
indication, over-temperature indication, shortcircuit to VCC diagnosis and on-state and off-state
open-load detection. The current sensing and
diagnostic feedback of the whole device can be
disabled by pulling the DE pin low to share the
external sense resistor with similar devices.
DocID17753 Rev 9
1/38
www.st.com
Contents
VN5E006ASP-E
Contents
1
Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2
Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3
2.1
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2
Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.4
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
2.5
Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
3.1
MCU I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
3.2
Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
3.3
Current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
3.3.1
3.4
4
Maximum demagnetization energy (VCC = 13.5 V) . . . . . . . . . . . . . . . . . 27
Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
4.1
5
Short to VCC and off-state open-load detection . . . . . . . . . . . . . . . . . . 26
PowerSO-10 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
5.1
ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
5.2
PowerSO-10 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
5.3
Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
6
Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
7
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
2/38
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VN5E006ASP-E
List of tables
List of tables
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Table 9.
Table 10.
Table 11.
Table 12.
Table 13.
Table 14.
Table 15.
Table 16.
Table 17.
Table 18.
Pin function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 6
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Switching (VCC = 13 V; Tj = 25 °C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Logic inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Protections and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Current sense (8 V < VCC < 18 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Open-load detection (8 V < VCC < 18 V, VDE = 5 V). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Electrical transient requirements (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Electrical transient requirements (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Electrical transient requirements (part 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
PowerSO-10 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
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3
List of figures
VN5E006ASP-E
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Figure 10.
Figure 11.
Figure 12.
Figure 13.
Figure 14.
Figure 15.
Figure 16.
Figure 17.
Figure 18.
Figure 19.
Figure 20.
Figure 21.
Figure 22.
Figure 23.
Figure 24.
Figure 25.
Figure 26.
Figure 27.
Figure 28.
Figure 29.
Figure 30.
Figure 31.
Figure 32.
Figure 33.
Figure 34.
Figure 35.
Figure 36.
Figure 37.
Figure 38.
Figure 39.
Figure 40.
Figure 41.
4/38
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Current sense delay characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Open load Off-state delay timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Delay response time between rising edge of output current and rising edge of current sense
(CS enabled). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Output voltage drop limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
IOUT/ISENSE vs IOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Maximum current sense ratio drift vs load current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Normal operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Overload or short to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Intermittent overload . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
OFF-state open load with external circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Short to VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Ti evolution in overload or short to GND. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Off-state output current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
On-state resistance vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
On state resistance vs VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
ILIMH vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
DE clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Low level DE voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
High level DE voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Current sense and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Maximum turn-off current versus inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
PowerSO-10 PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Rthj-amb vs PCB copper area in open box free air condition (one channel on) . . . . . . . . . . 28
PowerSO-10 thermal impedance junction ambient single pulse (one channel on). . . . . . . 29
Thermal fitting model of a single channel HSD in PowerSO-10 . . . . . . . . . . . . . . . . . . . . . 29
PowerSO-10 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
PowerSO-10 suggested pad layout and tube shipment (no suffix). . . . . . . . . . . . . . . . . . . 34
PowerSO-10 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
DocID17753 Rev 9
VN5E006ASP-E
1
Block diagram and pin description
Block diagram and pin description
Figure 1. Block diagram
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Table 1. Pin function
Name
VCC
OUTPUT
GND
INPUT
CURRENT
SENSE
DE
Function
Battery connection.
Power output.
Ground connection.
Voltage controlled input pin with hysteresis, CMOS compatible. Controls output
switch state.
Analog current sense pin, delivers a current proportional to the load current.
Active high diagnostic enable pin.
DocID17753 Rev 9
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37
Block diagram and pin description
VN5E006ASP-E
Figure 2. Configuration diagram (top view)
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Table 2. Suggested connections for unused and not connected pins
6/38
Connection /
pin
Current sense
N.C.
Output
Input
DE
Floating
Not allowed
X
X
X
X
To ground
Through 1KΩ
resistor
X
Not allowed
Through 10KΩ
resistor
Through 10KΩ
resistor
DocID17753 Rev 9
VN5E006ASP-E
2
Electrical specifications
Electrical specifications
Figure 3. Current and voltage conventions
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2.1
Absolute maximum ratings
Stressing the device above the ratings listed in Table 3 may cause permanent damage to
the device. These are stress ratings only and operation of the device at these or any other
conditions above those indicated in the Operating sections of this specification is not
implied. Exposure to the conditions in this section for extended periods may affect device
reliability.
Table 3. Absolute maximum ratings
Symbol
Value
Unit
DC supply voltage
28
V
Transient supply voltage (T < 400 ms, RLOAD > 0.5 Ω)
41
V
-VCC
Reverse DC supply voltage
16
V
IOUT
DC output current
Internally limited
A
-IOUT
Reverse DC output current
60
A
VCC
VCCPK
Parameter
IIN
DC input current
-1 to 10
mA
IDE
DC diagnostic enable input current
-1 to 10
mA
VCC-41
+VCC
V
V
mJ
VCSENSE Current sense maximum voltage
EMAX
Maximum switching energy (single pulse)
(L = 1.4 mH; RL = 0 Ω; Vbat = 13.5 V; Tjstart = 150 °C;
IOUT = IlimL(Typ.))
600
VESD
Electrostatic discharge
(Human Body Model: R = 1.5 KΩ; C = 100 pF)
2000
VESD
Charge device model (CDM-AEC-Q100-011)
750
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V
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Electrical specifications
VN5E006ASP-E
Table 3. Absolute maximum ratings (continued)
Symbol
Tj
TSTG
2.2
Parameter
Value
Unit
Junction operating temperature
-40 to 150
°C
Storage temperature
-55 to 150
°C
Thermal data
Table 4. Thermal data
Symbol
Parameter
Rthj-case Thermal resistance junction-case (one channel ON)
Rthj-amb
8/38
Thermal resistance junction-ambient
DocID17753 Rev 9
Maximum value
Unit
0.45
°C/W
See Figure 36 in the
thermal section
°C/W
VN5E006ASP-E
2.3
Electrical specifications
Electrical characteristics
8 V < VCC < 28 V; -40 °C < Tj < 150 °C, unless otherwise specified.
Table 5. Power section
Symbol
Parameter
Test conditions
Min
Typ
Max
Unit
VCC
Operating supply voltage
4.5
13
28
V
VUSD
Undervoltage shutdown
3.5
4.5
V
VUSDhyst
Undervoltage shutdown
hysteresis
0.5
IOUT = 10 A; Tj = 25 °C
RON REV
Vclamp
4.5
IOUT = 10 A; Tj = 150 °C
9
IOUT = 10 A; VCC = 5 V;
Tj = 25 °C
6
Reverse battery on state
resistance
VCC = -13 V; IOUT = -10 A;
Tj = 25 °C
6
mΩ
Clamp voltage
IS = 20 mA
46
52
V
2
5
ON state resistance
RON
41
Disable VDE = 0 V; VCC = 13 V;
Tj = 25 °C; VIN=x;
VOUT = VSENSE = 0 V
IS
Off state output current (2)
mΩ
µA
Off state; VCC = 13 V;
VDE = 5 V; Tj = 25 °C;
VIN = VOUT = VSENSE = 0 V
Supply current
On state; VCC = 13 V; VDE = 5 V;
VIN = 5 V; IOUT = 0 A
IL(off1)
V
VIN = VOUT = 0 V; VCC = 13 V;
Tj = 25 °C
0
VIN = VOUT = 0 V; VCC = 13 V;
Tj = 125 °C
0
10(1)
15(1)
2
4
0.01
3
mA
µA
5
1. PowerMOS leakage included.
2. For each channel.
Table 6. Switching (VCC = 13 V; Tj = 25 °C)
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
Unit
td(on)
Turn-on delay time
RL = 1.3 Ω (see Figure 6)
—
30
—
µs
td(off)
Turn-off delay time
RL = 1.3 Ω (see Figure 6)
—
30
—
µs
(dVOUT/dt)on Turn-on voltage slope
RL = 1.3 Ω
—
See Figure 27
—
V/µs
(dVOUT/dt)off Turn-off voltage slope
RL = 1.3 Ω
—
See Figure 28
—
V/µs
WON
Switching energy losses
during twon
RL = 1.3 Ω (see Figure 6)
—
3
—
mJ
WOFF
Switching energy losses
during twoff
RL = 1.3 Ω (see Figure 6)
—
1.5
—
mJ
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Electrical specifications
VN5E006ASP-E
Table 7. Logic inputs
Symbol
Parameter
Test conditions
VIL
Input low level voltage
IIL
Low level input current
VIH
Input high level voltage
IIH
High level input current
VI(hyst)
Input hysteresis voltage
Input clamp voltage
VDEL
DE low level voltage
IDEL
DE low level current
VDEH
DE high level voltage
IDEH
DE high level current
VDE(hyst)
DE hysteresis voltage
Max.
Unit
0.9
V
1
µA
2.1
V
10
0.25
7
V
-0.7
0.9
VIN = 0.9 V
V
1
µA
2.1
V
VIN = 2.1 V
10
0.25
IDE = 1 mA
µA
V
5.5
IIN = -1 mA
DE clamp voltage
Typ.
VIN = 2.1 V
IIN = 1 mA
VICL
VDECL
VIN = 0.9 V
Min.
µA
V
5.5
7
V
IDE = -1 mA
-0.7
Table 8. Protections and diagnostic(1)
Symbol
Parameter
Test conditions
VCC = 13 V
IlimH
Short circuit current
IlimL
Short circuit current
VCC = 13 V; TR < Tj < TTSD
during thermal cycling
TTSD
Shutdown
temperature
Reset temperature
TRS
Thermal reset of
status
VDEMAG
VON
Typ.
Max.
63.5
90
127
127
25
150
175
TRS +
1
TRS +
5
Thermal hysteresis
(TTSD-TR)
Output voltage drop
limitation
A
200
°C
7
IOUT = 1.2 A; Tj = -40 °C...150 °C
(see Figure 8)
VCC28
VCC31
°C
VCC35
25
1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related
diagnostic signals must be used together with a proper software strategy. If the device is subjected to
abnormal conditions, this software must limit the duration and number of activation cycles.
10/38
DocID17753 Rev 9
°C
°C
135
Turn-off output voltage
IOUT = 2 A; VIN = 0; L = 6 mH
clamp
Unit
A
5 V < VCC < 24 V
TR
THYST
Min.
V
mV
VN5E006ASP-E
Electrical specifications
Table 9. Current sense (8 V < VCC < 18 V)
Symbol
K0
dK0/K0(1)
K1
dK1/K1(1)
K2
dK2/K2(1)
K3
dK3/K3(1)
ISENSE0
IOL
VSENSE
Parameter
Test conditions
Min
Typ
Max
IOUT/ISENSE
IOUT = 5 A; VSENSE = 0.5 V;
VDE = 5 V; Tj = -40 °C...150 °C
Current sense ratio
drift
IOUT = 5 A; VSENSE = 0.5 V;
VDE = 5 V; Tj = -40 °C to 150 °C
IOUT/ISENSE
IOUT = 10 A; VSENSE = 4 V
VDE = 5 V
Tj = -40 °C...150 °C
Tj = 25 °C...150 °C
Current sense ratio
drift
IOUT = 10 A; VSENSE = 4 V;
VDE = 5 V; Tj = -40 °C to 150 °C
IOUT/ISENSE
IOUT =15 A; VSENSE = 4 V
VDE = 5 V
Tj = -40 °C...150 °C
Tj = 25 °C...150 °C
Current sense ratio
drift
IOUT = 15 A; VSENSE = 4 V;
VDE = 5 V; Tj = -40°C to 150°C
IOUT/ISENSE
IOUT = 25 A; VSENSE = 4 V
VDE = 5 V
Tj = -40 °C...150 °C
Tj = 25 °C...150 °C
Current sense ratio
drift
IOUT = 25 A; VSENSE = 4 V;
VDE = 5 V; Tj = -40 °C to 150 °C
-6
6
IOUT = 0 A; VSENSE = 0 V;
VDE = 0 V; VIN = 0 V;
Tj = -40 °C...150 °C
0
1
0
2
IOUT = 10 A; VDE = 0 V;
VSENSE = 0 V; VIN = 5 V;
0
1
Open-load on state
current detection
threshold
VIN = 0 V, 8 V< VCC < 18 V;
ISENSE = 5 µA
10
100
Max analog sense
output voltage
IOUT = 25 A; VDE = 5 V;
RSENSE = 3.9 KΩ
5
Analog sense leakage IOUT = 0 A; VDE = 5 V; VIN = 5 V;
current
VSENSE = 0 V
Tj = -40 °C...150 °C
Unit
7350 10700 14590
-12
12
%
7490 10500 13930
8240 10500 12815
-12
12
%
8340 10400 12760
8680 10400 12070
-8
8
%
8785 10300 11950
8965 10300 11545
%
µA
mA
V
Analog sense output
VSENSEH(2) voltage in fault
conditions
VCC = 13 V; RSENSE = 10 KΩ
8
V
Analog sense output
ISENSEH(1) current in fault
conditions
VCC = 13 V; VSENSE = 5 V
9
mA
DocID17753 Rev 9
11/38
37
Electrical specifications
VN5E006ASP-E
Table 9. Current sense (8 V < VCC < 18 V) (continued)
Symbol
Parameter
Test conditions
Min
Typ
Max
Unit
Delay response time
tDSENSE1H from falling edge of
DE pin
VSENSE < 4 V, 5 A < Iout < 25 A
ISENSE = 90 % of ISENSE max
(see Figure 4)
50
100
µs
Delay response time
tDSENSE1L from rising edge of
DE pin
VSENSE < 4 V, 5 A < Iout < 25 A
ISENSE = 10 % of ISENSE max
(see Figure 4)
5
20
µs
Delay response time
tDSENSE2H from rising edge of
INPUT pin
VSENSE < 4 V, 5 A < Iout < 25 A
ISENSE = 90 % of ISENSE max
(see Figure 4)
200
600
µs
Delay response time
between rising edge
ΔtDSENSE2
of output current and
H
rising edge of current
sense
VSENSE < 4 V,
ISENSE = 90 % of ISENSEMAX,
IOUT = 90 % of IOUTMAX
IOUTMAX = 25 A (see Figure 7)
200
µs
Delay response time
tDSENSE2L from falling edge of
INPUT pin
VSENSE < 4 V, 5 A < Iout < 25 A
ISENSE = 10 % of ISENSE max
(see Figure 4)
250
µs
100
1. Parameter guaranteed by design; it is not tested.
2. Fault conditions include: power limitation, overtemperature and open load OFF state detection.
Table 10. Open-load detection (8 V < VCC < 18 V, VDE = 5 V)
12/38
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
Unit
VOL
Open-load off state voltage
detection threshold
VIN = 0 V; VDE = 5 V;
See Figure 5
2
—
4
V
tDSTKON
Output short circuit to VCC
detection delay at turn off
VDE = 5 V; See Figure 5
180
—
1200
µs
IL(off2)r
Off-state output current at
VOUT = 4V
VIN = 0 V; VSENSE = 0 V
VDE= 5 V;
VOUT rising from 0V to 4 V
-120
—
90
µA
IL(off2)f
Off-state output current at
VOUT = 2V
VIN = 0 V; VSENSE = VSENSEH
VDE= 5 V;
VOUT falling from VCC to 2 V
-50
—
90
µA
td_vol
Delay response from output VOUT = 4 V; VIN = 0 V
rising edge to VSENSE rising VDE = 5 V;
edge in open load
VSENSE = 90 % of VSENSEH
—
20
µs
td_voh
Delay response from output VOUT = 2 V; VIN = 0 V
falling edge to VSENSE
VDE= 5 V;
falling edge in open-load
VSENSE = 10 % of VSENSEH
—
20
µs
DocID17753 Rev 9
VN5E006ASP-E
Electrical specifications
Figure 4. Current sense delay characteristics
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Figure 6. Switching characteristics
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37
Electrical specifications
VN5E006ASP-E
Figure 7. Delay response time between rising edge of output current and rising edge
of current sense (CS enabled)
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Figure 8. Output voltage drop limitation
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14/38
DocID17753 Rev 9
VN5E006ASP-E
Electrical specifications
Figure 9. IOUT/ISENSE vs IOUT
Iout/Isense
15000
A
14250
13500
B
12750
12000
11250
C
10500
9750
9000
D
8250
7500
E
6750
0
5
10
15
20
25
30
Iout [A]
A: Max, Tj = -40 C to 150 C
B: Max, Tj = 25 C to 150 C
C: Typ ical, Tj = -40 C to 150 C
D: Min, Tj = 25 C to 150 C
E: Min, Tj = -40 C to 150 C
Figure 10. Maximum current sense ratio drift vs load current
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DocID17753 Rev 9
15/38
37
Electrical specifications
VN5E006ASP-E
Table 11. Truth table
Enable
Input
Output
Sense
(VDE = 5 V)(1)
Normal operation
H
H
L
H
L
H
0
Nominal
Overtemperature
H
H
L
H
L
L
0
VSENSEH
Undervoltage
H
H
L
H
L
L
0
0
H
H
H
H
X
(no power limitation)
Cycling
(power limitation)
Short circuit to GND
(Power limitation)
H
H
L
H
L
L
0
VSENSEH
Open load OFF State
(with external pull up)
H
L
H
VSENSEH
Short circuit to VCC
(external pull up
disconnected)
H
H
L
H
H
H
VSENSEH
< Nominal
Negative output voltage
clamp
H
L
L
0
Conditions
Overload
Nominal
VSENSEH
1. If the VDE is low, the SENSE output is at a high impedance, its potential depends on leakage currents and
external circuit.
16/38
DocID17753 Rev 9
VN5E006ASP-E
Electrical specifications
Table 12. Electrical transient requirements (part 1)
ISO 7637-2:
2004(E)
Test levels(1)
Number of
pulses or
test times
Burst cycle/pulse
repetition time
Delays and
impedance
Test Pulse
III
IV
1
-75 V
-100 V
5000
pulses
0.5 s
5s
2 ms, 10 Ω
2a
+37 V
+50 V
5000
pulses
0.2 s
5s
50 μs, 2 Ω
3a
-100 V
-150 V
1h
90 ms
100 ms
0.1 μs, 50 Ω
3b
+75 V
+100 V
1h
90 ms
100 ms
0.1 μs, 50 Ω
4
-6 V
-7 V
1 pulse
100 ms, 0.01 Ω
5b(2)
+65 V
+87 V
1 pulse
400 ms, 2 Ω
1. The above test levels must be considered referred to VCC = 13.5V except for pulse 5b.
2. Valid in case of external load dump clamp: 40V maximum referred to ground. The protection strategy
allows PowerMOS to be cyclically switched on during load dump, so distributing the load dump energy
along the time and to transfer a part of it to the load.
Table 13. Electrical transient requirements (part 2)
Test level results(1)
ISO 7637-2:
2004(E)
test pulse
III
IV
1
C
C
2a
C
C
3a
C
C
3b
C
C
4
C
C
5b (2) (3)
C
C
1. The above test levels must be considered referred to VCC = 13.5V except for pulse 5b.
2. Valid in case of external load dump clamp: 40V maximum referred to ground. The protection strategy
allows PowerMOS to be cyclically switched on during load dump, so distributing the load dump energy
along the time and to transfer a part of it to the load.
3. Suppressed load dump (pulse 5b) is withstood with a minimum load connected as specified in Table 3.:
Absolute maximum ratings.
Table 14. Electrical transient requirements (part 3)
Class
Contents
C
All functions of the device are performed as designed after exposure to disturbance.
E
One or more functions of the device are not performed as designed after exposure
to disturbance and cannot be returned to proper operation without replacing the
DocID17753 Rev 9
17/38
37
Electrical specifications
2.4
VN5E006ASP-E
Waveforms
Figure 11. Normal operation
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Figure 12. Overload or short to GND
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DocID17753 Rev 9
VN5E006ASP-E
Electrical specifications
Figure 13. Intermittent overload
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Figure 14. OFF-state open load with external circuitry
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37
Electrical specifications
VN5E006ASP-E
Figure 15. Short to VCC
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Figure 16. Ti evolution in overload or short to GND
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DocID17753 Rev 9
VN5E006ASP-E
2.5
Electrical specifications
Electrical characteristics curves
Figure 17. Off-state output current
Figure 18. High level input current
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Figure 19. Input clamp voltage
Figure 20. Input high level
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Figure 21. Input low level
Figure 22. Input hysteresis voltage
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21/38
37
Electrical specifications
VN5E006ASP-E
Figure 23. On-state resistance vs Tcase
Figure 24. On state resistance vs VCC
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Figure 25. Undervoltage shutdown
Figure 26. ILIMH vs Tcase
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Figure 27. Turn-on voltage slope
Figure 28. Turn-off voltage slope
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DocID17753 Rev 9
*$3*&)7
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Electrical specifications
Figure 29. DE clamp voltage
Figure 30. Low level DE voltage
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DocID17753 Rev 9
23/38
37
Application information
3
VN5E006ASP-E
Application information
Figure 32. Application schematic
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3.1
MCU I/Os protection
When negative transients are present on the VCC line, the control pins are pulled negative to
approximately -1.5V.
ST suggests the insertion of resistors (Rprot) in the lines to prevent the microcontroller I/O
pins from latching up.
The values of these resistors provide a compromise between the leakage current of the
microcontroller, the current required by the HSD I/Os (input levels compatibility) and the
latch-up limit of the microcontroller I/Os.
-VCCpeak/Ilatchup ≤ Rprot ≤ (VOHµC-VIH) / IIHmax
Calculation example:
For VCCpeak= -1.5 V and Ilatchup ≥ 20 mA; VOHµC ≥ 4.5 V
75 Ω ≤ Rprot ≤ 240 kΩ.
Recommended values: Rprot = 10 kΩ, CEXT = 10 nF
3.2
Load dump protection
Dld is necessary (voltage transient suppressor) if the load dump peak voltage exceeds the
VCCPK max rating. The same applies if the device is subject to transients on the VCC line
that are greater than the ones shown in the ISO 7637-2: 2004(E) table.
24/38
DocID17753 Rev 9
VN5E006ASP-E
3.3
Application information
Current sense and diagnostic
The current sense pin performs a double function (see Figure 33: Current sense and
diagnostics):
•
Current mirror of the load current in normal operation, delivering a current
proportional to the load one according to a known ratio KX.
The current ISENSE can be easily converted to a voltage VSENSE by means of an
external resistor RSENSE. Linearity between IOUT and VSENSE is ensured up to 5V
minimum (see parameter VSENSE in Table 9: Current sense (8 V < VCC < 18 V)). The
current sense accuracy depends on the output current (refer to current sense electrical
characteristics Table 9: Current sense (8 V < VCC < 18 V)).
•
Diagnostic flag in fault conditions, delivering a fixed voltage VSENSEH up to a
maximum current ISENSEH in case of the following fault conditions (refer to Truth table):
–
Power limitation activation
–
Overtemperature
–
Short to VCC in OFF-state
–
Open-load in OFF-state with additional external components.
A logic level low on DE pin sets at the same time all the current sense pins of the device in a
high impedance state, thus disabling the current monitoring and diagnostic detection. This
feature allows multiplexing of the microcontroller analog inputs by sharing of sense
resistance and ADC line among different devices.
Figure 33. Current sense and diagnostics
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DocID17753 Rev 9
25/38
37
Application information
3.3.1
VN5E006ASP-E
Short to VCC and off-state open-load detection
Short to VCC
A short circuit between VCC and output is indicated by the relevant current sense pin set to
VSENSEH during the device off state. Small or no current is delivered by the current sense
during the on state depending on the nature of the short circuit.
OFF-state open-load with external circuitry
Detection of an open-load in off mode requires an external pull-up resistor RPU connecting
the output to a positive supply voltage VPU.
It is preferable VPU to be switched off during the module standby mode in order to avoid the
overall standby current consumption to increase in normal conditions, i.e. when load is
connected.
An external pull down resistor RPD connected between output and GND is mandatory to
avoid misdetection in case of floating outputs in off-state (see Figure 33: Current sense and
diagnostics).
RPD must be selected in order to ensure VOUT < VOLmin unless pulled up by the external
circuitry:
V OUT
Pull-up_OFF
= R PD ⋅ I L(off2)f < V OLmin = 2V
RPD ≤ 22 KΩ is recommended.
For proper open load detection in off state, the external pull-up resistor must be selected
according to the following formula:
V OUT
R PD ⋅ V PU – R PU ⋅ R PD ⋅ I L(off2)r
= ------------------------------------------------------------------------------------- > V OLmax = 4V
R PU + R PD
Pull-up_ON
For the values of VOLmin, VOLmax, IL(off2)r and IL(off2)f see Table 10: Open-load detection
(8 V < VCC < 18 V, VDE = 5 V).
26/38
DocID17753 Rev 9
VN5E006ASP-E
3.4
Application information
Maximum demagnetization energy (VCC = 13.5 V)
Figure 34. Maximum turn-off current versus inductance
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A: Tjstart = 150°C single pulse
B: Tjstart = 100°C repetitive pulse
C: Tjstart = 125°C repetitive pulse
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Note:
Values are generated with RL = 0 Ω.
In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse
must not exceed the temperature specified above for curves A and B.
DocID17753 Rev 9
27/38
37
Package and PCB thermal data
VN5E006ASP-E
4
Package and PCB thermal data
4.1
PowerSO-10 thermal data
Figure 35. PowerSO-10 PC board
*$3*&)7
1. Layout condition of Rth and Zth measurements (Board finish thickness 1.6 mm +/- 10%; Board double layer;
Board dimension 77x86; Board Material FR4; Cu thickness 0.070mm (front and back side); Thermal vias
separation 1.2 mm; Thermal via diameter 0.3 mm +/- 0.08 mm; Cu thickness on vias 0.025 mm).
Figure 36. Rthj-amb vs PCB copper area in open box free air condition (one channel
on)
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28/38
DocID17753 Rev 9
VN5E006ASP-E
Package and PCB thermal data
Figure 37. PowerSO-10 thermal impedance junction ambient single pulse (one
channel on)
=7+ƒ&:
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Figure 38. Thermal fitting model of a single channel HSD in PowerSO-10
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1. The fitting model is a simplified thermal tool and is valid for transient evolutions where the embedded
protections (power limitation or thermal cycling during thermal shutdown) are not triggered.
Equation 1: pulse calculation formula
Z THδ = R TH ⋅ δ + Z THtp ( 1 – δ )
where
δ = tp ⁄ T
DocID17753 Rev 9
29/38
37
Package and PCB thermal data
VN5E006ASP-E
Table 15. Thermal parameter
2
Area/island (cm )
30/38
Footprint
2
8
R1 (°C/W)
0.05
R2 (°C/W)
0.6
R3 (°C/W)
1.5
R4 (°C/W)
7
R5 (°C/W)
13
12
8
R6 (°C/W)
24
20
14
C1 (W.s/°C)
0.1
C2 (W.s/°C)
0.08
C3 (W.s/°C)
0.8
C4 (W.s/°C)
2
C5 (W.s/°C)
3
4
8
C6 (W.s/°C)
6
8
14
DocID17753 Rev 9
VN5E006ASP-E
Package information
5
Package information
5.1
ECOPACK® packages
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
DocID17753 Rev 9
31/38
37
Package information
5.2
VN5E006ASP-E
PowerSO-10 mechanical data
Figure 39. PowerSO-10 package dimensions
C
B . - . $
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3
D
5
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5
(
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&
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3
3
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DocID17753 Rev 9
VN5E006ASP-E
Package information
Table 16. PowerSO-10 mechanical data
Millimeters
Symbol
Min.
Typ.
Max.
A1
0
0.05
0.10
A2
3.40
3.50
3.60
A3
1.20
1.30
1.40
A4
0.15
0.20
0.25
a
0.20
b
0.37
0.45
0.53
c
0.23
0.27
0.32
D
9.40
9.50
9.60
D1
7.40
7.50
7.60
d
0
0.05
0.10
E
13.85
14.10
14.35
E1(1)
9.30
9.40
9.50
E2
7.30
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10º
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1. Resin protrusions not included (max value: 0.15 mm per side).
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37
Package information
5.3
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Packing information
Figure 40. PowerSO-10 suggested pad layout and tube shipment (no suffix)
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6
Order codes
Order codes
Table 17. Device summary
Order codes
Package
PowerSO-10
Tube
Tape and reel
VN5E006ASP-E
VN5E006ASPTR-E
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Revision history
7
VN5E006ASP-E
Revision history
Table 18. Document revision history
Date
Revision
01-Sep-2010
1
Internal release.
2
Updated document with diagnostic enable pin insertion.
Figure 2: Configuration diagram (top view)
– changed pinout
Changed Figure 4: Current sense delay characteristics
Table 3: Absolute maximum ratings
EMAX: updated paramenters and value
Table 4: Thermal data
– Rthj-case: updated maximum value
Table 5: Power section
– RON: updated typical and maximum values
– IS: replaced VCE = 0 V with VDE = 0 V for test conditions,
changed typ/max value (first row), replaced VCE = 5 V with
VDE = 5 V for test conditions, changed typ/max value (second
and third row)
Table 6: Switching (VCC = 13 V; Tj = 25 °C)
– td(on), td(off), WON, WOFF: updated typical value
Table 9: Current sense (8 V < VCC < 18 V)
– IOL: added new row
– K1,dK1/K1: changed VSENSE value (from 0.5 V to 4 V) for test
conditions
– K0, K1, K2, K3: added VDE = 5 V for test conditions
– dK0/K0, dK1/K1, dK2/K2, dK3/K3: replaced VCSD = 0 V with VDE
= 5 V for test conditions
– K0, K1, K2, K3: updated minimum, typical and maximum values
– dK0/K0, dK1/K1, dK2/K2, dK3/K3: updated minimum and
maximum values
– ISENSE0: replaced VCSD = 5 V with VDE = 0 V (first row),
replaced VCSD = 0 V with VDE = 5 V, added IOUT = 0 A, added
VSENSE = 0 V (second row), replaced VCSD = 5 V with
VDE = 0 V (third row) for test conditions
– VSENSE: replaced VCSD = 0 V with VDE = 5 V, added RSENSE
for test conditions
– tDSENSE1H, tDSENSE1L, tDSENSE2H, tDSENSE2L: changed
typ/max values
– ΔtDSENSE2H: changed maximum value
Table 10: Open-load detection (8 V < VCC < 18 V, VDE = 5 V)
– VOL: updated typical value
– td_voh: updated maximum value
Updated Figure 9: IOUT/ISENSE vs IOUT
Updated Figure 10: Maximum current sense ratio drift vs load
current
13-Sep-2010
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Changes
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Revision history
Table 18. Document revision history (continued)
Date
Revision
Changes
2
Changed Figure 11: Normal operation
Changed Figure 12: Overload or short to GND
Changed Figure 13: Intermittent overload
Changed Figure 14: OFF-state open load with external circuitry
Changed Figure 15: Short to VCC
Updated Chapter 4: Package and PCB thermal data
Updated Chapter 5.1: ECOPACK® packages
3
Table 3: Absolute maximum ratings:
– -IOUT: updated value
– VCCPK: updated parameter
Table 9: Current sense (8 V < VCC < 18 V):
– K0, K1, K2, K3: updated minimum, typical and maximum values
– ΔtDSENSE2H: updated test condition
Updated Figure 9: IOUT/ISENSE vs IOUT
20-Dec-2010
4
Added Section 3.4: Maximum demagnetization energy
(VCC = 13.5 V)
Table 3: Absolute maximum ratings:
– EMAX: updated value
Table 8: Protections and diagnostic
– IlimH: updated minimum, typical and maximum values
Table 9: Current sense (8 V < VCC < 18 V)
– K0, K1, K2, K3: updated minimum, typical and maximum values
Updated Figure 9: IOUT/ISENSE vs IOUT
20-Apr-2011
5
Updated Table 17: Device summary
18-May-2012
6
Updated Figure 26: ILIMH vs Tcase
19-Sep-2013
7
Updated Disclaimer.
25-Oct-2013
8
Updated footnote 2 into the Table 12: Electrical transient
requirements (part 1) and Table 13: Electrical transient
requirements (part 2).
18-Mar-2015
9
Updated Section 5.2: PowerSO-10 mechanical data
13-Sep-2010
29-Sep-2010
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