STL13N60M2 - STMicroelectronics

STL13N60M2
N-channel 600 V, 0.39 Ω typ., 7 A MDmesh II Plus™ low Qg
Power MOSFET in a PowerFLAT™ 5x6 HV package
Datasheet − production data
Features
Order code
VDS @ TJmax
RDS(on) max
ID
STL13N60M2
650 V
0.42 Ω
7A
• Extremely low gate charge
• Lower RDS(on) x area vs previous generation
1
2
• Low gate input resistance
3
4
• 100% avalanche tested
• Zener-protected
PowerFLAT™ 5x6 HV
Applications
• Switching applications
Figure 1. Internal schematic diagram
D(5, 6, 7, 8)
8
7
5
6
Description
This device is an N-channel Power MOSFET
developed using a new generation of MDmesh™
technology: MDmesh II Plus™ low Qg. This
revolutionary Power MOSFET associates a
vertical structure to the company's strip layout to
yield one of the world's lowest on-resistance and
gate charge. It is therefore suitable for the most
demanding high efficiency converters.
G(4)
1
S(1, 2, 3)
2
3
4
Top View
AM15540v2
Table 1. Device summary
Order code
Marking
Package
Packaging
STL13N60M2
13N60M2
PowerFLAT™ 5x6 HV
Tape and reel
June 2014
This is information on a product in full production.
DocID026363 Rev 2
1/16
www.st.com
Contents
STL13N60M2
Contents
1
Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1
Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3
Test circuits
4
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
5
Packaging mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
6
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
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STL13N60M2
1
Electrical ratings
Electrical ratings
Table 2. Absolute maximum ratings
Symbol
VGS
Parameter
Gate-source voltage
Value
Unit
± 25
V
(1)
A
ID
Drain current (continuous) at TC = 25 °C
7
ID
Drain current (continuous) at TC = 100 °C
4.7
A
IDM (2)
Drain current (pulsed)
28
A
PTOT
Total dissipation at TC = 25 °C
55
W
Peak diode recovery voltage slope
15
V/ns
MOSFET dv/dt ruggedness
50
V/ns
dv/dt
(3)
dv/dt(4)
Tstg
Storage temperature
- 55 to 150
°C
Tj
Max. operating junction temperature
150
1. The value is rated according to Rthj-case and limited by package
2. Pulse width limited by safe operating area.
3. ISD ≤ 7 A, di/dt ≤ 400 A/μs; VDS peak < V(BR)DSS, VDD=400 V.
4. VDS ≤ 480 V
Table 3. Thermal data
Symbol
Rthj-case
Rthj-pcb
Parameter
Thermal resistance junction-case max
Thermal resistance junction-pcb
max(1)
Value
Unit
2.27
°C/W
59
°C/W
Value
Unit
1. When mounted on 1 inch² FR-4, 2 Oz copper board
Table 4. Avalanche characteristics
Symbol
Parameter
IAR
Avalanche current, repetitive or not
repetitive (pulse width limited by Tjmax)
2.8
A
EAS
Single pulse avalanche energy (starting
Tj=25°C, ID= IAR; VDD=50)
125
mJ
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16
Electrical characteristics
2
STL13N60M2
Electrical characteristics
(TC = 25 °C unless otherwise specified)
Table 5. On /off states
Symbol
V(BR)DSS
IDSS
IGSS
Parameter
Drain-source
breakdown voltage
Zero gate voltage
drain current
Gate-body leakage
current
Test conditions
VGS = 0, ID = 1 mA
Min.
Typ.
Max.
Unit
600
V
VGS = 0, VDS = 600 V
1
μA
VGS = 0, VDS = 600 V,
TC=125 °C
100
μA
VDS = 0, VGS = ± 25 V
±10
μA
3
4
V
0.39
0.42
Ω
Min.
Typ.
Max.
Unit
-
580
-
pF
-
32
-
pF
-
1.1
-
pF
VGS(th)
Gate threshold voltage VDS = VGS, ID = 250 μA
RDS(on)
Static drain-source
on-resistance
2
VGS = 10 V, ID = 4.5 A
Table 6. Dynamic
Symbol
Parameter
Test conditions
Ciss
Input capacitance
Coss
Output capacitance
Crss
Reverse transfer
capacitance
Coss eq.(1)
Equivalent output
capacitance
VGS = 0, VDS = 0 to 480 V
-
120
-
pF
RG
Intrinsic gate
resistance
f = 1 MHz open drain
-
6.6
-
Ω
Qg
Total gate charge
-
17
-
nC
-
2.5
-
nC
-
9
-
nC
Qgs
Gate-source charge
Qgd
Gate-drain charge
VGS = 0, VDS = 100 V,
f = 1 MHz,
VDD = 480 V, ID = 11 A,
VGS = 10 V (see Figure 15)
1. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS
increases from 0 to 80% VDSS
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STL13N60M2
Electrical characteristics
Table 7. Switching times
Symbol
td(on)
Parameter
Test conditions
Turn-on delay time
VDD = 300 V, ID = 5.5 A,
RG = 4.7 Ω, VGS = 10 V
(see Figure 14 and 19)
Rise time
tr
td(off)
tf
Turn-off delay time
Fall time
Min.
Typ.
Max. Unit
-
11
-
ns
-
10
-
ns
-
41
-
ns
-
9.5
-
ns
Min.
Typ.
Table 8. Source drain diode
Symbol
Parameter
Test conditions
Max. Unit
Source-drain current
-
7
A
ISDM
(1)
Source-drain current (pulsed)
-
28
A
VSD
(2)
Forward on voltage
-
1.6
V
ISD
trr
VGS = 0, ISD = 7 A
Reverse recovery time
Qrr
Reverse recovery charge
IRRM
Reverse recovery current
trr
Reverse recovery time
Qrr
Reverse recovery charge
IRRM
Reverse recovery current
ISD = 11 A, di/dt = 100 A/μs
VDD = 60 V (see Figure 16)
ISD = 11 A, di/dt = 100 A/μs
VDD = 60 V, Tj=150 °C
(see Figure 16)
-
297
ns
-
2.8
μC
-
18.5
A
-
394
ns
-
3.8
μC
-
19
A
1. Pulse width limited by safe operating area
2. Pulsed: pulse duration = 300 μs, duty cycle 1.5%
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Electrical characteristics
2.1
STL13N60M2
Electrical characteristics (curves)
Figure 2. Safe operating area
Figure 3. Thermal impedance
GIPG130520141013SA
ID
(A)
ZthPowerFlat_5x6_19
K
δ=0.5
0.2
on
)
10µs
D
S(
O
Li per
m at
ite io
d ni
by n
m this
ax a
R rea
is
10
1
0.1
10 -1
0.05
0.02
0.01
100µs
1ms
10ms
10 -2
Single pulse
0.1
Tj=150°C
Tc=25°C
Single pulse
0.01
0.1
1
VDS(V)
100
10
Figure 4. Output characteristics
10 -3
10-6
10-5
10-4
10 -2
10-3
10 -1
10 tp(s)
Figure 5. Transfer characteristics
AM15712v1
ID
(A)
AM15713v1
ID (A)
VGS=7, 8, 9, 10V
20
20
VDS=18V
6V
16
16
12
12
5V
8
8
4
4
4V
0
0
4
12
8
16
Figure 6. Normalized VBR(DSS) vs temperature
AM15714v1
VBR(DSS)
(norm)
0
0
VDS(V)
ID=1 mA
1.1
2
4
8
6
VGS(V)
Figure 7. Static drain-source on-resistance
AM15912v1
RDS(on)
(Ω)
0.415
VGS=10V
0.410
0.405
1.06
0.400
1.02
0.395
0.390
0.98
0.385
0.94
0.380
0.9
-50
6/16
0
50
100
TJ(°C)
0.375
0
DocID026363 Rev 2
2
4
6
8
10
ID(A)
STL13N60M2
Electrical characteristics
Figure 8. Gate charge vs gate-source voltage
AM15716v1
VDS
VGS
(V)
10
(V)
VDD=480V
ID=11A
VDS
500
Figure 9. Capacitance variations
AM15717v1
C
(pF)
1000
Ciss
400
8
100
300
6
Coss
10
4
200
2
100
0
0
8
4
12
0
Qg(nC)
16
Figure 10. Normalized gate threshold voltage vs
temperature
AM15718v1
VGS(th)
(norm)
1.1
ID=250µA
1
Crss
0.1
0.1
1
100
10
VDS(V)
Figure 11. Normalized on-resistance vs
temperature
AM15916v1
RDS(on)
(norm)
ID= 4.5 A
VGS= 10 V
2.3
2.1
1.0
1.9
1.7
0.9
1.5
1.3
0.8
1.1
0.9
0.7
0.7
0.6
-50
100
50
0
TJ(°C)
Figure 12. Source-drain diode forward
characteristics
AM15720v1
VSD (V)
0.5
-50 -25
0
25
50
75 100
TJ(°C)
Figure 13. Output capacitance stored energy
AM15721v1
Eoss(µJ)
TJ=-50°C
1
4
TJ=25°C
0.9
3
0.8
2
0.7
TJ=150°C
1
0.6
0.5
0
2
4
6
8
10
ISD(A)
DocID026363 Rev 2
0
0
100
200
300
400
500
VDS(V)
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16
Test circuits
3
STL13N60M2
Test circuits
Figure 14. Switching times test circuit for
resistive load
Figure 15. Gate charge test circuit
VDD
12V
47kΩ
1kΩ
100nF
3.3
μF
2200
RL
μF
IG=CONST
VDD
VGS
100Ω
Vi=20V=VGMAX
VD
RG
2200
μF
D.U.T.
D.U.T.
VG
2.7kΩ
PW
47kΩ
1kΩ
PW
AM01468v1
Figure 16. Test circuit for inductive load
switching and diode recovery times
A
A
AM01469v1
Figure 17. Unclamped inductive load test circuit
L
A
D
G
D.U.T.
FAST
DIODE
B
B
VD
L=100μH
S
3.3
μF
B
25 Ω
1000
μF
D
VDD
2200
μF
3.3
μF
VDD
ID
G
RG
S
Vi
D.U.T.
Pw
AM01470v1
AM01471v1
Figure 18. Unclamped inductive waveform
Figure 19. Switching time waveform
ton
9%5'66
tdon
9'
toff
tr
tdoff
tf
90%
90%
,'0
10%
,'
9''
10%
0
9''
VDS
90%
VGS
$0Y
8/16
0
DocID026363 Rev 2
10%
AM01473v1
STL13N60M2
4
Package mechanical data
Package mechanical data
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
DocID026363 Rev 2
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16
Package mechanical data
STL13N60M2
Figure 20. PowerFLAT™ 5x6 HV drawing
8368143_Rev_B
10/16
DocID026363 Rev 2
STL13N60M2
Package mechanical data
Figure 21. PowerFLAT™ 5x6 HV recommended footprint (dimensions are in mm)
8368143_Rev_B_footprint
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16
Package mechanical data
STL13N60M2
Table 9. PowerFLAT™ 5x6 HV mechanical data
mm
Dim.
Min.
Typ.
A
0.80
1.00
A1
0.02
0.05
A2
0.25
b
0.30
0.50
D
5.00
5.20
5.40
E
5.95
6.15
6.35
D2
4.30
4.40
4.50
E2
3.10
3.20
3.30
e
12/16
Max.
1.27
L
0.50
0.55
0.60
K
1.90
2.00
2.10
DocID026363 Rev 2
STL13N60M2
Packaging mechanical data
Figure 22. PowerFLAT™ 5x6 tape(a)
P0
4.0±0.1 (II)
P2
2.0±0.1 (I)
T
(0.30 ±0.05)
E1
1.75±0.1
Y
0.
20
Do
Ø1.55±0.05
W(12.00±0.3)
R
F(5.50±0.1)(III)
C
L
EF
D1
Ø1.5 MIN.
Bo (5.30±0.1)
5
Packaging mechanical data
REF
.R0
.50
Y
P1(8.00±0.1)
Ao(6.30±0.1)
Ko (1.20±0.1)
SECTION Y-Y
(I) Measured from centerline of sprocket hole
to centerline of pocket.
Base and bulk quantity 3000 pcs
(II) Cumulative tolerance of 10 sprocket
holes is ± 0.20 .
(III) Measured from centerline of sprocket
hole to centerline of pocket.
8234350_Tape_rev_C
Figure 23. PowerFLAT™ 5x6 package orientation in carrier tape.
Pin 1
identification
a. All dimensions are in millimeters.
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Packaging mechanical data
STL13N60M2
Figure 24. PowerFLAT™ 5x6 reel
R0.60
W3
11.9/15.4
PART NO.
1.90
2.50
R25.00
ØN
178(±2.0)
ATTENTION
OBSERVE PRECAUTIONS
FOR HANDLING ELECTROSTATIC
SENSITIVE DEVICES
W2
18.4 (max)
A
330 (+0/-4.0)
4.00
2.50
77
ESD LOGO
W1
12.4 (+2/-0)
06
PS
ØA
128
2.20
R1.10
Ø21.2
All dimensions are in millimeters
13.00
CORE DETAIL
8234350_Reel_rev_C
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STL13N60M2
6
Revision history
Revision history
Table 10. Document revision history
Date
Revision
Changes
15-May-2014
1
First release.
27-Jun-2014
2
– Updated: Figure 3
– Minor text changes
DocID026363 Rev 2
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STL13N60M2
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