STG3820 Low voltage high bandwidth quad DPDT switch Datasheet - production data Description The STG3820 device is a high-speed CMOS low voltage quad analog DPDT (dual pole dual throw) switch or 2:1 multiplexer/demultiplexer switch fabricated in silicon gate C2MOS technology. It is designed to operate from 1.65 V to 4.3 V, making this device ideal for portable applications. Flip Chip 30 (2.0 x 2.4 mm) Features Ultralow power dissipation – ICC = 1 µA (max.) at TA = 85 °C Low “ON” resistance – RON = 5.4 (TA = 25 °C) at VCC = 4.3 V – RON = 6.6 (TA = 25 °C) at VCC = 3.0 V Wide operating voltage range – VCC (OPR.) = 1.65 V to 4.3 V 4.3 V tolerant and 1.8 V compatible threshold on digital control input at VCC = 2.3 V to 3.0 V 4 select pins controlling 2 switches each Typical bandwidth (-3 dB) at 800 MHz on all channels The SELm-n input is provided to control the switches. The switches nS1 and mS1 are ON (connected to common ports Dn and Dm respectively) when the SELm-n input is held high and OFF (high impedance state exists between the two ports) when the SELm-n is held low. The switches nS2 and mS2 are ON (connected to common port Dn and Dm respectively) when the SELm-n input is held low and OFF (high impedance state exists between the two ports) when the SELm-n is held high. The STG3820 device has an integrated fail safe function to withstand overvoltage condition when the device is powered off. Additional key features are fast switching speed, break-before-makedelay time and ultralow power consumption. All inputs and outputs are equipped with protection circuits against static discharge, giving them ESD immunity and transient excess voltage. Table 1. Device summary USB (2.0) high speed (480 Mbps) signal switching compliant Integrated fail safe function Latch-up performance exceeds 100 mA per JESD 78, Class II Order code Package Packing STG3820BJR Flip Chip 30 (2.0 x 2.4 mm) Tape and reel ESD performance exceeds JESD22 2000-V human body model (A114-A) Applications Mobile phones August 2013 This is information on a product in full production. DocID15992 Rev 4 1/20 www.st.com Contents STG3820 Contents 1 Pin settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.1 Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 1.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 4 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 5 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 6 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 7 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 2/20 DocID15992 Rev 4 STG3820 Pin settings 1 Pin settings 1.1 Pin connection Figure 1. Pin connection 6 6 6(/ 6 6 $ % & ' ( ' ' 9&& ' ' $ % & ' ( 6 6 6(/ 6 6 $ % & ' ( 6 6 6(/ 6 6 $ % & ' ( ' ' *1' ' ' $ % & ' ( 6 6 6(/ 6 6 $ % & ' ( %XPSYLHZ 7RSYLHZ $09 1.2 Pin description Table 2. Pin assignment Pin number Symbol Name and function A1 1S1 Independent channel for switch 1 A2 D1 Common channel for switch 1 A3 1S2 Independent channel for switch 1 A4 5S2 Independent channel for switch 5 A5 D5 Common channel for switch 5 A6 5S1 Independent channel for switch 5 B1 2S1 Independent channel for switch 2 B2 D2 Common channel for switch 2 B3 2S2 Independent channel for switch 2 B4 6S2 Independent channel for switch 6 B5 D6 Common channel for switch 6 B6 6S1 Independent channel for switch 6 DocID15992 Rev 4 3/20 20 Pin settings STG3820 Table 2. Pin assignment (continued) 4/20 Pin number Symbol Name and function C1 SEL1-2 C2 VCC C3 SEL3-4 Switch 3-4 selection control C4 SEL5-6 Switch 5-6 selection control C5 GND C6 SEL7-8 D1 3S1 Independent channel for switch 3 D2 D3 Common channel for switch 3 D3 3S2 Independent channel for switch 3 D4 7S2 Independent channel for switch 7 D5 D7 Common channel for switch 7 D6 7S1 Independent channel for switch 7 E1 4S1 Independent channel for switch 4 E2 D4 Common channel for switch 4 E3 4S2 Independent channel for switch 4 E4 8S2 Independent channel for switch 8 E5 D8 Common channel for switch 8 E6 8S1 Independent channel for switch 8 Switch 1-2 selection control Positive supply voltage Ground (0 V) Switch 7-8 selection control DocID15992 Rev 4 STG3820 2 Logic diagram Logic diagram Figure 2. Logic equivalent circuit nS2 Dn nS1 SEL AM00789V1 Table 3. Truth table SEL Switch nS1 Switch nS2 H ON OFF(1) L OFF(1) ON 1. High impedance. DocID15992 Rev 4 5/20 20 Maximum ratings 3 STG3820 Maximum ratings Stressing the device above the rating listed in Table 4: Absolute maximum ratings may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in Table 5: Recommended operating conditions of this specification is not implied. Exposure to absolute maximum ratings conditions for extended periods may affect device reliability. Table 4. Absolute maximum ratings Symbol VCC Parameter Supply voltage Value Unit -0.5 to 6.0 V -0.5 to VCC + 0.5 V -0.5 to 5.5 V -0.5 to VCC + 0.5 V VI DC input voltage VIC DC control input voltage VO DC output voltage IIKC DC input diode current on control pin (VSEL < 0 V) -50 mA IIK DC input diode current (VSEL < 0 V) ±50 mA IOK DC output diode current ±20 mA IO DC output current ±128 mA IOP DC output current peak (pulse at 1 ms, 10% duty cycle) ±300 mA ±100 mA 1120 mW -65 to +150 °C 300 °C Value Unit 1.65 to 4.3 V ICC or IGND DC VCC or ground current PD Power dissipation at TA = 70 °C Tstg Storage temperature TL Lead temperature (10 sec.) Recommended operating conditions Table 5. Recommended operating conditions Symbol VCC Supply voltage VI Input voltage 0 to VCC V VIC Control input voltage 0 to 4.3 V VO Output voltage 0 to VCC V Top Operating temperature -40 to 85 °C dt/dv 6/20 Parameter Input rise and fall time control input VL = 1.65 V to 2.7 V 0 to 20 VL = 3.0 V to 4.3 V 0 to 10 DocID15992 Rev 4 ns/V STG3820 4 Electrical characteristics Electrical characteristics Table 6. DC specifications Value Symbol VIH VIL Parameter High level input voltage Low level input voltage VCC (V) Test conditions RPEAK RON RON Switch ON resistance ON resistance match between channels(1) -40 to 85 °C Min. Typ. Max. Min. Max. 1.65 – 1.95 0.65 VCC 0.65 VCC 2.3 – 2.5 1.2 1.2 2.7 – 3.0 1.3 1.3 3.3 – 3.6 1.4 1.4 4.3 1.6 1.6 1.65 – 1.95 0.25 0.25 2.3 – 2.5 0.25 0.25 2.7 – 3.0 0.25 0.25 3.3 – 3.6 0.30 0.30 4.3 0.40 0.40 1.8 17.0 19.6 7.5 8.7 6.6 7.6 3.7 5.8 6.7 4.3 5.4 6.2 2.7 Switch ON peak resistance TA = 25 °C 3.0 VS = 0 V to VCC IS = 8 mA 3.0 VS = 3 V IS = 8 mA 5.1 5.8 3.0 VS = 0.4 V IS = 8 mA 6.3 7.3 1.8 2.7 0.3 3.7 4.3 3.0 VS at RON MAX IS = 8 mA Unit V V Ω Ω DocID15992 Rev 4 Ω 7/20 20 Electrical characteristics STG3820 Table 6. DC specifications (continued) Value Symbol Parameter VCC (V) ON resistance flatness(2) OFF state leakage current (Sn), (D) IIN Input leakage current ICC Quiescent supply current ICCLV Quiescent supply current for low voltage driving(3) -40 to 85 °C Typ. Max. Min. Max. 4.5 1.8 9.5 2.7 2.2 1.8 3.7 1.6 4.3 1.6 3.0 IOFF TA = 25 °C Min. 1.8 RFLAT Test conditions VS = 0 V to 0.4 V IS = 8 mA VS = 0 V to VCC IS = 8 mA Unit 4.3 VS = 0.3 or 4 V -20 20 -100 100 nA 0 to 4.3 VSEL = 0 to 4.3 V -0.2 0.2 -1.0 1.0 µA 1.65 to 4.3 VSEL = VCC or GND -0.2 0.2 -1.0 1.0 µA VSEL = 1.65 V ±37 ±50 ±100 VSEL = 1.80 V ±33 ±40 ±50 VSEL = 2.60 V ±11 ±20 ±30 4.3 1. RON = max. |mSN - nSN|, where m = 1 to 8 and n = 1 to 8, N = 1, 2. 2. Flatness is defined as the difference between the maximum and minimum value of on-resistance as measured over the specified analog signal ranges. 3. Measurement is for one SEL pin. 8/20 Ω DocID15992 Rev 4 µA STG3820 Electrical characteristics Table 7. AC electrical characteristics (CL = 35 pF, RL = 50 Ω, tr = tf 5 ns) Value Symbol tPLH, tPHL Parameter Propagation delay VCC (V) Turn-on time Max. Min. Max. 1.65 - 1.95 0.21 2.3 - 2.7 0.15 3.0 - 3.3 0.14 3.6 - 4.3 0.13 36 20 23 26 15 17 20 13 15 17 29 19 22 25 14 16 18 11 13 14 10 7 6 4 3.9 4.8 5.2 6.4 VS = 0.8 V 2.3 - 2.7 3.0 - 3.3 1.65 - 1.95 Turn-off time VS = 1.5 V VS = 0.8 V 2.3 - 2.7 3.0 - 3.3 VS = 1.5 V 3.6 - 4.3 1.65 - 1.95 tD Break-beforemake time delay 2.3 - 2.7 3.0 - 3.3 CL = 35 pF RL = 50 Ω VS = 1.5 V 3.6 - 4.3 1.65 Q Charge injection -40 to 85 °C Typ. 3.6 - 4.3 tOFF TA = 25 °C Min. 1.65 - 1.95 tON Test conditions 2.3 3.0 4.3 CL = 100 pF VGEN = 0 V RGEN = 0 Ω DocID15992 Rev 4 Unit ns ns ns ns pC 9/20 20 Electrical characteristics STG3820 Table 8. AC electrical characteristics (CL = 5 pF, RL = 50 Ω, TA = 25 °C) Value Symbol OIRR Xtalk Parameter OFF isolation(1) Crosstalk BW -3dB bandwidth CIN Control pin input capacitance CSn CD Sn port capacitance D port capacitance VCC (V) 1.65 – 4.3 1.65 – 4.3 3.0 – 4.3 3.3 3.3 Test conditions -40 to 85 °C Unit Min. Typ. Max. Min. Max. VS = 1 VRMS, f = 1 MHz signal = 0 dBm -78 VS = 1 VRMS, f = 10 MHz signal = 0 dBm -57 VS = 1 VRMS, f = 1 MHz signal = 0 dBm -78 VS = 1 VRMS, f = 10 MHz signal = 0 dBm -58 RL = 50 Ω signal = 0 dBm 800 MHz VCC = 0 V 2 pF F = 240 MHz, switch is enabled 6 F = 240 MHz, switch is disabled 2 F = 240 MHz 8 1. Off isolation = 20 Log10 (VD/VS), VD = output, VS = input to off switch. 10/20 TA = 25 °C DocID15992 Rev 4 dB dB pF pF STG3820 Electrical characteristics Table 9. USB related AC electrical characteristics Value Symbol Parameter VCC (V) Test conditions TA = 25 °C -40 to 85 °C Min. Typ. Max. Min. Max. Unit tSK(0) Channel-tochannel skew 3.0 - 3.6 CL = 10 pF 26 ps tSK(P) Skew of opposite transition of the same output 3.0 - 3.6 CL = 10 pF 60 ps 3.0 - 3.6 RL = 50 Ω CL = 10 pF tR = tF = 750 ps at 480 Mbps 130 ps TJ Total jitter DocID15992 Rev 4 11/20 20 Test circuits 5 STG3820 Test circuits Figure 3. On-resistance I DS V V CC D S1 VS S2 IN GND GND CS14071 Figure 4. Bandwidth V CC S1 V OUT 50 Ω S2 IN V CC VS GND CS00371 12/20 DocID15992 Rev 4 STG3820 Test circuits Figure 5. Off leakage 9 && , , 62)) ' $ '2)) $ 9 66 9 ' 6 ,1 9 && *1' &6 Figure 6. Channel to channel crosstalk CS14091 DocID15992 Rev 4 13/20 20 Test circuits STG3820 Figure 7. Off isolation 9 && 6 9 287 6 ,1 *1' 9 6 *1' &6 Figure 8. Test circuit Note: CL = 5/35 pF or equivalent: (includes jig capacitance). RL = 50 Ω or equivalent. RT = ZOUT of pulse generator (typically 50 Ω). 14/20 DocID15992 Rev 4 STG3820 Test circuits Figure 9. Break-before-make time delay CS1410V2 Figure 10. Switching time and charge injection (VGEN = 0 V, RGEN = 0 Ω, RL = 1 MΩ, CL = 100 pF) Figure 11. Turn-on, turn-off delay time DocID15992 Rev 4 15/20 20 Package information 6 STG3820 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. Figure 12. Package outline for Flip Chip 30 (2.0 x 2.4 x 0.625 mm) - 0.4 mm pitch I ( H I H ' 2E %277209,(: & $ $ $ 6 FFF& ( ' 7239,(: )OLS&KLS 16/20 DocID15992 Rev 4 STG3820 Package information Table 10. Mechanical data for Flip Chip 30 (2.0 x 2.4 x 0.625 mm) - 0.4 mm pitch Dimensions (mm) Symbol Min. Typ. Max. A 0.565 0.625 0.685 A1 0.17 0.205 0.24 A2 0.355 0.375 0.395 b 0.215 0.255 0.295 D 2.1 2.4 2.43 D1 2.0 E 1.97 2.0 2.03 E1 1.6 e 0.36 0.4 0.44 f 0.19 0.2 0.21 ccc 0.05 $ 0.040 0.045 0.05 Figure 13. Footprint recommendations for Flip Chip 30 (2.0 x 2.4 x 0.625 mm) - 0.4 mm pitch 2 *ULGSODFHPHQWDUHD DocID15992 Rev 4 17/20 20 Package information STG3820 Figure 14. Tape information for Flip Chip 30 (2.0 x 2.4 x 0.625 mm) - 0.4 mm pitch $R .R %R Figure 15. Reel information for Flip Chip 30 (2.0 x 2.4 x 0.625 mm) - 0.4 mm pitch 2 2 2 18/20 DocID15992 Rev 4 STG3820 7 Revision history Revision history Table 11. Document revision history Date Revision 18-Dec-2009 1 Initial release. 2 Document reformatted, added Contents, updated Figure 12 and Figure 13, corrected typo in Features, Table 1, Section 1: Pin settings, Table 2, Table 7, Table 8, notes below Figure 8, title of Figure 11, Figure 12, Table 10, and Figure 13, corrected name of “Table 11” to Figure 13. 23-Apr-2013 3 Moved Description to page 1. Redrawn Figure 1. Updated Section 3 (added/updated cross-references, updated VCC value in Table 4). Redrawn Figure 12 to Figure 15. Updated Figure 12 (removed superfluous reference to note). Updated title of Figure 14 and Figure 15 (added “Flip Chip 30 (2.0 x 2.4 x 0.625 mm) - 0.4 mm pitch”). Minor corrections throughout document. 06-Aug-2013 4 Updated Table 8 on page 10 (replaced CON and COFF symbol by Csn and CD symbol). 19-Jan-2011 Changes DocID15992 Rev 4 19/20 20 STG3820 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. 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