VND5E050ASO-E
Double channel high-side driver with analog current sense
for automotive applications
Datasheet − production data
Features
Max transient supply voltage
VCC
Operating voltage range
VCC 4.5 to 28 V
Max on-state resistance (per ch.)
RON
50 mΩ
Current limitation (typ)
ILIMH
27 A
Off-state supply current
IS
2 µA(1)
SO-16L
41 V
("1($'5
– Overtemperature shutdown with auto
restart (thermal shutdown)
– Reverse battery protected
– Electrostatic discharge protection
1. Typical value with all loads connected.
■
■
■
General
– Inrush current active management by
power limitation
– Very low standby current
– 3.0 V CMOS compatible inputs
– Optimized electromagnetic emissions
– Very low electromagnetic susceptibility
– Compliant with European directive
2002/95/EC
– Very low current sense leakage
– AEC-Q100 qualified
Diagnostic functions
– Proportional load current sense
– High current sense precision for wide
currents range
– Current sense disable
– Off-state open-load detection
– Output short to VCC detection
– Overload and short to ground (power
limitation) indication
– Thermal shutdown indication
Protections
– Undervoltage shutdown
– Overvoltage clamp
– Load current limitation
– Self limiting of fast thermal transients
– Protection against loss of ground and loss
of VCC
September 2013
This is information on a product in full production.
Applications
■
All types of resistive, inductive and capacitive
loads
■
Suitable as LED driver
Description
The VND5E050ASO-E is a double channel highside driver manufactured using ST proprietary
VIPower® M0-5 technology and housed in
SO-16L package. The device is designed to drive
12 V automotive grounded loads, and to provide
protection and diagnostics. It also implements a
3 V and 5 V CMOS-compatible interface for the
use with any microcontroller.
The device integrates advanced protective
functions such as load current limitation, inrush
and overload active management by power
limitation, overtemperature shut-off with
auto-restart and overvoltage active clamp. A
dedicated analog current sense pin is associated
with every output channel providing enhanced
diagnostic functions including fast detection of
overload and short-circuit to ground through
power limitation indication, overtemperature
indication, short-circuit to VCC diagnosis and onstate and off-state open-load detection. The
current sensing and diagnostic feedback of the
whole device can be disabled by pulling the
CS_DIS pin high to share the external sense
resistor with similar devices.
Doc ID 022473 Rev 6
1/37
www.st.com
1
Contents
VND5E050ASO-E
Contents
1
Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2
Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3
2.1
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2
Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.4
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
2.5
Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
3.1
GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 24
3.1.1
Solution 1: resistor in the ground line (RGND only) . . . . . . . . . . . . . . . . 24
3.1.2
Solution 2: diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . . 25
3.2
Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
3.3
MCU I/Os protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
3.4
Current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
3.4.1
3.5
4
Maximum demagnetization energy (VCC = 13.5V) . . . . . . . . . . . . . . . . . 28
Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
4.1
5
Short to VCC and off-state open-load detection . . . . . . . . . . . . . . . . . . 26
SO-16L thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
5.1
ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
5.2
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
5.3
Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
6
Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
7
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
2/37
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VND5E050ASO-E
List of tables
List of tables
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Table 9.
Table 10.
Table 11.
Table 12.
Table 13.
Table 14.
Table 15.
Table 16.
Table 17.
Table 18.
Pin function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 6
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Switching (VCC = 13 V; Tj = 25°C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Logic inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Protections and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Current sense (8 V < VCC < 18 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Open load detection (8 V < VCC < 18 V). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Electrical transient requirements (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Electrical transient requirements (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Electrical transient requirements (part 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
SO-16L mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
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List of figures
VND5E050ASO-E
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Figure 10.
Figure 11.
Figure 12.
Figure 13.
Figure 14.
Figure 15.
Figure 16.
Figure 17.
Figure 18.
Figure 19.
Figure 20.
Figure 21.
Figure 22.
Figure 23.
Figure 24.
Figure 25.
Figure 26.
Figure 27.
Figure 28.
Figure 29.
Figure 30.
Figure 31.
Figure 32.
Figure 33.
Figure 34.
Figure 35.
Figure 36.
Figure 37.
Figure 38.
Figure 39.
Figure 40.
Figure 41.
4/37
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Current sense delay characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Open-load off-state delay timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Delay response time between rising edge of output current and rising edge of current sense
(CS enabled). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Output voltage drop limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
IOUT/ISENSE vs IOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Maximum current sense ratio drift vs load current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Normal operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Overload or short to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Intermittent overload . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Off-state open-load with external circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Short to VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
TJ evolution in overload or short to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Off-state output current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
On-state resistance vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
On-state resistance vs VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
ILIMH vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
CS_DIS high level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
CS_DIS clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
CS_DIS low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Current sense and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Maximum turn-off current versus inductance (for each channel) . . . . . . . . . . . . . . . . . . . . 28
SO-16L PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . . 29
SO-16L thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . . . . 30
Thermal fitting model of a single channel HSD in SO-16L . . . . . . . . . . . . . . . . . . . . . . . . . 30
SO-16L package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
SO-16L tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
SO-16L tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Doc ID 022473 Rev 6
VND5E050ASO-E
Block diagram and pin description
Figure 1.
Block diagram
VCC
Signal Clamp
Undervoltage
IN1
Control & Diagnostic 1
Power
Clamp
DRIVER
IN2
VON
Limitation
Over
temp.
CH 1
Current
Limitation
OFF State
Open load
CS_
DIS
VSENSEH
CS1
CONTROL & DIAGNOSTIC
Channels 2
1
Block diagram and pin description
CH 2
Current
Sense
OUT2
CS2
OUT1
OVERLOAD PROTECTION
(ACTIVE POWER LIMITATION)
LOGIC
GND
Table 1.
Pin function
Name
VCC
OUTPUT1,2
GND
INPUT1,2
Function
Battery connection.
Power output.
Ground connection. Must be reverse battery protected by an external
diode/resistor network.
Voltage controlled input pin with hysteresis, CMOS compatible. Controls
output switch state.
CURRENT SENSE1,2 Analog current sense pin, delivers a current proportional to the load current.
CS_DIS
Active high CMOS compatible pin, to disable the current sense pin.
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5/37
Block diagram and pin description
Figure 2.
VND5E050ASO-E
Configuration diagram (top view)
9FF
9FF
*1'
287387
,1387
287387
,1387
287387
&6(16(
287387
&6(16(
287387
&6',6
287387
9FF
9FF
("1($'5
Table 2.
6/37
Suggested connections for unused and not connected pins
Connection / pin
Current sense
N.C.
Output
Input
CS_DIS
Floating
Not allowed
X
X
X
X
To ground
Through 1 KΩ
resistor
X
Through
Through 10 KΩ Through 10 KΩ
22 KΩ resistor
resistor
resistor
Doc ID 022473 Rev 6
VND5E050ASO-E
2
Electrical specifications
Electrical specifications
Figure 3.
Current and voltage conventions
IS
VCC
VCC
VFn
ICSD
OUTPUT1
CS_DIS
VCSD
CURRENT
SENSE1
IIN1
INPUT1
VIN1
IIN2
VIN2
OUTPUT2
IOUT1
VOUT1
ISENSE1
VSENSE1
IOUT2
VOUT2
INPUT2
GND
CURRENT
SENSE2
ISENSE2
VSENSE2
IGND
Note:
VFn = VOUTn - VCC during reverse battery condition.
2.1
Absolute maximum ratings
Stressing the device above the rating listed in Table 3: Absolute maximum ratings may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the Operating sections of
this specification is not implied. Exposure to the conditions in table below for extended
periods may affect device reliability.
Table 3.
Absolute maximum ratings
Symbol
Parameter
Value
Unit
VCC
DC supply voltage
41
V
-VCC
Reverse DC supply voltage
0.3
V
-IGND
DC reverse ground pin current
200
mA
IOUT
DC output current
Internally limited
A
-IOUT
Reverse DC output current
20
A
DC input current
-1 to 10
mA
DC current sense disable input current
-1 to 10
mA
200
mA
VCC - 41 to
+VCC
V
IIN
ICSD
-ICSENSE
DC reverse CS pin current
VCSENSE
Current sense maximum voltage
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7/37
Electrical specifications
Table 3.
VND5E050ASO-E
Absolute maximum ratings (continued)
Symbol
Value
Unit
104
mJ
EMAX
Maximum switching energy (single pulse)
(L = 3 mH; RL = 0 Ω; Vbat = 13.5 V; Tjstart = 150°C;
IOUT = IlimL(Typ.))
VESD
Electrostatic discharge
(human body model: R = 1.5 KΩ; C = 100 pF)
– Input
– Current sense
– CS_DIS
– Output
– VCC
4000
2000
4000
5000
5000
V
V
V
V
V
VESD
Charge device model (CDM-AEC-Q100-011)
750
V
Junction operating temperature
-40 to 150
°C
Storage temperature
-55 to 150
°C
Tj
Tstg
2.2
Parameter
Thermal data
Table 4.
Thermal data
Symbol
Parameter
Rthj-pcb
Thermal resistance junction-pcb(1)
Rthj-amb
Thermal resistance junction - ambient on two layers pcb
Rthj-amb
Thermal resistance junction - ambient on two layers
pcb(2)
Typ value
Unit
18.5
°C/W
See Figure 36
°C/W
34.5
°C/W
1. The measure is done in accordance with the JESD 51-8.
2. Four Layers PCB characteristics:
- Cu thickness: 70 um outer layers, 35 um inner layers
- Board finish thickness 1.6 mm +/- 10%
- Thermal vias separation 1.2 mm
- Thermal via diameter 0.3 mm +/- 0.08 mm
- Cu thickness on vias 0.025 mm
- Device soldered at about 2 cm from the PCB edge with two sqcm of exposed copper
2.3
Electrical characteristics
Values specified in this section are for 8 V<VCC<28 V; -40 °C<Tj<150 °C, unless otherwise
stated.
8/37
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VND5E050ASO-E
Electrical specifications
Table 5.
Power section
Symbol
Parameter
Test conditions
VCC
Operating supply voltage
VUSD
VUSDhyst
Min. Typ. Max. Unit
4.5
13
28
V
Undervoltage shutdown
3.5
4.5
V
Undervoltage shutdown
hysteresis
0.5
IOUT = 2 A; Tj = 25°C
RON
Vclamp
IS
IL(off1)
VF
On-state resistance(1)
Clamp voltage
50
IOUT = 2 A; Tj = 150°C
100
IOUT = 2 A; VCC = 5 V; Tj = 25°C
65
IS = 20 mA
41
Off-state; VCC = 13 V; Tj = 25°C;
VIN = VOUT = VSENSE = VCSD = 0 V
Supply current
On-state; VCC = 13 V; VIN = 5 V;
IOUT = 0 A
Off-state output current
(1)
Output - VCC diode
voltage(1)
V
VIN = VOUT = 0 V; VCC = 13 V;
Tj = 25°C
0
VIN = VOUT = 0 V; VCC = 13 V;
Tj = 125°C
0
mΩ
46
52
V
2(2)
5(2)
µA
3
6
mA
0.01
3
µA
5
-IOUT = 4 A; Tj = 150°C
0.7
V
1. For each channel.
2. PowerMOS leakage included.
Table 6.
Symbol
Switching (VCC = 13 V; Tj = 25°C)
Parameter
Test conditions
Min.
Typ.
Max.
Unit
td(on)
Turn-on delay time
RL = 6.5 Ω (see Figure 6)
—
20
—
µs
td(off)
Turn-off delay time
RL = 6.5 Ω (see Figure 6)
—
45
—
µs
dVOUT/dt(on) Turn-on voltage slope
RL = 6.5 Ω
—
See
Figure 26
—
V/µs
dVOUT/dt(off) Turn-off voltage slope
RL = 6.5 Ω
—
See
Figure 28
—
V/µs
WON
Switching energy
losses during twon
RL = 6.5 Ω (see Figure 6)
—
0.15
—
mJ
WOFF
Switching energy
losses during twoff
RL = 6.5 Ω (see Figure 6)
—
0.3
—
mJ
Max.
Unit
0.9
V
Table 7.
Symbol
Logic inputs
Parameter
VIL
Input low level voltage
IIL
Low level input current
Test conditions
VIN = 0.9 V
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Min.
1
Typ.
µA
9/37
Electrical specifications
Table 7.
Symbol
VND5E050ASO-E
Logic inputs (continued)
Parameter
VIH
Input high level voltage
IIH
High level input current
VI(hyst)
Input hysteresis voltage
VICL
Test conditions
Min.
CS_DIS low level voltage
ICSDL
Low level CS_DIS current
VCSDH
CS_DIS high level voltage
ICSDH
High level CS_DIS current
VIN = 2.1 V
10
0.25
Table 8.
Symbol
CS_DIS clamp voltage
V
-0.7
0.9
VCSD = 0.9 V
Parameter
µA
2.1
V
10
0.25
Test conditions
IlimL
Short circuit current
during thermal cycling
TTSD
Shutdown temperature
5.5
7
V
-0.7
VCC = 13 V
Min.
Typ.
Max.
Unit
19
27
38
A
38
A
Reset temperature
TRS
Thermal reset of status
VCC = 13 V;
TR < Tj < TTSD
7
150
175
TRS+1
TRS+5
A
200
135
Thermal hysteresis
(TTSD -TR)
°C
°C
°C
7
°C
Turn-off output voltage
clamp
IOUT = 2 A; VIN = 0;
L = 6 mH
VCC-41 VCC-46 VCC-52
V
Output voltage drop
limitation
IOUT = 0.1 A;
Tj = -40°C...+150°C
(see Figure 8)
25
mV
1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related
diagnostic signals must be used together with a proper software strategy. If the device is subjected to
abnormal conditions, this software must limit the duration and number of activation cycles.
10/37
µA
V
5V < VCC < 28 V
TR
VON
1
VCSD = 2.1 V
ICSD = 1 mA
V
Protections and diagnostics (1)
DC short circuit current
VDEMAG
7
ICSD = -1 mA
IlimH
THYST
µA
V
5.5
VCSD(hyst) CS_DIS hysteresis voltage
VCSCL
Unit
V
IIN = -1 mA
VCSDL
Max.
2.1
IIN = 1 mA
Input clamp voltage
Typ.
Doc ID 022473 Rev 6
VND5E050ASO-E
Table 9.
Symbol
K0
K1
dK1/K1(1)
K2
dK2/K2(1)
K3
dK3/K3(1)
ISENSE0
Electrical specifications
Current sense (8 V < VCC < 18 V)
Parameter
Test conditions
Min.
Typ. Max. Unit
IOUT/ISENSE
IOUT = 0.05 A; VSENSE = 0.5 V;
VCSD = 0 V; Tj = -40°C...150°C
1440 2250 3630
IOUT/ISENSE
IOUT = 1 A; VSENSE = 4 V;
VCSD = 0 V;
Tj = -40°C...150°C
Tj = 25°C...150°C
1740 2070 2820
1750 2070 2562
Current sense ratio
drift
IOUT = 1 A; VSENSE = 4 V;
VCSD = 0 V;
TJ = -40 °C to 150 °C
IOUT/ISENSE
IOUT = 2 A; VSENSE = 4 V;
VCSD = 0 V;
Tj = -40°C...150°C
Tj = 25°C...150°C
Current sense ratio
drift
IOUT = 2 A; VSENSE = 4 V;
VCSD = 0 V;
TJ = -40 °C to 150 °C
IOUT/ISENSE
IOUT = 4 A;
VSENSE = 4 V;VCSD = 0 V;
Tj = -40°C...150°C
Tj = 25°C...150°C
Current sense ratio
drift
IOUT = 4 A; VSENSE = 4 V;
VCSD = 0 V;
TJ = -40 °C to 150 °C
-6
6
IOUT = 0 A; VSENSE = 0 V;
VCSD = 5 V; VIN = 0V;
Tj = -40°C...150°C
0
1
I
= 0 A; VSENSE = 0 V;
Analog sense leakage OUT
VCSD = 0 V; VIN = 5 V;
current
Tj = -40°C...150°C
0
2
IOUT = 2 A; VSENSE = 0 V;
VCSD = 5 V; VIN = 5V;
Tj = -40°C...150°C
0
1
20
-15
15
%
1900 2000 2395
1899 2000 2282
-9
9
%
1969 1990 2210
1950 1990 2153
%
µA
IOL
Open load on-state
current detection
threshold
VIN = 5 V; 8 V < VCC < 18 V;
ISENSE = 5 µA
4
VSENSE
Max analog sense
output voltage
IOUT = 4 A; VCSD = 0 V
5
VSENSEH
Analog sense output
voltage in fault
condition(2)
VCC = 13 V; RSENSE = 3.9 KΩ
8
V
ISENSEH
Analog sense output
current in fault
condition(2)
VCC = 13 V; VSENSE = 5 V
9
mA
Doc ID 022473 Rev 6
mA
V
11/37
Electrical specifications
Table 9.
Symbol
VND5E050ASO-E
Current sense (8 V < VCC < 18 V) (continued)
Parameter
Test conditions
Min.
Typ. Max. Unit
Delay response time
tDSENSE1H from falling edge of
CS_DIS pin
VSENSE < 4 V; 0.5 A < IOUT < 4 A;
ISENSE = 90% of ISENSEMAX
(see Figure 4)
40
100
µs
Delay response time
tDSENSE1L from rising edge of
CS_DIS pin
VSENSE < 4 V; 0.5 A < IOUT < 4 A;
ISENSE = 10% of ISENSEMAX
(see Figure 4)
5
20
µs
Delay response time
tDSENSE2H from rising edge of
INPUT pin
VSENSE < 4 V; 0.5 A < IOUT < 4 A;
ISENSE = 90% of ISENSEMAX
(see Figure 4)
80
250
µs
Delay response time
between rising edge of
ΔtDSENSE2H output current and
rising edge of current
sense
VSENSE < 4 V;
ISENSE = 90% of ISENSEMAX,
IOUT = 90% of IOUTMAX
IOUTMAX = 2 A (see Figure 7)
40
µs
Delay response time
tDSENSE2L from falling edge of
INPUT pin
VSENSE < 4 V; 0.5 A < IOUT < 4 A;
ISENSE=10% of ISENSEMAX
(see Figure 4)
250
µs
80
1. Parameter guaranteed by design; it is not tested.
2. Fault condition includes: power limitation, overtemperature and open-load off-state detection.
Table 10.
Symbol
Parameter
Test conditions
Open load off-state
voltage detection
threshold
VIN = 0 V
tDSTKON
Output short circuit to
VCC detection delay at
turn-off
See Figure 5
IL(off2)r
Off-state output current
at VOUT = 4V
IL(off2)f
td_vol
VOL
12/37
Open load detection (8 V < VCC < 18 V)
Min.
Typ.
2
See
Figure 5
Max. Unit
4
V
180
1200
µs
VIN = 0V; VSENSE = 0 V;
VOUT rising from 0 V to 4 V
-120
0
µA
Off-state output current
at VOUT = 2V
VIN = 0V; VSENSE = VSENSEH;
VOUT falling from VCC to 2 V
-50
90
µA
Delay response from
output rising edge to
VSENSE rising edge in
open load
VOUT = 4 V; VIN = 0V;
VSENSE = 90% of VSENSEH
20
µs
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VND5E050ASO-E
Electrical specifications
Figure 4.
Current sense delay characteristics
INPUT
CS_DIS
LOAD CURRENT
SENSE CURRENT
tDSENSE2H
Figure 5.
tDSENSE1L
tDSENSE1H
tDSENSE2L
Open-load off-state delay timing
OUTPUT STUCK TO VCC
VIN
VOUT > VOL
VSENSEH
VCS
tDSTKON
Figure 6.
Switching characteristics
VOUT
tWon
tWoff
90%
80%
dVOUT/dt(off)
dVOUT/dt(on)
tr
10%
tf
t
INPUT
td(on)
td(off)
t
Doc ID 022473 Rev 6
13/37
Electrical specifications
Figure 7.
VND5E050ASO-E
Delay response time between rising edge of output current and rising
edge of current sense (CS enabled)
VIN
ΔtDSENSE2H
t
IOUT
IOUTMAX
90% IOUTMAX
t
ISENSE
ISENSEMAX
90% ISENSEMAX
t
Figure 8.
Output voltage drop limitation
Vcc-Vout
Tj=150oC
Tj=25oC
Tj=-40oC
Von
Von/Ron(T)
14/37
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Iout
VND5E050ASO-E
Electrical specifications
Figure 9.
IOUT/ISENSE vs IOUT
Iout / Isense
3000
2800
max Tj = -40 °C to 150 °C
2600
2400
max Tj = 25 °C to 150 °C
2200
typical value
2000
min Tj = 25 °C to 150 °C
1800
min Tj = -40 °C to 150 °C
1600
1400
1200
1
1,5
2
2,5
3
3,5
4
IOUT (A)
Figure 10. Maximum current sense ratio drift vs load current
dk/k(%)
20
15
10
5
0
-5
-10
-15
-20
1
Note:
2
IOUT (A)
3
4
Parameter guaranteed by design; it is not tested.
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Electrical specifications
Table 11.
VND5E050ASO-E
Truth table
Input
Output
Sense (VCSD = 0 V)(1)
Normal operation
L
H
L
H
0
Nominal
Overtemperature
L
H
L
L
0
VSENSEH
Undervoltage
L
H
L
L
0
0
H
X
(no power limitation)
Cycling
(power limitation)
Nominal
Conditions
Overload
H
VSENSEH
Short circuit to GND
(power limitation)
L
H
L
L
0
VSENSEH
Open load off-state
(with external pull-up)
L
H
VSENSEH
Short circuit to VCC
(external pull-up
disconnected)
L
H
H
H
VSENSEH
< Nominal
Negative output voltage
clamp
L
L
0
1. If the VCSD is high, the SENSE output is at a high impedance, its potential depends on leakage currents
and external circuit.
16/37
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VND5E050ASO-E
Electrical specifications
Table 12.
Electrical transient requirements (part 1)
Test levels(1)
ISO 7637-2:
2004(E)
test pulse
Number of
pulses or
test times
III
IV
1
-75V
-100V
2a
+37V
3a
Burst cycle/pulse
repetition time
Delays and
Impedance
Min.
Max.
5000 pulses
0.5s
5s
2 ms, 10Ω
+50V
5000 pulses
0.2s
5s
50µs, 2Ω
-100V
-150V
1h
90ms
100ms
0.1µs, 50Ω
3b
+75V
+100V
1h
90ms
100ms
0.1µs, 50Ω
4
-6V
-7V
1 pulse
100ms, 0.01Ω
5b(2)
+65V
+87V
1 pulse
400ms, 2Ω
1. The above test levels must be considered referred to VCC = 13.5V except for pulse 5b.
2. Valid in case of external load dump clamp: 40V maximum referred to ground.
Table 13.
Electrical transient requirements (part 2)
ISO 7637-2:
2004E
test pulse
Test level results
III
VI
1
C
C
2a
C
C
3a
C
C
3b
C
C
4
C
C
5b(1)
C
C
1. Valid in case of external load dump clamp: 40V maximum referred to ground.
Table 14.
Electrical transient requirements (part 3)
Class
Contents
C
All functions of the device performed as designed after exposure to disturbance.
E
One or more functions of the device did not perform as designed after exposure to
disturbance and cannot be returned to proper operation without replacing the
device.
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Electrical specifications
2.4
VND5E050ASO-E
Waveforms
Figure 11.
Normal operation
Normal operation
INPUT
Nominal load
Nominal load
IOUT
VSENSE
VCS_DIS
Figure 12. Overload or short to GND
Overload or Short to GND
INPUT
ILimH >
Power Limitation
Thermal cycling
ILimL >
IOUT
VSENSE
VCS_DIS
18/37
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VND5E050ASO-E
Electrical specifications
Figure 13. Intermittent overload
Intermittent Overload
INPUT
Overload
ILimH >
ILimL >
Nominal load
IOUT
VSENSEH >
VSENSE
VCS_DIS
Figure 14. Off-state open-load with external circuitry
OFF-State Open Load
with external circuitry
INPUT
VOUT > VOL
VOUT
VOL
IOUT
VSENSEH >
tDSTK(on)
VSENSE
VCS_DIS
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19/37
Electrical specifications
VND5E050ASO-E
Figure 15. Short to VCC
Short to VCC
Resistive
Short to VCC
Hard
Short to VCC
VOUT > VOL
VOL
VOUT
IOUT
tDSTK(on)
tDSTK(on)
VCS_DIS
Figure 16. TJ evolution in overload or short to GND
TJ evolution in
Overload or Short to GND
INPUT
Self-limitation of fast thermal transients
TTSD
THYST
TR
TJ_START
TJ
ILimH >
Power Limitation
< ILimL
IOUT
20/37
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VND5E050ASO-E
2.5
Electrical specifications
Electrical characteristics curves
Figure 17. Off-state output current
Figure 18. High level input current
Iloff (nA)
Iih (µA)
550
5
500
4,5
Vin=2.1V
Off State
Vcc=13V
Vin=Vout=0V
450
400
4
3,5
350
3
300
2,5
250
2
200
1,5
150
100
1
50
0,5
0
0
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
Tc (°C)
50
75
100
125
150
175
100
125
150
175
150
175
Tc (°C)
Figure 19. Input clamp voltage
Figure 20. Input low level
Vicl (V)
Vil (V)
7
2
6,8
1,8
lin=1mA
6,6
1,6
6,4
1,4
6,2
1,2
6
1
5,8
0,8
5,6
0,6
5,4
0,4
5,2
0,2
5
0
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
Tc (°C)
50
75
Tc (°C)
Figure 21. Input high level
Figure 22. Input hysteresis voltage
Vihyst (V)
Vih (V)
1
4
0,9
3,5
0,8
3
0,7
2,5
0,6
0,5
2
0,4
1,5
0,3
1
0,2
0,5
0,1
0
0
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
50
75
100
125
Tc (°C)
Tc (°C)
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Electrical specifications
VND5E050ASO-E
Figure 23. On-state resistance vs Tcase
Figure 24. On-state resistance vs VCC
Ron (mOhm)
Ron (mOhm)
300
100
Iout= 2A
Vcc=13V
250
Tc=150°C
80
Tc=125°C
200
60
150
Tc=25°C
40
Tc=-40°C
100
20
50
0
0
-50
-25
0
25
50
75
100
125
150
0
175
5
10
15
20
25
30
35
40
Vcc (V)
Tc (°C)
Figure 25. Undervoltage shutdown
Figure 26. Turn-on voltage slope
Vusd (V)
(dVout/dt )On (V/ms)
16
1000
900
14
Vcc=13V
RI=6.5 Ohm
800
12
700
10
600
500
8
400
6
300
4
200
2
100
0
0
-50
-25
0
25
50
75
100
125
150
-50
175
-25
0
25
50
75
100
125
150
175
Tc (°C)
Tc (°C)
Figure 27. ILIMH vs Tcase
Figure 28. Turn-off voltage slope
Ilimh (A)
(dVout/dt )Off (V/ms)
40
600
550
35
500
Vcc=13V
Vcc=13V
RI= 6.5 Ohm
450
30
400
350
25
300
250
20
200
150
15
100
50
10
0
-50
-25
0
25
50
75
100
125
150
175
-50
Tc (°C)
22/37
-25
0
25
50
75
Tc (°C)
Doc ID 022473 Rev 6
100
125
150
175
VND5E050ASO-E
Electrical specifications
Figure 29. CS_DIS high level voltage
Figure 30. CS_DIS clamp voltage
Vcsdh (V)
Vcsdcl(V)
4
10
3,5
9
8
Icsd = 1 mA
3
7
2,5
6
2
5
1,5
4
3
1
2
0,5
1
0
0
-50
-25
0
25
50
75
100
125
150
175
Tc (°C)
-50
-25
0
25
50
75
100
125
150
175
Tc (°C)
Figure 31. CS_DIS low level voltage
Vcsdl (V)
3
2,5
2
1,5
1
0,5
0
-50
-25
0
25
50
75
100
125
150
175
Tc (°C)
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23/37
Application information
3
VND5E050ASO-E
Application information
Figure 32. Application schematic
+5V
VCC
Rprot
CS_DIS
Dld
ΜCU
Rprot
INPUT
OUTPUT
Rprot
CURRENT SENSE
GND
RSENSE
VGND
CEXT
RGND
DGND
Note:
Channel 2 has the same internal circuit as channel 1.
3.1
GND protection network against reverse battery
This section provides two solutions to implement a ground protection network against
reverse battery.
3.1.1
Solution 1: resistor in the ground line (RGND only)
This can be used with any type of load.
The following description shows an indication on how to size the RGND resistor.
1.
RGND ≤ 600mV / (IS(on)max)
2.
RGND ≥ (−VCC) / (-IGND)
where -IGND is the DC reverse ground pin current and can be found in the absolute
maximum rating section of the device datasheet.
Power dissipation in RGND (when VCC < 0: during reverse battery situations) is:
PD = (-VCC)2/RGND
This resistor can be shared amongst several different HSDs. Please note that the value of
this resistor should be calculated with formula (1) where IS(on)max becomes the sum of the
maximum on-state currents of the different devices.
Please note that if the microprocessor ground is not shared by the device ground then the
RGND produces a shift (IS(on)max * RGND) in the input thresholds and the status output
values. This shift varies depending on how many devices are on in case of several high-side
drivers sharing the same RGND .
24/37
Doc ID 022473 Rev 6
VND5E050ASO-E
Application information
If the calculated power dissipation leads to a large resistor or several devices have to share
the same resistor then ST suggests to utilize Section 3.1.2: Solution 2: diode (DGND) in the
ground line.
3.1.2
Solution 2: diode (DGND) in the ground line
A resistor (RGND = 1 kΩ) should be inserted in parallel to DGND if the device drives an
inductive load.
This small signal diode can be safely shared amongst several different HSDs. Also in this
case, the presence of the ground network will produce a shift (≈600 mV) in the input
threshold and in the status output values if the microprocessor ground is not common to the
device ground. This shift does not vary if more than one HSD share the same diode/resistor
network.
3.2
Load dump protection
Dld is necessary (voltage transient suppressor) if the load dump peak voltage exceeds the
VCC maximum DC rating. The same applies if the device is subject to transients on the VCC
line which are greater than the ones shown in the ISO 7637-2: 2004(E) table.
3.3
MCU I/Os protection
If a ground protection network is used and negative transient are present on the VCC line,
the control pins are pulled negative. ST suggests to insert a resistor (Rprot) in line to prevent
the microcontroller I/O pins from latching-up.
The value of these resistors is a compromise between the leakage current of microcontroller
and the current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of
microcontroller I/Os:
-VCCpeak/Ilatchup ≤ Rprot ≤ (VOHμC-VIH-VGND) / IIHmax
Calculation example:
For VCCpeak = - 100V and Ilatchup ≥ 20mA; VOHµC ≥ 4.5V
5kΩ ≤ Rprot ≤ 180kΩ
Recommended values: Rprot = 10kΩ, CEXT = 10nF.
3.4
Current sense and diagnostic
The current sense pin performs a double function (see Figure 33: Current sense and
diagnostic):
●
Current mirror of the load current in normal operation, delivering a current
proportional to the load current according to a known ratio KX.
The current ISENSE can be easily converted to a voltage VSENSE by means of an
external resistor RSENSE. Linearity between IOUT and VSENSE is ensured up to 5V
minimum (see parameter VSENSE in Table 9: Current sense (8 V < VCC < 18 V)). The
current sense accuracy depends on the output current (refer to current sense electrical
Doc ID 022473 Rev 6
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Application information
VND5E050ASO-E
characteristics Table 9: Current sense (8 V < VCC < 18 V)).
●
Diagnostic flag in fault conditions, delivering a fixed voltage VSENSEH up to a
maximum current ISENSEH in case of the following fault conditions (refer to
Table 11: Truth table):
–
Power limitation activation
–
Overtemperature
–
Short to VCC in off-state
–
Open-load in off-state with additional external components.
A logic level high on the CS_DIS pin simultaneously sets all the current sense pins of the
device in a high impedance state, thus disabling the current monitoring and diagnostic
detection. This feature allows multiplexing of the microcontroller analog inputs by sharing
the sense resistance and ADC line among different devices.
Figure 33. Current sense and diagnostic
VPU
VBAT
VCC
Main MOSn
41V
PU_CMD
Overtemperature
IOUT/KX
RPU
+
OL OFF
ISENSEH
VOL
Pwr_Lim
CS_DIS
OUTn
ILoff2r
ILoff2f
INPUTn
VSENSEH
CURRENT
SENSEn
GND
RPROT
To uC ADC
3.4.1
RSENSE
Load
RPD
VSENSE
Short to VCC and off-state open-load detection
Short to VCC
A short circuit between VCC and output is indicated by the relevant current sense pin set to
VSENSEH during the device off-state. Little or no current is delivered by the current sense
during the on-state depending on the nature of the short circuit.
Off-state open load with external circuitry
Detection of an open-load in off mode requires an external pull-up resistor (RPU) connecting
the output to a positive supply voltage (VPU).
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VND5E050ASO-E
Application information
It is preferable that VPU is switched off during the module standby mode to avoid an increase
in overall standby current consumption in normal conditions, that is, when the load is
connected.
An external pull-down resistor (RPD) connected between output and GND is mandatory to
avoid misdetection in case of floating outputs in off-state (see Figure 33: Current sense and
diagnostic).
RPD must be selected in order to ensure VOUT < VOLmin unless pulled up by the external
circuitry:
VOUT
Pull − up _ OFF
= RPD ⋅ I L ( off 2 ) f < VOL min = 2V
RPD ≤ 22 KΩ is recommended.
For proper open load detection in off-state, the external pull-up resistor must be selected
according to the following formula:
VOUT
Pull − up _ ON
=
RPD ⋅ VPU − RPU ⋅ RPD ⋅ I L ( off 2) r
RPU + RPD
> VOL max = 4V
For the values of VOLmin,VOLmax, IL(off2)r and IL(off2)f see Table 10: Open load detection
(8 V < VCC < 18 V).
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Application information
3.5
VND5E050ASO-E
Maximum demagnetization energy (VCC = 13.5V)
Figure 34. Maximum turn-off current versus inductance (for each channel)
100
A
B
C
I (A)
10
1
0,1
1
L (mH)
10
100
A: Tjstart = 150°C single pulse
B: Tjstart = 100°C repetitive pulse
C: Tjstart = 125°C repetitive pulse
VIN, IL
Demagnetization
Demagnetization
Demagnetization
t
Note:
28/37
Values are generated with RL =0 Ω.In case of repetitive pulses, Tjstart (at the beginning of
each demagnetization) of every pulse must not exceed the temperature specified above for
curves A and B.
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VND5E050ASO-E
Package and PCB thermal data
4
Package and PCB thermal data
4.1
SO-16L thermal data
Figure 35. SO-16L PC board
("1($'5
Note:
Layout condition of Rth and Zth measurements (PCB: Double layer, Thermal Vias, FR4
area = 77 mm x 86 mm, PCB thickness = 1.6 mm, Cu thickness = 70 µm (front and back
side), Copper areas: from minimum pad lay-out to 8 cm2).
Figure 36. Rthj-amb vs PCB copper area in open box free air condition
57+MDPE
57+MDPE
'!0'2)
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Package and PCB thermal data
VND5E050ASO-E
Figure 37. SO-16L thermal impedance junction ambient single pulse
=7+&:
&X FP
&X FP
&X IRRWSULQW
7LPHV
'!0'2)
Equation 1: pulse calculation formula
Z
THδ
= R
TH
⋅δ+Z
THtp
(1 – δ)
where δ = tP/T
Figure 38. Thermal fitting model of a single channel HSD in SO-16L (a)
'!0'2)
a. The fitting model is a simplified thermal tool and is valid for transient evolutions where the embedded
protections (power limitation or thermal cycling during thermal shutdown) are not triggered.
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VND5E050ASO-E
Package and PCB thermal data
Table 15.
Thermal parameter
Area/island (cm2)
Footprint
R1 (°C/W)
0.7
R2 (°C/W)
2.1
R3 (°C/W)
4
R4 (°C/W)
2
8
8
6
6
R5 (°C/W)
14
13
13
R6 (°C/W)
28
20
14.5
R7 (°C/W)
0.7
R8 (°C/W)
2.1
C1 (W.s/°C)
0.001
C2 (W.s/°C)
0.005
C3 (W.s/°C)
0.1
C4 (W.s/°C)
0.5
C5 (W.s/°C)
1
1.5
1.5
C6 (W.s/°C)
3
9
12
C7 (W.s/°C)
0.001
C8 (W.s/°C)
0.005
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Package information
VND5E050ASO-E
5
Package information
5.1
ECOPACK® packages
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
5.2
Package mechanical data
Figure 39. SO-16L package dimensions
("1($'5
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VND5E050ASO-E
Package information
Table 16.
SO-16L mechanical data
Millimeters
Symbol
Min
Typ
Max
A
2.35
2.65
A1
0.10
0.30
B
0.33
0.51
C
0.23
0.32
D
10.10
10.50
E
7.40
7.60
e
1.27
H
10.00
10.65
h
0.25
0.75
L
0.40
1.27
k
0°
8°
ddd
0.10
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Package information
5.3
VND5E050ASO-E
Packing information
Figure 40. SO-16L tube shipment (no suffix)
"ASE1TY
"UL K 1 TY
4U BELE N G TH !
"
# #
"
!LLDIMENSIO NSAREINMM !
("1($'5
Figure 41. SO-16L tape and reel shipment (suffix “TR”)
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6
Order codes
Order codes
Table 17.
Device summary
Order codes
Package
SO-16L
Tube
Tape and reel
VND5E050ASO-E
VND5E050ASOTR-E
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Revision history
7
VND5E050ASO-E
Revision history
Table 18.
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Document revision history
Date
Revision
Changes
10-Nov-2011
1
Initial release.
19-Dec-2011
2
Updated Figure 2.
15-Mar-2012
3
Added Section 4: Package and PCB thermal data and update
Table 5 .
26-June-2012
4
Update Table 4: Thermal data.
25-Sep-2012
5
Update Table 4: Thermal data.
18-Sep-2013
6
Updated disclaimer.
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VND5E050ASO-E
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