SiP2800/01/02/03/04/05
New Product
Vishay Siliconix
Low Power Consumption Current Mode Controller
FEATURES
APPLICATIONS
D
D
D
D
D
D
D
D
D
D
D
Pin-for-Pin Compatible with UCC280X Controllers
Enhanced Performance UC284X for New Designs
100-mA Typical Start-Up Current
500-mA Typical Operating Current
Internal Soft Start at Power-On and After Fault
100-ns Internal Leading Edge Blanking
Efficiency-Enhanced DC/DC Converter Modules
Low Quiescent Current Standby Power Supplies
Offline (AC/DC) Power Supplies
Universal Input Power Supplies
Buck, Boost, and Buck-Boost Converters
DESCRIPTION
The SiP280X family includes six high-speed, low power
consumption, BiCMOS Current Mode Controllers. These
integrated circuits contain all of the control and drive functions
required for off-line and dc-to-dc current-mode switching
power supplies. Their advanced architecture enables the
implementation of full-featured designs with minimal external
parts count.
The SiP280X family controllers are available in both standard
and lead (Pb)-free, SO-8 and TSSOP-8 packages, and are
rated for operation over the industrial temperature range of
--40 to 85 _C.
Part Number
Maximum
Duty Cycle
Reference
Voltage
Turn-On
Threshold
Turn-Off
Threshold
SiP2800
100%
5V
7.2 V
6.9 V
SiP2801
50%
5V
9.4 V
7.4 V
SiP2802
100%
5V
12.5 V
8.3 V
SiP2803
100%
4V
4.1 V
3.6 V
SiP2804
50%
5V
12.5 V
8.3 V
SiP2805
50%
4V
4.1 V
3.6 V
TYPICAL APPLICATION CIRCUIT
+48 V
+
+
12 V/3 A
+
FB
VCC
COMP
SiP2801
RC
OUT
CS
REF
GND
GND
Flyback Converter for Point of Load Application
Document Number: 72660
S-41623—Rev.C, 30-Aug-04
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SiP2800/01/02/03/04/05
New Product
Vishay Siliconix
ABSOLUTE MAXIMUM RATINGS
VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 V
Power Disispation SO-8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 W
FB, Comp, CS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . --0.3 V to 6 V
Power Disispation TSSOP-8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 830 mW
StorageTemperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . --55 to 150_C
Currents are positive into, negative out of the specificed terminal.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
RECOMMENDED OPERATING RANGE
Input Voltage SiP2803/5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 to 11 V
Input Voltage SiP2800/1/2/4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 to 11 V
Operating Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . . --40 to 85_C
SPECIFICATIONS
Test Conditions Unless Specified
Parameter
Symbol
VCC = 10 V, RT = 100 kΩ, CT = 330 pF
CREF = 0.1 mF, --40 _C < TA < 85 _C
Limits
Mina
Typb
Maxa
SiP2800/1/2/4
4.925
5.000
5.075
SiP2803/5
3.940
4.000
4.06
SiP2800/1/2/4
4.88
5.00
5.10
SiP2803/5
3.90
4.00
4.08
Unit
Reference
ILOAD = 0.2
0 2 mA,
mA TA= 25 °C
Reference Voltage
Load Regulation
VREF
∆VLOAD
Line Regulation
∆VLINE
Noise
VNOISE
Short Circuit Current
ISC
0.2mA< ILOAD <5mA
10
30
Vcc=10 V to Clamp , TA = 25 °C
1.9
Vcc=10 V to Clamp
2.5
--5
mV
mV/V
mV
130
10 Hz < f < 10 kHz,
kHz TA = 25 °C
V
--35
mA
Oscillator
Frequency
fOSC
SiP2800/1/2/4
40
46
52
SiP2803/5
26
31
36
2.25
2.40
Temperature Stability
Amplitude
Peak Voltage
2.5
VP--P
VP
kHz
%
2.55
V
2.45
Error Amplifier
Input Voltage
Input Bias Current
Open Loop Gain
COMP Sink Current
COMP Source Current
Gain Bandwidth
VIN
COMP = 2.5 V
SiP2800/1/2/4
2.44
2.50
2.56
COMP = 2.0 V
SiP2803/5
1.95
2.00
2.05
IBIAS1
--1
AV
60
ISINK
FB = 2.7 V, COM P= 1.1 V
0.3
ISOURCE
FB = 1.8 V, COMP = VREF -- 1.2 V
--0.2
BW
1
80
V
mA
dB
3.5
--0.5
--0.8
2
mA
MHz
PWM and Overcurrent Comparator
Maximum Duty Cycle
DMAX
Minimum Duty Cycle
DMIN
COMP = 0 V
Gainc
SiP2800/2/3
97
99
100
SiP2801/4/5
48
49
50
%
0
AV
0 < VCS < 0.8 V
1.2
1.65
1.9
Max. Input Signal
VIMAX
COMP = 5 V
0.9
1.0
1.1
V
Input Bias Current 2
IBIAS2
200
nA
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2
--200
V/V
Document Number: 72660
S-41623—Rev.C, 30-Aug-04
SiP2800/01/02/03/04/05
New Product
Vishay Siliconix
SPECIFICATIONS
Test Conditions Unless Specified
Parameter
Symbol
Limits
VCC = 10 V, RT = 100 kΩ, CT = 330 pF
CREF = 0.1 mF, --40 _C < TA < 85 _C
Mina
Typb
Maxa
CS = 0 V
0.45
0.90
1.35
V
50
100
150
ns
Unit
PWM and Overcurrent Comparator
COMP to CS Offset
CS Pin Blanking Time
Overcurrent Comparator Fault
Threshold
1.47
1.73
Output
I = 20 mA
VOL
Output
p Voltage
g
I = 200 mA
All Parts
tr
Fall Time
tf
0.90
SiP2803/5
0.15
0.40
I = 20 mA, VCC = 0 V
All Parts
0.70
1.20
0.15
0.40
1.00
1.90
0.40
0.90
41
70
44
75
I = --200 mA
I = --50 mA, VCC = 5 V
Rise Time
0.40
I = 50 mA, VCC = 5 V
I = --20 mA
VCC -- VOH
0.1
0.35
All Parts
SiP2803/5
CL= 1 nF
V
ns
Undervoltage Lockout
Start Thresholdd
Stop Thresholdd
Start to Stop Hysteresis
VSTART
VSTOP
VHYS
SiP2800
6.6
7.2
7.8
SiP2801
8.6
9.4
10.2
SiP2802/4
11.5
12.5
13.5
SiP2803/5
3.7
4.1
4.5
SiP2800
6.3
6.9
7.5
SiP2801
6.8
7.4
8.0
SiP2802/4
7.6
8.3
9.0
V
SiP2803/5
3.2
3.6
4.0
SiP2800
0.05
0.30
0.48
SiP2801
1.5
2.0
2.4
SiP2802/4
3.0
4.2
5.1
SiP2803/5
0.2
0.5
0.8
Soft-Start
COMP Rise Time
τSS
FB = 1.8 V, Rise from 0.5 V to VREF --1 V
4
10
ISTART
Vcc < Start Threshold
0.1
0.2
ICC
FB = 0 V, CS = 0 V
0.5
1.0
VZ
ICC = 10 mA
12.0
13.5
15.0
0.5
1.0
ms
Overall
Start-up Current
Operating Supply Current
Vcc Internal Zener Voltaged
Vcc Internal Zener Voltage Minus
Start Threshold Voltaged
VZ --VSTART
SiP2802/04
mA
V
Notes
a. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum (--40_ to 85_C).
b. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing and are measured at VCC = 12 V unless otherwise noted.
c. Gain is defined by A = ∆VCOMP/∆VCS , 0 V ≤ VCS ≤ 0.8 V.
d. Start, Stop, and Zener voltages track each other.
Document Number: 72660
S-41623—Rev.C, 30-Aug-04
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SiP2800/01/02/03/04/05
New Product
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TYPICAL CHARACTERISTICS
SiP2800/01/02/04
Oscillator Frequency vs. Rt and Ct
SiP2803/05
Oscillator Frequency vs. Rt and Ct
1000
Oscillator Frequency (kHz)
Oscillator Frequency (kHz)
1000
100
Ct = 100 pF
Ct = 200 pF
100
Ct = 100 pF
Ct = 200 pF
Ct = 330 pF
Ct = 1000 pF
10
10
100
Ct = 330 pF
Ct = 1000 pF
10
10
1000
100
Rt (kΩ)
Oscillator Dead Time vs. Ct
COMP to CS Offset Voltage vs. Temperature
1.3
500
450
Rt = 100 kΩ
CS = 0 V
1.2
COMP to CS Offset (V)
400
350
Dead Time (nS)
1000
Rt (kΩ)
300
SiP2803/05
250
200
SiP2800/01/02/04
1.1
1.0
0.9
150
100
0.8
50
0
100
200
300
400
500
600
700
800
0.7
--50
900 1000
--25
0
25
Ct (pf)
50
75
100
125
150
Temperature (_C)
Error Amplifier Gain and Phase vs. Frequency
80
70
60
135
50
90
30
Gain
20
45
Phase (_)
Gain (dB)
Phase
40
10
0
0
--10
--20
--45
--30
1
10
100
1000
10000
Frequency (kHz)
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Document Number: 72660
S-41623—Rev.C, 30-Aug-04
SiP2800/01/02/03/04/05
New Product
Vishay Siliconix
PIN CONFIGURATION
SOIC-8
COMP
FB
CS
RC
TSSOP-8
8
REF
COMP
1
2
7
VCC
FB
2
CS
3
6
OUT
3
RC
4
4
5
GND
1
8 REF
7 VCC
D
6 OUT
5 GND
Top View
Top View
ORDERING INFORMATION
SOIC-8
TSSOP-8
Part Number
Lead (Pb)-Free
Part Number
Marking
Part Number
Lead (Pb)-Free
Part Number
SiP2800DY-T1
SiP2800DY-T1—E3
Marking
2800
SiP2800DQ-T1
SiP2800DQ-T1—E3
2800
SiP2801DY-T1
SiP2802DY-T1
SiP2801DY-T1—E3
2801
SiP2801DQ-T1
SiP2801DQ-T1—E3
2801
SiP2802DY-T1—E3
2802
SiP2802DQ-T1
SiP2802DQ-T1—E3
2802
SiP2803DY-T1
SiP2803DY-T1—E3
2803
SiP2803DQ-T1
SiP2803DQ-T1—E3
2803
SiP2804DY-T1
SiP2804DY-T1—E3
2804
SiP2804DQ-T1
SiP2804DQ-T1—E3
2804
SiP2805DY-T1
SiP2805DY-T1—E3
2805
SiP2805DQ-T1
SiP2805DQ-T1—E3
2805
Temperature
--40
40 to 85_C
Temperature
--40
40 to 85_C
Additional voltage options are available.
PIN DESCRIPTION
Pin Number
Name
1
COMP
2
FB
Inverting input of the Voltage Error Amplifier
3
CS
Non-inverting input of the PWM Current Sense Comparator, and inverting input of the Overcurrent Fault Comparator
(both comparators are fed from the output of the internal 100-ns Leading Edge Blanking circuit)
4
RC
Connection for the PWM Oscillator’s timing resistor and timing capacitor
5
GND
Ground Pin.
6
OUT
PWM Output Signal (capable of driving 750 mA into the gate of an external MOSFET power switch)
7
VCC
Positive supply voltage for the IC
8
REF
IC Reference Voltage
Document Number: 72660
S-41623—Rev.C, 30-Aug-04
Function
Output of the Voltage Error Amplifier, and the inverting input to the PWM’s Current Sense Comparator
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DETAILED PIN DESCRIPTION
COMP
COMP is the output of the Voltage Error Amplifier (VEA). The
VEA is a low output impedance operational amplifier, providing
the input to the PWM cycle-by-cycle current limit comparator.
As the SiP280X series of parts use a true operational amplifier
for the VEA, the COMP terminal can both source and sink
current. To add flexibility to these parts, the VEA is internally
current limited, which allows OUT to be forced to zero duty
cycle by taking the COMP pin to GND.
The voltage on COMP is passed through an internal diode to
develop an offset voltage of approximately 0.6 V, and then
through a resistive divider with a gain of 0.606-V/V, before
being presented to the control input of the cycle-by-cycle
current limit comparator. Clamping the COMP pin to less than
the diode’s forward voltage (i.e., <0.5 V) will command the
current loop to deliver 0 A, by holding the control input of the
cycle-by-cycle current comparator at 0 V. Similarly, the current
loop will command the maximum inductor current on each
cycle when COMP is at 2.25 V or greater, which drives the
control input of the cycle-by-cycle current comparator to 1 V
(since [2.25 V -- 0.6 V] ×0.606 V/V = 1 V).
The SiP280X series additionally features a built-in soft-start
function, which functions by clamping the output level of the
VEA to an internally generated voltage. This clamp will hold
COMP at a low voltage (VCOMP ≈ 0 V) until VCC and VREF are
at their proper levels. When these levels are appropriate for
circuit operation, the internal voltage will begin rising, at the
rate of 1 V/ms. This rising clamp level allows the voltage on the
COMP pin to rise, which in turn allows the voltage at the control
input of the cycle-by-cycle current comparator to increase. The
maximum soft-start interval occurs under conditions requiring
full duty cycle (50% or 100%, depending upon the part type),
and is given by the time required for the voltage on the
cycle-by-cycle current comparator’s control input to reach 1 V.
Since 1 V at the control input to the comparator requires that
the COMP pin be at 2.25 V, the maximum soft-start interval is
approximately 2.25 ms.
CS
Input to both the cycle-by-cycle and overcurrent fault current
sense comparators. The cycle-by-cycle current limit
comparator is the mechanism by which the VEA’s output
voltage commands the level of inductor or transformer current
during a given “on” interval, thereby regulating the overall
circuit’s output. This comparator forms the inner loop of the two
loops used in current-mode regulation.
The overcurrent comparator has a trip threshold that is 50%
higher than that of the cycle-by-cycle comparator. Under
normal operating conditions, this comparator will not trip: its
purpose is to provide enhanced protection of the power path
components during severe faults (e.g., a short circuit). If the
overcurrent comparator is tripped by a fault condition, it will
command the SiP280X to do a “full-cycle restart.” During this
restart, the power supply will be quickly driven to the “off” state,
and will be required to wait for five milliseconds (typical) before
restarting. When the supply does restart, it will do so using the
built-in soft-start function of the SiP280X.
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The SiP280X family incorporates internal leading-edge
blanking on the CS pin, to keep any spurious voltages on the
CS pin from reaching the comparator inputs during the 100-ns
interval immediately following the rising edge on OUT (for
example, voltages due to capacitive charging currents).
Because of this internal leading-edge blanking, many
applications require no external RC filter on the CS input.
Compared to circuits requiring the use of an external RC filter
circuit, leading-edge blanking provides a shorter effective CS
to OUT propagation delay.
FB
FB is the inverting input of the VEA. Internally compared
against VREF/2 appearing on the VEA’s non-inverting input. To
avoid stability problems, keep lead lengths to FB as short as
possible, and use good layout practices to minimize the stray
capacitances of components connected to this pin.
GND
The GND pin is both the reference ground and the power
ground for this part.
OUT
OUT is the output of a high-current driver capable of peak
currents in excess of 750 mA. OUT is therefore well suited
to driving the gates of power MOSFETs. This pin is specifically
held low when VCC is below the SiP280X’s UVLO threshold, to
ensure a predictable system turn-on. Since the OUT pin is
internally connected to a low impedance CMOS buffer, it is
capable of rapid rail-to-rail transitions. This output topology
also mitigates the effects of undershoot and overshoot. For
this reason, external Schottky clamp diodes are generally not
required on this pin.
RC
RC is the oscillator frequency programming pin. FOSC is set by
the combination of RT and CT. The charging current for CT is
provided through RT, which is normally connected between
REF and the SiP280X RC pin. CT then connects from RC to
GND. Due to the high impedances encountered in low power
control circuits, this connection must be a short and quiet
return to GND (preferably by means of a dedicated signal
trace, separated from all other circuit functions).
The oscillator frequency for the SiP280X family of parts is
approximated by the following formulas:
For the SiP2800, SiP2801, SiP2802, and SiP2804:
D FOSC ≈ (1.5)/RTCT
For the SiP2803 and SiP2805:
D FOSC ≈ (1.0)/RTCT
Here RT is in ohms and CT is in farads.
More accurate formulas for FOSC are:
For the SiP2800, SiP2801, SiP2802 and SiP2804:
D FOSC = 1/{[(CT + CSTRAY) x RT x 0.652] + [(CT + CSTRAY)
x RDISCH x 2.53] + TDELAY}
Document Number: 72660
S-41623—Rev.C, 30-Aug-04
SiP2800/01/02/03/04/05
New Product
For the SiP2803 and SiP2805:
D FOSC = 1/{[(CT + CSTRAY) x RT x 0.93] + [(CT + CSTRAY) x
RDISCH x 2.53] + TDELAY}
Here RT is in ohms and CT is in farads, RDISCH is the value of
the resistor through which CT is discharged (normally an
on-chip 130-Ω resistor, unless the circuit is configured with
additional external discharge-path resistance), and tDELAY is
an inherent internal comparator delay time of 100 ns. The
capacitance associated with the RC pin is approximately
7.5 pF, and should be included as a part of CSTRAY.
Note that the SiP2801, SiP2804, and SiP2805 have an internal
toggle flip-flop at the output of the oscillator, to ensure that the
output duty cycle never exceeds 50%. This divides the
frequency appearing at the OUT pin to one-half of the oscillator
frequency for these three parts.
Values of RT below 10 k are not recommended. Low values of
RT cause high circuit operating currents, and very low values
will prevent the oscillator from properly discharging CT.
REF
The reference generator block of the Si280X provides an
accurate and stable 4.0 V or 5.0 V (depending upon part
number), which is available at this pin of the IC. This voltage
is also used internally for other functions on the IC. One of
these uses is as the logic power supply for high speed
switching logic on the IC; this, and stability concerns, make it
important to bypass VREF to GND with a good quality 0.1-mF
ceramic capacitor, as close to the part as possible. An
electrolytic or tantalum capacitor may be used in addition to the
ceramic capacitor. When 1 V < VCC < the UVLO threshold,
REF is pulled to ground through a 5-kΩ resistor. Hence, REF
can also be used as an output to indicate the part’s VCC status.
VCC
VCC is the positive power connection for the SiP280X
controller IC, and should be the most positive terminal on the
part. In normal operation, VCC is powered through a current
limiting resistor. The required start-up supply current will
generally be on the order of 100 mA with VCC below the UVLO
voltage of the SiP280X, and can remain at or below 500-mA
total supply current once the part starts switching. To prevent
the IC from being damaged by overvoltage conditions, each of
the SiP2800 family of parts has an internal clamp (effectively
Document Number: 72660
S-41623—Rev.C, 30-Aug-04
Vishay Siliconix
a 12.5-V Zener diode) between VCC and GND. If the part’s VCC
pin is current-fed through an appropriate dropping resistor, the
VCC pin will never exceed its rated voltage, nor will the the
device as a whole exceed its rated power dissipation. This
does require knowing what the operating current of the IC will
be, so that the value of the dropping resistor can be calculated.
A good estimate of the actual operating current (ICC) may be
made by summing three components:
(a) Any external current loading on the VCC or REF pins
(b) The operating current required by the IC itself, and
(c) The drive current (IDRIVE) required by the external
power switch.
Item (a) in the above list is a static dc value, and can generally
be calculated with good accuracy. Item (b) will increase with
operating frequency, but will be fixed for a given value of FOSC.
Item (c) is usually the dominant term in the calculation of ICC,
as the power required to drive the external power switch will
typically increase as FOUT is increased. The most common
example of this is seen in driving the gate of a power MOSFET.
In such applications, the gate capacitances must be charged
once each switching cycle. This calculation is simplified by
using the gate charge term given by most MOSFET
manufacturers, allowing the use of the formula:
IDRIVE = FOUT × Qg of the chosen MOSFET.
A first approximation of the necessary dropping resistor value
is then given by:
R = [(Nominal VSUPPLY) – 12 V]/(Nominal ICC)
Here R is in ohms and ICC is in amperes.
The resistor limiting the current into the VCC pin should be
selected such that ICC(min) equals the worst-case maximum
sum of the above currents, while holding ICC(max) to as low a
value above that number as practicable (for best overall
efficiency), and never more than 25 mA above that number (to
avoid exceeding the IC’s internal clamp diode ratings). VCC
must be bypassed to GND with a good quality 0.1-mF ceramic
capacitor, as close to the part as possible. This will help avoid
problems created by high-frequency noise on the power
supply of the part. An electrolytic or tantalum capacitor may be
placed in parallel with the ceramic capacitor if more
capacitance is needed or desired.
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SiP2800/01/02/03/04/05
New Product
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FUNCTIONAL BLOCK DIAGRAM
VCC
Overcurrent
Comparator
Reference
Voltage
Leading Edge
Blanking
--
CS
+
REF
SiP2801/4/5 Only
1.5 V
UVLO
T Q
13.5 V
COMP
OUT
S Q
Voltage Error
Amplifier
--
FB
REF/2
+
--
R
+
PWM
Comparator
OSC
Soft-Start
RC
GND
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Document Number: 72660
S-41623—Rev.C, 30-Aug-04