3SK324 Si Nch Dual Gate MOS FET UHF RF LOW NOISE Amplifier REJ03G0532-0100 Rev.1.00 May 18, 2005 Features • • • • Low noise characteristics; NF = 1.0 dB typ. (at f = 900 MHz) High gain characteristics; PG = 24 dB typ. (at f = 900 MHz) Capable low voltage operation; +B = 3.5 V High Endurance Voltage; VDS = 6 V Outline RENESAS Package code: PTSP0004ZA-A (Package name: CMPAK-4) 2 1. Source 2. Gate1 3. Gate2 4. Drain 3 1 4 Notes: 1. Marking is “UG-”. Absolute Maximum Ratings (Ta = 25°C) Item Drain to source voltage Symbol VDS Ratings 6 Unit V Gate1 to source voltage VG1S +6 –6 V Gate2 to source voltage VG2S Drain current Channel power dissipation Channel temperature Storage temperature ID Pch*2 Tch Tstg Notes: 2. Value on the glass epoxy board (50 mm × 40 mm × 1 mm). Rev.1.00, May 18,2005, page 1 of 7 +6 –6 20 250 150 –55 to +150 V mA mW °C °C 3SK324 Electrical Characteristics (Ta = 25°C) Item Drain to source breakdown voltage Gate1 to source breakdown voltage Gate2 to source breakdown voltage Gate1 to source cutoff current Gate2 to source cutoff current Gate1 to source cutoff voltage Gate2 to source cutoff voltage Forward transfer admittance Symbol V(BR)DSS V(BR)G1SS V(BR)G2SS IG1SS IG2SS VG1S(off) VG2S(off) |yfs| Min 6 ±6 ±6 — — 0 0.3 30 Typ — — — — — 0.5 0.7 42 Max — — — ±100 ±100 1 1.1 — Unit V V V nA nA V V mS PG NF 20 — 24 1.0 — 1.6 dB dB Power gain Noise figure Test Conditions ID = 200 µA, VG1S = VG2S = 0 IG1 = ±10 µA, VG2S = VDS = 0 IG2 = ±10 µA, VG1S = VDS = 0 VG1S = ±5 V, VG2S = VDS = 0 VG2S = ±5 V, VG1S = VDS = 0 VDS = 5 V, VG2S = 3V, ID = 100 µA VDS = 5 V, VG1S = 3 V, ID = 100 µA VDS = 3.5 V, ID = 10 mA, VG2S = 3 V, f = 1 kHz VDS = 3.5 V, ID = 10 mA, VG2S = 3 V, f = 900 MHz 900MHz PG, NF Test Circuit VD VG1 VG2 C6 C4 C5 R1 R2 C3 R3 RFC Output (50 Ω) D G2 L3 Input (50 Ω) L4 G1 S L1 L2 C1 C1, C2 C3 C4 to C6 R1 R2 R3 : : : : : : Variable Capacitor (10 pF MAX) Disk Capacitor (1000 pF) Air Capacitor (1000 pF) 47 kΩ 47 kΩ 4.7 kΩ L2: 10 3 8 10 26 3 L1: C2 (φ1 mm Copper wire) Unit : mm 21 10 7 7 18 L4: 29 10 L3: RFC : φ1mm Copper wire with enamel 4 turns inside dia 6 mm Rev.1.00, May 18,2005, page 2 of 7 3SK324 Main Characteristics 20 1.3 V (mA) 400 Typical Output Characteristics 1.2 V VG2S = 3 V 1.1 V 15 ID 300 200 Drain Current Channel Power Dissipation Pch (mW) Maximum Channel Power Dissipation Curve 100 1.0 V 10 0.9 V 5 0.8 V 0.7 V VG1S = 0.6 V 0 50 100 Ambient Temperature 150 0 200 0 Ta (°C) 1 2 3 Drain to Source Voltage 4 5 VDS (V) Note 3 : When using the glass epoxy board (50 mm x 40 mm x 1 mm ) 2.0 V 15 1.5 V 10 5 Drain Current vs. Gate1 to Source Voltage VDS = 5 V 3.0 V 2.5 V 2.0 V 15 1.5 V ID (mA) 2.5 V Drain Current Drain Current 20 VDS =3.5 V 3.0 V ID (mA) 20 Drain Current vs. Gate1 to Source Voltage 10 5 1.0 V 1.0 V VG2S = 0.5 V 0 0.0 0.5 1.0 1.5 2.0 Gate1 to Source Voltage VG1S (V) 0 0.0 0.5 1.0 Gate1 to Source Voltage 50 VDS = 3.5 V 40 30 VG2S = 3 V 2.5 V 20 10 1.0 V 0 0.0 0.5 1.0 Gate1 to Source Voltage Rev.1.00, May 18,2005, page 3 of 7 1.5 V 1.5 VG1S 1.5 VG1S 2.0 (V) Forward Transfer Admittance vs. Gate1 to Source Voltage 2V 2.0 (V) Forward Transfer Admittance |yfs| (mS) Forward Transfer Admittance |yfs| (mS) Forward Transfer Admittance vs. Gate1 to Source Voltage VG2S = 0.5 V 50 VDS = 5 V VG2S = 3 V 40 30 20 2.5 V 10 1.5 V 1.0 V 0 0.0 0.5 1.0 Gate1 to Source Voltage 1.5 VG1S 2V 2.0 (V) 3SK324 Gain Reduction vs. Gate2 to Source Voltage 30 ID = 10 mA (start) f = 900 MHz PG 30 25 20 15 10 0 20 2.0 NF 10 1.0 VDS = 3.5 V VG2S = 3.0 V f = 900 MHz 5V 5 VDS = 3.5 V 0 1 0 2 3 Gate2 to Source Voltage VG2S 0 4 5 10 Drain Current (V) Gate2 to Source Voltage vs. Power Gain, Noise Figure 30 3.0 0.0 20 15 ID Noise Figure NF (dB) 35 Power Gain PG (dB) Gain Reduction GR (dB) 40 Drain Current vs. Power Gain, Noise Figure (mA) Drain to Source Voltage vs. Power Gain, Noise Figure 3.0 30 3.0 NF 10 0 1.0 1.0 VDS = 3.5 V ID = 10 mA (start) f = 900 MHz 1.5 2.0 2.5 Gate2 to Source Voltage VG2S 0.0 3.0 PG 20 NF 10 0 VG2S = 3.0 V ID ≅ 10 mA f = 900 MHz 1 VDS = 3.5 V 20 15 10 5 5 10 Drain Current VG2S = 3.0 V f = 900 MHz 15 20 ID (mA) Rev.1.00, May 18,2005, page 4 of 7 Maximum Stable Gain MSG (dB) 25 3 4 VDS 5 (V) Maximum Stable Gain vs. Drain Current 30 5V 2 Drain to Source Voltage Maximum Stable Gain vs. Drain Current Maximum Stable Gain MSG (dB) 1.0 (V) 30 0 0 2.0 VG2S = 3.0 V f = 2 GHz 25 20 15 5V 10 5 VDS = 3.5 V 0 0 5 10 Drain Current 15 ID (mA) 20 0.0 Noise Figure NF (dB) 2.0 Power Gain PG (dB) 20 Noise Figure NF (dB) Power Gain PG (dB) PG 3SK324 Maximum Stable Gain vs. Frequency Maximum Stable Gain MSG (dB) 40 30 20 10 0 -10 0.0 VDS = 3.5 V VG2S = 4 V ID = 10 mA 0.5 1.0 1.5 Frequency Rev.1.00, May 18,2005, page 5 of 7 2.0 f (GHz) 2.5 3.0 3SK324 S parameter (VDS = 3.5 V, VG2S = 4 V, ID = 10 mA, Zo =50 Ω) S11 f (GHz) Mag S21 Phase Mag S12 Phase S22 Mag Phase Mag Phase 0.1 0.996 -6.0 4.33 170.1 0.002 139.0 0.992 -6.1 0.2 0.989 -11.7 4.23 160.5 0.003 84.8 0.988 -11.9 0.3 0.973 -17.1 4.15 151.2 0.003 96.9 0.978 -17.7 0.4 0.956 -22.6 4.06 142.1 0.004 75.9 0.963 -23.5 0.5 0.940 -27.8 3.94 133.5 0.004 82.6 0.948 -28.9 0.6 0.920 -32.9 3.84 125.0 0.003 91.7 0.931 -34.4 0.7 0.899 -37.7 3.73 116.7 0.004 132.5 0.915 -39.6 0.8 0.879 -42.4 3.62 108.6 0.005 157.1 0.899 -44.7 0.9 0.858 -46.9 3.52 100.5 0.010 169.9 0.883 -49.7 1.0 0.840 -51.3 3.42 92.5 0.014 173.8 0.869 -54.5 1.1 0.816 -55.5 3.30 84.4 0.020 174.8 0.857 -59.3 1.2 0.794 -59.3 3.19 76.2 0.028 175.0 0.846 -63.9 1.3 0.772 -62.8 3.08 67.8 0.036 169.6 0.838 -68.5 1.4 0.752 -66.0 2.97 59.2 0.048 165.1 0.835 -72.9 1.5 0.734 -68.5 2.84 49.4 0.058 160.8 0.837 -77.3 1.6 0.727 -69.7 2.63 38.2 0.069 156.3 0.849 -82.4 1.7 0.754 -70.0 2.28 26.6 0.079 152.6 0.867 -88.1 1.8 0.825 -73.3 1.77 20.3 0.092 152.4 0.869 -95.5 1.9 0.877 -80.3 1.47 24.7 0.111 150.7 0.847 -102.1 2.0 0.890 -88.0 1.45 29.7 0.136 147.2 0.818 -108.0 2.1 0.882 -94.7 1.52 28.9 0.162 142.4 0.796 -112.9 2.2 0.867 -100.9 1.56 25.0 0.192 136.6 0.780 -117.7 2.3 0.851 -106.6 1.58 19.9 0.223 130.5 0.766 -122.4 2.4 0.834 -112.1 1.56 14.4 0.256 123.9 0.753 -127.3 2.5 0.816 -117.5 1.54 8.8 0.294 117.3 0.739 -132.2 2.6 0.795 -122.8 1.50 3.2 0.333 109.8 0.724 -137.2 2.7 0.771 -128.1 1.47 -2.2 0.374 101.9 0.706 -142.2 2.8 0.744 -133.2 1.43 -7.7 0.416 93.6 0.681 -146.9 2.9 0.713 -138.1 1.39 -12.9 0.458 84.6 0.654 -151.2 3.0 0.677 -142.4 1.36 -18.3 0.497 74.7 0.624 -154.8 Rev.1.00, May 18,2005, page 6 of 7 3SK324 Package Dimensions JEITA Package Code RENESAS Code SC-82A Package Name PTSP0004ZA-A CMPAK-4(T) / CMPAK-4(T)V D MASS[Typ.] 0.006g A e2 e Q b1 c B B E HE LP Reference Symbol L A A x M L1 S A e2 A2 e l1 b5 S b c A A1 y S b2 A3 b e1 b1 b3 c1 c1 l1 c A-A Section b4 B-B Section Pattern of terminal position areas A A1 A2 A3 b b1 b2 b3 c c1 D E e e2 HE L L1 LP x y b4 b5 e1 l1 Q Dimension in Millimeters Min 0.8 0 0.8 0.25 0.35 0.1 1.8 1.15 1.8 0.3 0.1 0.2 Nom 0.9 0.25 0.32 0.42 0.3 0.4 0.13 0.11 2.0 1.25 0.65 0.6 2.1 Max 1.1 0.1 1.0 0.4 0.5 0.15 2.2 1.35 2.4 0.7 0.5 0.6 0.05 0.05 0.45 0.55 1.5 0.9 0.2 Ordering Information Part Name 3SK324UG- Quantity 3000 pcs. Shipping Container Taping Note: For some grades, production may be terminated. Please contact the Renesas sales office to check the state of production before ordering the product. Rev.1.00, May 18,2005, page 7 of 7 Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Keep safety first in your circuit designs! 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. 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