AVR32787: AVR32 AT32UC3A3 High Speed USB Design Guidelines 1. Introduction 32-bit AVR® Microcontroller This document provides guidelines for integrating an AVR®32 AT32UC3A3x high speed USB device controller onto a 4-layer PCB. The material covered can be broken into two main categories: board design guidelines and layout examples. Application Note High speed USB operation is described in the USB 2.0 Specification (http://www.usb.org/developers/docs.html). The usb.org also provides the High Speed USB Platform Design Guidelines (http://www.usb.org/developers/docs/hs_usb_pdg_r1_0.pdf)for integrating a highspeed USB host controller onto a 4-layer desktop motherboard. It covers board design, EMI/ESD, and front panel USB guidelines. Application diagrams (device mode in self-powered or bus-powered, Host and OTG modes) are described in the AVR32UC3A3x datasheet, chapter USB. 32122B–AVR32–04/09 2. Layout Guidelines 2.1 General Routing and Placement Use the following general routing and placement guidelines when laying out a new design. These guidelines will help to minimize signal quality problems. 1. Place the high-speed USB host controller and major components on the unrouted board. 2. With minimum trace lengths, route high-speed clock and high-speed USB differential pairs. Maintain maximum possible distance between high-speed clocks/periodic signals to high speed USB differential pairs and any connector leaving the PCB (such as, I/O connectors, control and signal headers, or power connectors). 3. Route high-speed USB signals using a minimum of vias and corners. This reduces signal reflections and impedance changes. 4. When it becomes necessary to turn 90°, use two 45° turns or an arc instead of making a single 90° turn. This reduces reflections on the signal by minimizing impedance discontinuities. 5. Do not route USB traces under crystals, oscillators, clock synthesizers, magnetic devices or ICs that use and/or duplicate clocks. 6. Stubs on high speed USB signals should be avoided, as stubs will cause signal reflections and affect signal quality. 7. Route all traces over continuous GND plane with no interruptions. USB ground plane should be isolated from other ground plane. 2.2 High Speed USB Trace Spacing Figure 2-1 provides an illustration of the recommended trace spacing while Table 2-1 gives some trace calculation examples. Use the following guidelines. 1. Use an impedance calculator to determine the trace width (W) and spacing (S) required for the specific board stack-up being used. W is calculated to achieve a trace impedance (Z0) of ~50 Ω and S is calculated to achieve a differential trace impedance of 90 Ohm. These impedances depend in first approximation on the following PCB parameters delivered by the PCB manufacturer: – er: dielectric relative permittivity – H: dielectric height – T: trace thickness 2. Maintain parallelism between USB differential signals with the trace spacing calculated to achieve 90W differential impedance. Deviations will normally occur due to package breakout and routing to connector pins. Ensure the amount and length of the deviations are kept to the minimum. 3. Minimize the length of high-speed clock and periodic signal traces that run parallel to high speed USB signal lines to minimize crosstalk. Based on EMI testing experience, the minimum suggested spacing to clock signals is 50 mils. 4. Based on simulation data, use 20-mil minimum spacing between high-speed USB signal pairs and other signal traces for optimal signal quality. This helps to prevent crosstalk. 2 AVR32787 32122B–AVR32–04/09 AVR32787 Figure 2-1. Recommended Trace Spacing Low speed/ non periodic signal 20 mils W DMHS 50 mils W S DPHS High speed/ clock periodic signal T ε H Dielectric ( r) USB Analog Ground Plane Table 2-1. Trace Characteristics Examples PCB Characteristics 2.3 Trace Characteristics er H(mils) T(mils) W(mils) S(mils) 4.6 4.5 1.4 7.5 7.5 3.9 5.5 1.7 10 10 High Speed USB Termination The AVR32 AT32UC3A3x microcontroller high-speed USB design requires 39 Ω termination resistor at both DMFS and DPFS pins. Place the termination resistors as close as possible to the AT32UC3A3 signal pins. 2.4 High Speed USB Trace Length Matching High-speed USB signal pair traces should be trace-length matched. Max trace-length mismatch between high-speed USB signal pairs should be no greater than 150 mils. 2.5 High Speed USB Bias Filter AT32UC3A3x high-speed USB design requires a 6.81 KΩ 1% resistor in parallel to a 10pF capacitor connected from USB_VBIAS pin to ground. The resistor defines the master biasing of the AT32UC3A3x high-speed pad and should be placed as close as possible to the USB_VBIAS pin by taking care to minimize noise injection at this point. 2.6 High Speed USB ESD Protection Full-speed USB provide ESD suppression using in-line ferrites and capacitors that form a low pass filter. This technique doesn’t work for high-speed USB due to the much higher signal rate of high-speed data. A recommended device that has been tested successfully is a LittelFuse® component, PulseGuard ® PGB0010603MR (0603 package size). Proper placement of the devices is on the data lines as close as possible to the USB connector. Other low-capacitance ESD protection devices may work as well. We recommend including the footprints for this device, or some other proven solution, as a stuffing option in case it is needed to pass ESD testing and in the event that a problem occurs (general routing and placement guidelines should be followed). 3 32122B–AVR32–04/09 2.7 High Speed USB Connectors In order to provide direct connection of high-speed USB signals, we recommend to use through hole mini-AB or surface mount mini-AB receptacle connector. In case AT32UC3A3x OTG capability is not requested, we recommend to use through hole mini-B or surface mount mini-B receptacle connector or surface mount std-A plug. 3. Layout Examples Figure 3-1 and Figure 3-2 shows an example of AT32UC3A3x high-speed USB routing with a standard mini AB receptacle. DPFS GNDIO DPHS DMHS U1 DMFS GNDIO Standard Mini AB Receptacle - USB Routing Example with QFP144 Package USB_VBIAS Figure 3-1. C1 R1 R2 R3 VBUS connection Ground plane D1 1 D2 2 3 4 VBUS 5 GND Mini AB J1 4 AVR32787 32122B–AVR32–04/09 AVR32787 Figure 3-2. Standard Mini AB Receptacle - USB Routing Example with BGA144 Package Mini AB J1 GND VBUS 4 5 3 2 D2 1 D1 Ground plane VBUS connection R3 R2 9 Note: DMHS DPHS DMFS GND C DPFS USB_VBIAS B USB_VBUS R2 R1 C1 A 10 11 12 For R1, R2, R3, C1 values, refer to AT32UC3A3x datasheet. 5 32122B–AVR32–04/09 Headquarters International Atmel Corporation 2325 Orchard Parkway San Jose, CA 95131 USA Tel: 1(408) 441-0311 Fax: 1(408) 487-2600 Atmel Asia Unit 1-5 & 16, 19/F BEA Tower, Millennium City 5 418 Kwun Tong Road Kwun Tong, Kowloon Hong Kong Tel: (852) 2245-6100 Fax: (852) 2722-1369 Atmel Europe Le Krebs 8, Rue Jean-Pierre Timbaud BP 309 78054 Saint-Quentin-enYvelines Cedex France Tel: (33) 1-30-60-70-00 Fax: (33) 1-30-60-71-11 Atmel Japan 9F, Tonetsu Shinkawa Bldg. 1-24-8 Shinkawa Chuo-ku, Tokyo 104-0033 Japan Tel: (81) 3-3523-3551 Fax: (81) 3-3523-7581 Technical Support [email protected] Sales Contact www.atmel.com/contacts Product Contact Web Site www.atmel.com Literature Requests www.atmel.com/literature Disclaimer: The information in this document is provided in connection with Atmel products. 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