TSL2672

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The technical content of this TAOS datasheet is still valid.
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TSL2672
DIGITAL PROXIMITY DETECTOR
r
r
TAOS133 − MAY 2012
Features
PACKAGE FN
DUAL FLAT NO-LEAD
(TOP VIEW)
D Proximity Detection with an Integrated LED
Driver in a Single Device
TSL2x71 Series
D Proximity Detection
−
−
−
−
6 SDA
SCL 2
5 INT
GND 3
4 LDR
Not Actual Size
Applications
D Mobile Handset Touchscreen Control and
D
D
Automatic Speakerphone Enable
Mechanical Switch Replacement
Printer Paper Alignment
lv
D
Reduced Proximity Count Variation
Programmable Offset Control Register
Saturation Indicator
Programmable Analog Gain and
Integration Time
− Current Sink Driver for External IR LED
− 16,000:1 Dynamic Range
Maskable Proximity Interrupt
− Programmable Upper and Lower
Thresholds with Persistence Filter
VDD 1
D
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D Power Management
D
− Low Power 2.2 mA Sleep State with UserSelectable Sleep-After-Interrupt Mode
− 90 mA Wait State with Programmable Wait
Time from 2.7 ms to > 8 seconds
2
I C Fast Mode Compatible Interface
− Data Rates up to 400 kbit/s
− Input Voltage Levels Compatible with VDD
or 1.8-V Bus
Small 2 mm 2 mm Dual Flat No-Lead (FN)
Package
Description
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D Register Set- and Pin-Compatible with the
End Products and Market Segments
D Mobile Handsets, Tablets, Laptops, and
D
D
D
D
HDTVs
White Goods
Toys
Digital Signage
Printers
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The TSL2672 family of devices provides proximity detection when coupled with an external IR LED. The devices
incorporate a constant-current LED sink driver to pulse the external IR LED and achieve very low average power
consumption using the low-power wait state with programmable wait time between proximity measurements.
In addition, the devices are register-set and pin-compatible with the TSL2671 series and include a number of
new and improved features, such as improved signal-to-noise and measurement accuracy. A proximity offset
register allows compensation for optical system crosstalk between the IR LED and the sensor. To prevent false
measurements, a proximity saturation bit indicates that the internal analog circuitry saturated. Interrupts have
been enhanced with the addition of a sleep-after-interrupt feature that also allows for single-cycle operation.
The LUMENOLOGY r Company
Copyright E 2012, TAOS Inc.
r
Texas Advanced Optoelectronic Solutions Inc.
1001 Klein Road S Suite 300 S Plano, TX 75074 S (972)
r 673-0759
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1
TSL2672
DIGITAL PROXIMITY DETECTOR
TAOS133 − MAY 2012
Functional Block Diagram
Interrupt
Prox LED
Current Driver
Prox
Integration
VDD
Prox
ADC
Upper Limit
Prox
Data
Lower Limit
Wait Control
CH0
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CH1
Detailed Description
SDA
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GND
SCL
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Prox Control
INT
I2C Interface
LDR
Proximity detection requires only a single external LED. This external LED is driven by an internal LED current driver,
which pulses the LED with current for approximately 7 microseconds. The number of pulses, from 1 to 255, and the
current level, from 1.9 mA to 120 mA, can be programmed and together provide a 16,000:1 contiguous dynamic
range. Because the driver is a constant current sink, no external current limiting resistor is required to protect the LED.
In addition to the internal LED current driver, the TSL2672 proximity detector provides on-chip photodiodes, oscillator,
integrating amplifier, ADC, state machine controller, programmable interrupt and I2C interface to provide a complete
proximity detection solution.
Each device has two photodiodes; a channel 0 photodiode (CH0), which is responsive to both visible and infrared
light, and a channel 1 photodiode (CH1), which is primarily responsive to only infrared light. The user selects the
appropriate diode for their application.
The integrating amplifier and ADC converts the selected photodiode current into a digital value providing up to 16
bits of resolution. Upon completion of a proximity conversion cycle, the result is transferred to the proximity data
registers where it is available to be read.
Communication with the device is accomplished over a fast (up to 400 kHz), two-wire I2C serial bus for easy
connection to a microcontroller or embedded controller. The digital output of the device is inherently more
noise-immune when compared to an analog interface.
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The device provides a separate pin for level-style interrupts to simplify and improve system efficiency by eliminating
the need to poll for proximity data. When interrupts are enabled, an interrupt is generated when the proximity data
either exceeds an upper threshold or is less than a lower threshold. Once generated, the interrupt remains asserted
until cleared by the controlling firmware. In addition, a programmable interrupt persistence filter allows the user to
determine the number of consecutive out-of-range measurements necessary to trigger an interrupt.
Copyright E 2012, TAOS Inc.
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TSL2672
DIGITAL PROXIMITY DETECTOR
TAOS133 − MAY 2012
Terminal Functions
TERMINAL
TYPE
DESCRIPTION
NAME
NO.
GND
3
INT
5
O
Interrupt — open drain (active low).
LDR
4
O
LED driver for proximity emitter — open drain.
SCL
2
I
I2C serial clock input terminal — clock signal for I2C serial data.
SDA
6
I/O
VDD
1
Power supply ground. All voltages are referenced to GND.
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I2C serial data I/O terminal — serial data I/O for I2C .
Supply voltage.
DEVICE
ADDRESS
INTERFACE DESCRIPTION
ORDERING NUMBER
TSL26721
0x39
FN−6
I2C
TSL26723
0x39
FN−6
I2C Vbus = 1.8 V Interface
TSL26725†
0x29
FN−6
I2C Vbus = VDD Interface
TSL26725FN
FN−6
I2C
TSL26727FN
Vbus = VDD Interface
TSL26721FN
TSL26723FN
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TSL26727†
†
PACKAGE − LEADS
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Available Options
0x29
Vbus = 1.8 V Interface
Contact TAOS for availability.
Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage, VDD (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.8 V
Input terminal voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 3.8 V
Output terminal voltage (except LDR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 3.8 V
Output terminal voltage (LDR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 V
Output terminal current (except LDR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −1 mA to 20 mA
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −40°C to 85°C
ESD tolerance, human body model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2000 V
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
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NOTE 1: All voltages are with respect to GND.
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Recommended Operating Conditions
Supply voltage, VDD (TSL26721 & TSL26725)
(I2C
Vbus = VDD)
ch
Supply voltage, VDD (TSL26723 & TSL26727) (I2C Vbus = 1.8 V)
LED driver voltage,
voltage VLDR
MIN
NOM
MAX
2.4
3
3.6
V
2.7
3
3.6
V
LDR pulse on
0
3.6
LDR pulse off
0
4.8
−30
70
V
°C
Te
Operating free-air temperature, TA
UNIT
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TSL2672
DIGITAL PROXIMITY DETECTOR
TAOS133 − MAY 2012
Operating Characteristics, VDD = 3 V, TA = 25C (unless otherwise noted)
TEST CONDITIONS
MIN
Active — LDR pulse off
IDD
Supply current
VOL
INT SDA output low voltage
INT,
I LEAK
Leakage current, SDA, SCL, INT pins
I LEAK
Leakage current, LDR pin
VIH
SCL SDA input high voltage
SCL,
VIL
SCL SDA input low voltage
SCL,
TYP
MAX
200
250
Wait state
90
Sleep state — no I2C activity
2.2
UNIT
μA
4
3 mA sink current
0
0.4
6 mA sink current
0
0.6
−5
5
μA
5
μA
−5
TSL26721, TSL26725
0.7 VDD
TSL26723, TSL26727
1.25
V
0.3 VDD
TSL26721, TSL26725
0.54
V
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TSL26723, TSL26727
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PARAMETER
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TSL2672
DIGITAL PROXIMITY DETECTOR
TAOS133 − MAY 2012
Proximity Characteristics, VDD = 3 V, TA = 25C, PGAIN = 1, PEN = 1 (unless otherwise noted)
PARAMETER
LDR pulse on
ADC conversion time step size
PTIME = 0xFF
ADC counts per step (Note 1)
PTIME = 0xFF
ADC count value
λp = 850 nm, Ee = 263.4 μW/cm2,
PTIME = 0xFB, PPULSE = 4
ADC output responsivity
λp = 850 nm
nm, PTIME = 0xFB
0xFB, PPULSE = 1
1
256
steps
0
1023
counts
1500
2000
2500
CH1 diode
900
1200
1500
CH0 diode
1.90
CH1 diode
1.14
counts/
μW/cm2
PGAIN = 4×
4
PGAIN = 8×
×
8
CH0 diode
0.5
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CH1 diode
0.5
0
255
60 mA: PDRIVE = 1 & PDL = 0
ISINK sink current @
1.6 V, LDR pin
116
145
58
30 mA: PDRIVE = 2 & PDL = 0
29
15 mA: PDRIVE = 3 & PDL = 0
14.5
15 mA: PDRIVE = 0 & PDL = 1
12.9
7.5 mA: PDRIVE = 1 & PDL = 1
6.4
3.8 mA: PDRIVE = 2 & PDL = 1
3.2
1.9 mA: PDRIVE = 3 & PDL = 1
1.6
PDRIVE = 0 and PDL = 0 (116 mA), PPULSE = 64
Emitter: λp = 850 nm, 20° half angle, and 60 mW/sr
Object: 16 × 20-inch, 90% reflective Kodak Gray Card
(white surface)
Optics: Open view (no glass, no optical attenuation)
pulses
μs
7.3
87
% FS
μs
16.0
Maximum operating distance
(Notes 1, 4, 5)
counts
2
120 mA: PDRIVE = 0 & PDL = 0
18
mA
inches
Parameter is ensured by design or characterization and is not tested.
Proximity noise is defined as one standard deviation of 600 samples.
Proximity noise typically increases as √PPULSE
Greater operating distances are achievable with appropriate optical system design considerations. See available TAOS application
notes for additional information.
5. Maximum operating distance is dependent upon emitter and the reflective properties of the object’s surface.
6. Proximity noise test was done using the following circuit:
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NOTES: 1.
2.
3.
4.
mA
ms
LED pulse width — LED on time
LED drive current
UNIT
2.9
CH0 diode
LED pulse count (Note 1)
LED pulse period
2.73
PGAIN = 2×
Ee = 0, PTIME = 0xFB, PPULSE = 4
(Note 6)
Noise (Notes 1,
1 2,
2 3)
2.58
MAX
3
ADC number of integration steps
(Note 1)
G i scaling,
Gain
li
relative
l ti to
t 1× gain
i
setting
TYP
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Supply current
MIN
lv
IDD
TEST CONDITIONS
The LUMENOLOGY r Company
VDD
22 W
VDD
15.0 W
1
1 mF
TSL2672
3
4
GND
LDR
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TSL2672
DIGITAL PROXIMITY DETECTOR
TAOS133 − MAY 2012
Wait Characteristics, VDD = 3 V, TA = 25C, WEN = 1 (unless otherwise noted)
PARAMETER
TEST CONDITIONS
Wait step size
CHANNEL
WTIME = 0xFF
Wait number of integration steps (Note 1)
MIN
TYP
2.58
2.73
MAX
1
UNIT
2.9
ms
256
steps
AC Electrical Characteristics, VDD = 3 V, TA = 25C (unless otherwise noted)
PARAMETER†
(I2C
TEST CONDITIONS
MIN
UNIT
400
kHz
Clock frequency
t(BUF)
Bus free time between start and stop condition
1.3
t(HDSTA)
Hold time after (repeated) start condition. After
this period, the first clock is generated.
0.6
t(SUSTA)
Repeated start condition setup time
0.6
μs
t(SUSTO)
Stop condition setup time
0.6
μs
t(HDDAT)
Data hold time
0
μs
t(SUDAT)
Data setup time
100
ns
t(LOW)
SCL clock low period
1.3
μs
t(HIGH)
SCL clock high period
0.6
μs
tF
Clock/data fall time
tR
Clock/data rise time
Ci
Input pin capacitance
μs
μs
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0
MAX
f(SCL)
†
only)
TYP
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NOTE 1: Parameter ensured by design and is not tested.
300
ns
300
ns
10
pF
Specified by design and characterization; not production tested.
PARAMETER MEASUREMENT INFORMATION
t(LOW)
VIH
SCL
VIL
t(R)
t(F)
t(HIGH)
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t(HDSTA)
t(BUF)
t(HDDAT)
t(SUSTA)
t(SUSTO)
t(SUDAT)
VIH
SDA
P
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VIL
S
S
P
Start
Condition
ch
Stop
Condition
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Figure 1. Timing Diagrams
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TSL2672
DIGITAL PROXIMITY DETECTOR
TAOS133 − MAY 2012
TYPICAL CHARACTERISTICS
NORMALIZED RESPONSIVITY
vs.
ANGULAR DISPLACEMENT
SPECTRAL RESPONSIVITY
1
1.0
0.4
Ch 1
0.2
0.6
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Normalized Responsivity
Ch 0
0.4
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Normalized Responsivity
0.6
Optical Axis
0.8
0.8
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Both Axes
0.2
0
300
400
500
600
700
800
0
−90
900 1000 1100
λ − Wavelength − nm
-Q
+Q
−60
−30
0
30
60
Q − Angular Displacement − °
Figure 2
90
Figure 3
TYPICAL LDR CURRENT
vs.
VOLTAGE
TYPICAL LDR CURRENT
vs.
VOLTAGE
20
160
PDL = 0
140
PDL = 1
18
16
14
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LDR Current — mA
120 mA
100
80
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LDR Current — mA
120
60
60 mA
ch
40
15 mA
12
10
8
7.5 mA
6
4
3.8 mA
30 mA
20
2
15 mA
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0
0
0.5
1
1.9 mA
1.5
2
2.5
3
0
0
0.5
1
1.5
2
LDR Voltage − V
LDR Voltage − V
Figure 4
Figure 5
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3
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TSL2672
DIGITAL PROXIMITY DETECTOR
TAOS133 − MAY 2012
RESPONSE to WHITE LED
vs.
TEMPERATURE
RESPONSE to IR (850 nm) LED
vs.
TEMPERATURE
115%
115%
Ch 0
100%
95%
Ch 1
90%
Ch 1
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105%
110%
105%
100%
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Response — Normalized to 25° C
110%
95%
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Response — Normalized to 25° C
Ch 0
90%
0
10
20
30
40
50
Temperature − °C
60
70
0
10
20
Figure 6
60
70
Figure 7
NORMALIZED IDD
vs.
VDD and TEMPERATURE
110%
108%
106%
104%
0C
102%
100%
50C
25C
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IDD — Active Current Normalized @ 3 V, 25C
30
40
50
Temperature − °C
75C
98%
94%
92%
2.7
2.8
2.9
3
3.1
3.2
3.3
VDD — V
Figure 8
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96%
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TSL2672
DIGITAL PROXIMITY DETECTOR
TAOS133 − MAY 2012
PRINCIPLES OF OPERATION
System States
An internal state machine provides system control of the proximity detection and power management features
of the device. At power up, an internal power-on-reset initializes the device and puts it in a low-power Sleep
state.
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When a start condition is detected on the I2C bus, the device transitions to the Idle state where it checks the
Enable register (0x00) PON bit. If PON is disabled, the device will return to the Sleep state to save power.
Otherwise, the device will remain in the Idle state until the proximity function is enabled. Once enabled, the
device will execute the Prox and Wait states in sequence as indicated in Figure 9. Upon completion and return
to Idle, the device will automatically begin a new prox-wait cycle as long as PON and PEN remain enabled.
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If the Prox function generates an interrupt and the Sleep-After-Interrupt (SAI) feature is enabled, the device will
transition to the Sleep state and remain in a low-power mode until an I2C command is received. See the
Interrupts section for additional information.
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Sleep
I2C
Start
!PON
Idle
INT & SAI
PEN
Wait
Prox
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Figure 9. Simplified State Diagram
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TSL2672
DIGITAL PROXIMITY DETECTOR
TAOS133 − MAY 2012
Proximity Detection
VDD
External IR
LED
PGAIN(r0x0F, b3:2)
POFFSET(r0x1E)
PTIME(r0x02)
Prox LED
Current Driver
LDR
PVALID(r0x13, b1)
PSAT(r0x13, b6)
Prox Control
Prox
Integration
PDIODE(r0x0F, b5:4)
Prox
Data
Prox
ADC
PDATAH(r0x019)
PDATAL(r0x018)
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Object
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PDL(r0x0D,b0)
PPULSE(r0x0E)
PDRIVE(r0x0F, b7:6)
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Proximity detection is accomplished by measuring the amount of light energy, generally from an IR LED,
reflected off an object to determine its distance. The proximity light source, which is external to the TSL2672
device, is driven by the integrated proximity LED current driver as shown in Figure 10.
CH1
CH0
Background Energy
Figure 10. Proximity Detection
The LED current driver, output on the LDR terminal, provides a regulated current sink that eliminates the need
for an external current limiting resistor. The combination of proximity LED drive strength (PDRIVE) and proximity
drive level (PDL) determine the drive current. PDRIVE sets the drive current to 120 mA, 60 mA, 30 mA, or 15 mA
when PDL is not asserted. However, when PDL is asserted, the drive current is reduced by a factor of about
8 at VLDR = 1.6 V. To drive an external light source with more than 120 mA or to minimize on-chip ground bounce,
LDR can be used to drive an external p-type transistor, which in turn drives the light source.
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Referring to the Detailed State Machine figure, the LED current driver pulses the external IR LED as shown in
Figure 11 during the Prox Accum state. Figure 11 also illustrates that the LED On pulse has a fixed width of
7.3 μs and period of 16.0 μs. So, in addition to setting the proximity drive current, 1 to 255 proximity pulses
(PPULSE) can be programmed. When deciding on the number of proximity pulses, keep in mind that the signal
increases proportionally to PPULSE, while noise increases by the square root of PPULSE.
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Reflected IR LED +
Background Energy
LED On
LED Off
7.3 ms
16.0 ms
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Copyright E 2012, TAOS Inc.
Background
Energy
IR LED Pulses
Figure 11. Proximity LED Current Driver Waveform
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TSL2672
DIGITAL PROXIMITY DETECTOR
TAOS133 − MAY 2012
Figure 10 illustrates light rays emitting from an external IR LED, reflecting off an object, and being absorbed
by the CH0 and CH1 photodiodes. The proximity diode selector (PDIODE) determines which of the two
photodiodes is used for a given proximity measurement. Note that neither photodiode is selected when the
device first powers up, so PDIODE must be set for proximity detection to work.
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Referring again to Figure 11, the reflected IR LED and the background energy is integrated during the LED On
time, then during the LED Off time, the integrated background energy is subtracted from the LED On time
energy, leaving the external IR LED energy to accumulate from pulse to pulse. The proximity gain (PGAIN)
determines the integration rate, which can be programmed to 1×, 2×, 4×, or 8× gain. At power up, PGAIN
defaults to 1× gain, which is recommended for most applications. For reference, PGAIN equal to 8× is
comparable to the TSL2771 1× gain setting. During LED On time integration, the proximity saturation bit in the
Status register (0x13) will be set if the integrator saturates. This condition can occur if the proximity gain is set
too high for the lighting conditions, such as in the presence of bright sunlight. Once asserted, PSAT will remain
set until a special function proximity interrupt clear command is received from the host (see command register).
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After the programmed number of proximity pulses have been generated, the proximity ADC converts and scales
the proximity measurement to a 16-bit value, then stores the result in two 8-bit proximity data (PDATAx)
registers. ADC scaling is controlled by the proximity ADC conversion time (PTIME) which is programmable from
1 to 256 2.73-ms time units. However, depending on the application, scaling the proximity data will equally scale
any accumulated noise. Therefore, in general, it is recommended to leave PTIME at the default value of one
2.73-ms ADC conversion time (0xFF).
In many practical proximity applications, a number of optical system and environmental conditions can produce
an offset in the proximity measurement result. To counter these effects, a proximity offset (POFFSET) is
provided which allows the proximity data to be shifted positive or negative. Additional information on the use
of the proximity offset feature is provided in available TAOS application notes.
Once the first proximity cycle has completed, the proximity valid (PVALID) bit in the Status register will be set
and remain set until the proximity detection function is disabled (PEN).
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For additional information on using the proximity detection function behind glass and for optical system design
guidance, please see available TAOS application notes.
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TSL2672
DIGITAL PROXIMITY DETECTOR
TAOS133 − MAY 2012
Interrupts
The interrupt feature simplifies and improves system efficiency by eliminating the need to poll the sensor for
proximity values outside a user-defined range. While the interrupt function is always enabled and its status is
available in the Status register (0x13), the output of the interrupt state can be enabled using the proximity
interrupt enable (PIEN) field in the Enable register (0x00).
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Two 16-bit interrupt threshold registers allow the user to set limits below and above a desired proximity range.
An interrupt can be generated when the proximity data (PDATA) is less than the proximity interrupt low threshold
(PILTx) or is greater than the proximity interrupt high threshold (PIHTx).
It is important to note that the thresholds are evaluated in sequence, first the low threshold, then the high
threshold. As a result, if the low threshold is set above the high threshold, the high threshold is ignored and only
the low threshold is evaluated.
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To further control when an interrupt occurs, the device provides an interrupt persistence feature. The
persistence filter allows the user to specify the number of consecutive out-of-range proximity occurrences
before an interrupt is generated. The persistence filter register (0x0C) allows the user to set the proximity
persistence filter (PPERS) values. See the persistence filter register for details on the persistence filter values.
Once the persistence filter generates an interrupt, it will continue until a special function interrupt clear command
is received (see Command register).
PIHTH(r 0x0B), PIHTL(r 0x0A)
Upper Limit
Prox
Integration
Channel 0
Prox
ADC
PPERS(r 0x0C, b7:4)
Prox Persistence
Prox
Data
Lower Limit
Channel 1
PILTH(r 0x09), PILTL(r 0x08)
Te
ch
ni
ca
Figure 12. Programmable Interrupt
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TAOS133 − MAY 2012
System Timing
The system state machine shown in Figure 9 provides an overview of the states and state transitions that
provide system control of the device. This section highlights the programmable features, which affect the state
machine cycle time, and provides details to determine system level timing.
al
id
When the proximity detection feature is enabled (PEN), the state machine transitions through the Prox Init, Prox
Accum, Prox Wait, and Prox ADC states. The Prox Init and Prox Wait times are a fixed 2.73 ms, whereas the
Prox Accum time is determined by the number of proximity LED pulses (PPULSE) and the Prox ADC time is
determined by the integration time (PTIME). The formulas to determine the Prox Accum and Prox ADC times
are given in the associated boxes in Figure 12. If an interrupt is generated as a result of the proximity cycle, it
will be asserted at the end of the Prox ADC state and transition to the Sleep state if SAI is enabled.
Prox
Sleep
am
lc s
on A
te G
nt
st
il
Time: 2.73 ms
Prox
Init
!PON
PEN
PPULSE: 0 ~ 255 pulses
Time: 16.0 μs/pulse
Range: 0 ~ 4.1 ms
lv
When the power management feature is enabled (WEN), the state machine will transition in turn to the Wait
state. The wait time is determined by WLONG, which extends normal operation by 12× when asserted, and
WTIME. The formula to determine the wait time is given in the box associated with the Wait state in Figure 13.
I2C Start
Prox
Accum
Idle
INT & SAI
Time: 2.73 ms
!WEN
Prox
ADC
WEN
Wait
ca
PTIME: 1 ~ 256 steps
Time: 2.73 ms/step
Range: 2.73 ms ~ 699 ms
Prox
Wait
WTIME: 1 ~ 256 steps
WLONG = 0
Time:
2.73 ms/step
Range: 2.73 ms ~ 699 ms
WLONG = 1
Time:
32.8 ms/step
Range: 32.8 ms ~ 8.39s
Figure 13. Detailed State Diagram
Te
ch
ni
Note: PON, PEN, WEN, and SAI are fields in the Enable register (0x00).
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TSL2672
DIGITAL PROXIMITY DETECTOR
TAOS133 − MAY 2012
Power Management
Power consumption can be managed with the Wait state, because the Wait state typically consumes only 90 μA
of IDD current. An example of the power management feature is given below. With the assumptions provided
in the example, average IDD is estimated to be 167 μA.
Table 1. Power Management
PROGRAMMABLE
PARAMETER
PROGRAMMED VALUE
DURATION
PPULSE
0x04
0.064 ms
Prox Init
TYPICAL
CURRENT
2.73 ms
Prox Accum
0.200 mA
Prox Accum − LED On
0.029 ms (Note 1)
Prox Accum − LED OFF
0.035 ms (Note 2)
2.73 ms
Prox ADC
0xFF
WTIME
0xEE
WLONG
0
2.73 ms
49 2 ms
49.2
0.200 mA
0.200 mA
0 090 mA
0.090
am
lc s
on A
te G
nt
st
il
Wait
PTIME
119 mA
0.200 mA
lv
Prox Wait
al
id
SYSTEM STATE MACHINE
STATE
NOTES: 1. Prox Accum − LED On time = 7.3 μs per pulse × 4 pulses = 29.3μs = 0.029 ms
2. Prox Accum − LED Off time = 8.7 μs per pulse × 4 pulses = 34.7μs = 0.035 ms
Average IDD Current = ((0.029 × 119) + (0.035 x 0.200) + (2.73 × 0.200) +
(49.2 × 0.090) + (2.73 × 0.200 × 2)) / 57 167 μA
Keeping with the same programmed values as the example, Table 2 shows how the average IDD current is
affected by the Wait state time, which is determined by WEN, WTIME, and WLONG. Note that the worst-case
current occurs when the Wait state is not enabled.
Table 2. Average IDD Current
WTIME
WLONG
WAIT STATE
AVERAGE IDD CURRENT
0
n/a
n/a
0 ms
622 μA
1
0xFF
0
2.73 ms
490 μA
1
0xEE
0
49.2 ms
167 μA
1
0x00
0
699 ms
97 μA6
1
0x00
1
8389 ms
91 μA
Te
ch
ni
ca
WEN
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I2C Protocol
Interface and control are accomplished through an I2C serial compatible interface (standard or fast mode) to
a set of registers that provide access to device control functions and output data. The devices support the 7-bit
I2C addressing protocol.
al
id
The I2C standard provides for three types of bus transaction: read, write, and a combined protocol (Figure 14).
During a write operation, the first byte written is a command byte followed by data. In a combined protocol, the
first byte written is the command byte followed by reading a series of bytes. If a read command is issued, the
register address from the previous command will be used for data access. Likewise, if the MSB of the command
is not set, the device will write a series of bytes at the address stored in the last valid command with a register
address. The command byte contains either control information or a 5-bit register address. The control
commands can also be used to clear interrupts.
...
Acknowledge (0)
Not Acknowledged (1)
Stop Condition
Read (1)
Start Condition
Repeated Start Condition
Write (0)
Continuation of protocol
Master-to-Slave
Slave-to-Master
1
S
am
lc s
on A
te G
nt
st
il
A
N
P
R
S
Sr
W
lv
The I2C bus protocol was developed by Philips (now NXP). For a complete description of the I2C protocol, please
review the NXP I2C design specification at http://www.i2c−bus.org/references/.
7
1
Slave Address
W
1
8
A
1
Command Code
8
A
1
Data Byte
A
8
1
1
...
P
I2C Write Protocol
1
S
7
1
Slave Address
R
1
8
A
1
Data
A
Data
1
...
A
P
I2C Read Protocol
1
S
Slave Address
1
8
1
1
7
1
1
A
Command Code
A
Sr
Slave Address
R
A
ca
7
W
8
1
Data
A
8
Data
1
A
1
...
P
I2C Read Protocol — Combined Format
Figure 14. I2C Protocols
Te
ch
ni
1
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TSL2672
DIGITAL PROXIMITY DETECTOR
TAOS133 − MAY 2012
Register Set
The device is controlled and monitored by data registers and a command register accessed through the serial
interface. These registers provide for a variety of control functions and can be read to determine results of the
ADC conversions. The register set is summarized in Table 1.
Table 3. Register Address
ADDRESS
RESISTER NAME
R/W
−−
COMMAND
W
REGISTER FUNCTION
0x00
ENABLE
R/W
Enables states and interrupts
0x02
PTIME
R/W
Proximity ADC time
0x03
WTIME
R/W
Wait time
0x08
PILTL
R/W
Proximity interrupt low threshold low byte
0x09
PILTH
R/W
Proximity interrupt low threshold high byte
0x0A
PIHTL
R/W
Proximity interrupt high threshold low byte
RESET VALUE
0x00
al
id
Specifies register address
0x00
0xFF
0xFF
0x00
lv
0x00
0x00
PIHTH
R/W
Proximity interrupt high threshold high byte
PERS
R/W
Interrupt persistence filter
0x00
0x0D
CONFIG
R/W
Configuration
0x00
am
lc s
on A
te G
nt
st
il
0x0B
0x0C
0x00
0x0E
PPULSE
R/W
Proximity pulse count
0x00
0x0F
CONTROL
R/W
Control register
0x00
0x12
ID
R
Device ID
0x13
STATUS
R
Device status
0x00
0x18
PDATAL
R
Proximity data low byte
0x00
R
Proximity data high byte
0x00
R/W
Proximity Offset register
0x00
0x19
PDATAH
0x1E
POFFSET
ID
Te
ch
ni
ca
The mechanics of accessing a specific register depends on the specific protocol used. See the section on I2C
protocols on the previous pages. In general, the COMMAND register is written first to specify the specific
control-status-data register for subsequent read/write operations.
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Command Register
The command register specifies the address of the target register for future read and write operations, as well
as issues special function commands.
Table 4. Command Register
CMD
5
4
3
TYPE
FIELD
BITS
CMD
7
TYPE
6:5
2
1
0
Reset
0x00
ADDR/SF
DESCRIPTION
Select Command Register. Must write as 1 when addressing COMMAND register.
Selects type of transaction to follow in subsequent data transfers:
FIELD VALUE
DESCRIPTION
00
Repeated byte protocol transaction
01
Auto-increment protocol transaction
10
Reserved — Do not use
am
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on A
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nt
st
il
lv
COMMAND
6
al
id
7
Special function — See description below
11
Transaction type 00 will repeatedly read the same register with each data access.
Transaction type 01 will provide an auto-increment function to read successive register bytes.
ADDR/SF
4:0
Address field/special function field. Depending on the transaction type, see above, this field either
specifies a special function command or selects the specific control-status-data register for subsequent
read and write transactions. The field values listed below apply only to special function commands:
FIELD VALUE
DESCRIPTION
00100
Interrupt set — forces an interrupt
00101
Proximity interrupt clear
other
Reserved — Do not write
The interrupt set special function command sets the interrupt bits in the status register (0x13). For the
interrupt to be visible on the INT pin, the proximity interrupt enable bit (PIEN) in the enable register (0x00)
must be asserted.
Te
ch
ni
ca
The interrupt set special function must be cleared with an interrupt clear special function. The proximity
interrupt clear special function clears any pending interrupt and is self clearing.
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TAOS133 − MAY 2012
Enable Register (0x00)
The enable register is used to power the device on/off, enable functions, and interrupts.
Table 5. Enable Register
6
5
4
3
2
1
0
Reserved
SAI
PIEN
Resv
Reserved
WEN
PEN
Reserved
PON
Reset
0x00
al
id
ENABLE
7
BITS
DESCRIPTION
Reserved
7
Reserved. Write as 0.
SAI
6
Sleep after interrupt. When asserted, the device will power down at the end of a proximity cycle if an interrupt
has been generated.
PIEN
5
Proximity interrupt enable. When enabled, the proximity interrupt drives the INT pin. When disabled, the
interrupt is masked from the INT pin, but remains visible in the Status register (0x13).
Reserved
4
Reserved. Write as 0.
WEN
3
Wait enable. This bit activates the wait feature. Writing a 1 activates the wait timer. Writing a 0 disables the
wait timer.
PEN
2
Proximity enable. This bit activates the proximity function. Writing a 1 enables proximity. Writing a 0
disables proximity.
Reserved
1
Reserved. Write as 0.
PON
0
Power ON. This bit activates the internal oscillator to permit the timers and ADC channel to operate. Writing
a 1 activates the oscillator. Writing a 0 disables the oscillator.
am
lc s
on A
te G
nt
st
il
lv
FIELD
Proximity Time Register (0x02)
The proximity time register controls the integration time of the proximity ADC in 2.73 ms increments. Upon power
up, the proximity time register is set to 0xFF. It is recommended that this register be programmed to a value of
0xFF (1 integration cycle).
Table 6. Proximity Integration Time Control Register
BITS
7:0
DESCRIPTION
VALUE
INTEG_CYCLES
TIME
MAX COUNT
0xFF
1
2.73 ms
1023
ca
FIELD
PTIME
Wait Time Register (0x03)
ch
ni
Wait time is set 2.73 ms increments unless the WLONG bit is asserted in which case the wait times are 12×
longer. WTIME is programmed as a 2’s complement number. Upon power up, the wait time register is set to
0xFF.
BITS
7:0
Te
FIELD
WTIME
Table 7. Wait Time Register
DESCRIPTION
REGISTER VALUE
WAIT TIME
TIME (WLONG = 0)
TIME (WLONG = 1)
0xFF
1
2.73 ms
0.033 sec
0xB6
74
202 ms
2.4 sec
0x00
256
699 ms
8.4 sec
NOTE: The Proximity Wait Time Register should be configured before PEN is asserted.
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Proximity Interrupt Threshold Registers (0x08 − 0x0B)
The proximity interrupt threshold registers provide the upper and lower threshold values to the proximity
interrupt comparators. See Interrupts in the Principles of Operation section for detailed information. Upon power
up, the interrupt threshold registers reset to 0x00.
Table 8. Proximity Interrupt Threshold Registers
BITS
0x08
7:0
Proximity interrupt low threshold low byte
DESCRIPTION
PILTH
0x09
7:0
Proximity interrupt low threshold high byte
PIHTL
0x0A
7:0
Proximity interrupt high threshold low byte
PIHTH
0x0B
7:0
Proximity interrupt high threshold high byte
al
id
ADDRESS
PILTL
lv
REGISTER
Interrupt Persistence Filter Register (0x0C)
am
lc s
on A
te G
nt
st
il
The interrupt persistence filter sets the number of consecutive proximity cycles that are out-of-range before an
interrupt is generated. Out-of-range is determined by the proximity interrupt threshold registers (0x08 through
0x0B). See Interrupts in the Principles of Operation section for further information. Upon power up, the interrupt
persistence filter register resets to 0x00, which will generate an interrupt at the end of each proximity cycle.
Table 9. Interrupt Persistence Filter Register
7
6
PERS
5
4
3
2
PPERS
FIELD
BITS
PPERS
7:4
Reset
0x00
DESCRIPTION
Proximity persistence. Controls rate of proximity interrupt to the host processor.
INTERRUPT PERSISTENCE FUNCTION
0000
Every proximity cycle generates an interrupt
0001
1 proximity value out of range
0010
2 consecutive proximity values out of range
...
...
1111
15 consecutive proximity values out of range
Reserved. Write as 0.
Te
ch
ni
ca
3:0
0
Reserved
FIELD VALUE
Reserved
1
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Configuration Register (0x0D)
The configuration register sets the proximity LED drive level and wait long time.
Table 10. Configuration Register
6
5
CONFIG
4
3
2
Reserved
1
0
WLONG
PDL
DESCRIPTION
Reset
0x00
al
id
7
FIELD
BITS
Reserved
7:2
WLONG
1
Wait Long. When asserted, the wait cycles are increased by a factor 12× from that programmed in the
WTIME register.
PDL
0
Proximity drive level. When asserted, the proximity LDR drive current is reduced by 9.
lv
Reserved. Write as 0.
am
lc s
on A
te G
nt
st
il
Proximity Pulse Count Register (0x0E)
The proximity pulse count register sets the number of proximity pulses that the LDR pin will generate during the
Prox Accum state.
Table 11. Proximity Pulse Count Register
7
PPULSE
6
5
4
3
2
1
0
Reset
0x00
PPULSE
BITS
PPULSE
7:0
DESCRIPTION
Proximity Pulse Count. Specifies the number of proximity pulses to be generated.
Te
ch
ni
ca
FIELD
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Control Register (0x0F)
The Control register provides eight bits of miscellaneous control to the analog block. These bits typically control
functions such as gain settings and/or diode selection.
Table 12. Control Register
6
FIELD
BITS
7:6
PGAIN
3:2
1:0
Reset
0x00
Reserved
LED STRENGTH — PDL = 0
LED STRENGTH — PDL = 1
00
120 mA
15 mA
01
60 mA
7.5 mA
10
30 mA
3.8 mA
11
15 mA
1.9 mA
Proximity Diode Selector.
DIODE SELECTION
00
Proximity uses neither diode
01
Proximity uses the CH0 diode
10
Proximity uses the CH1 diode
11
Reserved — Do not write
Proximity Gain.
FIELD VALUE
Reserved
0
DESCRIPTION
FIELD VALUE
PGAIN
1
am
lc s
on A
te G
nt
st
il
5:4
2
Proximity LED Drive Strength.
FIELD VALUE
PDIODE
3
ResvPDIODE
PDRIVE
PDRIVE
(N t 1)
(Note
4
lv
CONTROL
5
al
id
7
PROXIMITY GAIN VALUE
00
1× gain
01
2× gain
10
4× gain
11
8× gain
Reserved. Write as 0.
NOTE 1: LED STRENGTH currents are nominal values. Specifications can be found in the Proximity Characteristics table.
ID Register (0x12)
6
ni
7
ca
The ID Register provides the value for the part number. The ID register is a read-only register.
5
4
3
BITS
ID
7:0
1
0
Reset
ID
DESCRIPTION
0x32 = TSL26721 & TSL26725
Part number identification
0x3B = TSL26723 & TSL2777
Te
FIELD
2
ID
ch
ID
Table 13. ID Register
Status Register (0x13)
The Status Register provides the internal status of the device. This register is read only.
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Table 14. Status Register
STATUS
7
6
5
Reserved
PSAT
PINT
Resv
4
3
2
Reserved
1
0
PVALID
Reserved
Reset
0x00
BIT
7
Reserved. Read as 0.
DESCRIPTION
PSAT
6
Proximity Saturation. Indicates that the proximity measurement saturated.
PINT
5
Proximity Interrupt. Indicates that the device is asserting a proximity interrupt.
Reserved
4:2
PVALID
1
Proximity Valid. Indicates that the proximity channel has completed an integration cycle after PEN has been
asserted.
Reserved
0
Reserved. Read as 0.
lv
Reserved. Read as 0.
al
id
FIELD
Reserved
Proximity Data Registers (0x18 − 0x19)
am
lc s
on A
te G
nt
st
il
Proximity data is stored as a 16-bit value. When the lower byte is read, the upper byte is latched into a shadow
register. The shadow register ensures that both bytes are the result of the same proximity cycle, even if
additional proximity cycles occur between the lower byte and upper byte register readings. The simplest way
to read both bytes is to perform a two-byte I2C read operation using the auto-increment protocol, which is set
in the Command register TYPE field.
Table 15. Proximity Data Registers
ADDRESS
BITS
PDATAL
0x18
7:0
Proximity data low byte
DESCRIPTION
PDATAH
0x19
7:0
Proximity data high byte
Te
ch
ni
ca
REGISTER
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Proximity Offset Register (0x1E)
Table 16. Proximity Offset Register
7
5
SIGN
FIELD
4
3
6:0
Reset
0x00
DESCRIPTION
Proximity Offset Sign. The offset sign shifts the proximity data negative when equal to 0 and positive when
equal to 1.
am
lc s
on A
te G
nt
st
il
MAGNITUDE
0
Proximity Offset Magnitude. The offset magnitude shifts the proximity data positive or negative, depending
on the proximity offset sign. The actual amount of the shift depends on the proximity gain (PGAIN), proximity
LED drive strength (PDRIVE), and the number of proximity pulses (PPULSE).
Te
ch
ni
ca
7
1
MAGNITUDE
BIT
SIGN
2
lv
POFFSET
6
al
id
The 8-bit proximity offset register provides compensation for proximity offsets caused by device variations,
optical crosstalk, and other environmental factors. Proximity offset is a sign-magnitude value where the sign
bit, bit 7, determines if the offset is negative (bit 7 = 0) or positive (bit 7 = 1). At power up, the register is set to
0x00. The magnitude of the offset compensation depends on the proximity gain (PGAIN), proximity LED drive
strength (PDRIVE), and the number of proximity pulses (PPULSE). Because a number of environmental factors
contribute to proximity offset, this register is best suited for use in an adaptive closed-loop control system. See
available TAOS application notes for proximity offset register application information.
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DIGITAL PROXIMITY DETECTOR
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APPLICATION INFORMATION: HARDWARE
LED Driver Pin with Proximity Detection
In a proximity sensing system, the IR LED can be pulsed by the TSL2672 with more than 100 mA of rapidly
switching current, therefore, a few design considerations must be kept in mind to get the best performance. The
key goal is to reduce the power supply noise coupled back into the device during the LED pulses.
Voltage
Regulator
VDD
1 mF
RP
GND
Voltage
Regulator
RP
RPI
am
lc s
on A
te G
nt
st
il
C*
lv
VBUS
al
id
The first recommendation is to use two power supplies; one for the device VDD and the other for the IR LED.
In many systems, there is a quiet analog supply and a noisy digital supply. By connecting the quiet supply to
the VDD pin and the noisy supply to the LED, the key goal can be meet. Place a 1-μF low-ESR decoupling
capacitor as close as possible to the VDD pin and another at the LED anode, and a 22-μF capacitor at the output
of the LED voltage regulator to supply the 100-mA current surge.
TSL2672
INT
SCL
LDR
22 mF
1 mF
SDA
IR LED
* Cap Value Per Regulator Manufacturer Recommendation
Figure 15. Proximity Sensing Using Separate Power Supplies
If it is not possible to provide two separate power supplies, the device can be operated from a single supply.
A 22-Ω resistor in series with the VDD supply line and a 1-μF low ESR capacitor effectively filter any power supply
noise. The previous capacitor placement considerations apply.
VBUS
Voltage
Regulator
22 W
VDD
1 mF
22 mF
RP
ca
GND
1 mF
TSL2672
RP
RPI
INT
SCL
LDR
SDA
ni
IR LED
ch
Figure 16. Proximity Sensing Using Single Power Supply
Te
VBUS in the above figures refers to the I2C bus voltage which is either VDD or 1.8 V. Be sure to apply the specified
I2C bus voltage shown in the Available Options table for the specific device being used.
The I2C signals and the Interrupt are open-drain outputs and require pull−up resistors. The pull-up resistor (RP)
value is a function of the I2C bus speed, the I2C bus voltage, and the capacitive load. The TAOS EVM running
at 400 kbps, uses 1.5-kΩ resistors. A 10-kΩ pull-up resistor (RPI) can be used for the interrupt line.
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TSL2672
DIGITAL PROXIMITY DETECTOR
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APPLICATION INFORMATION: HARDWARE
PCB Pad Layouts
Suggested land pattern based on the IPC−7351B Generic Requirements for Surface Mount Design and Land
Pattern Standard (2010) for the small outline no-lead (SON) package is shown in Figure 17.
1.20
0.35 6
lv
0.65
al
id
2.70
1.20
am
lc s
on A
te G
nt
st
il
0.65
TOP VIEW
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
Te
ch
ni
ca
Figure 17. Suggested FN Package PCB Layout
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TSL2672
DIGITAL PROXIMITY DETECTOR
TAOS133 − MAY 2012
PACKAGE INFORMATION
PACKAGE FN
Dual Flat No-Lead
TOP VIEW
398 10
PIN OUT
TOP VIEW
PIN 1
2000 100
6 SDA
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id
VDD 1
355
10
SCL 2
5 INT
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st
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2000
100
END VIEW
4 LDR
lv
GND 3
Photodiode Array Area
SIDE VIEW
295
Nominal
650 50
650
BSC
BOTTOM VIEW
CL
of Photodiode Array Area
(Note B)
203 8
300
50
CL of Solder Contacts
1 Nominal
144 Nominal
ni
750 150
Lead Free
All linear dimensions are in micrometers.
The die is centered within the package within a tolerance of ± 75 μm.
Package top surface is molded with an electrically nonconductive clear plastic compound having an index of refraction of 1.55.
Contact finish is copper alloy A194 with pre-plated NiPdAu lead finish.
This package contains no lead (Pb).
This drawing is subject to change without notice.
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NOTES: A.
B.
C.
D.
E.
F.
CL of Photodiode Array Area (Note B)
Pb
ch
PIN 1
ca
CL of Solder Contacts
Figure 18. Package FN — Dual Flat No-Lead Packaging Configuration
Copyright E 2012, TAOS Inc.
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TSL2672
DIGITAL PROXIMITY DETECTOR
TAOS133 − MAY 2012
CARRIER TAPE AND REEL INFORMATION
TOP VIEW
2.00 0.05
1.75
1.50
4.00
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id
4.00
B
+ 0.30
8.00
− 0.10
1.00
0.25
B
A
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st
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A
lv
3.50 0.05
DETAIL B
DETAIL A
5 Max
5 Max
0.254
0.02
2.18 0.05
Ao
2.18 0.05
0.83 0.05
Bo
ni
ca
Ko
All linear dimensions are in millimeters. Dimension tolerance is ± 0.10 mm unless otherwise noted.
The dimensions on this drawing are for illustrative purposes only. Dimensions of an actual carrier may vary slightly.
Symbols on drawing Ao, Bo, and Ko are defined in ANSI EIA Standard 481−B 2001.
Each reel is 178 millimeters in diameter and contains 3500 parts.
TAOS packaging tape and reel conform to the requirements of EIA Standard 481−B.
In accordance with EIA standard, device pin 1 is located next to the sprocket holes in the tape.
This drawing is subject to change without notice.
Te
ch
NOTES: A.
B.
C.
D.
E.
F.
G.
The LUMENOLOGY r Company
Figure 19. Package FN Carrier Tape
Copyright E 2012, TAOS Inc.
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TSL2672
DIGITAL PROXIMITY DETECTOR
TAOS133 − MAY 2012
SOLDERING INFORMATION
The FN package has been tested and has demonstrated an ability to be reflow soldered to a PCB substrate.
Table 17. Solder Reflow Profile
PARAMETER
REFERENCE
DEVICE
Average temperature gradient in preheating
tsoak
2 to 3 minutes
Time above 217°C (T1)
t1
Max 60 sec
Time above 230°C (T2)
t2
Max 50 sec
Time above Tpeak −10°C (T3)
t3
Max 10 sec
Tpeak
260°C
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Peak temperature in reflow
Temperature gradient in cooling
Tpeak
lv
Soak time
2.5°C/sec
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id
The solder reflow profile describes the expected maximum heat exposure of components during the solder
reflow process of product on a PCB. Temperature is measured on top of component. The components should
be limited to a maximum of three passes through this solder reflow profile.
Max −5°C/sec
Not to scale — for reference only
T3
T2
ca
Temperature (C)
T1
Time (sec)
t3
ni
t2
t1
Figure 20. Solder Reflow Profile Graph
Te
ch
tsoak
Copyright E 2012, TAOS Inc.
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TSL2672
DIGITAL PROXIMITY DETECTOR
TAOS133 − MAY 2012
STORAGE INFORMATION
Moisture Sensitivity
al
id
Optical characteristics of the device can be adversely affected during the soldering process by the release and
vaporization of moisture that has been previously absorbed into the package. To ensure the package contains
the smallest amount of absorbed moisture possible, each device is baked prior to being dry packed for shipping.
Devices are dry packed in a sealed aluminized envelope called a moisture-barrier bag with silica gel to protect
them from ambient moisture during shipping, handling, and storage before use.
Shelf Life
The calculated shelf life of the device in an unopened moisture barrier bag is 12 months from the date code on
the bag when stored under the following conditions:
lv
Shelf Life: 12 months
Ambient Temperature: < 40°C
Relative Humidity: < 90%
am
lc s
on A
te G
nt
st
il
Rebaking of the devices will be required if the devices exceed the 12 month shelf life or the Humidity Indicator
Card shows that the devices were exposed to conditions beyond the allowable moisture region.
Floor Life
The FN package has been assigned a moisture sensitivity level of MSL 3. As a result, the floor life of devices
removed from the moisture barrier bag is 168 hours from the time the bag was opened, provided that the devices
are stored under the following conditions:
Floor Life: 168 hours
Ambient Temperature: < 30°C
Relative Humidity: < 60%
If the floor life or the temperature/humidity conditions have been exceeded, the devices must be rebaked prior
to solder reflow or dry packing.
Rebaking Instructions
Te
ch
ni
ca
When the shelf life or floor life limits have been exceeded, rebake at 50°C for 12 hours.
The LUMENOLOGY r Company
Copyright E 2012, TAOS Inc.
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TSL2672
DIGITAL PROXIMITY DETECTOR
TAOS133 − MAY 2012
PRODUCTION DATA — information in this document is current at publication date. Products conform to
specifications in accordance with the terms of Texas Advanced Optoelectronic Solutions, Inc. standard
warranty. Production processing does not necessarily include testing of all parameters.
LEAD-FREE (Pb-FREE) and GREEN STATEMENT
al
id
Pb-Free (RoHS) TAOS’ terms Lead-Free or Pb-Free mean semiconductor products that are compatible with the current
RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous
materials. Where designed to be soldered at high temperatures, TAOS Pb-Free products are suitable for use in specified
lead-free processes.
Green (RoHS & no Sb/Br) TAOS defines Green to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and
Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material).
am
lc s
on A
te G
nt
st
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lv
Important Information and Disclaimer The information provided in this statement represents TAOS’ knowledge and
belief as of the date that it is provided. TAOS bases its knowledge and belief on information provided by third parties,
and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate
information from third parties. TAOS has taken and continues to take reasonable steps to provide representative
and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and
chemicals. TAOS and TAOS suppliers consider certain information to be proprietary, and thus CAS numbers and other
limited information may not be available for release.
NOTICE
Texas Advanced Optoelectronic Solutions, Inc. (TAOS) reserves the right to make changes to the products contained in this
document to improve performance or for any other purpose, or to discontinue them without notice. Customers are advised
to contact TAOS to obtain the latest product information before placing orders or designing TAOS products into systems.
TAOS assumes no responsibility for the use of any products or circuits described in this document or customer product
design, conveys no license, either expressed or implied, under any patent or other right, and makes no representation that
the circuits are free of patent infringement. TAOS further makes no claim as to the suitability of its products for any particular
purpose, nor does TAOS assume any liability arising out of the use of any product or circuit, and specifically disclaims any
and all liability, including without limitation consequential or incidental damages.
ca
TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS, INC. PRODUCTS ARE NOT DESIGNED OR INTENDED FOR
USE IN CRITICAL APPLICATIONS IN WHICH THE FAILURE OR MALFUNCTION OF THE TAOS PRODUCT MAY
RESULT IN PERSONAL INJURY OR DEATH. USE OF TAOS PRODUCTS IN LIFE SUPPORT SYSTEMS IS EXPRESSLY
UNAUTHORIZED AND ANY SUCH USE BY A CUSTOMER IS COMPLETELY AT THE CUSTOMER’S RISK.
Te
ch
ni
LUMENOLOGY, TAOS, the TAOS logo, and Texas Advanced Optoelectronic Solutions are registered trademarks of Texas Advanced
Optoelectronic Solutions Incorporated.
Copyright E 2012, TAOS Inc.
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