ams AG

TAOS Inc.
is now
ams AG
The technical content of this TAOS datasheet is still valid.
Contact information:
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TSL2772
LIGHT-TO-DIGITAL CONVERTER
with PROXIMITY SENSING
r
r
TAOS131 − DECEMBER 2011
Features
PACKAGE FN
DUAL FLAT NO-LEAD
(TOP VIEW)
D Ambient Light Sensing and Proximity
Detection in a Single Device
D Proximity Detection
D
D
D
SCL 2
5 INT
GND 3
4 LDR
Not Actual Size
Applications
D
D
D
D
D
D
Display Backlight Control
Cell Phone Touch Screen Disable
Mechanical Switch Replacement
Industrial Process Control
Medical Diagnostics
Printer Paper Alignment
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D
6 SDA
Description
End Products and Market Segments
D Mobile Handsets, Tablets, Laptops, HDTVs,
Monitors, and PMP (Portable Media
Players)
D
D
D
D
D
D
Medical and Industrial Instrumentation
White Goods
Toys
Industrial/Commercial Lighting
Digital Signage
Printers
ca
D
− Programmable Analog Gain, Integration
Time, and Offset
− Current Sink Driver for External IR LED
− Saturation Indicator
− 16,000:1 Dynamic Range
Maskable ALS and Proximity Interrupt
− Programmable Upper and Lower
Thresholds with Persistence Filter
Power Management
− Low Power 2.2 mA Sleep State with UserSelectable Sleep-After-Interrupt Mode
− 90 mA Wait State with Programmable Wait
Time from 2.7 ms to > 8 seconds
2
I C Fast Mode Compatible Interface
− Data Rates up to 400 kbit/s
− Input Voltage Levels Compatible with VDD
or 1.8-V Bus
Register Set- and Pin-Compatible with the
TSL2x71 Series
Small 2 mm 2 mm Dual Flat No-Lead (FN)
Package
VDD 1
lv
− Approximates Human Eye Response
− Programmable Analog Gain and
Integration Time
− 8,000,000:1 Dynamic Range
− Operation to 60,000 lux in Sunlight
− Very High Sensitivity — Ideally Suited for
Operation Behind Dark Glass
− Package UV Rejection Filter
al
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D Ambient Light Sensing (ALS)
ch
ni
The TSL2772 device family provides both ambient light sensing (ALS) and, when coupled with an external IR
LED, proximity detection. The device family is based on the TAOS patented dual-diode technology that enables
accurate ALS results and approximates human eye response to light intensity under a variety of lighting
conditions.
Te
The TSL2772 ALS includes a reduced-gain mode that extends the operating range to 60k lux in sunlight. The
device package incorporates a UV-rejection filter that enables accurate ALS. The TSL2772 proximity detection
includes improved signal-to-noise performance and selectable gain modes. A proximity offset register allows
compensation for optical system crosstalk between the IR LED and the sensor. To prevent false proximity data
measurement readings, a proximity saturation indicator bit signals that the internal analog circuitry has reached
saturation.
The LUMENOLOGY r Company
Copyright E 2011, TAOS Inc.
r
Texas Advanced Optoelectronic Solutions Inc.
1001 Klein Road S Suite 300 S Plano, TX 75074 S (972)
r 673-0759
www.taosinc.com
1
TSL2772
LIGHT-TO-DIGITAL CONVERTER
with PROXIMITY SENSING
TAOS131 − DECEMBER 2011
Functional Block Diagram
Interrupt
Prox LED
Current Driver
Prox Control
Prox
Integration
Prox
ADC
INT
Upper Limit
Prox
Data
Lower Limit
VDD
SCL
I2C Interface
Wait Control
Upper Limit
CH0
Data
ALS Control
CH0
Detailed Description
SDA
CH1
Data
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GND
CH1
ADC
Lower Limit
lv
CH0
ADC
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LDR
CH1
The TSL2772 light-to-digital device provides on-chip photodiodes, integrating amplifiers, ADCs, accumulators,
clocks, buffers, comparators, a state machine, and an I2C interface. Each device combines a Channel 0
photodiode (CH0), which is responsive to both visible and infrared light, and a channel 1 photodiode (CH1),
which is responsive primarily to infrared light. Two integrating ADCs simultaneously convert the amplified
photodiode currents into a digital value providing up to 16 bits of resolution. Upon completion of the conversion
cycle, the conversion result is transferred to the data registers. This digital output can be read by a
microprocessor through which the illuminance (ambient light level) in Lux is derived using an empirical formula
to approximate the human eye response.
Communication to the device is accomplished through a fast (up to 400 kHz), two-wire I2C serial bus for easy
connection to a microcontroller or embedded controller. The digital output of the device is inherently more
immune to noise when compared to an analog interface.
ni
ca
The device provides a separate pin for level-style interrupts. When interrupts are enabled and a pre-set value
is exceeded, the interrupt pin is asserted and remains asserted until cleared by the controlling firmware. The
interrupt feature simplifies and improves system efficiency by eliminating the need to poll a sensor for a light
intensity or proximity value. An interrupt is generated when the value of an ALS or proximity conversion exceeds
either an upper or lower threshold. In addition, a programmable interrupt persistence feature allows the user
to determine how many consecutive exceeded thresholds are necessary to trigger an interrupt. Interrupt
thresholds and persistence settings are configured independently for both ALS and proximity.
Te
ch
Proximity detection requires only a single external IR LED. An internal LED driver can be configured to provide
a constant current sink of 15 mA, 30 mA, 60 mA, or 120 mA of current. No external current limiting resistor is
required. The power can also be reduced by a factor of 8 with the PDL bit. The number of proximity LED pulses
can be programmed from 1 to 255 pulses. Each pulse has a 16-μs period. The programmable LED current,
coupled with the programmable number of pulses, provides a 16,000:1 contiguous dynamic range.
Copyright E 2011, TAOS Inc.
The LUMENOLOGY r Company
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r
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TSL2772
LIGHT-TO-DIGITAL CONVERTER
with PROXIMITY SENSING
TAOS131 − DECEMBER 2011
Terminal Functions
TERMINAL
TYPE
DESCRIPTION
NAME
NO.
GND
3
INT
5
O
Interrupt — open drain (active low).
LDR
4
O
LED driver for proximity emitter — open drain.
SCL
2
I
I2C serial clock input terminal — clock signal for I2C serial data.
SDA
6
I/O
VDD
1
Power supply ground. All voltages are referenced to GND.
al
id
I2C serial data I/O terminal — serial data I/O for I2C .
Supply voltage.
DEVICE
ADDRESS
INTERFACE DESCRIPTION
ORDERING NUMBER
TSL27721
0x39
FN−6
I2C
TSL27723
0x39
FN−6
I2C Vbus = 1.8 V Interface
TSL27725†
0x29
FN−6
I2C Vbus = VDD Interface
TSL27725FN
FN−6
I2C
TSL27727FN
Vbus = VDD Interface
TSL27721FN
TSL27723FN
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TSL27727†
†
PACKAGE − LEADS
lv
Available Options
0x29
Vbus = 1.8 V Interface
Contact TAOS for availability.
Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage, VDD (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.8 V
Input terminal voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 3.8 V
Output terminal voltage (except LDR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 3.8 V
Output terminal voltage (LDR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.8 V
Output terminal current (except LDR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −1 mA to 20 mA
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −40°C to 85°C
ESD tolerance, human body model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2000 V
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
ca
NOTE 1: All voltages are with respect to GND.
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Recommended Operating Conditions
Supply voltage, VDD (TSL27721 & TSL27725)
(I2C
Vbus = VDD)
ch
Supply voltage, VDD (TSL27723 & TSL27727) (I2C Vbus = 1.8 V)
Operating free-air temperature, TA
MIN
NOM
MAX
2.4
3
3.6
V
2.7
3
3.6
V
70
°C
Te
−30
UNIT
The LUMENOLOGY r Company
Copyright E 2011, TAOS Inc.
r
r
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3
TSL2772
LIGHT-TO-DIGITAL CONVERTER
with PROXIMITY SENSING
TAOS131 − DECEMBER 2011
Operating Characteristics, VDD = 3 V, TA = 25C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
Active — LDR pulse off
Supply current
VOL
INT SDA output low voltage
INT,
I LEAK
Leakage current, SDA, SCL, INT pins
I LEAK
Leakage current, LDR pin
VIH
SCL SDA input high voltage
SCL,
VIL
SCL SDA input low voltage
SCL,
MAX
200
250
Wait state
90
Sleep state — no I2C activity
2.2
UNIT
μA
4
3 mA sink current
0
0.4
6 mA sink current
0
0.6
−5
5
μA
5
μA
−5
TSL27721, TSL27725
0.7 VDD
TSL27723, TSL27727
1.25
V
0.3 VDD
TSL27721, TSL27725
0.54
V
lv
TSL27723, TSL27727
V
al
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IDD
TYP
PARAMETER
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ALS Characteristics, VDD = 3 V, TA = 25C, AGAIN = 16, AEN = 1 (unless otherwise noted)
(Notes 1 ,2, 3)
TEST CONDITIONS
CHANNEL
Ee = 0, AGAIN = 120×,
ATIME = 0xDB (100 ms)
Dark ADC count value
ADC integration time step size
MIN
TYP
MAX
CH0
0
1
5
CH1
0
1
5
2.58
2.73
2.9
ms
1
256
steps
0
1024
counts
65535
counts
ATIME = 0xFF
ADC number of integration steps
(Note 4)
ADC counts per step (Note 4)
ATIME = 0xFF
ADC count value (Note 4)
ATIME = 0xC0
ADC count value
0
White light, Ee = 263.9 μW/cm2,
ATIME = 0xF6 (27 ms) (Note 2)
CH0
λp = 850 nm, Ee = 263.4 μW/cm2,
ATIME = 0xF6 (27 ms) (Note 3)
CH0
CH1
Irradiance responsivity
5000
0.086
0.136
6000
0.186
0.456
0.570
0.684
White light, ATIME = 0xF6 (27 ms)
(Note 2)
CH1
2.58
λp = 850 nm, ATIME = 0xF6 (27 ms)
(Note 3)
CH0
19.0
CH1
10.8
AGAIN = 1× and AGL = 1
0.128
0.16
0.192
AGAIN = 8× and AGL = 0
7.2
8.0
8.8
AGAIN = 16× and AGL = 0
14 4
14.4
16 0
16.0
17.6
17 6
108
120
132
AGAIN = 120× and AGL = 0
counts
2850
18.9
ni
Gain scaling, relative to 1× gain
setting
6000
4000
CH0
ca
Re
λp = 850 nm, ATIME = 0xF6 (27 ms) (Note 3)
5000
counts
680
CH1
White light, ATIME = 0xF6 (27 ms) (Note 2)
ADC count value ratio: CH1/CH0
4000
UNIT
counts/
(μW/
cm2)
×
Te
ch
NOTES: 1. Optical measurements are made using small-angle incident radiation from light-emitting diode optical sources. Visible white LEDs
and infrared 850 nm LEDs are used for final product testing for compatibility with high-volume production.
2. The white LED irradiance is supplied by a white light-emitting diode with a nominal color temperature of 4000 K.
3. The 850 nm irradiance Ee is supplied by a GaAs light-emitting diode with the following typical characteristics: peak wavelength
λp = 850 nm and spectral halfwidth Δλ½ = 42 nm.
4. Parameter ensured by design and is not tested.
Copyright E 2011, TAOS Inc.
The LUMENOLOGY r Company
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TSL2772
LIGHT-TO-DIGITAL CONVERTER
with PROXIMITY SENSING
TAOS131 − DECEMBER 2011
Proximity Characteristics, VDD = 3 V, TA = 25C, PGAIN = 1, PEN = 1 (unless otherwise noted)
PARAMETER
LDR pulse on
ADC conversion time step size
PTIME = 0xFF
ADC counts per step (Note 1)
PTIME = 0xFF
ADC count value
λp = 850 nm, Ee = 263.4 μW/cm2,
PTIME = 0xFB, PPULSE = 4
ADC output responsivity
λp = 850 nm
nm, PTIME = 0xFB
0xFB, PPULSE = 1
1
256
steps
0
1023
counts
1500
2000
2500
CH1 diode
900
1200
1500
CH0 diode
1.90
CH1 diode
1.14
counts/
μW/cm2
PGAIN = 4×
4
PGAIN = 8×
×
8
CH0 diode
0.5
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CH1 diode
0.5
0
255
60 mA: PDRIVE = 1 & PDL = 0
ISINK sink current @
1.6 V, LDR pin
116
145
58
30 mA: PDRIVE = 2 & PDL = 0
29
15 mA: PDRIVE = 3 & PDL = 0
14.5
15 mA: PDRIVE = 0 & PDL = 1
12.9
7.5 mA: PDRIVE = 1 & PDL = 1
6.4
3.8 mA: PDRIVE = 2 & PDL = 1
3.2
1.9 mA: PDRIVE = 3 & PDL = 1
1.6
PDRIVE = 0 and PDL = 0 (116 mA), PPULSE = 64
Emitter: λp = 850 nm, 20° half angle, and 60 mW/sr
Object: 16 × 20-inch, 90% reflective Kodak Gray Card
(white surface)
Optics: Open view (no glass, no optical attenuation)
pulses
μs
7.3
87
% FS
μs
16.0
Maximum operating distance
(Notes 1, 4, 5)
counts
2
120 mA: PDRIVE = 0 & PDL = 0
18
mA
inches
Parameter is ensured by design or characterization and is not tested.
Proximity noise is defined as one standard deviation of 600 samples.
Proximity noise typically increases as √PPULSE
Greater operating distances are achievable with appropriate optical system design considerations. See available TAOS application
notes for additional information.
5. Maximum operating distance is dependent upon emitter and the reflective properties of the object’s surface.
6. Proximity noise test was done using the following circuit:
Te
ch
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NOTES: 1.
2.
3.
4.
mA
ms
LED pulse width — LED on time
LED drive current
UNIT
2.9
CH0 diode
LED pulse count (Note 1)
LED pulse period
2.73
PGAIN = 2×
Ee = 0, PTIME = 0xFB, PPULSE = 4
(Note 6)
Noise (Notes 1,
1 2,
2 3)
2.58
MAX
3
ADC number of integration steps
(Note 1)
G i scaling,
Gain
li
relative
l ti to
t 1× gain
i
setting
TYP
al
id
Supply current
MIN
lv
IDD
TEST CONDITIONS
The LUMENOLOGY r Company
VDD
22 W
VDD
15.0 W
1
1 mF
TSL2772
3
4
GND
LDR
Copyright E 2011, TAOS Inc.
r
r
www.taosinc.com
5
TSL2772
LIGHT-TO-DIGITAL CONVERTER
with PROXIMITY SENSING
TAOS131 − DECEMBER 2011
Wait Characteristics, VDD = 3 V, TA = 25C, WEN = 1 (unless otherwise noted)
PARAMETER
TEST CONDITIONS
Wait step size
CHANNEL
WTIME = 0xFF
Wait number of integration steps (Note 1)
MIN
TYP
2.58
2.73
MAX
1
UNIT
2.9
ms
256
steps
AC Electrical Characteristics, VDD = 3 V, TA = 25C (unless otherwise noted)
PARAMETER†
(I2C
TEST CONDITIONS
MIN
UNIT
400
kHz
Clock frequency
t(BUF)
Bus free time between start and stop condition
1.3
t(HDSTA)
Hold time after (repeated) start condition. After
this period, the first clock is generated.
0.6
t(SUSTA)
Repeated start condition setup time
0.6
μs
t(SUSTO)
Stop condition setup time
0.6
μs
t(HDDAT)
Data hold time
0
μs
t(SUDAT)
Data setup time
100
ns
t(LOW)
SCL clock low period
1.3
μs
t(HIGH)
SCL clock high period
0.6
μs
tF
Clock/data fall time
tR
Clock/data rise time
Ci
Input pin capacitance
μs
μs
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0
MAX
f(SCL)
†
only)
TYP
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NOTE 1: Parameter ensured by design and is not tested.
300
ns
300
ns
10
pF
Specified by design and characterization; not production tested.
PARAMETER MEASUREMENT INFORMATION
t(LOW)
VIH
SCL
VIL
t(R)
t(F)
t(HIGH)
ca
t(HDSTA)
t(BUF)
t(HDDAT)
t(SUSTA)
t(SUSTO)
t(SUDAT)
VIH
SDA
P
ni
VIL
S
S
P
Start
Condition
ch
Stop
Condition
Te
Figure 1. Timing Diagrams
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TSL2772
LIGHT-TO-DIGITAL CONVERTER
with PROXIMITY SENSING
TAOS131 − DECEMBER 2011
TYPICAL CHARACTERISTICS
NORMALIZED RESPONSIVITY
vs.
ANGULAR DISPLACEMENT
SPECTRAL RESPONSIVITY
1
1.0
0.4
Ch 1
0.2
0.6
lv
Normalized Responsivity
Ch 0
0.4
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Normalized Responsivity
0.6
Optical Axis
0.8
0.8
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Both Axes
0.2
0
300
400
500
600
700
800
0
−90
900 1000 1100
λ − Wavelength − nm
-Q
Figure 2
90
Figure 3
TYPICAL LDR CURRENT
vs.
VOLTAGE
20
+Q
−60
−30
0
30
60
Q − Angular Displacement − °
TYPICAL LDR CURRENT
vs.
VOLTAGE
160
18
140
16
ca
10
8
7.5 mA
6
4
120 mA
100
80
60
60 mA
40
ni
LDR Current — mA
15 mA
12
LDR Current — mA
120
14
3.8 mA
ch
2
30 mA
20
15 mA
1.9 mA
0
0.5
Te
0
1
1.5
2
2.5
3
0
0
0.5
1
1.5
2
LDR Voltage − V
LDR Voltage − V
Figure 4
Figure 5
The LUMENOLOGY r Company
2.5
3
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TSL2772
LIGHT-TO-DIGITAL CONVERTER
with PROXIMITY SENSING
TAOS131 − DECEMBER 2011
RESPONSE to WHITE LED
vs.
TEMPERATURE
RESPONSE to IR (850 nm) LED
vs.
TEMPERATURE
115%
115%
Ch 0
100%
95%
Ch 1
90%
Ch 1
al
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105%
110%
105%
100%
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Response — Normalized to 25° C
110%
95%
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Response — Normalized to 25° C
Ch 0
90%
0
10
20
30
40
50
Temperature − °C
60
70
0
10
20
Figure 6
60
70
Figure 7
NORMALIZED IDD
vs.
VDD and TEMPERATURE
110%
108%
106%
104%
0C
102%
100%
50C
25C
ca
IDD — Active Current Normalized @ 3 V, 25C
30
40
50
Temperature − °C
75C
98%
94%
92%
2.7
2.8
2.9
3
3.1
3.2
3.3
VDD — V
Figure 8
Te
ch
ni
96%
Copyright E 2011, TAOS Inc.
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TSL2772
LIGHT-TO-DIGITAL CONVERTER
with PROXIMITY SENSING
TAOS131 − DECEMBER 2011
PRINCIPLES OF OPERATION
System State Machine
An internal state machine provides system control of the ALS, proximity detection, and power management
features of the device. At power up, an internal power-on-reset initializes the device and puts it in a low-power
Sleep state.
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When a start condition is detected on the I2C bus, the device transitions to the Idle state where it checks the
Enable register (0x00) PON bit. If PON is disabled, the device will return to the Sleep state to save power.
Otherwise, the device will remain in the Idle state until a proximity or ALS function is enabled. Once enabled,
the device will execute the Prox, Wait, and ALS states in sequence as indicated in Figure 9. Upon completion
and return to Idle, the device will automatically begin a new prox−wait−ALS cycle as long as PON and either
PEN or AEN remain enabled.
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If the Prox or ALS function generates an interrupt and the Sleep-After-Interrupt (SAI) feature is enabled, the
device will transition to the Sleep state and remain in a low-power mode until an I2C command is received. See
the Interrupts section for additional information.
Sleep
I2C
Start
!PON
Idle
INT & SAI
INT & SAI
PEN
!PEN &
!WEN
& AEN
!WEN
& !AEN
Prox
ca
!WEN
& AEN
ni
WEN
!PEN &
WEN &
AEN
!AEN
ALS
Wait
AEN
Figure 9. Simplified State Diagram
ch
Photodiodes
Conventional ALS detectors respond strongly to infrared light, which the human eye does not see. This can lead
to significant error when the infrared content of the ambient light is high (such as with incandescent lighting).
Te
This problem is overcome through the use of two photodiodes. The Channel 0 photodiode, referred to as the
CH0 channel, is sensitive to both visible and infrared light, while the Channel 1 photodiode, referred to as CH1,
is sensitive primarily to infrared light. Two integrating ADCs convert the photodiode currents to digital outputs.
The ADC digital outputs from the two channels are used in a formula to obtain a value that approximates the
human eye response in units of lux.
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TSL2772
LIGHT-TO-DIGITAL CONVERTER
with PROXIMITY SENSING
TAOS131 − DECEMBER 2011
ALS Operation
ATIME(r 1)
2.73 ms to 699 ms
CH0
ALS
CH0
Data
C0DATAH(r0x15), C0DATA(r0x14)
ALS Control
CH1
ADC
CH1
Data
lv
CH0
al
id
The ALS engine contains ALS gain control (AGAIN) and two integrating analog-to-digital converters (ADC), one
for the CH0 and one for the CH1 photodiodes. The ALS integration time (ATIME) impacts both the resolution
and the sensitivity of the ALS reading. Integration of both channels occurs simultaneously and upon completion
of the conversion cycle, the results are transferred to the data registers (C0DATA and C1DATA). This data is
also referred to as channel count. The transfers are double-buffered to ensure data integrity.
C1DATAH(r0x17), C1DATA(r0x16)
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CH1
AGAIN(r0x0F, b1:0)
1, 8, 16, 120 Gain
Figure 10. ALS Operation
The registers for programming the integration and wait times are a 2’s compliment values. The actual time can
be calculated as follows:
ATIME = 256 − Integration Time / 2.73 ms
Inversely, the time can be calculated from the register value as follows:
Integration Time = 2.73 ms × (256 − ATIME)
In order to reject 50/60-Hz ripple strongly present in fluorescent lighting, the integration time needs to
be programmed in multiples of 10 / 8.3 ms or the half cycle time. Both frequencies can be rejected with a
programmed value of 50 ms (ATIME = 0xED) or multiples of 50 ms (i.e. 100, 150, 200, 400, 600).
The registers for programming the AGAIN hold a two-bit value representing a gain of 1×, 8×, 16×, or 120×. The
gain, in terms of amount of gain, will be represented by the value AGAINx, i.e. AGAINx = 1, 8, 16, or 120. With
the AGL bit set, the 1× and 8× gains are lowered to 1/6× and 8/6×, respectively, to allow for operation up to
60k lux. Do not enable AGL when AGAIN is 16× or 120×.
ca
Lux Equation
ch
ni
The lux calculation is a function of CH0 channel count (C0DATA), CH1 channel count (C1DATA), ALS gain
(AGAINx), and ALS integration time in milliseconds (ATIME_ms). If an aperture, glass/plastic, or a light pipe
attenuates the light equally across the spectrum (300 nm to 1100 nm), then a scaling factor referred to as glass
attenuation (GA) can be used to compensate for attenuation. For a device in open air with no aperture or
glass/plastic above the device, GA = 1. If it is not spectrally flat, then a custom lux equation with new coefficients
should be generated. (See TAOS application note).
Te
Counts per Lux (CPL) needs to be calculated only when ATIME or AGAIN is changed, otherwise it remains a
constant. The first segment of the equation (Lux1) covers fluorescent and incandescent light. The second
segment (Lux2) covers dimmed incandescent light. The final lux is the maximum of Lux1, Lux2, or 0.
CPL = (ATIME_ms × AGAINx) / (GA × 60)
Lux1 = (1 × C0DATA − 1.87 × C1DATA) / CPL
Lux2 = (0.63 × C0DATA − 1 × C1DATA) / CPL
Lux = MAX(Lux1, Lux2, 0)
Copyright E 2011, TAOS Inc.
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Proximity Detection
PDL(r0x0D,b0)
PPULSE(r0x0E)
PDRIVE(r0x0F, b7:6)
VDD
External IR
LED
PGAIN(r0x0F, b3:2)
POFFSET(r0x1E)
PTIME(r0x02)
Prox LED
Current Driver
LDR
PVALID(r0x13, b1)
PSAT(r0x13, b6)
Prox Control
Prox
Data
Prox
ADC
lv
Prox
Integration
PDIODE(r0x0F, b5:4)
PDATAH(r0x019)
PDATAL(r0x018)
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Object
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Proximity detection is accomplished by measuring the amount of light energy, generally from an IR LED,
reflected off an object to determine its distance. The proximity light source, which is external to the TSL2772
device, is driven by the integrated proximity LED current driver as shown in Figure 11.
CH1
CH0
Background Energy
Figure 11. Proximity Detection
The LED current driver, output on the LDR terminal, provides a regulated current sink that eliminates the need
for an external current limiting resistor. The combination of proximity LED drive strength (PDRIVE) and proximity
drive level (PDL) determine the drive current. PDRIVE sets the drive current to 120 mA, 60 mA, 30 mA, or 15 mA
when PDL is not asserted. However, when PDL is asserted, the drive current is reduced by a factor of about
8 at VLDR = 1.6 V. To drive an external light source with more than 120 mA or to minimize on-chip ground bounce,
LDR can be used to drive an external p-type transistor, which in turn drives the light source.
ca
Referring to the Detailed State Machine figure, the LED current driver pulses the external IR LED as shown in
Figure 12 during the Prox Accum state. Figure 12 also illustrates that the LED On pulse has a fixed width of
7.3 μs and period of 16.0 μs. So, in addition to setting the proximity drive current, 1 to 255 proximity pulses
(PPULSE) can be programmed. When deciding on the number of proximity pulses, keep in mind that the signal
increases proportionally to PPULSE, while noise increases by the square root of PPULSE.
ni
Reflected IR LED +
Background Energy
LED On
LED Off
7.3 ms
16.0 ms
ch
Te
The LUMENOLOGY r Company
Background
Energy
IR LED Pulses
Figure 12. Proximity LED Current Driver Waveform
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LIGHT-TO-DIGITAL CONVERTER
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TAOS131 − DECEMBER 2011
Figure 11 illustrates light rays emitting from an external IR LED, reflecting off an object, and being absorbed by
the CH0 and CH1 photodiodes. The proximity diode selector (PDIODE) determines which of the two
photodiodes is used for a given proximity measurement. Note that neither photodiode is selected when the
device first powers up, so PDIODE must be set for proximity detection to work.
al
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Referring again to Figure 12, the reflected IR LED and the background energy is integrated during the LED On
time, then during the LED Off time, the integrated background energy is subtracted from the LED On time
energy, leaving the external IR LED energy to accumulate from pulse to pulse. The proximity gain (PGAIN)
determines the integration rate, which can be programmed to 1×, 2×, 4×, or 8× gain. At power up, PGAIN
defaults to 1× gain, which is recommended for most applications. For reference, PGAIN equal to 8× is
comparable to the TSL2771 1× gain setting. During LED On time integration, the proximity saturation bit in the
Status register (0x13) will be set if the integrator saturates. This condition can occur if the proximity gain is set
too high for the lighting conditions, such as in the presence of bright sunlight. Once asserted, PSAT will remain
set until a special function proximity interrupt clear command is received from the host (see command register).
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After the programmed number of proximity pulses have been generated, the proximity ADC converts and scales
the proximity measurement to a 16-bit value, then stores the result in two 8-bit proximity data (PDATAx)
registers. ADC scaling is controlled by the proximity ADC conversion time (PTIME) which is programmable from
1 to 256 2.73-ms time units. However, depending on the application, scaling the proximity data will equally scale
any accumulated noise. Therefore, in general, it is recommended to leave PTIME at the default value of one
2.73-ms ADC conversion time (0xFF).
In many practical proximity applications, a number of optical system and environmental conditions can produce
an offset in the proximity measurement result. To counter these effects, a proximity offset (POFFSET) is
provided which allows the proximity data to be shifted positive or negative. Additional information on the use
of the proximity offset feature is provided in available TAOS application notes.
Once the first proximity cycle has completed, the proximity valid (PVALID) bit in the Status register will be set
and remain set until the proximity detection function is disabled (PEN).
Te
ch
ni
ca
For additional information on using the proximity detection function behind glass and for optical system design
guidance, please see available TAOS application notes.
Copyright E 2011, TAOS Inc.
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Interrupts
The interrupt feature simplifies and improves system efficiency by eliminating the need to poll the sensor for
light intensity or proximity values outside of a user-defined range. While the interrupt function is always enabled
and it’s status is available in the status register (0x13), the output of the interrupt state can be enabled using
the proximity interrupt enable (PIEN) or ALS interrupt enable (AIEN) fields in the enable register (0x00).
al
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Four 16-bit interrupt threshold registers allow the user to set limits below and above a desired light level and
proximity range. An interrupt can be generated when the ALS CH0 data (C0DATA) falls outside of the desired
light level range, as determined by the values in the ALS interrupt low threshold registers (AILTx) and ALS
interrupt high threshold registers (AIHTx). Likewise, an out-of-range proximity interrupt can be generated when
the proximity data (PDATA) falls below the proximity interrupt low threshold (PILTx) or exceeds the proximity
interrupt high threshold (PIHTx).
lv
It is important to note that the thresholds are evaluated in sequence, first the low threshold, then the high
threshold. As a result, if the low threshold is set above the high threshold, the high threshold is ignored and only
the low threshold is evaluated.
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To further control when an interrupt occurs, the device provides a persistence filter. The persistence filter allows
the user to specify the number of consecutive out-of-range ALS or proximity occurrences before an interrupt
is generated. The persistence filter register (0x0C) allows the user to set the ALS persistence filter (APERS)
and the proximity persistence filter (PPERS) values. See the persistence filter register for details on the
persistence filter values. Once the persistence filter generates an interrupt, it will continue until a special function
interrupt clear command is received (see command register).
Prox
Integration
Prox
ADC
PIHTH(r0x0B), PIHTL(r0x0A)
PPERS(r0x0C, b7:4)
Upper Limit
Prox Persistence
Prox
Data
Lower Limit
PILTH(r09), PILTL(r08)
CH1
AIHTH(r07), AIHTL(r06)
Upper Limit
ALS Persistence
CH0
Data
ca
CH0
ADC
APERS(r0x0C, b3:0)
Lower Limit
AILTH(r05), AILTL(r04)
Figure 13. Programmable Interrupt
Te
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CH0
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LIGHT-TO-DIGITAL CONVERTER
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TAOS131 − DECEMBER 2011
System State Machine Timing
The system state machine shown in Figure 9 provides an overview of the states and state transitions that
provide system control of the device. This section highlights the programmable features, which affect the state
machine cycle time, and provides details to determine system level timing.
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When the proximity detection feature is enabled (PEN), the state machine transitions through the Prox Init, Prox
Accum, Prox Wait, and Prox ADC states. The Prox Init and Prox Wait times are a fixed 2.73 ms, whereas the
Prox Accum time is determined by the number of proximity LED pulses (PPULSE) and the Prox ADC time is
determined by the integration time (PTIME). The formulas to determine the Prox Accum and Prox ADC times
are given in the associated boxes in Figure 12. If an interrupt is generated as a result of the proximity cycle, it
will be asserted at the end of the Prox ADC state and transition to the Sleep state if SAI is enabled.
lv
When the power management feature is enabled (WEN), the state machine will transition in turn to the Wait
state. The wait time is determined by WLONG, which extends normal operation by 12× when asserted, and
WTIME. The formula to determine the wait time is given in the box associated with the Wait state in Figure 14.
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When the ALS feature is enabled (AEN), the state machine will transition through the ALS Init and ALS ADC
states. The ALS Init state takes 2.73 ms, while the ALS ADC time is dependent on the integration time (ATIME).
The formula to determine ALS ADC time is given in the associated box in Figure 14. If an interrupt is generated
as a result of the ALS cycle, it will be asserted at the end of the ALS ADC state and transition to the Sleep state
if SAI is enabled.
Prox
Time: 2.73 ms
Sleep
Prox
Init
!PON
PEN
I2C Start
INT & SAI
PPULSE: 0 ~ 255 pulses
Time: 16.0 μs/pulse
Range: 0 ~ 4.1 ms
Time: 2.73 ms
Prox
Accum
ALS
Idle
INT & SAI
ALS
ADC
!WEN &
!AEN
Prox
Wait
!AEN
!PEN & !WEN
& AEN
!PEN & WEN
& AEN
ca
ALS
Init
ch
Time: 2.73 ms
!WEN &
AEN
Prox
ADC
ni
PTIME: 1 ~ 256 steps
Time: 2.73 ms/step
Range: 2.73 ms ~ 699 ms
ATIME: 1 ~ 256 steps
Time: 2.73 ms/step
Range: 2.73 ms ~ 699 ms
AEN
WEN
Wait
Time:
Range:
WTIME: 1 ~ 256 steps
WLONG = 0
WLONG = 1
2.73 ms/step
32.8 ms/step
2.73 ms ~ 699 ms
32.8 ms ~ 8.39s
Te
Note: PON, PEN, WEN, AEN, and SAI are fields in the Enable register (0x00).
Copyright E 2011, TAOS Inc.
Figure 14. Detailed State Diagram
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Power Management
Power consumption can be managed with the Wait state, because the Wait state typically consumes only 90 μA
of IDD current. An example of the power management feature is given below. With the assumptions provided
in the example, average IDD is estimated to be 182 μA.
Table 1. Power Management
PROGRAMMABLE
PARAMETER
PROGRAMMED VALUE
DURATION
PPULSE
0x04
0.064 ms
Prox Init
2.73 ms
Prox Accum
Prox Accum − LED On
0.029 ms (Note 1)
Prox Accum − LED OFF
0.035 ms (Note 2)
2.73 ms
Prox ADC
ALS Init
ALS ADC
0xFF
WTIME
0xEE
WLONG
0
119 mA
0.200 mA
0.200 mA
2.73 ms
0.200 mA
49 2 ms
49.2
0 090 mA
0.090
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Wait
PTIME
0.200 mA
lv
Prox Wait
TYPICAL
CURRENT
al
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SYSTEM STATE MACHINE
STATE
ATIME
0xEE
2.73 ms
0.200 mA
49.2 ms
0.200 mA
NOTES: 2. Prox Accum − LED On time = 7.3 μs per pulse × 4 pulses = 29.3μs = 0.029 ms
3. Prox Accum − LED Off time = 8.7 μs per pulse × 4 pulses = 34.7μs = 0.035 ms
Average IDD Current = ((0.029 × 119) + (0.035 x 0.200) + (2.73 × 0.200) +
(49.2 × 0.090) + (49.2 × 0.200) + (2.73 × 0.200 × 3)) / 109 182 μA
Keeping with the same programmed values as the example, Table 2 shows how the average IDD current is
affected by the Wait state time, which is determined by WEN, WTIME, and WLONG. Note that the worst-case
current occurs when the Wait state is not enabled.
Table 2. Average IDD Current
0
1
1
1
WLONG
WAIT STATE
AVERAGE IDD CURRENT
n/a
n/a
0 ms
258 μA
0xFF
0
2.73 ms
251 μA
0xEE
0
49.2 ms
182 μA
0x00
0
699 ms
103 μA
0x00
1
8389 ms
91 μA
Te
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1
WTIME
ca
WEN
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I2C Protocol
Interface and control are accomplished through an I2C serial compatible interface (standard or fast mode) to
a set of registers that provide access to device control functions and output data. The devices support the 7-bit
I2C addressing protocol.
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The I2C standard provides for three types of bus transaction: read, write, and a combined protocol (Figure 15).
During a write operation, the first byte written is a command byte followed by data. In a combined protocol, the
first byte written is the command byte followed by reading a series of bytes. If a read command is issued, the
register address from the previous command will be used for data access. Likewise, if the MSB of the command
is not set, the device will write a series of bytes at the address stored in the last valid command with a register
address. The command byte contains either control information or a 5-bit register address. The control
commands can also be used to clear interrupts.
...
Acknowledge (0)
Not Acknowledged (1)
Stop Condition
Read (1)
Start Condition
Repeated Start Condition
Write (0)
Continuation of protocol
Master-to-Slave
Slave-to-Master
1
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A
N
P
R
S
Sr
W
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The I2C bus protocol was developed by Philips (now NXP). For a complete description of the I2C protocol, please
review the NXP I2C design specification at http://www.i2c−bus.org/references/.
7
S
1
Slave Address
W
1
8
A
1
Command Code
8
A
1
Data Byte
A
8
1
1
...
P
I2C Write Protocol
1
7
S
1
Slave Address
R
1
8
A
1
Data
A
Data
1
...
A
P
I2C Read Protocol
1
S
Slave Address
W
1
8
1
1
7
1
1
Command Code
A
Sr
Slave Address
R
A
ca
7
A
8
1
Data
A
8
Data
1
A
1
...
P
I2C Read Protocol — Combined Format
Figure 15. I2C Protocols
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Register Set
The device is controlled and monitored by data registers and a command register accessed through the serial
interface. These registers provide for a variety of control functions and can be read to determine results of the
ADC conversions. The register set is summarized in Table 3.
Table 3. Register Address
ADDRESS
RESISTER NAME
R/W
−−
COMMAND
W
REGISTER FUNCTION
0x00
ENABLE
R/W
Enables states and interrupts
0x01
ATIME
R/W
ALS time
0x02
PTIME
R/W
Proximity time
0x03
WTIME
R/W
Wait time
0x04
AILTL
R/W
ALS interrupt low threshold low byte
0x05
AILTH
R/W
ALS interrupt low threshold high byte
0x06
AIHTL
R/W
ALS interrupt high threshold low byte
0x07
AIHTH
R/W
ALS interrupt high threshold high byte
0x08
PILTL
R/W
Proximity interrupt low threshold low byte
0x00
RESET VALUE
0x00
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Specifies register address
0x00
0xFF
0xFF
0xFF
lv
0x00
0x00
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0x00
0x00
0x09
PILTH
R/W
Proximity interrupt low threshold high byte
0x00
0x0A
PIHTL
R/W
Proximity interrupt high threshold low byte
0x00
PIHTH
R/W
Proximity interrupt high threshold high byte
0x00
PERS
R/W
Interrupt persistence filters
0x00
0x0D
CONFIG
R/W
Configuration
0x00
0x0E
PPULSE
R/W
Proximity pulse count
0x00
0x0F
CONTROL
R/W
Control register
0x00
0x12
ID
R
Device ID
0x13
STATUS
R
Device status
0x00
0x14
C0DATA
R
CH0 ADC low data register
0x00
0x15
C0DATAH
R
CH0 ADC high data register
0x00
0x16
C1DATA
R
CH1 ADC low data register
0x00
0x17
C1DATAH
R
CH1 ADC high data register
0x00
0x18
PDATAL
R
Proximity ADC low data register
0x00
0x19
PDATAH
R
Proximity ADC high data register
0x00
0x1E
POFFSET
R/W
Proximity offset register
0x00
ca
0x0B
0x0C
ID
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The mechanics of accessing a specific register depends on the specific protocol used. See the section on I2C
protocols on the previous pages. In general, the COMMAND register is written first to specify the specific
control/status register for following read/write operations.
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Command Register
The command registers specifies the address of the target register for future write and read operations.
Table 4. Command Register
COMMAND
FIELD
BITS
COMMAND
7
TYPE
6:5
4
3
TYPE
2
1
0
Reset
0x00
ADD
DESCRIPTION
Select Command Register. Must write as 1 when addressing COMMAND register.
Selects type of transaction to follow in subsequent data transfers:
FIELD VALUE
DESCRIPTION
00
Repeated byte protocol transaction
01
Auto-increment protocol transaction
10
Reserved — Do not use
11
Special function — See description below
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COMMAND
5
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6
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7
Transaction type 00 will repeatedly read the same register with each data access.
Transaction type 01 will provide an auto-increment function to read successive register bytes.
ADD
4:0
Address field/special function field. Depending on the transaction type, see above, this field either
specifies a special function command or selects the specific control-status-register for following write and
read transactions. The field values listed below apply only to special function commands:
FIELD VALUE
DESCRIPTION
00000
Normal — no action
00101
Proximity interrupt clear
00110
ALS interrupt clear
00111
Proximity and ALS interrupt clear
other
Reserved — Do not write
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ALS/Proximity Interrupt Clear clears any pending ALS/Proximity interrupt. This special function is self
clearing.
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Enable Register (0x00)
The ENABLE register is used to power the device on/off, enable functions, and interrupts.
Table 5. Enable Register
6
5
4
3
2
1
0
Reserved
SAI
PIEN
Resv
AIEN
WEN
PEN
AEN
PON
Reset
0x00
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ENABLE
7
BITS
DESCRIPTION
Reserved
7
Reserved. Write as 0.
SAI
6
Sleep after interrupt. When asserted, the device will power down at the end of a proximity or ALS cycle if an
interrupt has been generated.
PIEN
5
Proximity interrupt mask. When asserted, permits proximity interrupts to be generated.
AIEN
4
ALS interrupt mask. When asserted, permits ALS interrupts to be generated.
WEN
3
Wait Enable. This bit activates the wait feature. Writing a 1 activates the wait timer. Writing a 0 disables the
wait timer.
PEN
2
Proximity enable. This bit activates the proximity function. Writing a 1 enables proximity. Writing a 0
disables proximity.
AEN
1
PON
0
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FIELD
ALS Enable. This bit actives the two channel ADC. Writing a 1 activates the ALS. Writing a 0 disables
the ALS.
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Power ON. This bit activates the internal oscillator to permit the timers and ADC channels to operate.
Writing a 1 activates the oscillator. Writing a 0 disables the oscillator.
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ALS Time Register (0x01)
The ALS time register controls the internal integration time of the ALS channel ADCs in 2.73 ms increments.
Upon power up, the ALS time register is set to 0xFF.
Table 6. ALS Integration Time Register
7:0
DESCRIPTION
VALUE
INTEG_CYCLES
TIME
0xFF
1
2.73 ms
0xF6
10
27.3 ms
0xDB
37
101 ms
0xC0
64
175 ms
0x00
256
699 ms
MAX COUNT
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BITS
1024
10240
37888
65535
65535
lv
FIELD
ATIME
Proximity Time Register (0x02)
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The proximity time register controls the integration time of the proximity ADC in 2.73 ms increments. Upon power
up, the proximity time register is set to 0xFF. It is recommended that this register be programmed to a value of
0xFF (1 integration cycle).
Table 7. Proximity Integration Time Control Register
FIELD
BITS
PTIME
7:0
DESCRIPTION
VALUE
INTEG_CYCLES
TIME
MAX COUNT
0xFF
1
2.73 ms
1023
Wait Time Register (0x03)
Wait time is set 2.73 ms increments unless the WLONG bit is asserted in which case the wait times are 12×
longer. WTIME is programmed as a 2’s complement number. Upon power up, the wait time register is set to
0xFF.
Table 8. Wait Time Register
WTIME
7:0
DESCRIPTION
REGISTER VALUE
WAIT TIME
TIME (WLONG = 0)
TIME (WLONG = 1)
0xFF
1
2.73 ms
0.033 sec
0xB6
74
202 ms
2.4 sec
0x00
256
699 ms
8.4 sec
ca
BITS
ni
FIELD
Te
ch
NOTE: The Proximity Wait Time Register should be configured before PEN and/or AEN is/are asserted.
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ALS Interrupt Threshold Registers (0x04 − 0x07)
The ALS interrupt threshold registers provides the values to be used as the high and low trigger points for the
comparison function for interrupt generation. If C0DATA crosses below the low threshold specified, or above
the higher threshold, an interrupt is asserted on the interrupt pin.
Table 9. ALS Interrupt Threshold Registers
BITS
0x04
7:0
ALS low threshold lower byte
DESCRIPTION
AILTH
0x05
7:0
ALS low threshold upper byte
AIHTL
0x06
7:0
ALS high threshold lower byte
AIHTH
0x07
7:0
ALS high threshold upper byte
al
id
ADDRESS
AILTL
lv
REGISTER
Proximity Interrupt Threshold Registers (0x08 − 0x0B)
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The proximity interrupt threshold registers provide the values to be used as the high and low trigger points for
the comparison function for interrupt generation. If the value generated by proximity channel crosses below the
lower threshold specified, or above the higher threshold, an interrupt is signaled to the host processor.
Table 10. Proximity Interrupt Threshold Registers
ADDRESS
BITS
PILTL
0x08
7:0
Proximity low threshold lower byte
DESCRIPTION
PILTH
0x09
7:0
Proximity low threshold upper byte
PIHTL
0x0A
7:0
Proximity high threshold lower byte
PIHTH
0x0B
7:0
Proximity high threshold upper byte
Te
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REGISTER
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TSL2772
LIGHT-TO-DIGITAL CONVERTER
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TAOS131 − DECEMBER 2011
Persistence Filter Register (0x0C)
The persistence filter register controls the interrupt capabilities of the device. Configurable filtering is provided
to allow interrupts to be generated after every ADC cycle or if the ADC cycle has produced a result that is outside
of the values specified by threshold register for some specified amount of time. Separate filtering is provided
for proximity and ALS functions. ALS interrupts are generated using C0DATA.
6
PERS
5
4
3
PPERS
BITS
7:4
3:0
0
Reset
0x00
APERS
DESCRIPTION
Proximity interrupt persistence filter. Controls rate of proximity interrupt to the host processor.
FIELD VALUE
MEANING
0000
−−−
0001
1
INTERRUPT PERSISTENCE FUNCTION
Every proximity cycle generates an interrupt
1 proximity value out of range
0010
2
2 consecutive proximity values out of range
...
...
...
1111
15
15 consecutive proximity values out of range
ALS Interrupt persistence filter. Controls rate of ALS interrupt to the host processor.
FIELD VALUE
MEANING
0000
Every
0001
1
1 value outside of threshold range
0010
2
2 consecutive values out of range
INTERRUPT PERSISTENCE FUNCTION
Every ALS cycle generates an interrupt
0011
3
3 consecutive values out of range
0100
5
5 consecutive values out of range
0101
10
10 consecutive values out of range
0110
15
15 consecutive values out of range
0111
20
20 consecutive values out of range
1000
25
25 consecutive values out of range
1001
30
30 consecutive values out of range
1010
35
35 consecutive values out of range
1011
40
40 consecutive values out of range
1100
45
45 consecutive values out of range
1101
50
50 consecutive values out of range
1110
55
55 consecutive values out of range
1111
60
60 consecutive values out of range
Te
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APERS
1
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FIELD
PPERS
2
lv
7
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id
Table 11. Persistence Filter Register
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LIGHT-TO-DIGITAL CONVERTER
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TAOS131 − DECEMBER 2011
Configuration Register (0x0D)
The configuration register sets the proximity LED drive level, wait long time, and ALS gain level.
Table 12. Configuration Register
6
5
CONFIG
4
3
Reserved
2
1
0
AGL
WLONG
PDL
Reset
0x00
al
id
7
FIELD
BITS
Reserved
7:3
DESCRIPTION
AGL
2
ALS gain level. When asserted, the 1× and 8× ALS gain (AGAIN) modes are scaled by 0.16. Otherwise,
AGAIN is scaled by 1. Do not use with AGAIN greater than 8×.
WLONG
1
Wait Long. When asserted, the wait cycles are increased by a factor 12× from that programmed in the
WTIME register.
PDL
0
Proximity drive level. When asserted, the proximity LDR drive current is reduced by 9.
am
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Reserved. Write as 0.
Proximity Pulse Count Register (0x0E)
The proximity pulse count register sets the number of proximity pulses that the LDR pin will generate during the
Prox Accum state.
Table 13. Proximity Pulse Count Register
7
PPULSE
6
5
4
3
2
1
PPULSE
BITS
7:0
Reset
0x00
DESCRIPTION
Proximity Pulse Count. Specifies the number of proximity pulses to be generated.
Te
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ca
FIELD
PPULSE
0
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TSL2772
LIGHT-TO-DIGITAL CONVERTER
with PROXIMITY SENSING
TAOS131 − DECEMBER 2011
Control Register (0x0F)
The Control register provides eight bits of miscellaneous control to the analog block. These bits typically control
functions such as gain settings and/or diode selection.
Table 14. Control Register
6
FIELD
BITS
7:6
3:2
1:0
LED STRENGTH — PDL = 0
LED STRENGTH — PDL = 1
00
120 mA
15 mA
01
60 mA
7.5 mA
10
30 mA
3.8 mA
11
15 mA
1.9 mA
Proximity Diode Selector.
DIODE SELECTION
00
Proximity uses neither diode
01
Proximity uses the CH0 diode
10
Proximity uses the CH1 diode
11
Reserved — Do not write
Proximity Gain.
PROXIMITY GAIN VALUE
00
1× gain
01
2× gain
10
4× gain
11
8× gain
ALS Gain.
FIELD VALUE
ALS GAIN VALUE
00
1× gain
01
8× gain
10
16× gain
ca
120× gain
11
ni
ID Register (0x12)
Reset
0x00
AGAIN
DESCRIPTION
FIELD VALUE
AGAIN
0
PGAIN
FIELD VALUE
PGAIN
1
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5:4
2
Proximity LED Drive Strength.
FIELD VALUE
PDIODE
3
ResvPDIODE
PDRIVE
PDRIVE
4
lv
CONTROL
5
al
id
7
ch
The ID Register provides the value for the part number. The ID register is a read-only register.
Te
7
6
Table 15. ID Register
5
ID
FIELD
BITS
ID
7:0
Copyright E 2011, TAOS Inc.
4
3
2
1
Reset
ID
ID
DESCRIPTION
0x30 = TSL27721 & TSL27725
Part number identification
0x39 = TSL27723 & TSL2777
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TAOS131 − DECEMBER 2011
Status Register (0x13)
The Status Register provides the internal status of the device. This register is read only.
Table 16. Status Register
6
5
4
Reserved
PSAT
PINT
Resv
AINT
3
2
Reserved
1
0
PVALID
AVALID
BIT
7
Reserved. Bit reads as 0.
PSAT
6
Proximity Saturation. Indicates that the proximity measurement saturated.
PINT
5
Proximity Interrupt. Indicates that the device is asserting a proximity interrupt.
ALS Interrupt. Indicates that the device is asserting an ALS interrupt.
4
3:2
PVALID
1
AVALID
0
Reserved. Bits read as 0.
Proximity Valid. Indicates that the proximity channel has completed an integration cycle after PEN has been
asserted.
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AINT
Reserved
DESCRIPTION
lv
FIELD
Reserved
Reset
0x00
al
id
STATUS
7
ALS Valid. Indicates that the ALS channels have completed an integration cycle after AEN has been
asserted.
ADC Channel Data Registers (0x14 − 0x17)
ALS data is stored as two 16-bit values. To ensure the data is read correctly, a two-byte read I2C transaction
should be used with auto increment protocol bits set in the command register. With this operation, when the
lower byte register is read, the upper eight bits are stored in a shadow register, which is read by a subsequent
read to the upper byte. The upper register will read the correct value even if additional ADC integration cycles
end between the reading of the lower and upper registers.
Table 17. ADC Channel Data Registers
ADDRESS
BITS
C0DATA
0x14
7:0
ALS CH0 data low byte
DESCRIPTION
C0DATAH
0x15
7:0
ALS CH0 data high byte
C1DATA
0x16
7:0
ALS CH1 data low byte
C1DATAH
0x17
7:0
ALS CH1 data high byte
ca
REGISTER
Proximity Data Registers (0x18 − 0x19)
Te
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Proximity data is stored as a 16-bit value. To ensure the data is read correctly, a two-byte read I2C transaction
should be utilized with auto increment protocol bits set in the command register. With this operation, when the
lower byte register is read, the upper eight bits are stored into a shadow register, which is read by a subsequent
read to the upper byte. The upper register will read the correct value even if the next ADC cycle ends between
the reading of the lower and upper registers.
Table 18. Proximity Data Registers
REGISTER
ADDRESS
BITS
PDATAL
0x18
7:0
Proximity data low byte
PDATAH
0x19
7:0
Proximity data high byte
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DESCRIPTION
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LIGHT-TO-DIGITAL CONVERTER
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TAOS131 − DECEMBER 2011
Proximity Offset Register (0x1E)
Table 19. Proximity Offset Register
FIELD
5
4
SIGN
3
MAGNITUDE
6:0
0
Reset
0x00
DESCRIPTION
Proximity Offset Sign. The offset sign shifts the proximity data negative when equal to 0 and positive when
equal to 1.
Proximity Offset Magnitude. The offset magnitude shifts the proximity data positive or negative, depending
on the proximity offset sign. The actual amount of the shift depends on the proximity gain (PGAIN), proximity
LED drive strength (PDRIVE), and the number of proximity pulses (PPULSE).
Te
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7
1
MAGNITUDE
BIT
SIGN
2
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POFFSET
6
lv
7
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The 8-bit proximity offset register provides compensation for proximity offsets caused by device variations,
optical crosstalk, and other environmental factors. Proximity offset is a sign-magnitude value where the sign
bit, bit 7, determines if the offset is negative (bit 7 = 0) or positive (bit 7 = 1). At power up, the register is set to
0x00. The magnitude of the offset compensation depends on the proximity gain (PGAIN), proximity LED drive
strength (PDRIVE), and the number of proximity pulses (PPULSE). Because a number of environmental factors
contribute to proximity offset, this register is best suited for use in an adaptive closed-loop control system. See
available TAOS application notes for proximity offset register application information.
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TAOS131 − DECEMBER 2011
APPLICATION INFORMATION: HARDWARE
LED Driver Pin with Proximity Detection
In a proximity sensing system, the IR LED can be pulsed by the TSL2772 with more than 100 mA of rapidly
switching current, therefore, a few design considerations must be kept in mind to get the best performance. The
key goal is to reduce the power supply noise coupled back into the device during the LED pulses.
al
id
The first recommendation is to use two power supplies; one for the device VDD and the other for the IR LED.
In many systems, there is a quiet analog supply and a noisy digital supply. By connecting the quiet supply to
the VDD pin and the noisy supply to the LED, the key goal can be meet. Place a 1-μF low-ESR decoupling
capacitor as close as possible to the VDD pin and another at the LED anode, and a 22-μF capacitor at the output
of the LED voltage regulator to supply the 100-mA current surge.
Voltage
Regulator
VDD
1 mF
RP
RP
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C*
GND
Voltage
Regulator
lv
VBUS
TSL2772
RPI
INT
SCL
LDR
22 mF
1 mF
SDA
IR LED
* Cap Value Per Regulator Manufacturer Recommendation
Figure 16. Proximity Sensing Using Separate Power Supplies
If it is not possible to provide two separate power supplies, the device can be operated from a single supply.
A 22-Ω resistor in series with the VDD supply line and a 1-μF low ESR capacitor effectively filter any power supply
noise. The previous capacitor placement considerations apply.
VBUS
Voltage
Regulator
22 W
VDD
1 mF
22 mF
RP
ca
GND
ch
ni
1 mF
TSL2772
RP
RPI
INT
SCL
LDR
SDA
IR LED
Figure 17. Proximity Sensing Using Single Power Supply
Te
VBUS in the above figures refers to the I2C bus voltage which is either VDD or 1.8 V. Be sure to apply the specified
I2C bus voltage shown in the Available Options table for the specific device being used.
The I2C signals and the Interrupt are open-drain outputs and require pull−up resistors. The pull-up resistor (RP)
value is a function of the I2C bus speed, the I2C bus voltage, and the capacitive load. The TAOS EVM running
at 400 kbps, uses 1.5-kΩ resistors. A 10-kΩ pull-up resistor (RPI) can be used for the interrupt line.
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TSL2772
LIGHT-TO-DIGITAL CONVERTER
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TAOS131 − DECEMBER 2011
APPLICATION INFORMATION: HARDWARE
PCB Pad Layouts
Suggested land pattern based on the IPC−7351B Generic Requirements for Surface Mount Design and Land
Pattern Standard (2010) for the small outline no-lead (SON) package is shown in Figure 18.
1.20
0.35 6
lv
0.65
al
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2.70
1.20
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0.65
TOP VIEW
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
Te
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Figure 18. Suggested FN Package PCB Layout
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LIGHT-TO-DIGITAL CONVERTER
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TAOS131 − DECEMBER 2011
PACKAGE INFORMATION
PACKAGE FN
Dual Flat No-Lead
TOP VIEW
398 10
PIN OUT
TOP VIEW
PIN 1
2000 100
6 SDA
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VDD 1
355
10
SCL 2
5 INT
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2000
100
END VIEW
4 LDR
lv
GND 3
Photodiode Array Area
SIDE VIEW
295
Nominal
650 50
BOTTOM VIEW
CL
650
BSC
of Photodiode Array Area
(Note B)
203 8
300
50
CL of Solder Contacts
1 Nominal
144 Nominal
ni
750 150
Lead Free
All linear dimensions are in micrometers.
The die is centered within the package within a tolerance of ± 75 μm.
Package top surface is molded with an electrically nonconductive clear plastic compound having an index of refraction of 1.55.
Contact finish is copper alloy A194 with pre-plated NiPdAu lead finish.
This package contains no lead (Pb).
This drawing is subject to change without notice.
Te
NOTES: A.
B.
C.
D.
E.
F.
CL of Photodiode Array Area (Note B)
Pb
ch
PIN 1
ca
CL of Solder Contacts
Figure 19. Package FN — Dual Flat No-Lead Packaging Configuration
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TSL2772
LIGHT-TO-DIGITAL CONVERTER
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TAOS131 − DECEMBER 2011
CARRIER TAPE AND REEL INFORMATION
TOP VIEW
2.00 0.05
1.75
1.50
4.00
al
id
4.00
B
+ 0.30
8.00
− 0.10
1.00
0.25
DETAIL A
B
A
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A
lv
3.50 0.05
DETAIL B
5 Max
5 Max
0.254
0.02
2.18 0.05
Ao
2.18 0.05
0.83 0.05
Bo
All linear dimensions are in millimeters. Dimension tolerance is ± 0.10 mm unless otherwise noted.
The dimensions on this drawing are for illustrative purposes only. Dimensions of an actual carrier may vary slightly.
Symbols on drawing Ao, Bo, and Ko are defined in ANSI EIA Standard 481−B 2001.
Each reel is 178 millimeters in diameter and contains 3500 parts.
TAOS packaging tape and reel conform to the requirements of EIA Standard 481−B.
In accordance with EIA standard, device pin 1 is located next to the sprocket holes in the tape.
This drawing is subject to change without notice.
Te
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NOTES: A.
B.
C.
D.
E.
F.
G.
ni
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Ko
Copyright E 2011, TAOS Inc.
Figure 20. Package FN Carrier Tape
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LIGHT-TO-DIGITAL CONVERTER
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TAOS131 − DECEMBER 2011
SOLDERING INFORMATION
The FN package has been tested and has demonstrated an ability to be reflow soldered to a PCB substrate.
Table 20. Solder Reflow Profile
PARAMETER
REFERENCE
DEVICE
Average temperature gradient in preheating
tsoak
2 to 3 minutes
Time above 217°C (T1)
t1
Max 60 sec
Time above 230°C (T2)
t2
Max 50 sec
Time above Tpeak −10°C (T3)
t3
Max 10 sec
Tpeak
260°C
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Peak temperature in reflow
lv
Soak time
2.5°C/sec
Temperature gradient in cooling
Max −5°C/sec
Not to scale — for reference only
T3
T2
t3
t2
tsoak
t1
Figure 21. Solder Reflow Profile Graph
Te
ch
Time (sec)
ni
Temperature (C)
T1
ca
Tpeak
al
id
The solder reflow profile describes the expected maximum heat exposure of components during the solder
reflow process of product on a PCB. Temperature is measured on top of component. The components should
be limited to a maximum of three passes through this solder reflow profile.
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TAOS131 − DECEMBER 2011
STORAGE INFORMATION
Moisture Sensitivity
al
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Optical characteristics of the device can be adversely affected during the soldering process by the release and
vaporization of moisture that has been previously absorbed into the package. To ensure the package contains
the smallest amount of absorbed moisture possible, each device is baked prior to being dry packed for shipping.
Devices are dry packed in a sealed aluminized envelope called a moisture-barrier bag with silica gel to protect
them from ambient moisture during shipping, handling, and storage before use.
Shelf Life
The calculated shelf life of the device in an unopened moisture barrier bag is 12 months from the date code on
the bag when stored under the following conditions:
lv
Shelf Life: 12 months
Ambient Temperature: < 40°C
Relative Humidity: < 90%
Floor Life
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Rebaking of the devices will be required if the devices exceed the 12 month shelf life or the Humidity Indicator
Card shows that the devices were exposed to conditions beyond the allowable moisture region.
The FN package has been assigned a moisture sensitivity level of MSL 3. As a result, the floor life of devices
removed from the moisture barrier bag is 168 hours from the time the bag was opened, provided that the devices
are stored under the following conditions:
Floor Life: 168 hours
Ambient Temperature: < 30°C
Relative Humidity: < 60%
If the floor life or the temperature/humidity conditions have been exceeded, the devices must be rebaked prior
to solder reflow or dry packing.
Rebaking Instructions
Te
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ca
When the shelf life or floor life limits have been exceeded, rebake at 50°C for 12 hours.
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TAOS131 − DECEMBER 2011
PRODUCTION DATA — information in this document is current at publication date. Products conform to
specifications in accordance with the terms of Texas Advanced Optoelectronic Solutions, Inc. standard
warranty. Production processing does not necessarily include testing of all parameters.
LEAD-FREE (Pb-FREE) and GREEN STATEMENT
al
id
Pb-Free (RoHS) TAOS’ terms Lead-Free or Pb-Free mean semiconductor products that are compatible with the current
RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous
materials. Where designed to be soldered at high temperatures, TAOS Pb-Free products are suitable for use in specified
lead-free processes.
Green (RoHS & no Sb/Br) TAOS defines Green to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and
Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material).
am
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Important Information and Disclaimer The information provided in this statement represents TAOS’ knowledge and
belief as of the date that it is provided. TAOS bases its knowledge and belief on information provided by third parties,
and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate
information from third parties. TAOS has taken and continues to take reasonable steps to provide representative
and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and
chemicals. TAOS and TAOS suppliers consider certain information to be proprietary, and thus CAS numbers and other
limited information may not be available for release.
NOTICE
Texas Advanced Optoelectronic Solutions, Inc. (TAOS) reserves the right to make changes to the products contained in this
document to improve performance or for any other purpose, or to discontinue them without notice. Customers are advised
to contact TAOS to obtain the latest product information before placing orders or designing TAOS products into systems.
TAOS assumes no responsibility for the use of any products or circuits described in this document or customer product
design, conveys no license, either expressed or implied, under any patent or other right, and makes no representation that
the circuits are free of patent infringement. TAOS further makes no claim as to the suitability of its products for any particular
purpose, nor does TAOS assume any liability arising out of the use of any product or circuit, and specifically disclaims any
and all liability, including without limitation consequential or incidental damages.
ca
TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS, INC. PRODUCTS ARE NOT DESIGNED OR INTENDED FOR
USE IN CRITICAL APPLICATIONS IN WHICH THE FAILURE OR MALFUNCTION OF THE TAOS PRODUCT MAY
RESULT IN PERSONAL INJURY OR DEATH. USE OF TAOS PRODUCTS IN LIFE SUPPORT SYSTEMS IS EXPRESSLY
UNAUTHORIZED AND ANY SUCH USE BY A CUSTOMER IS COMPLETELY AT THE CUSTOMER’S RISK.
Te
ch
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LUMENOLOGY, TAOS, the TAOS logo, and Texas Advanced Optoelectronic Solutions are registered trademarks of Texas Advanced
Optoelectronic Solutions Incorporated.
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TAOS131 − DECEMBER 2011
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