AS5132
3 6 0 S t e p ( 8 . 5 b i t ) P r o g r a m m a b l e H ig h S p e e d M a g n e t i c R o t a r y E n c o d e r
1 General Description
Two digital absolute outputs (8.5 bit):
- Serial interface
- PWM output
The AS5132 is a contactless magnetic rotary encoder for accurate
angular measurement over a full turn of 360 degrees. It is a systemon-chip, combining integrated Hall elements, analog frontend and
digital signal processing in a single device.
Incremental output with adjustable number of pulses
BLDC Output UVW, selectable for 1,2,3,4,5,6 pole pairs
To measure the angle, only a simple two-pole magnet, rotating over
the center of the chip is required.
Supports external PWM clock mode
The absolute angle measurement provides instant indication of the
magnet’s angular position with a resolution of 8.5 bit = 360 positions
per revolution. This digital data is available as serial output over the
interface and as a pulse width modulated (PWM) signal.
User programmable zero position and sensitivity
Static and dynamic pre-commutation feature
High speed: up to 72,900 rpm
Direct measurement of magnetic field strength allows exact
determination of vertical magnet distance
An additional U,V,W output can be used for a block commutation for
a brushless DC motor. An incremental signal is available as an
option.
Incremental Outputs ABI Quadrature: 90ppr, step direction:
180ppr, fixed pulse width 360ppr
In addition to the angle information, the strength of the magnetic field
is also available as a 5-bit code.
9-bit multi turn counter
Wide magnetic field input range: 20 – 80 mT (typical)
A software programmable (OTP) zero position simplifies assembly
as the zero position. The magnet does not need to be mechanically
aligned.
Wide temperature range: -40ºC to +150ºC
Thin
Small Pb-free package: SSOP 20
Fully automotive qualified to AEC-Q100, grade 0
2 Key Features
3 Applications
360º contactless angular position sensing
The AS5132 is suitable for contactless rotary position sensing, rotary
switches (human machine interface), AC/DC motor position control
and Brushless DC motor position control.
Figure 1. AS5132 Block Diagram
Test(3:0)
VDD5V
COM/INC
Step Mode
AS5132
Commutation
Interface
Pre-Commutation
DIR
VDDP
Tracking ADC &
Angle Decoder
PWM Decoder
Zero
Adder
Angle
Mag
TC
Hall Array &
Frontend
Amplifier
AGC
Absolute
Serial
Interface
(SSI)
Diagnostic
OTP
S
U_A
V_B
W_I
PWM
DIO
CSN
CLK
Diag
PROG
GND
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AS5132
Datasheet - C o n t e n t s
Contents
1 General Description ..................................................................................................................................................................
1
2 Key Features.............................................................................................................................................................................
1
3 Applications...............................................................................................................................................................................
1
4 Pin Assignments .......................................................................................................................................................................
3
4.1 Pin Descriptions....................................................................................................................................................................................
3
5 Absolute Maximum Ratings ......................................................................................................................................................
4
6 Electrical Characteristics...........................................................................................................................................................
5
6.1 Operating Conditions............................................................................................................................................................................
5
6.2 System Parameters ..............................................................................................................................................................................
5
6.3 Magnet Specifications ..........................................................................................................................................................................
5
6.4 Programming Parameters ....................................................................................................................................................................
5
6.5 DC Characteristics of Digital Inputs......................................................................................................................................................
6
6.6 DC Characteristics of Digital Outputs ...................................................................................................................................................
6
6.7 Timing Characteristics ..........................................................................................................................................................................
6
7 Detailed Description..................................................................................................................................................................
7
7.1 Synchronous Serial Interface (SSI) ......................................................................................................................................................
7
7.1.1 Commands of the SSI in Normal Mode ....................................................................................................................................... 9
7.1.2 Extended Synchronous Serial Interface Mode .......................................................................................................................... 10
7.1.3 Programming Verification .......................................................................................................................................................... 13
7.2 Pulse Width Modulation (PWM) Output..............................................................................................................................................
14
7.2.1 PWM External Clock.................................................................................................................................................................. 15
7.3 Incremental Outputs ...........................................................................................................................................................................
7.3.1
7.3.2
7.3.3
7.3.4
7.3.5
7.3.6
7.3.7
7.3.8
7.3.9
Quadrature A/B Output ..............................................................................................................................................................
Step Output Mode......................................................................................................................................................................
Pre-Commutation Function........................................................................................................................................................
Commutation Output UVW ........................................................................................................................................................
Hysteresis of the Incremental Outputs.......................................................................................................................................
Multi Turn Counter .....................................................................................................................................................................
High Speed Operation ...............................................................................................................................................................
Propagation Delay .....................................................................................................................................................................
Error Detection...........................................................................................................................................................................
8 Application Information ...........................................................................................................................................................
21
8.1 Physical Placement of the Magnet .....................................................................................................................................................
9 Package Drawings and Markings ...........................................................................................................................................
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21
23
9.1 Recommended PCB Footprint............................................................................................................................................................
10 Ordering Information.............................................................................................................................................................
16
16
17
17
18
19
20
20
20
20
24
26
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AS5132
Datasheet - P i n A s s i g n m e n t s
4 Pin Assignments
Figure 2. Pin Assignments (Top View)
VDDP
1
20
PWM
S
2
19
Diag
3
18
DIR
4
17
CLK
PROG
5
16
CSN
VSS
6
15
DIO
U_A
7
14
Test3
VDD
8
13
Test2
COM/INC
9
12
Test1
10
11
Test0
TC
AS5132
W_I
V_B
4.1 Pin Descriptions
Table 1. Pin Descriptions
Pin Number
Pin Name
Pin Type
Description
1
VDDP
Supply
2
S
3
W_I
4
V_B
5
PROG
6
VSS
7
U_A
Digital output
8
VDD
Supply
9
COM / INC
Digital input / Schmitt-Trigger
10
TC
Analog input
11
Test0
12
Test1
13
Test2
14
Test3
15
DIO
16
CSN
17
CLK
18
DIR
19
Diag
Digital output / Open Drain
20
PWM
Digital output
1
Supply voltage for the selected pins
Step output (8mA, VDDP)
Digital output
Commutation output or incremental output
Programming voltage input
Supply
Supply ground
Commutation output or incremental output
Positive supply voltage
Selection of the output mode. This pin is also used for external
clock mode (VDDP)
Test pin. Set to low in application
Analog input /output
Test pin, selection of output format for incremental or step mode
Bi-directional digital
Data I/O for serial interface (VDDP)
Chip select input (active low) (VDDP)
Digital input / Schmitt-Trigger
Clock input for serial interface (VDDP)
Input signal for the pre-commutation at start-up (VDDP)
Diagnostic output (open drain)
PWM output (8mA, VDDP)
1. VDDP can be customized to the voltage levels of the peripheral circuitry to economize voltage level drivers.
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AS5132
Datasheet - A b s o l u t e M a x i m u m R a t i n g s
5 Absolute Maximum Ratings
Stresses beyond those listed in Table 2 may cause permanent damage to the device. These are stress ratings only, and functional operation of
the device at these or any other conditions beyond those indicated in Electrical Characteristics on page 5 is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
Table 2. Absolute Maximum Ratings
Parameter
Min
Max
Units
Comments
Electrical Parameters
Supply voltage (VDD)
-0.3
7
V
Except during OTP programming
DC supply voltage (VDDP)
0.3
7
V
Cannot be higher than VDD+0.3
Input Pin Voltage (VIN)
VSS-0.5
VDD
V
Input Current (latch up immunity), (Iscr)
-100
100
mA
Norm: EIA/JESD78 Class II Level A
±2
kV
Norm: JESD22-A114E
150
ºC
Electrostatic Discharge
ESD
Temperature Ranges and Storage Conditions
Storage Temperature (Tstrg)
-55
Body temperature (Tbody)
Humidity non-condensing
Moisture Sensitive Level (MSL)
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5
260
ºC
85
%
3
The reflow peak soldering temperature (body
temperature) specified is in accordance with IPC/
JEDEC J-STD-020 “Moisture/Reflow Sensitivity
Classification for Non-Hermetic Solid State Surface
Mount Devices”.
The lead finish for Pb-free leaded packages is matte tin
(100% Sn).
Represents a maximum floor time of 168h
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AS5132
Datasheet - E l e c t r i c a l C h a r a c t e r i s t i c s
6 Electrical Characteristics
TAMB = -40ºC to 150ºC, VDD = 4.5V to 5.5V, all voltages referenced to VSS, unless otherwise noted.
6.1 Operating Conditions
Symbol
Parameter
VDD
Positive Supply Voltage
VDDP
Positive Supply Voltage Periphery
IDD
Operating Current
Conditions
Min
Max
Units
4.5
5.5
V
3.0
5.5
V
15
22
mA
Typ
Max
Units
No load on outputs. Supply current can
be reduced by using stronger magnets.
Typ
6.2 System Parameters
Symbol
Parameter
Conditions
Min
N
Resolution
TPwrUp
Power Up Time
ts
Tracking rate
INLcm
Accuracy
tdelay
Propagation delay
Internal signal processing time
22
µs
TN
Transition noise
peak-peak
1.41
Deg
Max
Units
80
mT
72,900
rpm
Max
Units
8.5
V
100
mA
0
85
ºC
2
4
µs
8.5
Bit
1
Deg
Step rate of tracking ADC;
1 step = 1º
≤ 4100
µs
5.2
µs/step
Centered Magnet
-2
2
Within horizontal displacement radius
-3
3
Deg
6.3 Magnet Specifications
Symbol
Parameter
Conditions
Min
BZ
Magnetic Input Range
At die surface
20
Vi
Magnet rotation speed
To maintain locked state
Typ
1
1. Maximum rotation speed is dependent on the internal time reference.
Maximum value is calculated with lowest sequence over all operating conditions.
6.4 Programming Parameters
Symbol
Parameter
Conditions
Min
VPROG
Programming voltage
Static voltage at pin PROG
8
IPROG
Programming current
TambPROG
Programming ambient temperature
tPROG
Programming time
VR,prog
VR,unprog
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Analog readback voltage
During programming
During analog readback mode at pin PROG
0.5
2
Revision 1.4
Typ
3.5
V
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AS5132
Datasheet - E l e c t r i c a l C h a r a c t e r i s t i c s
6.5 DC Characteristics of Digital Inputs
CMOS Inputs COM/INC, CSN, CLK, DIO, DIR
Symbol
Parameter
Min
VIH
High level input voltage
VIL
Low level input voltage
ILEAK
Input leakage current
Typ
Max
Units
0.7*VDDP
VDDP
V
0
0.3*VDDP
V
1
µA
Note
COM/INC refer to VDD
6.6 DC Characteristics of Digital Outputs
CMOS Outputs S, U_A, V_B, W_I, PWM, DIO
Symbol
Parameter
VOH
High level output voltage
VOL
Low level output voltage
CL
Capacitive load
Min
Typ
Max
Units
Note
V
PWM and S have 8mA output load,
DIO has 4mA output load.
VDDP-0.5
VDDP
VDD-0.5
VDD
0
VSS+0.4
V
35
pF
U_A, V_B, W_I have 4mA output load.
PWM and S have 8mA output load,
DIO, U_A, V_B, W_I has 4mA output load.
6.7 Timing Characteristics
Symbol
Parameter
Conditions
fCLK
Clock Frequency
Normal operation
fCLKP
Clock Frequency programming
During OTP programming
t1
Chip select to positive edge of CLK
15
ns
t2
Setup time command bit,
Data valid to positive edge of CLK
30
ns
t3
Hold time command bit,
Data valid after positive edge of CLK
30
ns
t4
Float time,
Last command bit to negative edge of CLK
30
ns
t5
Transfer time,
Negative edge to valid data
30
ns
t6
Last CLK to positive edge CSN
30
ns
tCLK
Clock period
167
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Min
Typ
Max
Units
5
6
MHz
650
kHz
200
200
ns
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AS5132
Datasheet - D e t a i l e d D e s c r i p t i o n
7 Detailed Description
Figure 3. Typical Arrangement of AS5132 and Magnet
7.1 Synchronous Serial Interface (SSI)
The absolute angle data can be read out over the synchronous serial interface using the pins CSN, DIO and CLK. It is a bidirectional interface
therefore a read or write access is possible. The organization of the protocol is byte wise and starts with the command byte followed by the data
information.
Figure 4. Read / Write Serial Data Transmission
+5V
VDD
VDD
Micro
Controller
VDDP*
Output
CSN
Output
CLK
I/O
DIO
VDD
AS5132
100nF
VSS
VSS
VSS
* DIO output pin is connected internally to the VDDP voltage domain. VDD and VDDP can be separately connected too.
Figure 4 shows the connection of the AS5132 to a micro controller. Depending on the command byte are different access types possible. In
normal mode the number of clocks is equal the number of data bits.
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AS5132
Datasheet - D e t a i l e d D e s c r i p t i o n
Figure 5. Data Organization of the SSI Protocol 16-Bit Data
R/ W Data
Command Byte
MSB
7
6
5
4
3
2
LSB
MSB
0
15
1
LSB
13
14
12
11
4
10
3
2
1
0
Figure 5 shows the organization of the data. The first section is used to setup the operating mode and the address. During write mode the micro
controller drives the data line and generates in addition the CSN and CLK signal. Figure 6 shows this operation.
Figure 6. SSI Timing in Write Mode
data phase
command phase
CSN
t CLK
t6
1
CLK
2
3
CMD 6
CMD 5
9
8
7
10
11
24
23
t1
t2
t3
DIO
CMD 7
CMD 0
D15
D14
D13
D1
D0
Figure 7. SSI Timing in Read Mode
data phase
command phase
CSN
t CLK
CLK
t6
1
2
3
7
9
8
t1
24
23
t5
t3
CMD 7
11
t4
t2
DIO
10
CMD 6
CMD 5
CMD 0
Z
D15
D14
D13
D1
D0
Figure 7 shows the read mode. The first 8 command data bits are written by the microcontroller. After the command data the device takes over
the DIO line and writes the data information. A high impedance phase must be considered before the device drives the output line.
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AS5132
Datasheet - D e t a i l e d D e s c r i p t i o n
7.1.1
Commands of the SSI in Normal Mode
Table 3. Read/Write Interface Commands in Normal Mode
Access MSB
Mode
15
Command
Name
Command
Data
WRITE
CONFIG
0001_0111
write
SET MT
COUNTER
0001_0100
write
EN PROG
1000_0100
write
RD MT
COUNTER
0000_0100
read
MT - COUNTER <8:0>
EZ
ERR
RD_ANGLE
0000_0000
read
ANGLE <8:0>
LOCK
ADC
14
13
12 11
GEN Hyst
RST Dis
10
9
8
7
PRE_COM_DYN<5:0>
6
5
4
3
2
1
LSB
0
1
0
0
0
0
MTC2 MTC1
MT - COUNTER <8:0>
0
1
1
0
0
1
0
1
0
1
1
P
AGC <5:1>
P
Note: Gray bits can be ignored by the user.
GEN RST: A HI generates a reset of the AS5132. GEN RST must be set to LO after reset.
Hyst_Dis: Hysteresis disable.
PRE_COM_DYN <5:0>: Absolute dynamic pre-commutation value. Depending on the setup of the pole pairs, a mechanical angle offset can be
adjusted. The range is 0 to 63 mechanical degrees (LSBs).
MT-COUNTER <8:0>: The multiturn counter can be set or read over the interface.
EN PROG: This command with this data enables the access to the OTP register in extended mode. OTP Programming mode is only possible in
extended mode with special connection (see Figure 11).
EZ ERR: Indicates a wrong operation of the OTP memory after programming at room temperature.
ANGLE <8:0>: Absolute angle information with angular true resolution (360 steps).
LOCK ADC: Indicates a locked ADC. An angle value is only valid in case of a locked ADC. During sleep mode is the LOCK ADC bit LO.
AGC <5:1>: Automatic gain control value indicates the magnetic field strength.
P: Parity information of the 15 data bits. Odd parity.
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AS5132
Datasheet - D e t a i l e d D e s c r i p t i o n
7.1.2
Extended Synchronous Serial Interface Mode
The absolute angle data can be read out over the synchronous serial interface using the pins CSN, DIO and CLK. It is a bidirectional interface
therefore a read or write access is possible. The organization of the protocol is byte wise and starts with the command byte followed by the data
information.
Figure 8. Connectivity During Programming in Extended Mode
+ 5V
VDD
VDD
VDD
VDDP*
Micro
Controller
Output
CSN
Output
CLK
I/ O
DIO
8. 0 – 8.5V
AS5132
PROG
10 µF 100 n
VSS
100nF
VSS
VSS
*DIO output pin is connected internally to the VDDP voltage domain. VDD and VDDP can be separately connected too.
Figure 9. SSI Timing in Extended Write Mode
extended data phase
command phase
CSN
t6
tCLK
DCLK
1
2
3
t1
7
8
9
10
11
12
13
67
68
69
70
71
72
t2
t3
DIO
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CMD7 CMD6 CMD5
CMD0
D63
Revision 1.4
D62
D1
D0
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AS5132
Datasheet - D e t a i l e d D e s c r i p t i o n
Figure 10. Timing in Extended Read Mode
extended data phase
command phase
CSN
t6
tCLK
DCLK
1
t1
2
3
t2
t4
t3
CMD7 CMD6 CMD5
DIO
9
8
7
10
11
12
13
67
68
69
70
71
72
t5
CMD0 Z
D63
D62
D1
D0
In extended mode the digital interface requires four clocks per data bit. During this time the device is able to handle internal signals for special
access.
Table 4. Read / Write Interface Commands in Extended Mode
Command Command
Name
Data
Access
Mode
MSB
63
...
17
16
15
14
13
12
11
10
9
8
...
LSB
0
WRITE
OTP
0001_1111 ext. write
TST<46:0>
SENSITIVITY ext. CLK EN PRE_COM_STAT
<1:0>
<1:0>
UVW
<2:0>
ZERO ANGLE
<8:0>
PROG
OTP
0001_1001 ext. write
TST<46:0>
SENSITIVITY ext. CLK EN PRE_COM_STAT
<1:0>
<1:0>
UVW
<2:0>
ZERO ANGLE
<8:0>
READ
OTP
0000_1111 ext. write
TST<46:0>
SENSITIVITY ext. CLK EN PRE_COM_STAT
<1:0>
<1:0>
UVW
<2:0>
ZERO ANGLE
<8:0>
READ
ANA
0000_1001 ext. read
TST<46:0>
SENSITIVITY ext. CLK EN PRE_COM_STAT
<1:0>
<1:0>
UVW
<2:0>
ZERO ANGLE
<8:0>
Note: TST is pre-programed by ams and used for test purpose.
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AS5132
Datasheet - D e t a i l e d D e s c r i p t i o n
Programming Parameters.
ZERO ANGLE <8:0>: Zero position value. This value is permanent added to the internal absolute position. Use range 0 to 359.
UVW <2:0>: Setup of the number of pole pairs. In the step mode configuration, the bit UVW<2> is used to invert the step mode output signal.
Configuration of the Number of Pole Pairs
UVW <2:0>
Number of Pole Pairs
0
0
0
1
0
0
1
2
0
1
0
3
0
1
1
4
1
0
0
5
1
0
1
6
1
1
0
6
1
1
1
6
Setup of the Sensitivity
SENSITIVITY <1:0>
Sensitivity Setting
Min
Typ
Max
0
0
1.6
1.65
1.75
0
1
1.79
1.88
1.98
1
0
2.01
2.11
2.22
1
1
2.23
2.35
2.47
Setup Parameters for the Static Pre-Commutation
PRE_COM_STAT <1:0>
Static Pre-commutation Value in
Mechanical Degrees
0
0
0
0
1
2
1
0
4
1
1
8
Ext. CLK EN: Enables the external CLK mode for the PWM output. The external CLK mode is only possible in commutation mode. The state of
the pin COM/INC is not considered in this case for mode selection.
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AS5132
Datasheet - D e t a i l e d D e s c r i p t i o n
Figure 11. OTP Programming Connection
Special Case
Standard Case
Maximum
parasitic cable
inductance
VSUPPLY
L<50nH
Vzapp
C1
100nF
VSUPPLY
L<50nH
VDD
Vprog
C2
Vzapp
PROG
GND
C1
VDD
Vprog
C2
PROG
GND
PROM Cell
10µF
100nF
PROM Cell
10µF
Remove for normal operation
Note: The maximum capacitive load at PROG in normal operation should be less than 20pF. However, during programming the capacitors
C1+C2 are needed to buffer the programming voltage during current spikes, but they must be removed for normal operation. To
overcome this contradiction, the recommendation is to add a diode (4148 or similar) between PROG and VDD as shown in Figure 11
(special case setup), if the capacitors can not be removed at final assembly.
Due to D1, the capacitors C1+C2 are loaded with VDD-0.7V at startup, hence not influencing the readout of the internal OTP registers.
During programming the OTP, the diode ensures that no current is flowing from PROG (8V to 8.5V) to VDD (5V).
In the standard case (see Figure 11), the verification of a correct OTP readout must be done by analog readback. The special case
setup provides the analog readback of the OTP as well.
As long as the PROG pin is accessible it is recommended to use standard setup. In case the PROG pin is not accessible at final
assembly, the special setup is recommended.
7.1.3
Programming Verification
After programming, the programmed OTP bits must be verified using the following methods:
Digital Read Out (Mandatory): After sending a READ OTP command, the readback information must be the same as programmed
information. Otherwise, it indicates that the programming was not performed correctly.
Note: Either “Digital Verification” or “Analog Verification” must be carried out in addition to the “Digital Read Out”.
Digital Verification: Checking the EZ ERR bit (0 = OK, 1 = error)
i) At room temperature
ii) Right after the programming
Analog Verification: By switching into Extended Mode and sending a READ ANA command, the pin PROG becomes an output sending an
analog voltage with each clock representing a sequence of the bits in the OTP register (starting with D61). A voltage of <500mV indicates a
correctly programmed bit (“1”) while a voltage level between 2V and 3.5V indicates a correctly unprogrammed bit (“0”). Any voltage level in
between indicates incorrect programming.
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AS5132
Datasheet - D e t a i l e d D e s c r i p t i o n
Figure 12. Analog OTP Verification
+5V
VDD
VDDP
Output
CSN
Output
CLK
I/O
DIO
*
VDD
AS5132
Micro Controller
VDD
100nF
PROG
VSS
VSS
V
VSS
7.2 Pulse Width Modulation (PWM) Output
The AS5132 provides a pulse width modulated output (PWM), whose duty cycle is proportional to the absolute angle position. Figure 15 shows
the output format. In case of an internal error the high pulse contains 12 steps. An error can be easily identified by the external microcontroller.
The zero degree angle position is build with 16 steps (12 + 4) high and 359 steps low followed by 8 exit steps.
Figure 13. PWM Output
+5V
VDD
VDD
VDDP
VDD
AS5132
Micro Controller
Input
*
100nF
PWM
VSS
VSS
VSS
* PWM output pin is connected internally to the VDDP voltage domain. VDD and VDDP can be separately connected.
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AS5132
Datasheet - D e t a i l e d D e s c r i p t i o n
7.2.1
PWM External Clock
The PWM period depends on the setting of the OTP bit Ext. CLK EN. By default the internal clock source is used as a reference. An external
clock can be connected to the pin COM/INC.
In case Ext. CLK EN is set, the output-mode which is determined by the states of {COM/INC, Test3, Test2, Test1, Test0} (see Table 6) during
start-up is overwritten and U,V,W commutation mode signals are activated.
After internal power on reset (POR_en), the OTP is read out. When the Ext. CLK EN is programmed successfully, the COM/INC pin is used as
external clock for the PWM block. After 4 clock cycles of Ext. CLK EN, the reset of TADC (TADC_rst) and the PWM block is released.
Figure 14. Start-up Procedure
POR_en
system_state
OTP_readout
RUN
Ext. CLK EN
TADC_rst
258*Tclk_sys
4*Tclk_sys
The reset for the PWM block is synchronized to the external PWM clock. This ensures a save reset also in case the external clock on COM/INC
is already running during start-up.
Figure 15. PWM Output Signal
T-high
T-low
Init (Error)
Angle Position
359 clocks
Zero degree
16 clocks
exit
8 clocks
Table 5. PWM Timing with Internal and External CLK Source
Symbol
Parameter
Min
Typ
Max
Unit
Note
TPWMint
PWM Period internal
600
750
900
µs
Internal clock source
TPWMext
PWM Period external
µs
External clock provided over
COM / INC pin
CLKPWM
Clock external mode
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383 / CLKPWM
0
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Datasheet - D e t a i l e d D e s c r i p t i o n
7.3 Incremental Outputs
Two different incremental output modes are possible. Quadrature A/B mode and selectable Step Mode can be selected by the pins TEST0,
TEST1, TEST2, TEST3 and COM / INC.
Table 6. Configuration of the Incremental Output Modes
COM / INC
1
TEST3
0
1
0
1
0
1
0
1
0
0
0
TEST2
0
0
0
0
1
0
TEST1
0
0
1
1
0
0
TEST0
Output Mode
Pin Assignment
Quadrature A/B/I Mode 90 pulses per channel
A → U_A
B → V_B
I → W_I
‘0’ → S
Stepmode 24 pulses and Index width 2
‘0’ → U_A
‘0’ → V_B
‘0’ → W_I
S_24_2 → S
Stepmode 60 pulses and Index width 2
‘0’ → U_A
‘0’ → V_B
‘0’ → W_I
S_60_2 → S
Stepmode 90 pulses and Index width 2
‘0’ → U_A
‘0’ → V_B
‘0’ → W_I
S_90_2 → S
0
Stepmode 180 pulses and Index width 2
‘0’ → U_A
‘0’ → V_B
‘0’ → W_I
S_180_2 → S
0
U,V,W Commutation Mode
(OTP setting)
U → U_A
V → V_B
W → W_I
‘0’ → S
0
1
0
1
Note: The pin setting COM / INC has priority. In case of a low state the device is exclusively in the commutation mode. Not specified states of
TEST3, TEST2, TEST1 and TEST0 in incremental mode will enable the quadrature A/B/I mode. This configuration is only read once at
startup. It is not recommended to change the state during operation.
7.3.1
Quadrature A/B Output
Absolute position
356
357
358
359
0
1
2
3
Figure 16. Incremental Output of the AS5132
A
B
I
Figure 16 shows the two-channel quadrature output. The index position is mapped to the absolute mechanical zero position. The phase shift
between channel A and B indicates the direction of the magnet movement. Channel A leads channel B at a clockwise rotation of the magnet (top
view) by 90 electrical degrees. Channel B leads channel A at a counter-clockwise rotation.
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AS5132
Datasheet - D e t a i l e d D e s c r i p t i o n
7.3.2
Step Output Mode
Step Output mode provides a specific combination of the A incremental signal and the index signal I. The number of pulse can be configured with
the input pattern of the test input pins.
356
357
358
359
0
1
2
3
Figure 17. Step Mode of the AS5132 with Different Number of Pulses
Absolute position
S_180_2
175 176 177 178 179 180
STEP
2
1
2
3
S_90_2
87
STEP
88
89
90
1
S_60_2
STEP
58
6
1
2
2
3
4
5
6
7
59
60
1
1
2
2
3
4
5
352
353
354
355
356
357
358
359
0
1
2
3
4
5
6
7
8
9
10
11
Absolute position
S_24_2
7.3.3
5
356
357
358
359
0
1
2
3
Absolute position
STEP
4
356
357
358
359
0
1
2
3
Absolute position
1
24
1
1
2
2
3
Pre-Commutation Function
This feature can be used to optimize the torque characteristic at a certain speed of the BLDC motor. The output signals U, V and W can be
shifted by a specific number of degrees back and forward. The AS5132 distinguish between the static and dynamic pre commutation value. The
static value is similar to an additional zero programming and can be programmed only once. The dynamic value is stored in the interface register
and can be changed during operation.
The pin DIR defines if the value of pre-commutation is added or subtracted. The dynamic commutation register will be set to zero after a rotation
change indicated by the external pin DIR. Due to internal synchronization, the outputs U,V,W will change 3 internal clock cycles after the change
of DIR input signal.
Table 7. Definition of the Pre-Commutation Direction
DIR
Rotation
Consequence
0
Clock wise
PRE_COM values added to absolute angle
1
Counter clock wise
PRE_COM values subtracted from absolute angle
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AS5132
Datasheet - D e t a i l e d D e s c r i p t i o n
Figure 18. Block Diagram of the Pre-Commutation Function
DIR
Tracking ADC
ANGLE<8:0>
Zero Angle
Adder
OTP value
PRE_COM_STAT<2:0>
OTP value
zero_ang<8:0>
PC Adder stat.
PC Adder dyn.
Dir
Dir
+/-
+/-
UVW ENC
U, V, W
SSI value
PRE_COM_DYN<6:0>
SSI Read Angle
PWM
PWM ENC
A, B, Index
ABI ENC
Note: The dynamic pre-commutation is set to zero always if the direction is changed over the pin DIR. A new value PRE_COM_DYN must be
written again. The static pre-commutation is always enabled and will shift the output.
7.3.4
Commutation Output UVW
The pre-commutation function is used only at the U,V,W output. Figure 19 shows the transition on the outputs U,V,W in case of a two pole pair
configuration. The static pre-commutation value was set to 12 degrees.
Figure 19. UVW Output Transitions with Pre-Commutation
Counter Clockwise rotation
12° static pre-commutation
90° mech. 78° mech.
180° electr. 180° electr.
60° mech.
120° electr.
48° mech.
120° electr.
-12°
198° mech.
60° electr.
210° mech.
60° electr.
120° electr.
258° mech.270° mech.
180° electr.180° electr.
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150° mech.
300° electr.
162° mech.
300° electr.
0° mech.
0° electr.
-12° mech.
0° electr.
330° mech.
300° electr.
318° mech.
300° electr.
300° mech.
240° electr.
288° mech.
240° electr.
180° mech.
0° electr.
72° mech.
120° electr.
60° mech.
120° electr.
42° mech.
60° electr.
30° mech.
60° electr.
12° mech.
0° electr.
+12°
0° mech.
0° electr.
192° mech.
0° electr.
210° mech.
60° electr.
222° mech.
60° electr.
240° mech.
120° electr.
252° mech.
120° electr.
Revision 1.4
rotation
180° mech.
0° electr.
90° mech.
102° mech.
180° electr.
180° electr.
240° electr.
30° mech.
60° electr.
18° mech.
60° electr.
168° mech.
0° electr.
228° mech.
120° electr.
240° mech.
120° mech.
240° electr.
132° mech.
rotation
108° mech.
240° electr.
120° mech.
240° electr.
138° mech.
300° electr.
150° mech.
300° electr.
Clockwise rotation
12° static pre-commutation
342° mech.
300° electr.
330° mech.
300° electr.
312° mech.
240° electr.
300° mech.
282° mech. 240° electr.
270° mech.
180° electr.
180° electr.
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AS5132
Datasheet - D e t a i l e d D e s c r i p t i o n
Figure 20. Dynamic and Static Pre-Commutation
2 pole pairs, Counter Clockwise rotation
Static pre-commutation 0x00...0x06
Dynamic pre-commutation 0x00 … 0x3F
U
V
W
0
60
120
180
240
300
0
60
120
180
0
30
60
90
120
150
180
210
240
270
electrical angle
mechanical angle
2 pole pairs, Clockwise rotation
Static pre-commutation 0x00… 0x06
Dynamic pre-commutation 0x00 … 0x3F
U
V
W
7.3.5
0
60
120
180
240
300
0
60
120
180
0
30
60
90
120
150
180
210
240
270
electrical angle
mechanical angle
Hysteresis of the Incremental Outputs
A hysteresis is implemented to get a stable output value at the SSI command and to reduce jitter at the PWM and UVW outputs. At start up the
hysteresis counter is at 0, the range is ±1 LSB. The hysteresis can be deactivated by setting OTP bit Hyst_dis.
Figure 21. Hysteresis of the Outputs
Hysteresis counter startup value
Effect of Hysteresis
aN
-1
5
0
1
4
Angle Output
Counter Range: 3 LSB
3
2
CW rotation
1
CCW rotation
0
0
1
2
3
4
5
6
aN
Magnet Position
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AS5132
Datasheet - D e t a i l e d D e s c r i p t i o n
7.3.6
Multi Turn Counter
A 9-bit register is used for counting the magnet’s revolutions. With each zero transition in any direction, the output of a special counter is
incremented or decremented. The initial value after reset is 0 LSB. Clockwise rotation gives increasing angle values and positive turn count.
Counter clockwise rotation exhibits decreasing angle values and a negative turn count respectively.
The counter output can be reset by using command 20 – SET MT Counter. It is immediately reset by the rising clock edge of this bit. Any zero
crossing between the clock edge and the next counter readout changes the counter value.
7.3.7
High Speed Operation
The AS5132 is using a fast tracking ADC (TADC) to determine the angle of the magnet. The TADC is tracking the angle of the magnet with cycle
time of 2μs (typ. 1.4). Once the TADC is synchronized with the angle, it sets the LOCK bit in the status register. Once it is locked, it requires only
one cycle [2μs (typ. 1.4)] to track the moving magnet. The AS5132 can operate in locked mode at rotational speeds up to max.72,900 rpm.
7.3.8
Propagation Delay
The propagation delay is the time required from reading the magnetic field by the Hall sensors to calculating the angle and making it available on
the serial or PWM interface. While the propagation delay is usually negligible on low speeds, it is an important parameter at high speeds. The
longer the propagation delay, the larger becomes the angle error for a rotating magnet as the magnet is moving while the angle is calculated. The
position error increases linearly with speed.
7.3.9
Error Detection
The following errors are detected by the system:
Lock bit the TADC has not yet found a valid angular position
AGC alarm the AGC value is 63, magnetic field is too weak
By default, Lock bit error should activate the error condition at the outputs. The AGC alarm is permanently available at the DIAG pin.
Error condition at commutation and incremental outputs:
U, V and W outputs all ‘0’
A, B and I outputs all ‘1’
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AS5132
Datasheet - A p p l i c a t i o n I n f o r m a t i o n
8 Application Information
The benefits of AS5132 are as follows:
Complete system-on-chip, no angle calibration required
Flexible system solution provides absolute serial, PWM and incremental output formats
Ideal for applications in harsh environments due to magnetic sensing principle
High reliability due to non-contact sensing
Robust system, tolerant to horizontal misalignment, airgap variations, temperature variations and external magnetic fields
External clock mode for PWM output
8.1 Physical Placement of the Magnet
The best linearity can be achieved by placing the center of the magnet exactly over the defined center of the IC package as shown in Figure 22.
Figure 22. Defined IC Center and Magnet Displacement Radius
Y
Z
X
PIN 1 Identification
4.1 ± 0. 235
The centre of the Hall sensor array is shifted by a constant value in x axis indicated by the blue circle. In the application it is important to refer to
this point.
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AS5132
Datasheet - A p p l i c a t i o n I n f o r m a t i o n
Figure 23. Vertical Cross Section of SSOP-20
Notes:
1. All dimensions in mm.
2. Die is slightly off centered.
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AS5132
Datasheet - P a c k a g e D r a w i n g s a n d M a r k i n g s
9 Package Drawings and Markings
The device is available in a 20-Lead Shrink Small Outline package.
Figure 24. Package Drawings and Dimensions
AS5132 @
YYWWMZZ
Symbol
A
A1
A2
b
c
D
E
E1
e
L
L1
L2
R
Θ
N
Min
1.73
0.05
1.68
0.22
0.09
6.90
7.40
5.00
0.55
0.09
0º
Nom
1.86
0.13
1.73
0.30
0.17
7.20
7.80
5.30
0.65 BSC
0.75
1.25 REF
0.25 BSC
4º
20
Max
1.99
0.21
1.78
0.38
0.25
7.50
8.20
5.60
0.95
8º
Notes:
1. Dimensions and tolerancing conform to ASME Y14.5M-1994.
2. All dimensions are in millimeters. Angles are in degrees.
Marking: @YYWWMZZ.
@
YY
Sublot identifier Last two digits of the manufacturing year
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WW
M
ZZ
Manufacturing week
Plant identifier
Assembly traceability code
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AS5132
Datasheet - P a c k a g e D r a w i n g s a n d M a r k i n g s
9.1 Recommended PCB Footprint
Figure 25. PCB Footprint
Recommended Footprint Data
Symbol
mm
inch
A
9.02
0.355
B
6.16
0.242
C
0.46
0.018
D
0.65
0.025
E
6.31
0.248
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AS5132
Datasheet - R e v i s i o n H i s t o r y
Revision History
Revision
Date
Owner
Description
0.11
Initial draft
0.18
16 Dec, 2010
Updates across datasheet according to 0.18 specification document.
0.19
17 Dec, 2010
Updated System Parameters, Ext. CLK EN under Programming Parameters,
Pre-Commutation Function.
0.20
22 Mar, 2011
Added OTP Programming Connection, Programming Verification, Analog
OTP Verification. Updated Package Drawings and Markings and Ordering
Information.
0.21
06 Apr, 2011
0.22
07 Apr, 2011
Added PWM External Clock, updated Ordering Information.
27 Jul, 2011
Updated Absolute Maximum Ratings.
04 Aug, 2011
Updated Key Features, DC Characteristics of Digital Inputs, Package
Drawings and Markings.
0.24
25 Nov, 2011
Updated Vertical Cross Section of SSOP-20 (page 22) and Marking info.
Added Figure 9, Figure 10.
1.0
30 Mar, 2012
1.1
06 Sep, 2012
1.2
26 Mar, 2013
1.3
12 Apr, 2013
Package Marking change, added note in Section 6.6 for VOL and
VDDP pin added in Figure 8 and Figure 12.
1.4
28 Jun, 2013
Clarification of the Revision History (page 25) in versions 1.2 & 1.3.
0.23
mub
ekno
Updated Programming Verification.
Datasheet release
Text corrections; updated Table 4
VDDP pin added in Figure 4 and Figure 13, IDD max corrected in Section 6.1,
addded Load condition VOL/VOH in Section 6.6 and sentences corrected
from 8 steps to 16 steps in Section 7.2.
mub
Note: Typos may not be explicitly mentioned under revision history.
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AS5132
Datasheet - O r d e r i n g I n f o r m a t i o n
10 Ordering Information
The devices are available as the standard products shown in Table 8.
Table 8. Ordering Information
Ordering Code
Description
Delivery Form
Package
AS5132-HSST
360 Step Programmable High Speed Magnetic Rotary Encoder
Tape & Reel
20-pin SSOP
AS5132-HSSM
360 Step Programmable High Speed Magnetic Rotary Encoder
Tape & Reel
20-pin SSOP
Note: All products are RoHS compliant and ams green.
Buy our products or get free samples online at www.ams.com/ICdirect
Technical Support is available at www.ams.com/Technical-Support
For further information and requests, email us at [email protected]
(or) find your local distributor at www.ams.com/distributor
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AS5132
Datasheet - C o p y r i g h t s
Copyrights
Copyright © 1997-2013, ams AG, Tobelbaderstrasse 30, 8141 Unterpremstaetten, Austria-Europe. Trademarks Registered ®. All rights
reserved. The material herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the
copyright owner.
All products and companies mentioned are trademarks or registered trademarks of their respective companies.
Disclaimer
Devices sold by ams AG are covered by the warranty and patent indemnification provisions appearing in its Term of Sale. ams AG makes no
warranty, express, statutory, implied, or by description regarding the information set forth herein or regarding the freedom of the described
devices from patent infringement. ams AG reserves the right to change specifications and prices at any time and without notice. Therefore, prior
to designing this product into a system, it is necessary to check with ams AG for current information. This product is intended for use in normal
commercial applications. Applications requiring extended temperature range, unusual environmental requirements, or high reliability
applications, such as military, medical life-support or life-sustaining equipment are specifically not recommended without additional processing
by ams AG for each application. For shipments of less than 100 parts the manufacturing flow might show deviations from the standard
production flow, such as test flow or test location.
The information furnished here by ams AG is believed to be correct and accurate. However, ams AG shall not be liable to recipient or any third
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services.
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ams AG
Tobelbaderstrasse 30
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Tel
Fax
: +43 (0) 3136 500 0
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