M81019FP Powerex, Inc., 200 E. Hillis Street, Youngwood, Pennsylvania 15697-1800 (724) 925-7272 HVIC High Voltage Half-Bridge Driver 1200 Volts/±1 Ampere �� �� ��������������������� � ��� ������ � � � � � � � �� ���������� ���������� � ���������� � � � � ���������� � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � � �� �� �� �� �� �� �� �� �� ��� ��� ��� ��� ��� ��� ��� ��� ��� ��� ��� ��� ��� ��� ��� ��� ��� ��� ������ ������� ������� ��� ��� ��� ��� ��� ��� ��� ������ ������ ����� ��� �� ��� ��� ������ ��� ��� ��� � �� �� ��� �� ����� ������ �������� ����� ����� � ����� ��� � � ���� � � � ����� � � � ������ � ������ ��� � �� ��� ���� ��� �� ������ ���� ������ ��� ������ ��� �� �� ������������ ��� ��� �� ������ �� ������ ��� � ���� � ������ �� � ���� �� ����� �������� ����� ����� ����� ��� �� ���� ��� �������������� ��� � � ����� � ������ �� ��� ��� ������ �� �� Description: M81019FP is a high voltage Power MOSFET and IGBT driver for half-bridge applications. Features: £ Shoot Through Interlock £ Output Current ±1 Ampere £ Half-Bridge Driver £ 24-Lead SSOP Package £ Internal Dead Time - Fixed Applications: £ HID Ballast £ PDP £ MOSFET Driver £ IGBT Driver £ Inverter Module Control ��� Outline Drawing and Circuit Diagram Dimensions Inches Millimeters A 0.31±0.01 7.8±0.3 B 0.40±0.004 10.1±0.1 C 0.21±0.004 5.3±0.1 D 0.08 Max. 2.1 Max. E 0.03 0.8 F 0.01+0.004/0.002 0.35+0.1/-0.05 G 0.004 0.1 H 0.07 1.8 J 0.008 Max. 0.2 Max. 8/05 Dimensions Inches Millimeters K 0.05 1.25 L 0.02±0.008 0.6±0.2 M 0.008+0.002/-0.008 0.2+0.05/-0.2 N 8° Max. 8° Max. P 0.03 Max. 0.8 Max. Q 0.026 0.65 R 0.051 Min. 1.27 Min. S 0.30 7.62 T 0.02 0.5 Ordering Information: M81019FP is a ±1 Ampere, 1200 Volt HVIC, High Voltage Half-Bridge Driver 1 Powerex, Inc., 200 E. Hillis Street, Youngwood, Pennsylvania 15697-1800 (724) 925-7272 M81019FP HVIC, High Voltage Half-Bridge Driver 1200 Volts/±1 Ampere Absolute Maximum Ratings, Ta = 25°C unless otherwise specified Characteristics High Side Floating Supply Absolute Voltage High Side Floating Supply Offset Voltage Symbol M81019FP Units VB -0.5 ~ 1224 Volts VS VB-24 ~ VB+0.5 Volts High Side Floating Supply Voltage (VBS = VB – VS) VBS -0.5 ~ 24 Volts High Side Output Voltage VHO VS-0.5 ~ VB+0.5 Volts Low Side Fixed Supply Voltage VCC -0.5 ~ 24 Volts Power Ground VNO VCC-24 ~ VCC+0.5 Volts Low Side Output Voltage VLO VNO-0.5 ~ VCC+0.5 Volts Logic Input Voltage (HIN, LIN, FO_RST) VIN -0.5 ~ VCC+0.5 Volts FO Input/Output Voltage VFO -0.5 ~ VCC+0.5 Volts CIN Input Voltage VCIN -0.5 ~ VCC+0.5 Volts dVs/dt ±50 V/ns Package Power Dissipation (Ta = 25°C, On Board) Pd ~1.6 Watts Linear Derating Factor (Ta > 25°C, On Board) Kθ ~16 mW/°C Rth(j-c) ~60 °C/W Tj -20 ~ 150 °C Allowable Offset Voltage Slew Rate Junction to Case Thermal Resistance Junction Temperature Operation Temperature Topr -20 ~ 125 °C Storage Temperature Tstg -40 ~ 150 °C Recommended Operating Conditions All voltage parameters are absolute voltages referenced to GND unless otherwise specified. Characteristics Symbol Test Conditions Min. Typ. Max. Units High Side Floating Supply Absolute Voltage VB VS+13.5 VS+15 VS+20 Volts High Side Floating Supply Offset Voltage VS VBS > 10V -5* — 900** Volts High Side Floating Supply Voltage VBS VB = VB – VS 13.5 15 20 Volts High Side Output Voltage VHO VS — VS+20 Volts Low Side Fixed Supply Voltage VCC 13.5 — 20 Volts Power Ground VNO -5 — 5 Volts Low Side Output Voltage VLO VNO — VCC Volts Logic Input Voltage VIN — 5 VCC Volts HIN, LIN, FO_RST FO Input/Output Voltage VFO — — VCC Volts CIN Input Voltag VCIN — — 5 Volts dVs/dt -8 — 8 KV/µs Allowable Offset Voltage Slew Rate*** *The lowest logic operational condition for VS is -5V. The lowest state held condition for VS is -VBS. The surge of -VS should not exceed -100V to avoid improper operation of output. **The maximum of allowable instantaneous voltage spike is up to 1200V. ***At operation mode, dVs/dt should not go beyond recommended operation conditions or it will cause improper operation output. 2 8/05 Powerex, Inc., 200 E. Hillis Street, Youngwood, Pennsylvania 15697-1800 (724) 925-7272 M81019FP HVIC, High Voltage Half-Bridge Driver 1200 Volts/±1 Ampere Electrical Characteristics, Ta = 25°C, VCC = VBS (= VB – VS) = 15V unless otherwise specified Characteristics High Side Leakage Current Symbol Test Conditions Min. Typ. Max. Units IFS VB = VS = 1200V — — 1.0 µA VBS Quiescent Supply Current IBS HIN = LIN = 0V — 0.4 0.8 mA VCC Quiescent Supply Current ICC HIN = LIN = 0V — 0.9 1.5 mA High Level Output Voltage VOH IO = -20mA, HPOUT, LPOUT 14.5 — — Volts Low Level Output Voltage VOL IO = 20mA, HNOUT1, LNOUT1 — — 0.5 Volts High Level Input Threshold Voltage VIH HIN, LIN, FO_RST 3.0 — — Volts Low Level Input Threshold Voltage VIL HIN, LIN, FO_RST — — 1.5 Volts High Level Input Bias Current IIH VIN = 5V — 1.0 1.4 mA Low Level Input Bias Current IIL VIN = 0V -1.0 — — µA Input Signals Filter Time tFilter HIN, LIN, FO_RST, FO 100 200 400 ns VHNO2 VIN = 0V 2.5 3.4 5.0 Volts VLNO2 VIN = 0V 6.5 7.6 9.0 Volts Low Impedance NMOS Filter Time tVNO2 VIN = 0V 200 400 650 ns Low Level FO Output Voltage VOLFO IFO = 1mA — — 0.95 Volts High Level FO Input Threshold Voltage VIHFO — 3.0 — — Volts Low Level FO Input Threshold Voltage VILFO — — — 1.5 Volts VBS Supply UV Reset Voltage VBSuvr — 10.5 11.3 12.1 Volts High Side Low Impedance NMOS Input Threshold Voltage Low Side Low Impedance NMOS Input Threshold Voltage VBS Supply UV Trip Voltage VBSuvt — 10.0 10.8 11.6 Volts VBS Supply UV Hysteresis Voltage VBSuvh VBSuvh = VBSuvr – VBSuvt 0.3 0.5 0.8 Volts VBS Supply UV Filter Time tVBSuv — 4.0 8.0 16.0 µs CIN Trip Voltage VCIN — 0.4 0.5 0.6 Volts POR Trip Voltage VPOR — 4.5 5.5 7.0 Volts Output High Level Short Circuit Pulsed Current IOH HPOUT(LPOUT) = 0V, HIN = 5V, PW < 5µs — 1.0 — A Output Low Level Short Circuit Pulsed Current IOL1 HNOUT1(LNOUT1) = 15V, LIN = 5V, PW < 5µs — -1.0 — A Low Impedance NMOS Output Low Level IOL2 HNOUT2(LNOUT2) = 15V, LIN = 5V, PW < 5µs — -1.0 — A ROH IO = -200mA, ROH = (VOH – VO)/IO — 15 — Ω 15 — Ω 15 — Ω Short Circuit Pulsed Current Output High Level ON Resistance Output Low Level ON Resistance ROL1 IO = 200mA, ROL1 = VO /IO — Low Impedance NMOS Output Low Level ROL2 IO = 200mA, ROL2 = VO /IO — ON Resistance 8/05 3 Powerex, Inc., 200 E. Hillis Street, Youngwood, Pennsylvania 15697-1800 (724) 925-7272 M81019FP HVIC, High Voltage Half-Bridge Driver 1200 Volts/±1 Ampere Electrical Characteristics, Ta = 25°C, VCC = VBS (= VB – VS) = 15V unless otherwise specified Characteristics Symbol Test Conditions Min. Typ. Max. Units High Side Turn-On Propagation Delay tdLH(HO) HPOUT Short to HNOUT1 1.0 1.29 1.6 µs High Side Turn-Off Propagation Delay tdHL(HO) HPOUT Short to HNOUT1 0.9 1.19 1.5 µs Low Side Turn-On Propagation Delay tdLH(LO) LPOUT Short to LNOUT1 1.0 1.27 1.6 µs Low Side Turn-Off Propagation Delay tdHL(LO) LPOUT Short to LNOUT1 0.9 1.21 1.5 µs CL = 1nF — 40.0 — ns & HNOUT2, CL = 1nF & HNOUT2, CL = 1nF & LNOUT2, CL = 1nF & LNOUT2, CL = 1nF Output Turn-On Rise Time tr Ouyput Turn-Off Fall Time Delay Matching, High Side Turn-On tf CL = 1nF — 40.0 — ns ∠tdLH tdLH(HO) – tdLH(LO) — 80.0 — ns ∠tdHL tdHL(HO) – tdHL(LO) — 80.0 — ns & Low Side Turn-Off Delay Matching, High Side Turn-Off & Low Side Turn-On THERMAL DERATING FACTOR CHARACTERISTICS PACKAGE POWER DISSIPATION, Pd, (WATTS) 1.8 1.6 1.2 0.8 0.4 0 0 25 50 75 100 125 150 TEMPERATURE, (°C) 4 8/05 Powerex, Inc., 200 E. Hillis Street, Youngwood, Pennsylvania 15697-1800 (724) 925-7272 M81019FP HVIC, High Voltage Half-Bridge Driver 1200 Volts/±1 Ampere DIODE CLAMP CIRCUITS FOR INPUT AND OUTPUT PINS VCC VCC HIN LIN FO_RST CIN GND GND GND VCC VB VB LPOUT LNOUT1 LNOUT2 HPOUT HNOUT1 HNOUT2 GND VS FO VCC VNO FUNCTION TABLE (X = H or L; Z = High Impedance; Q = Keep Previous Status) HIN LIN FO_RST CIN FO VBS/UV VCC/POR HO LO FO Behavorial State (Input) (Output) L L L L – H H L L H L H L L – H H L H H H L L L – H H H L H H H L L – H H Q Q H For Interlock X H X H – X H L L L CIN Tripped When LIN = H X L X H – X H Q Q H CIN Not Tripped When LIN = L X X X X L X H L L L Output Shut Down When FO = L X X X X – X L L L H VCC Power Reset Tripped X L L L – L H L L H VBS Power Reset Tripped X H L L – L H L H H VBS Power Reset Tripped When LIN = H NOTE: “L” status of VBS/UV indicates high side UV tripped. “L” status of VCC/POR indicates VCC power reset tripped. 8/05 5 Powerex, Inc., 200 E. Hillis Street, Youngwood, Pennsylvania 15697-1800 (724) 925-7272 M81019FP HVIC, High Voltage Half-Bridge Driver 1200 Volts/±1 Ampere TIMING DIAGRAM 1. Input Interlock Timing Diagram When the input signals (HIN/LIN) are high at the same time, the output (HOUT/LOUT) will maintain previous status. But if the input signals (HIN/LIN) go high simultaneously, HIN signals would be active and cause HOUT to enter into high status. NOTE 1: Input pulse width should be set to more than 200ns for HIN/LIN input filter circuit. HIN NOTE 2: If high-high status of input signals HIN/LIN completes with one input signal in low level and the other in high level, the output will enter into high-low status without dead time. LIN HOUT NOTE 3: This diagram does not show delay time between input and output. LOUT NO DEAD-TIME 2. Input/Output Timing Diagram The M81019FP matches delay between the low side and high side driver allowing minimized dead time control for better speed range and torque control in motor drive applications. LIN 50% 50% HIN tf tr 90% tdLH(HO) HO tdLH LO tdHL(LO) 10% 90% tf 10% 90% tdHL(HO) tdLH(LO) 10% tdHL tr 90% 10% 3. Short Circuit Protection Timing Diagram When overcurrent is detected, CIN will be tripped if LIN is high; then the short circuit protection will activate and shut down the outputs and FO will indicate fault by going low. As soon as FO_RST is driven high, short circuit protection will deactivate and FO goes high. The output will then respond to any subsequent active input signal. HIN LIN NOTE 1: This diagram does not show delay time between input and output. NOTE 2: FO_RST pulse width should be set to more than 400ns for FO_RST input filter circuit. CIN FO_RST HOUT LOUT FO 6 8/05 Powerex, Inc., 200 E. Hillis Street, Youngwood, Pennsylvania 15697-1800 (724) 925-7272 M81019FP HVIC, High Voltage Half-Bridge Driver 1200 Volts/±1 Ampere 4. FO Input Timing Diagram When FO is pulled low by an enternal signal, the output will be shut down. As soon as FO goes high again, the output will respond to the next active input signal. NOTE 1: This diagram does not show delay time between input and output. HIN LIN NOTE 2: FO pulse width should be set to more than 400ns for FO input filter circuit. FO HOUT LOUT 5. Low Side VCC Supply Power Reset Sequence When VCC supply voltage is lower than power reset trip voltage, the power reset trips and output is locked out. As soon as VCC supply voltage does higher than power reset trip voltage, the output will respond to the next active input signal. VPOR Voltage VCC HIN LIN HOUT LOUT 6. High-Side VBS Supply Under Voltage Lockout Sequence When VBS supply voltage goes lower than VBS supply UV trip voltage for a period than the VBS supply UV filter time, HOUT goes low regardles of HIN. As soon as VBS supply voltage goes higher than VBS supply reset voltage, the output will respond to the next active HIN signal. VBSuvr VBSuvr VBSuvt VBS HIN LIN VBS Supply UV Hysteresis Voltage VBS Supply UV Filter Time NOTE 1: This diagram does not show delay time between input and output. NOTE 2: At power supply start-up it is recommended that dVBS/dt should be controlled to avoid H latch of outputs. HOUT LOUT 8/05 7 Powerex, Inc., 200 E. Hillis Street, Youngwood, Pennsylvania 15697-1800 (724) 925-7272 M81019FP HVIC, High Voltage Half-Bridge Driver 1200 Volts/±1 Ampere 7. Power Start-Up Sequence At power supply start-up the following sequence is recommended when bootstrap supply topology is used. 1. Set VCC. VCC 2. Make sure FO is in high level. 3. Set LIN to high level and set HIN to low level so that bootstrap capacitor will charge. FO HIN 4. Set LIN to low level. LIN NOTE: If two power supplies are used to supply VCC and VBS individually, it is recommended to set VCC first, then set VBS. LOUT 8. Low Impedance NMOS Output Timing Diagram Output configuration is shown in the following figure. At turn-off an n-channel NMOS with sink current up to 1A is used to offer a low impedance path (AKA “low impedance NMOS) to prevent the power switch from turning itself on because of the parasitic Miller capacitor in the power switch. VBS/VCC P1 HIN/LIN = 0 Cres VO VPG/VN1G N1 N2 Cies VS/VNO VN2G LOW IMPEDANCE NMOS When HIN/LIN is low level and VOUT voltage is lower than low impedance NMOS input threshold voltage, the low impedance NMOS continues to discharge the parasitic current through Cres. HIN/LIN P1 Off VPG P1 On P1 On N1 On VN1G N1 Off Low Impedance NMOS Input Threshold N1 Off VOUT VN2G N2 Off N2 Off N2 On Tw Low Impedance NMOS Stays Turned On if Tw does not exceed tVNO2 8 8/05