ROHM BD4220AMUV

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S t r u c t u r e
Product name
Silicon monolithic integrated circuit
M o d e l
BD4220AMUV
Strobe capacitor charging control IC
N o .
1.
2.
3.
4.
5.
6.
7.
8.
F e a t u r e s
○
Built-in power transistor(50V DMOS)
Adjustable transformer primary-side peak current to linear current with the ADJ pin
Charging control switching with the START pin
Includes high precision full charge voltage detection circuit and output pin
Various built-in protective circuits (TSD, UVLO)
Built-in protective circuits (SDP)
Built-in IGBT driver(VDD supply for IGBT driver)
Employs small package: VQFN016V3030 (3.0 mm×3.0 mm×1.0 mm)
Absolute Maximum Ratings(Ta=25℃)
Parameter
VCC supply voltage
VDD supply voltage
SW pin
VC pin (DC characteristic)
Input pin voltage (START, ADJ, IGBT_IN, IGBT_EN)
Operating temperature range
Storage temperature range
Junction temperature
Power dissipation
○
Symbol
VCC
VDD
VSW
VCDC
VI
Topr
Tstg
Tjmax
Pd
Rating
-0.3~7
-0.3~7
50
-15~50
-0.3~7
-35~+85
-55~+150
150
1770 *1
Unit
V
V
V
V
V
Unit
°C
°C
°C
mW
Operating Conditions(Ta=25℃)
Parameter
Symbol
Rating
VCC supply voltage range
VCC
2.5~5.5
V
VDD supply voltage range
VDD
2.5~5.5
V
Input pin voltage (START, ADJ, IGBT_IN, IGBT_EN)
VI
0~VCC
V
FULL pin input current range
VFULL
0~5.5
V
*1: Reduced by 14.16 mW/°C at Ta=25°C or more (When mounted on a 74.2 mm×74.2 mm×1.6 mm glass epoxy, 4-layer board:
Surface radiating copper foil of 6.28mm2, copper foil laminated in each layer)
○
Outside marking and dimension (UNIT:mm)
B 4 2
2 0 A
LOT No.
Notes on this document
Fig.1 Outside marking and dimension
The Japanese version of this document is the formal specifications. The translated version of the document should be used for reference.
If there is any difference between the formal specifications and the translated version, the formal specifications shall take priority.
REV. A
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○
Electrical Characteristics
(Ta=25℃,VCC=START=VDD=3.3V, VBAT=3.6V,ADJ=1.0V,unless otherwise specified.)
Parameter
Symbol
Target value
Unit
Min.
Standard
Max.
IVCC
ISTB
IVDD
IVDDSTB
-
-
20
-
1
-
40
-
2.5
1
80
1
mA
μA
μA
μA
VSTH
VSTL
ISTART
TSTART
2.0
-
12
6
-
-
24
12.5
-
0.6
36
25
V
V
μA
μs
ISWL
IPEAK1
IPEAK2
IPEAK3
VSAT
-
0.7
1.0
1.95
-
-
0.8
1.1
2.05
0.20
1
0.9
1.2
2.15
0.40
μA
A
A
A
V
IADJ
TONMAX
TOFFMAX
-
25
12
2.5
50
25
5
100
50
μA
μs
μs
IVC
VFULLTH
VOFFL
RFULLL
IFULLH
1
29.7
-1.3
50
-
2
30
-0.5
110
-
4
30.3
-0.2
300
1
mA
V
V
Ω
μA
UVLO hysteresis width
VUVLOTH
VUVLOHYS
1.9
180
2.05
230
2.2
280
V
mV
UVLO VDD detection voltage
VUVLODTH
1.9
2.05
2.2
V
UVLO VDD hysteresis width
【IGBT driver block】
VUVLODHYS
180
230
280
mV
Ioso
90
140
200
mA
【Overall device】
VCC current consumption
VCC Circuit current during standby operation
VDD current consumption
VDD Circuit current during standby operation
【Standby control START pin】
START pin high voltage
START pin low voltage
START pin sink current
Unresponsive time when START shorted
【Transformer primary-side driver block】
SW pin leak current
SW pin peak current 1
SW pin peak current 2
SW pin peak current 3
SW saturation voltage
【Charging characteristics adjustment block】
ADJ sink current
Maximum ON time
Maximum OFF time
【Transformer secondary-side detection block】
VC pin sink current
Full charge detection voltage
OFF detection voltage
FULL pin ON resistance
FULL pin leak current
【Protective circuit block】
UVLO detection voltage
High-level output short circuit current
Low-level output short circuit current
Iosi
30
60
90
mA
IGBT_IN high-level input voltage range1
VIGBTH1
2.0
-
-
V
IGBT_IN high-level input voltage range2
VIGBTH2
1.4
-
-
V
IGBT_IN low-level input voltage range
VIGBTL
IIGBT_IN
VIGBTENH
VIGBTENL
IIGBT_EN
-
12
2.0
-
4.5
-
24
-
-
6.5
0.6
36
-
0.6
10
V
μA
V
V
μA
IGBT_IN sink current
IGBT_EN high-level input voltage range
IGBT_EN low-level input voltage range
IGBT_EN sink current
Condition
At Output OFF
START=0V
IGBT_EN=3.3V,IGBT_IN=0V
IGBT_EN=0.0V,IGBT_IN=0V
START=3.3V
SW=50V
ADJ=0V
ADJ=1V
ADJ=3V
ISW=0.5A
VC=30V
FULL=0.5V
FULL=3.3V
VCC detection
VDD detection IGBT_IN=3.3V,
IGBT_EN=3.3V
IGBT_IN=3.3V, IGBT_EN=3.3V
IGBT_IN=3.3V, IGBT_EN=3.3V
START=0V,IGBT_OUT_P=0V
IGBT_IN=0V, IGBT_EN=3.3V
START=0V,IGBT_OUT_N=3.3V
IGBT_EN=3.3V, START=0V
VDD=3.0~3.6V,
Ta=-25~85 , IGBT_EN=3.3V
IGBT_EN=3.3V, START=0V
IGBT_IN=3.3V, START=0V
IGBT_IN=3.3V, START=0V
IGBT_EN=3.3V, IGBT_IN=3.3V
○ PIN No.
Pin No.
Pin Name
Function
1
2
3
4
5
6
7
8~10
11,12
13
14
15
16
VDD
VCC
GND
ADJ
FULL
START
VC
SW
PGND
IGBT_IN
IGBT_EN
IGBT_OUT_N
IGBT_OUT_P
VDD supply pin
VCC supply pin
Ground pin
primary-side current control pin
FULL charge detection flag pin
Standby pin
Secondary–side voltage detection pin
Switching pin
Power GND pin
Input terminal of trigger signal for starting output of IGBT driver
Input terminal of control enable signal of IGBT driver
IGBT driver output N pin
IGBT driver output P pin
◎This is not designed for radiation resistance.
REV. A
16
15
14
13
1
12
2
11
3
10
4
9
5
6
7
8
Fig.3 TOP VIEW
3/4
○ Blosk Diagrum
○ UVLO、TSD、SDP
VCC
2
STB
START
VREF
SW
SW
SW
8
9
10
VCC
UVLO
UVLO
Operation stop due to UVLO detection
Operation restart due to UVLO release
TSD
TSD
Hysterisis
OS
6
START
UVLO detection
voltage
S Q
VCC
SDP
STB
UVLO
TSD
OFF time detection MAXON
VC
+
MAX OFF TIME
STB
FULL
R
V(START)
DRV
SQ
R
SDP
SDP
t
LOGIC
PGND
t
MAX_ON
MAX_ON
11
+
ADJ
4
12
5
FULL
Q
S
R
OS
AntiRinging
Filter
+
-
TSDP
PGND
V(cap)
VC
Voltage at completion
of charge
IGBT_OUT_P
1
16
UVLO_VDD
IGBT_EN
PGND
t
7
VDD
IGBT_IN
Operation stop due to increase of Operation restart due to decrease
of chip temperature
chip temperature
VC
1/A
FULL
V(VC)
t
I(VBAT)
13
15
14
IGBT_OUT_N
GND
GND
t
3
A
*STB : Standby signal
*OS : One shot pulse
Fig.3 Block diagram
BC
D
E
F
G
H
I
Fig.4 Timing Chart: Under Protective Circuit Operation
◆UVLO
If the VCC voltage is reduced to the UVLO detection voltage specified in the electrical characteristics or less, the UVLO
C and ○
E in Fig.4.) After that, when the
protective circuit is activated and the charging operation temporarily stops. (See Time ○
D and ○
F
VDD voltage becomes the UVLO release voltage or more, the charging operation automatically restarts. (See Time ○
in Fig.4.)
◆VDD UVLO
If the VDD voltage becomes the VDD UVLO detection voltage or less, the IGBT_OUT voltage is forced to be set to "L".
◆Termal Shut Down (TSD)
It protects the IC against thermal runaway due to excessive temperature rise (Tj>175°C [TYP]). After detection, the charging
G in Fig.4.), and when the chip temperature decreases, (Tj<150°C [TYP]), it
operation temporarily stops (See time ○
H
automatically restarts. (See Time ○ in Fig.4.)
◆VC pin short detection (SDP)
If the VC pin becomes the GND level due to any failure and the PowerMOS repeats switching 216(=65536) times which is the SDP
count number (TSDP) at the maximum OFF time, it is judged as an error and the charging operation is forced to be stopped. (See
B in Fig.4.) If the START pin is changed from "L" to "H" and the UVLO detection is released, it restarts.
Time ○
REV. A
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○ Precautions for Use
1. Absolute Maximum Rating
Although we pay due attention to the quality control of these products, the possibility of deterioration or destruction may exist
when impressed voltage, operating temperature range, etc., exceed the absolute maximum rating. In addition, it is impossible to
assume a destructive situation, such as short circuit mode, open circuit mode, etc. If a special mode exceeding the absolute
maximum rating is assumed, please review to provide physical safety means such as fuse, etc.
2. GND Potential
Maintain the PGND pin potential at the minimum level under the operating conditions. Furthermore, maintain the pin except the VC
pin at a voltage higher than the PGND pin voltage including an actual transient phenomenon.
The SW pin sometimes is charged by a negative voltage depending on the characteristics of the external transformer.
If any change in or damage of electrical characteristics is suspected due to the SW pin being charged by a negative voltage, it is
recommended that a schottky diode should be connected between the SW pin and the PGND pin.
3. Thermal Design
Work out the thermal design with sufficient margin taking power dissipation (Pd) at the actual operation condition into account.
4. Protective circuits
The threat of destruction may exist , if Pd is over caused by over current or
circuit pin . Be careful to design around circuit.
This IC don’t have over current protect circuit.
short
5. Short Circuit between Pins and Incorrect Mounting
Sufficient caution is required for IC direction or displacement when installing IC on PCB. If IC is installed incorrectly, it may be broken.
Also, the threat of destruction may exist in short circuits caused by foreign object invasion between outputs or output and GND
of the power supply.
6. Common Impedance
When providing a power supply and GND wirings, give sufficient consideration to lowering common impedance, reducing ripple (i.e.
making thick and short wiring, reduction ripple by LC, etc.) as much as possible.
~
~
(Pin B)
E
C
Parasitic element
GND
+
P
P
+
+
P
P
P
N
N
P
N
N
(Pin B)
P substrate
P substrate
GND
GND
+
N
N
Parasitic
N
Parasitic
GND
C
~
~
(Pin A)
(Pin A)
Transistor
B
Resist
B
E
GND
Parasitic element
REV. A
Notice
Notes
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Examples of application circuits, circuit constants and any other information contained herein
illustrate the standard usage and operations of the Products. The peripheral conditions must
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Great care was taken in ensuring the accuracy of the information specified in this document.
However, should you incur any damage arising from any inaccuracy or misprint of such
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The technical information specified herein is intended only to show the typical functions of and
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