Power Management ICs for Mobile Phones Power Management ICs for Battery Chargers BD5650AFVM No.10032EBT02 ●Description BD5650AFVM is small controller built in high accuracy reference voltage, constant voltage controlled amplifier and over current detection. BD5650AFVM functions as constant voltage control to realize stable power supply and abnormal (open-collector ON) output in case a controller continues to detect over current overtime. A time until driving is flexible depend on external capacitance. ●Features 1) Constant voltage control 2) Supply voltage range: 2.5V～18V 3) High accuracy reference voltage: 1.21V±1% 4) Current detected voltage: 73mV±5%(0～85℃) 5) Built-in over current detection with delay time 6) Small package: MSOP8 ●Applications It is suitable for secondary side controller in AC/DC adaptor to protect from over current. ●Absolute Maximum Ratings (Ta=25℃) Parameter Symbol Ratings Unit Maximum supply Voltage VMAX -0.3 ～ 20 V CP pin maximum voltage VCPMAX -0.3～7 V Power Dissipation Operating Temperature Range Maximum Junction Temperature Storage Temperature Range Pd 587 *1 mW Topr -30 ～ +85 ℃ Tjmax 150 ℃ Tstg -55 ～ +150 ℃ *1 Pd derate at 4.7mW/℃ for temperature above Ta = 25℃ (When mounted on a PCB 70.0mm×70.0mm×1.6mm) ●Operating condition (Ta=0～+85℃) Parameter Symbol Ratings Unit Supply voltage VCC 2.5～18 V CP pin operating voltage VCP 0～5.5 V www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 1/11 2011.11 - Rev.B Technical Note BD5650AFVM ●Electric Characteristics (Ta=25℃, Vcc=+5V) Parameter Symbol Limits Unit MIN. TYP. MAX. ICC - 0.6 1.2 mA Transconduction Gain(VCT). Sink Current Only GMV 1.0 4.5 - mA/mV Voltage Control Loop Reference at 1.5mA sinking current 1.198 1.21 1.222 VREF Conditions 【WHOLE DEVICE】 Total Supply Current - not taking the output sinking current into account 【Voltage Control Loop】 Ta=25℃ V 1.186 1.21 1.234 0 < Ta < 85℃ VSE 69.4 73 76.6 mV 0 < Ta < 85℃ Ibi 2 5 9 μA ICT=-0.1V IOS 11 25 50 mA OUT=VCC, ICT=-0.2V VSE=0V Ichg 612 665 718 nA Set 4 second, when CP=2.2uF 1uF Io 【Current Detection】 Current Detection Reference Current out of pin ICT 【Output Stage】 Output Short Circuit Current, Output to VCC, Sink Current Only 【Delay Time Setting】 CP Charge Current This product is not designed to be radiation-resistant. ●Measurement circuit diagram VCC A 5 VREF 3 - V + VOLTAGE REFERENCE Error amplifier 1 Ichg 73mV detection Comparator Comparator with latch - + + VREF 7 6 8 4 V Io - A 2 A A Fig.1 www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 2/11 2011.11 - Rev.B Technical Note BD5650AFVM ●Reference data 1.2 1.24 1 1.23 0.8 1.22 77 76 0.6 2.5V 74 18V 5V VSE[mV] 18V 5V VREF[V] ICC[mA] 75 1.21 2.5V 0.4 1.2 0.2 1.19 73 72 18V 71 0 70 69 1.18 0 20 40 60 80 0 20 40 60 0 80 Fig.3 Voltage controlled reference voltage vs temp. Fig.2 Circuit current vs temp. 20 40 60 80 Ambient Temperature: Ta[℃] Ambient Temperature: Ta[℃] Ambient T emperature: T a[℃] Fig.4 Over-current detected voltage vs temp. CP=2.2uF 60 8 2.5V 5.0V 6 40 4 5.0V 2.5V 20 2.5V 5 5.0V 5.0V Toth[sec] 18V Ibv[nA] GMV[mA/mV] 6 0 18V -20 2 2.5V 4 18V 3 -40 -60 0 0 20 40 60 2 0 80 Ambient Temperature: Ta[℃] 20 40 60 80 0 Fig.5 Voltage controlled amplifier:GM vs temp. 400 6 300 40 60 80 Fig.7 Delay time vs temp. Fig.6 VCT pin input bias current vs temp. 8 20 Ambient Temperature: Ta[℃] Ambient Temperature: Ta[℃] 70 60 18V 50 4 5.0V 18V 2 18V IoS[mA] 5.0V VoL[mV] Ibi[uA] 2.5V 200 2.5V 20 40 60 80 20 40 60 80 0 Ambient Temperature: Ta[℃] Fig.8 ICT pin output current vs temp. Ta=25℃ 20 40 60 Fig.10 Output short-circuit current vs temp. Ta=25℃ Ta=25℃ 1.6 80 Ambient Temperature: Ta[℃] Fig.9 10mA sinking output voltage vs temp. 2.5 1.4 1.0 2.0 1.2 0.8 1.0 0.6 0.4 1.5 VoL[V] VREF[V] ICC[mA] 2.5V 0 0 Ambient Temperature: Ta[℃] 1.2 5.0V 10 0 0 30 20 100 0 40 0.8 0.6 0.4 0.2 1.0 0.5 0.2 0.0 0.0 0 5 10 15 Power Supply : VCC[V] Fig.11 Circuit current vs VCC www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 0.0 0 5 10 15 Power Supply : VCC[V] Fig.12 Voltage controlled reference voltage vs VCC 3/11 0 5 10 15 IOUT [mA] Fig.13 Sinking output voltage vs IOUT 2011.11 - Rev.B Technical Note BD5650AFVM ●Block Diagram 5 VREF 3 + VOLTAGE REFERENCE 73mV detection Comparator Ichg 1 Comparator with latch - 4 + + - VREF 6 7 2 8 Fig.14 ●Pin Description PIN No. PIN NAME FUNCTION 1 VCT Input Pin of the Voltage Control Loop 2 GND Ground Line. 0V Reference For All Voltages 3 OUT Output Pin. Sinking Current Only 4 OCP Output Pin for Over Current Detection. After delay time, sinking current. 5 VCC Positive Power Supply Line 6 VSE Input Pin of the Current Detection(+). Normally short to GND. 7 ICT Input Pin of the Current Detection(-). Detected at -73mV. 8 CP Set delay time by capacitor. ●Package Dimensions 2.9±0.1 バリ含むMAX寸法 3.25 +6° -4° 4° MAX 3.25 Incle BURR 6 5 5 6 5 0 A 2 1 0.475 3 0.6±0.2 7 0.29±0.15 4.0±0.2 2.8±0.1 8 Lot No. 4 1PIN MARK +0.05 -0.03 0.75±0.05 0.8±0.05 0.9MAX 0.145 0.22 0.65 +0.05 -0.04 MSOP8 (UNIT:mm) 0.08 Fig.15 www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 4/11 2011.11 - Rev.B Technical Note BD5650AFVM ●Typical application 1000pF L1 D1 Vout R3 Set divided resistance at output voltage your request. Recommended use F grade. P.6 5 3 - C21 + VOLTAGE R21 Error amplifier 470uF /10V Ichg - R1 0.1uF REFERENCE 73mV detection Comparator PC 1 Comparator with latch 1k LOAD VREF 4 + + VREF 6 7 RS ΔVS Set at limit current your request. P.7 - 2 8 R22 R2 CP IL Set delay time from over-current detection to protection latch. P.7 Phase compensation parts for voltage controlled amplifier. P.6 Fig.16 VOUT = VREF × (R1+R2) / R2 [V] CURRENT LIMIT : IL = VSE / RS [A] Recommended part list Symbol Products Recommended value C0 UD Series (Nichikon) 220 ～ 1000μF C1 UD Series (Nichikon) 100 ～ 680μF C21 MCH182CN104 (Rohm) 0.1μF CP - (Tolerence B) R1 MCR03 (Rohm) 160k (Tolerence F) R2 MCR03 (Rohm) 51k (Tolerence F) R3 MCR03 (Rohm) 470 R21 MCR03 (Rohm) 1k R22 MCR03 (Rohm) 470 RS MCR25 (Rohm) 0.3 (Tolerence F) D1 SB240 - PC PC17K1DD (KODENSHI) - Caution in use We are convinced that an example above application circuit is no problem, but you should sufficiently evaluate the characteristics for your application. You need to decide external values sufficiently considering static characteristics, transient characteristics and IC’s unevenness to keep working application margin when you use in change external circuit value. You need to evaluate when you decide external value, since the frequency response in overall system is affected in particular from not IC only but characteristics of optocoupler and primary side control IC. www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 5/11 2011.11 - Rev.B Technical Note BD5650AFVM ●Explanation for circuit working 1. Constant voltage control (1-1) Output voltage Voltage feedback system is composited from error amplifier, resistance R1 / R2 and optocoupler connected to OUT terminal. Output voltage “VOUT” is defined by expression (1). VOUT = VREF × (R1+R2)/R2 (1) VOUT is free setting from R1 / R2, but a potential of OUT terminal is not over VCC. In addition, it is recommended that resistance R1 / R2 has high impedance not to have heavy load at output. But an input bias current is 50nA(typ.) in VCT terminal, you need to select a resistance value that flow over 10uA not to influence the ratio of resistance in (1). We show a reference value below. When R1=160kΩ, R2=51kΩ, Vout=5.00V (1-2) Frequency response of error amplifier In BD5650AFVM, shunt regulation executes constant voltage control. Monitoring an alteration of output voltage in VCT terminal, through error amplifier, finally respond as sink current in OUT terminal. A frequency response of transconductance, a change at output current against an change at input voltage, is shown in Fig.17. In case that frequency is higher over 200kHz, a response of GAIN is lower, error amplifier is losing its function little by little. Fig.17 50 VCC 160ｋ OSC CH1 BD5650FVM Error Amplifier ～ VCT OUT + - 51ｋ 1.21V GND G= CH1[A] OSC[V] Fig.18 It is needed that your application circuit connects external capacitance and resistance between OUT terminal and VCT terminal for phase compensation regarding constant voltage control. But you need to decide external values sufficiently considering static characteristics, transient characteristics and IC’s unevenness to keep working application margin. www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 6/11 2011.11 - Rev.B Technical Note BD5650AFVM 2. Over current detection BD5650AFVM has a function regarding over current detection. When over current your set limit freely flow during a continuous time you also set capacitance in CP terminal, open collector in OCP terminal is driving (ON). Once turned to ON, its state keep(latch) in internal. When you want to release latch state, you need that CP terminal fall to GND, or, VCC voltage apply lower under about 1V. An application circuit in Fig.16 has a function that adaptor output stop due to stop feedback to primary side. (2-1) Limit current Overcurrent detection is composited from detection comparator, sensing resistance RS. Limit current “IL” is defined by expression (2). IL = VSE / RS (2) IL means Limit current, VSE means current detected voltage(73mV: a potential difference from ICT toVSE). We show a reference value below. When IL=1A, RS=73mΩ You need to decide RS value sufficiently considering maximum load current IL,max in application. Pl=VSE×IL,max (3) For example, when IL,max set to 2A, the maximum power loss “Pl.max” is 200mW in RS resistance. Since BD5650AFVM itself can’t limit IL,max, considering a characteristics on module, you need to select resistance includes enough margin for power loss. But for mostly small power adaptor, selecting 1/4 watt or 1/2 watt resistance is sufficiently suitable. (2-2) CP charge A delay time from a occur of over current to turn ON in OCP terminal is below expression (4). Toth=CP×VREF/Ichg (4) Timing chart when over current detection is shown in Fig.19. IOUT IL,max IL (73mV/RS) ΔVS 73ｍV Toth CP VREF Iocp Fig.19 www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 7/11 2011.11 - Rev.B Technical Note BD5650AFVM In case that over current reduces and ΔVS become under 73mV during CP charging, an electric charge in CP capacitance discharge and CP voltage returns to 0V. When over current detect for the second time, start to charge. Its discharging velocity is shown in expression (8). Vcp( t) Vcp0・exp（ - t ） CP･Rdis (8) Vcp0 means CP terminal voltage at discharge start, and Rdis is internal discharge resistance:900Ω(typ.). If you don’t set up a delay time, you need that CP terminal is open or connects 10pF order of magnitude. In this case, when IC detects surge current in an instant, normal working stops by protection. Consequently, you need to use this mode considering a characteristics of module. In addition, when you don’t use a function that IC detects over current, you need to short ICT terminal to VSE terminal and pull down to GND by about 10kΩ in CP terminal. Regarding board layout around CP capacitance, you pay attention that CP capacitance will not be in parallel with noisy parts and lines wherever possible, and place to short pattern line as possible. ●Internal equivalent circuit diagram VCT(1PIN) OCP(4PIN) VSE(6PIN) OCP VSE Pow ICT(7PIN) CP(8PIN) OUT(3PIN) Vref CP OUT ICT Pow www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 8/11 2011.11 - Rev.B Technical Note BD5650AFVM ●Operation Notes 1) Absolute maximum ratings Use of the IC in excess of absolute maximum ratings such as the applied voltage or operating temperature range may result in IC deterioration or damage. Assumptions should not be made regarding the state of the IC (short mode or open mode) when such damage is suffered. A physical safety measure such as a fuse should be implemented when use of the IC in a special mode w here the absolute maximum ratings may be exceeded is anticipated. 2) GND potential Ensure a minimum GND pin potential in all operating conditions. In addition, ensure that no pins other than the GND pin carry a voltage lower than or equal to the GND pin, including during actual transient phenomena. As an exception, the circuit design allows voltages up to -0.3 V to be applied to the ICT pin. 3) Setting of heat Use a thermal design that allows for a sufficient margin in light of the power dissipation (Pd) in actual operating conditions. 4) Pin short and mistake fitting Use caution when orienting and positioning the IC for mounting on printed circuit boards. Improper mounting may result in damage to the IC. Shorts between output pins or between output pins and the power supply and GND pin caused by the presence of a foreign object may result in damage to the IC. 5) Actions in strong magnetic field Use caution when using the IC in the presence of a strong electromagnetic field as doing so may cause the IC to malfunction. 6) Mutual impedance Power supply and ground wiring should reflect consideration of the need to lower mutual impedance and minimize ripple as much as possible (by making wiring as short and thick as possible or rejecting ripple by incorporating inductance and capacitance). 7) Regarding input pin of the IC + This IC is a monolithic IC which (as shown is Fig-1)has P substrate and between the various pins. A P-N junction is formed from this P layer of each pin. For example, the relation between each potential is as follows, ○ (When GND > PinB and GND > PinA, the P-N junction operates as a parasitic diode.) ○ (When PinB > GND > PinA, the P-N junction operates as a parasitic transistor.) Parasitic diodes can occur inevitably in the structure of the IC. The operation of parasitic diodes can result in mutual interference among circuits as well as operation faults and physical damage. Accordingly you must not use methods by which parasitic diodes operate, such as applying a voltage that is lower than the GND (P substrate) voltage to an input pin. Although the circuit design allows voltages up to -0.3 V to be applied to the ICT pin, voltages lower than this may cause the behavior described above. Use caution when designing the circuit. Transistor (NPN) Resistance (PinA) (PinB) C B E GND P P＋ N P＋ N P substrate GND Parasitic diode N N Ｎ P substrate GND Parasitic diode (PinB) (PinA) B C Parasitic diode GND Other adjacent components Fig.20 www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. E GND Parasitic diode Simplified structure of a Bipolar IC 9/11 2011.11 - Rev.B Technical Note BD5650AFVM ●Power Dissipation Reduction MSOP8 When mounted on a PCB (70 mm 70 mm 1.6 mm, glass epoxy) 0.6 Pd[W] 587mW 0.4 0.2 0 0 25 50 75 100 125 150 Ta[℃] www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 10/11 2011.11 - Rev.B Technical Note BD5650AFVM ●Ordering Part Number B D Part No. 5 6 5 0 A F Part No. V M Package FVM: MSOP8 - T R Packaging and forming specification TR: Embossed tape and reel MSOP8 <Tape and Reel information> 2.8±0.1 4.0±0.2 8 7 6 5 0.6±0.2 +6° 4° −4° 0.29±0.15 2.9±0.1 (MAX 3.25 include BURR) Tape Embossed carrier tape Quantity 3000pcs Direction of feed TR The direction is the 1pin of product is at the upper right when you hold ( reel on the left hand and you pull out the tape on the right hand ) 1 2 3 4 1PIN MARK 1pin +0.05 0.145 −0.03 0.475 0.08±0.05 0.75±0.05 0.9MAX S +0.05 0.22 −0.04 0.08 S Direction of feed 0.65 Reel (Unit : mm) www.rohm.com © 2011 ROHM Co., Ltd. All rights reserved. 11/11 ∗ Order quantity needs to be multiple of the minimum quantity. 2011.11 - Rev.B Notice Notes No copying or reproduction of this document, in part or in whole, is permitted without the consent of ROHM Co.,Ltd. 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