User Manual AIMB-215

User Manual
AIMB-215
Intel® Celeron J1900/N2930/
N2807 Mini-ITX with VGA/LVDS/
DP++ (eDP), 6 COM, Dual LAN,
10 USB, 2 Mini-PCIe, and PCIe x1
Copyright
The documentation and the software included with this product are copyrighted 2014
by Advantech Co., Ltd. All rights are reserved. Advantech Co., Ltd. reserves the right
to improve the products described in this manual at any time without notice. No part
of this manual may be reproduced, copied, translated or transmitted in any form or by
any means without prior written permission from Advantech Co., Ltd. The information
provided in this manual is intended to be accurate and reliable. However, Advantech
Co., Ltd. assumes no responsibility for its use, nor for any infringements of the rights
of third parties, which may result from its use.
Acknowledgements
IBM and PC are trademarks of International Business Machines Corporation.
Intel® Celeron™ J1900/N2930/N2807 is trademark of Intel Corporation
WinBond is a trademark of Winbond Corporation.
All other product names or trademarks are the property of their respective owners.
AIMB-215 User Manual
Part No.
Edition 1
Printed in Taiwan
September 2014
ii
Message to the Customer
Advantech Customer Services
Every Advantech product is built with the most exact specifications to ensure reliable
performance in the harsh and demanding conditions typical of industrial environments. Whether your new Advantech equipment is destined for a laboratory or factory floor, be assured that your product can provide the reliability and ease of
operation for which the name Advantech is renowned.
Your satisfaction is our primary concern. A guide to Advantech’s customer services is
provided below. To ensure that you receive the full benefit of our services, please follow the instructions below.
Technical Support
We want you to get the maximum performance from your products. Should you
encounter any technical difficulties, we are available to provide assistance. Answers
to the most frequently asked questions are provided in the product documentation.
These answers are typically a lot more detailed than the ones provided over the
phone.
So please consult this manual first. If you still cannot find the answer, gather all relevant information or questions that apply to your problem, and with the product close
to hand, call your dealer. Our dealers are well trained and ready to provide the support required for you to experience the most from your Advantech products. Most of
the problems reported are minor and can be easily solved over the phone.
In addition, free technical support from Advantech engineers is available every business day. We are always willing to give advice on application requirements or specific
information regarding the installation and operation of any of our products.
iii
AIMB-215 User Manual
Declaration of Conformity
FCC Class B
This device complies with the requirements in Part 15 of the FCC regulations:
Operation is subject to the following two conditions:
 This device may not cause harmful interference.
 This device must accept any interference received, including interference that
may cause undesired operation.
This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to Part 15 of the FCC Regulations. These limits are designed to
provide reasonable protection against harmful interference when the equipment is
operated in a commercial environment. This equipment generates, uses, and can
radiate radio frequency energy and, if not installed and used in accordance with the
instruction manual, may cause harmful interference to radio communications. Operation of this device in a residential area is likely to cause harmful interference, in which
case users are required to correct the interference at their own expense. The user is
advised that any equipment changes or modifications not expressly approved by the
party responsible for compliance would void compliance with the FCC regulations
and, therefore, the user’s authorization to operate the equipment.
Caution! There is a risk of a new battery exploding if incorrectly installed. Do not
attempt to recharge, force open, or heat the battery. Replace the battery
only with the same or equivalent type recommended by the manufacturer. Discard used batteries according to the manufacturer's instructions.
AIMB-215 User Manual
iv
Memory Compatibility
AIMB-215 Memory Compatibility List
Brand
Size
Speed
Type
Transcend
2GB
DDR3
1333
SODIMM
DDR3
ECC
Vendor PN
Memory
N
TS256MSK64W3N
SEC 234 HYK0
K4B2G0846D
Apacer
4GB
DDR3
1333
Apacer
2GB
Apacer
Advantech PN
Result
SODIMM
DDR3
N
78.B2GCY.AT00C
MICRON 2XE22 D9QBJ
DDR3
1600
SODIMM
DDR3
N
78.A2GCR.AT00C
MICRON IYM22 D9PFJ
(256x8)
PASS
4GB
DDR3
1600
SODIMM
DDR3
N
78.B2GCR.AF10C
HYNIX H5TC2G83EFR
PASS
Apacer
4GB
DDR3
1600
SODIMM
DDR3
N
78.B2GCZ.AT00C
MICRON 2QE22 D9QBJ
PASS
Transcend
4GB
DDR3
1600
SODIMM
DDR3
N
TS512MSK64W6H
SEC 231 HYK0
K4B4G0846B
96SD3L4G1600NN-TR
PASS
AQD
4GB
DDR3
1600
SODIMM
DDR3
N
653555-0007
SEC 316 XYK0
K4B4G0846B
AQD-SD3L4GN16SG
PASS
AQD
2GB
DDR3
1600
SODIMM
DDR3
N
201403504691
HYNIX H5TC2G83EFR
AQD-SD3L2GN16HQ
PASS
PASS
96SD3L4G1333NN-AP
PASS
Ordering Information
P/N
CPU
Memory
DP++/
GbE
USB
CRT LVDS
COM SATA II
eDP
LAN
3.0/2.0
Mini-PCIe
TPM
AMP
PCIe
x1
Thermal
solution
AIMB215DS6A1E
J1900
2
1 (1)
1
1
2
6
2
1/9
2 (1 x F/S;
1 x H/S)
(1)
(2 x
6W)
1
Passive
AIMB215NS6A1E
N2930 2
1 (1)
1
1
2
6
2
1/9
2 (1 x F/S;
1 x H/S)
(1)
(2 x
6W)
1
Passive
AIMB215US6A1E
N2807 1
(w/o SUSIAccess)
1 (1)
1
0
1
2
1
1/3
(rear: 2;
inte)rnal:
2
1 x F/S
(PCIe/
SATA signal only)
(1)
(2 x
6W)
1
Passive
AIMB215LS6A1E
J1900
(w/o SUSIAccess)
1 (1)
1
0
1
2
1
1/3
(rear: 2;
internal:
2)
1 x F/S
(PCIe/
SATA signal only)
(1)
(2 x
6W)
1
Passive
2
* ( ) is not populated when MP
v
AIMB-215 User Manual
Product Warranty (2 years)
Advantech warrants the original purchaser that its products will be free from defects
in materials and workmanship for two years from the date of purchase.
This warranty does not apply to any products that have been repaired or altered by
persons other than repair personnel authorized by Advantech, or products that have
been subject to misuse, abuse, accident, or improper installation. Advantech
assumes no liability under the terms of this warranty as a consequence of such
events.
Because of Advantech’s high quality-control standards and rigorous testing, most
customers never need to use our repair service. If an Advantech product is defective,
it will be repaired or replaced at no charge during the warranty period. For out-of-warranty repairs, users will be billed according to the cost of replacement materials, service time, and freight. Please consult your dealer for more details.
If you believe your product is defective, please follow the steps listed below.
1. Collect all information about the problem encountered (for example, CPU
speed, Advantech products used, other hardware and software used, etc.). Note
anything abnormal and list any onscreen messages encountered when the
problem occurs.
2. Call your dealer and describe the problem. Please have your manual, product,
and any relevant information readily available.
3. If your product is diagnosed as defective, obtain a return merchandise authorization (RMA) number from your dealer. This allows us to process your return
more quickly.
4. Carefully pack the defective product, a completed Repair and Replacement
Order Card, and proof of the purchase date (such as a photocopy of your sales
receipt) in a shippable container. Products returned without a proof of purchase
date are not eligible for our warranty service.
5. Write the RMA number clearly on the outside of the package and ship the product prepaid to your dealer.
AIMB-215 User Manual
vi
Initial Inspection
Before installing the motherboard, please ensure that the following items are
included in your shipment:
 1x AIMB-215 Intel® Celeron™ J1900/N2930/N2807 Mini-ITX motherboard
 1 x SATA HDD cable
 1 x SATA power cable
 1 x Serial port cable (1 to 4), for AIMB-215D/N SKU only
 2 x Serial port cable (1 to 1)
 1 x I/O port bracket
 1 x startup manual
 1 x driver CD
 1 x wa0rranty card
 1 x on-board CPU heat sink
If any of these items are missing or damaged, contact your distributor or sales representative immediately. All AIMB-215 devices are mechanically and electrically
inspected before shipment. Thus, your product should be free of marks and
scratches and in perfect working order upon receipt. While unpacking AIMB-215,
check the product for signs of shipping damage (for example, a damaged box,
scratches, dents, etc.). If the device is damaged or fails to meet the specifications,
notify our service department or your local sales representative immediately. Please
also notify the carrier. Retain the shipping carton and packing material for inspection
by the carrier. After this inspection, we will make arrangements to repair or replace
the unit.
vii
AIMB-215 User Manual
AIMB-215 User Manual
viii
Contents
Chapter
1
General Information ............................1
1.1
1.2
1.3
1.4
Introduction ............................................................................................... 2
Features .................................................................................................... 2
OS and BIOS Compatibility....................................................................... 2
Specifications ............................................................................................ 3
1.4.1 System .......................................................................................... 3
1.4.2 Memory ......................................................................................... 3
1.4.3 Input/Output .................................................................................. 3
1.4.4 Graphics........................................................................................ 3
1.4.5 Ethernet LAN ................................................................................ 3
1.4.6 Industrial Features ........................................................................ 3
1.4.7 Mechanical and Environmental Specifications.............................. 4
Jumpers and Connectors .......................................................................... 4
Table 1.1: Connector/Header List................................................ 4
Board Layout: Jumper and Connector Locations...................................... 6
Figure 1.1 Jumper and Connector Locations............................... 6
Figure 1.2 I/O Connectors ........................................................... 6
AIMB-215 Board Diagram ......................................................................... 7
Figure 1.3 AIMB-215 Board Diagram .......................................... 7
Safety Precautions .................................................................................... 8
Jumper Options......................................................................................... 9
1.9.1 Setting Jumpers ............................................................................ 9
1.9.2 CMOS Mode Selection (JRTCTEST1).......................................... 9
Table 1.2: CMOS Mode Selection (JRTCTEST1) ....................... 9
1.9.3 COM2 RS-232/422/485 Mode Selector (JSETCOM3)................ 10
Table 1.3: COM2 RS-232/422/485 Mode Selector
(JSETCOM3)............. ............................................... 10
Table 1.4: COM3 RS-232/422/485 Mode Selector
(JSETCOM3).......... .................................................. 10
1.9.4 LVDS Panel Voltage Selection (JLVDS1 + JLVDS2) ................. 11
Table 1.5: LVDS Panel Voltage Selection (JLVDS1 + JLVDS2)11
1.9.5 PSON1: ATX and AT Mode Selector .......................................... 11
Table 1.6: PSON1: ATX and AT Mode Selector........................ 11
1.9.6 JOBS1 + JWDT1: OBS Beep and Watchdog Timer Output ....... 12
Table 1.7: JOBS1 + JWDT1: OBS Beep and Watchdog Timer
Output....................................................................... 12
1.9.7 Case Open Pin Header Selection (JCASEOP_SW1) ................. 12
Table 1.8: Case Open Pin Header Selection
(JCASEOP_SW1)..................................................... 12
1.9.8 Power Switch/HDD LED/SMBus/Speaker Pin Header (JFP1 +
JFP2) .......................................................................................... 12
Table 1.9: Power Switch/HDD LED/SMBus/Speaker Pin Header
(JFP1 + JFP2) .......................................................... 12
1.9.9 EDP Panel Voltage Selection (JEDP1 + JEDP2) (optional) ....... 13
Table 1.10: EDP Panel Voltage Selection (JEDP1 + JEDP2) (optional)........................................................................ 13
1.9.10 JEIDA/VESA Selection (JLVDS_VCON1) .................................. 13
Table 1.11: JEIDA/VESA Selection (JLVDS_VCON1) ................ 13
1.9.11 RS-485/422 Terminal Resistor Jumper (SW_422_1) ................. 14
Table 1.12: RS-485/422 Terminal Resistor Jumper (SW_422_1) ...
..................................................................................14
1.5
1.6
1.7
1.8
1.9
ix
AIMB-215 User Manual
Chapter
2
Connecting Peripherals.................... 15
2.1
2.2
2.11
2.12
2.13
2.14
2.15
2.16
2.17
2.18
2.19
2.20
2.21
2.22
2.23
2.24
2.25
2.26
2.27
2.28
2.29
2.30
2.31
2.32
Introduction ............................................................................................. 16
LAN and USB Ports (LAN1/2, USB0102/USB0304/USB0506/USB0708/
USB0910) ............................................................................................... 16
Table 2.1: LAN LED Indicators.................................................. 16
VGA Connector (VGA1).......................................................................... 17
Serial Ports (COM1 ~ COM6) ................................................................. 18
PS/2 Keyboard and Mouse Connector (KBMS1).................................... 19
Display Port Connector (DP1)................................................................. 19
System FAN Connector (SYSFAN1/2) ................................................... 20
Front Panel Connectors (JFP3/JFP1 + JFP2) ........................................ 20
2.8.1 ATX Soft Power Switch (JFP1 + JFP2/PWR_SW) ..................... 21
2.8.2 Reset (JFP1 + JFP2/RESET) ..................................................... 21
2.8.3 HDD LED (JFP1 + JFP2/HDDLED) ............................................ 21
2.8.4 External Speaker (JFP1 + JFP2/SPEAKER) .............................. 21
2.8.5 Power LED and Keyboard Lock Connector (JFP3/PWR_LED and
KEY LOCK)................................................................................. 21
Table 2.2: ATX Power Supply LED Status (AT power not supported) ............................................................................ 21
Line-Out Connector (AUDIO1)................................................................ 22
Serial ATA Interface (SATA1/2) & SATADOM Power Pin Header
(JSATAPWR1) ........................................................................................ 22
Table 2.3: SATADOM Power Pin Header (JSATAPWR1) ........ 23
PCI-Express x1 Slot (PCIEX1_1)............................................................ 23
Front Panel Audio Connector (FPAUDIO1) ............................................ 24
ATX 12V Power Connector (ATX12V1) .................................................. 24
SPI Flash Connector(SPI_CN1) ............................................................. 25
LVDS Backlight Inverter Power Connector (INV1).................................. 25
LVDS Connector (LVDS1) ...................................................................... 26
General Purpose I/O Connector (GPIO1) ............................................... 27
CMOS Battery Wafer Box (BAT1)........................................................... 27
SPI BIOS Socket (SPI1) ......................................................................... 28
SPDIF Interface Pin Header (SPDIF_OUT1).......................................... 28
Audio Amplifier Output Pin Header (JAMP1), Optional BOM ................. 29
ATX Power Supply (5VSB) Connector (ATX_5VSB1) ............................ 29
SATA Power Connector (SATA_PWR1/2).............................................. 30
Case Open Pin Header (JCASE1).......................................................... 30
DDR3L SODIMM Socket (DIMMA1/B1).................................................. 31
Mini-PCIe and mSATA Connector (MINIPCIE1)..................................... 32
Mini-PCIe Connector (MINIPCIE2) ......................................................... 32
Low Pin Count Interface Header............................................................. 33
RTC Reset Pin Header (JRTCTEST1) ................................................... 33
eDP Connector (eDP1), Optional BOM .................................................. 34
eDP Backlight Inverter Power Connector (INV-EDP1), Optional BOM... 34
SIM Card Holder (SIM2) ......................................................................... 35
3
BIOS Operation ................................. 37
3.1
3.2
Introduction ............................................................................................. 38
BIOS Setup ............................................................................................. 38
3.2.1 Main Menu .................................................................................. 39
3.2.2 Advanced BIOS Features ........................................................... 40
3.2.3 Chipset........................................................................................ 63
3.2.4 Security....................................................................................... 72
3.2.5 Boot ............................................................................................ 73
3.2.6 Save and Exit.............................................................................. 74
2.3
2.4
2.5
2.6
2.7
2.8
2.9
2.10
Chapter
AIMB-215 User Manual
x
Chapter
4
Software and Service Introduction ..75
4.1
4.2
Introduction ............................................................................................. 76
Value-Added Software Services ............................................................. 76
4.2.1 Software API ............................................................................... 76
4.2.2 Software Utility ............................................................................ 78
5
Chipset Software Install Utility .........79
5.1
5.2
Before Installation ................................................................................... 80
Introduction ............................................................................................. 80
6
VGA Setup ..........................................81
6.1
6.2
Introduction ............................................................................................. 82
Windows 7/8.1......................................................................................... 82
7
LAN Configuration.............................83
7.1
7.2
7.3
7.4
Introduction ............................................................................................. 84
Features .................................................................................................. 84
Installation ............................................................................................... 84
Windows 7/8.1 Driver Setup (Realtek 8111E)......................................... 84
8
XHCI Driver Installation.....................85
8.1
8.2
Introduction ............................................................................................. 86
Installation ............................................................................................... 87
Appendix A
Programming the Watchdog Timer..89
A.1
Programming the Watchdog Timer ......................................................... 90
A.1.1 Watchdog Timer Overview.......................................................... 90
A.1.2 Programming the Watchdog Timer ............................................. 90
Table A.1: Watchdog Timer Registers ....................................... 92
A.1.3 Example Program ....................................................................... 93
Appendix B
I/O Pin Assignments..........................97
B.1
B.2
B.3
B.4
B.5
B.6
B.7
B.8
B.9
B.10
B.11
B.12
B.13
B.14
B.15
DC-IN Adaptor Connector (DCIN1)......................................................... 98
Display Port Connector (DP1)................................................................. 98
eDP Panel Voltage Selection (JEDP-1 + JEDP-2), Optional BOM ......... 99
VGA Connector (VGA1) .......................................................................... 99
Serial ATA Interface Connector (SATA2).............................................. 100
SATADOM Power Pin Header (JSATAPWR1) ..................................... 100
Serial ATA Interface Connector (SATA1).............................................. 100
CMOS Battery Wafer Box (BAT1)......................................................... 101
System Fan Connector (SYSFAN2)...................................................... 101
USB3.0 + USB2.0 Stack Connector (USB0102) ................................... 101
SPI BIOS Socket (SPI1)........................................................................ 102
USB2.0 * 2 Stack Connector (USB0304) .............................................. 102
COM1 Box Header (COM1) .................................................................. 103
Watchdog Timer Output and OBS Beep (JOBS1 + JWDT1) ................ 103
RJ45 (LAN1 + LAN2) Connector (LAN12) ............................................ 104
Chapter
Chapter
Chapter
Chapter
xi
AIMB-215 User Manual
B.16
B.17
B.18
B.19
B.20
B.21
B.22
B.23
B.24
B.25
B.26
B.27
B.28
B.29
B.30
B.31
B.32
B.33
B.34
B.35
B.36
B.37
B.38
B.39
B.40
B.41
B.42
B.43
B.44
B.45
B.46
B.47
B.48
B.49
B.50
B.51
B.52
AIMB-215 User Manual
SPDIF Interface Pin Header (SPDIF_OUT1)........................................ 104
HD Analog Audio Interface (AUDIO1)................................................... 105
Front Panel Audio Pin Header (FPAUD1)............................................. 105
Audio Amplifier Output Pin Header (JAMP1) ........................................ 105
LVDS VESA and JEIDA Format Pin Header ........................................ 106
LVDS Panel Connector (LVDS1) .......................................................... 106
Dual-Port USB2.0 Box Header (USB0506)........................................... 107
LVDS Panel Voltage Selection (JLVDS1 + JLVDS2)............................ 107
COM6 RI# Selection Pin Header (JSETCOM6_V1) ............................. 108
LVDS Backlight Inverter Power Connector (INV1)................................ 108
8-bit General Purpose I/O Pin Header (GPIO1).................................... 108
COM3 ~ COM6 Box Header (COM3456) ............................................. 109
AT/ATX Mode Selection (PSON1) ........................................................ 110
ATX Power Supply(5VSB) Connector (ATX_5VSB1) ........................... 110
COM3 RS232, RS422, and RS485 Selection Pin Header
(JSETCOM3)........... ............................................................................. 111
SATA Power Connector (SATA_PWR1)............................................... 111
COM2 Pin Header (COM2)................................................................... 112
System Fan Connector (SYSFAN1) ..................................................... 112
Case Open Selection Pin Header (JCASEOP_SW1) ........................... 112
Case Open Pin Header (JCASE1)........................................................ 113
PS/2 Keyboard and PS/2 Mouse Connector (KBMS1) ......................... 113
Mini-PCIe Connector (MINIPCIE2) ....................................................... 114
Mini-PCIe and mSATA Connector (MINIPCIE1)................................... 115
Low Pin Count Interface Header (LPC1) .............................................. 116
BIOS Flash Pin Header (SPI_CN1) ...................................................... 117
RTC Reset Pin Header (JRTCTEST1) ................................................. 117
SATA Power Connector (SATA_PWR2)............................................... 117
Dual-Port USB2.0 Pin Header (USB0708)............................................ 118
Dual-Port USB2.0 Pin Header (USB0910)............................................ 118
eDP Connector (eDP1), Optional BOM ................................................ 119
Power LED and Keyboard Lock Pin Header (JFP3) ............................. 119
Power Switch/HDD LED/SMBus/Speaker Pin Header (JFP1 + JFP2) . 120
LVDS2 Control Signal Pin Header (LVDS2), Optional BOM................. 120
eDP Backlight Inverter Power Connector (INV-EDP1), Optional BOM. 121
ATX 12 V Power Supply Connector (ATX12V1) ................................... 121
SIM Card Holder (SIM2) ....................................................................... 121
RS-485/422 Terminal Resistor Jumper (SW_422_1) ........................... 122
xii
Chapter
1
1
General Information
1.1 Introduction
The AIMB-215 with Intel® Celeron™ J1900/N2930/N2807 processor is designed for
industrial applications that require enhanced computing performance and power
management capabilities. The motherboard features an onboard Intel® Celeron™
J1900/N2930/N2807 quad-core 2.0/1.83 and dual-core 1.58 GHz CPU with DDR3L
1333MHz of up to 8 GB.
The AIMB-215 offers rich I/O connectivity with one USB 3.0 and nine USB 2.0 ports,
as well as six COM ports integrated in a standard 170 x 170 mm form factor. The system also supports dual display for LVDS, DP++ and VGA. AIMB-215 also features
numerous connectivity and expansion options, including PCIe x1, 8-bit GPIO, two
SATA II 3GB/s connectors, an optional TPM security feature, and two Mini-PCIe
expansion slots for easy integration. A dual Intel® chipset and 10/100/1000 Mbps
Ethernet port are also provided to deliver high-speed networking.
AIMB-215 is powered by the newest Intel® Celeron™ processor, which is built on
22nm process technology. The thermal design power rating for the Intel N2807 dualcore architecture is only 4.5 W, and that for the quad-core N2930/J1900 design is
only 7.5 W/10 W, allowing additional power reductions, system compressions, and
performance improvements to be implemented in the future. All the features
described above are incorporated into a space-saving, power-efficient, and costeffective Mini-ITX form factor.
1.2 Features







Supports Intel® Celeron™ J1900, N2930, and N2807 processors
Two 204-pin SODIMM, up to 8 GB DDR3L, and 1333 MHz SDRAM
Supports 1 PCIe x1 and two Mini-PCIe expansion ports, six serial ports, 10 USB
ports, and two SATA II ports
Lower total ownership costs with DC12-V functionality; supports 24-bit dualchannel LVDS
Onboard TPM 1.2 support (optional)
Supports a dual-channel 6 W amplifier (optional)
Supports embedded software APIs and utilities
1.3 OS and BIOS Compatibility
The AIMB-215 BIOS supports OS in legacy mode for 32- and 64-bit, and supports
OS in UEFI mode for 64-bit.
AIMB-215 User Manual
2
1.4.1 System



CPU: Intel® Celeron™ J1900/N2930/N2807
BIOS: SPI 16-Mbit BIOS
SATA hard disk drive interface: Two onboard SATA connectors with a data
transmission rate of up to 300 MB
mSATA support is only available when SATA 2 is not in use; mSATA
and SATA2 cannot be used concurrently.
1.4.2 Memory

RAM: Up to 8 GB in two-slot 204-pin SODIMM sockets. Supports dual-channel
DDR3L (low voltage) SODIMM 1.35 V modules of up to 1333 MHz
Note!
AIMB-215 supports 1.35 V memory only. Users must install the memory
modules on the DIMMA 1 socket first.
1.4.3 Input/Output





PCI bus: One PCIe x1 slot
Serial ports: Six serial ports; COM3 comprises RS-232/422/485 and five RS232 serial ports
Keyboard and PS/2 mouse connector: Supports one standard PS/2 keyboard
and one standard PS/2 mouse (onboard six-pin wafer box)
USB port: Supports one USB 3.0 port with a transmission rate of up to 5Gbps
and nine USB 2.0 ports with transmission rates of up to 480 Mbps
GPIO connector: One 8-bit general purpose input/output
1.4.4 Graphics





Controller: Embedded Gen7, Gfx frequency 688/313/313 MHz for J1900 /
N2930/N2807
Display memory: Dynamically shared system memory of up to 224 MB
VGA: Supports a display resolution of up to 2560 x 1600 @ 60 Hz
LVDS: Supports a display resolution of up to 1920 x 1200 @ 60 Hz
Display Ports 1 and 2: Supports up to 2560 x 1600 @ 60 Hz
1.4.5 Ethernet LAN


Supports a dual 10/100/1000 Mbps Ethernet port (s) via PCI Express x1 bus,
which provides a data transmission rate of 500 MB/s
Controller: LAN1: Realtek 8111E; LAN2: Realtek 8111E
1.4.6 Industrial Features

Watchdog timer: Can generate a system reset. The watchdog timer is programmable, with each unit equal to one second or one minute (255 levels)
3
AIMB-215 User Manual
General Information
Note!
Chapter 1
1.4 Specifications
1.4.7 Mechanical and Environmental Specifications







Operating temperature: 0 ~ 60 °C (32 ~ 140 °F, depending on the CPU)
Storage temperature: -40 ~ 85 °C (-40 ~ 185 °F)
Humidity: 5 ~ 95% non-condensing
Power supply voltage: +5 V, +12 V, 5 VSB
Power consumption:+5 V @ 0.88 A, +12 V @ 1.38 A, 5 VSB @ 0.21 A
(Intel J1900 2.0 GHz processor/DDR3L 1333 MHz 4 GB x 2)
Board size: 170 x 170 mm (6.69 x 6.69")
Board weight: 0.365 kg
1.5 Jumpers and Connectors
The AIMB-215 motherboard is equipped with connectors for linking the board to
external devices such as hard disk drives and a keyboard. The board also features
several jumpers for configuring the system according to specific applications.
The function of each board jumper and connector is listed in the table below. The procedure for setting jumpers is explained in subsequent sections of this chapter.
Instructions for connecting external devices to the motherboard are provided in
Chapter 2.
Table 1.1: Connector/Header List
Description
Part Reference
1
DC-IN adaptor connector
DCIN1
2
Display Port connector
DP1
3
eDP panel voltage selection
JEDP-1+JEDP-2
4
VGA connector
VGA1
5
Serial ATA interface connector
SATA2
6
SATADOM power pin header
JSATAPWR1
7
Serial ATA interface connector
SATA1
8
CMOS battery wafer box
BAT1
9
System fan connector
SYSFAN2
10
USB 3.0 + USB 2.0 stack connector
USB0102
11
SPI BIOS socket
SPI1
12
USB 2.0 * 2 stack connector
USB0304
13
COM1 box header
COM1
14
Watchdog timer output and OBS beep
JOBS1+JWDT1
15
RJ45(LAN 1+ LAN 2) connector
LAN12
16
SPDIF interface pin header
SPDIF_OUT1
17
HD analog audio interface
AUDIO1
18
Front-panel audio pin header
FPAUD1
19
Audio amplifier output pin header
JAMP1
20
PCI-Express x1 slot
PCIEX1_1
21
LVDS VESA, JEIDA format selection pin
header
JLVDS_VCON1
22
LVDS panel connector
LVDS1
23
Dual-port USB2.0 pin header
USB0506
24
DDR3L SODIMM socket
DIMMB1
25
LVDS panel voltage selection
JLVDS1+JLVDS2
AIMB-215 User Manual
4
COM6 RI# selection pin header
JSETCOM6_V1
27
LVDS backlight inverter power connector
INV1
28
8-bit general purpose I/O pin header
GPIO1
29
COM 3 ~ COM 6 box header
COM3456
30
AT/ATX mode selection
PSON1
31
ATX power supply (5VSB) connector
ATX_5VSB1
32
COM3 RS232,RS422,RS485 selection pin
header
JSETCOM3
33
SATA power connector
SATA_PWR1
34
COM2 box header
COM2
35
System fan connector
SYSFAN1
36
Case open selection pin header
JCASEOP_SW1
37
Case open pin header
JCASE1
38
PS/2 keyboard and PS/2 mouse connector
KBMS1
39
Mini-PCIe connector
MINIPCIE2
40
Mini-PCIe, mSATA connector
MINIPCIE1
41
DDR3L SODIMM socket
DIMMA1
42
Low pin count interface header
LPC1
43
BIOS flash pin header
SPI_CN1
44
RTC reset pin header
JRTCTEST1
45
SATA power connector
SATA_PWR2
46
Dual-port USB2.0 pin header
USB0708
47
Dual-port USB2.0 pin header
USB0910
48
eDP connector
eDP1
49
Power LED and keyboard lock pin header
JFP3
50
Power switch/HDD LED/SMBus/Speaker pin
header
JFP1+JFP2
51
LVDS2 control signal pin header
LVDS2
52
eDP backlight inverter power connector
INV-EDP1
53
ATX 12-V power supply connector
ATX12V1
54
SIM card holder
SIM2
55
RS-485/422 terminal resistor jumper
SW_422_1
5
AIMB-215 User Manual
General Information
26
Chapter 1
Table 1.1: Connector/Header List
1.6 Board Layout: Jumper and Connector
Locations
Figure 1.1 Jumper and Connector Locations
USB2 USB4
USB1 USB3
Figure 1.2 I/O Connectors
AIMB-215 User Manual
6
Chapter 1
1.7 AIMB-215 Board Diagram
General Information
Figure 1.3 AIMB-215 Board Diagram
7
AIMB-215 User Manual
1.8 Safety Precautions
Warning! Always completely disconnect the power cord from the chassis when
working with the hardware. Do not connect devices while the power is
on. Sensitive electronic components can be damaged by sudden power
surges. Only experienced electronics personnel should open the PC
chassis.
Caution! Always ground yourself to remove any static charge before touching the
motherboard. Modern electronic devices are very sensitive to electrostatic discharges. As a safety precaution, use a grounding wrist strap at
all times. Place all electronic components on a static-dissipative surface
or in a static-shielded bag when not in the chassis.
Caution! The computer is provided with a battery-powered real-time clock circuit.
There is a danger of explosion if the battery is incorrectly replaced.
Replace only with the same or equivalent type recommended by the
manufacturer. Discard used batteries according to the manufacturer's
instructions.
Caution! There is a danger of a new battery exploding if incorrectly installed. Do
not attempt to recharge, force open, or heat the battery. Replace the
battery only with the same or equivalent type recommended by the manufacturer. Discard used batteries according to the manufacturer’s
instructions.
AIMB-215 User Manual
8
This section provides instructions on how to configure the motherboard by setting
jumpers, and also outlines the default motherboard settings and options for each
jumper.
1.9.1 Setting Jumpers
1.9.2 CMOS Mode Selection (JRTCTEST1)
The AIMB-215 motherboard contains a jumper that can erase CMOS data and reset
the system BIOS information. This jumper is typically set with Pins 1 and 2 being
closed. To reset the CMOS data, set J1 to Pins 2 and 3 as closed for a few seconds
before moving the jumper back to Pins 1 and 2 as closed. This procedure resets the
CMOS to its default settings.
Table 1.2: CMOS Mode Selection (JRTCTEST1)
Function
Setting
1
Normal (Default)
1
Clear CMOS
9
AIMB-215 User Manual
General Information
The motherboard can be configured according to the application requirements with
the setting of jumpers. A jumper is a metal bridge used to close an electrical circuit.
Jumpers typically consist of two metal pins and a small metal clip (often protected by
a plastic cover) that slides over the pins to connect them. To “close” (or turn ON) a
jumper, connect the pins with the clip. To “open” (or turn OFF) a jumper, simply
remove the clip. Some jumpers comprise a set of three pins, labeled 1, 2, and 3. With
these jumpers, simply connect either Pins 1 and 2, or Pins 2 and 3. A pair of needlenose pliers may be necessary for setting jumpers.
Chapter 1
1.9 Jumper Options
1.9.3 COM2 RS-232/422/485 Mode Selector (JSETCOM3)
Users can select between the RS-232/422/485 modes for COM3 using JSETCOM3.
The default setting is “RS-232”.
Table 1.3: COM2 RS-232/422/485 Mode Selector (JSETCOM3)
Function
Setting
Set COM3 as RS-232 (default)
Set COM3 as RS-422
Set COM3 as RS-485
Table 1.4: COM3 RS-232/422/485 Mode Selector (JSETCOM3)
Function
Jumper Settings
RS-232*
(5-6) + (7-9) + (8-10) + (13-15) + (14-16) closed
RS-422
(3-4) + (9-11) + (10-12) + (15-17) + (16-18) closed
RS-485
(1-2) + (9-11) + (10-12) + (15-17) + (16-18) closed
*default
AIMB-215 User Manual
10
Table 1.5: LVDS Panel Voltage Selection (JLVDS1 + JLVDS2)
Function
Settings
General Information
Set the LVDS panel as +5 V
Set LVDS panel as +3.3 V (default)
Set the LVDS panel as +12 V
1.9.5 PSON1: ATX and AT Mode Selector
Table 1.6: PSON1: ATX and AT Mode Selector
Closed Pins
Result
1-2
AT Mode
2-3*
ATX Mode
Chapter 1
1.9.4 LVDS Panel Voltage Selection (JLVDS1 + JLVDS2)
*Default
1
1
ATX Mode
2-3 closed
AT Mode
1-2 closed
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AIMB-215 User Manual
1.9.6 JOBS1 + JWDT1: OBS Beep and Watchdog Timer Output
Table 1.7: JOBS1 + JWDT1: OBS Beep and Watchdog Timer Output
Closed Pins
Result
2-3*
Watchdog reset
4-5*
OBS alarm
*default
Function
Settings
1
2
3
4
5
1
2
3
4
5
Watchdog Timer Output (2-3) (default)
OBS BEEP (4-5) (default)
Watchdog Timer disabled (1-2)
OBS BEEP (4-5) (default)
1.9.7 Case Open Pin Header Selection (JCASEOP_SW1)
Table 1.8: Case Open Pin Header Selection (JCASEOP_SW1)
Function
Normal Close (default)
Normal Open
Settings
1
2
3
1
2
3
1
1
1.9.8 Power Switch/HDD LED/SMBus/Speaker Pin Header (JFP1 +
JFP2)
Table 1.9: Power Switch/HDD LED/SMBus/Speaker Pin Header (JFP1 +
JFP2)
Function
Settings
1
JFP1 (7-10) (default)
AIMB-215 User Manual
12
Table 1.10: EDP Panel Voltage Selection (JEDP1 + JEDP2) (optional)
Function
SettingS
General Information
Set the EDP Panel as
+5 V
Set the EDP panel as
+3.3 V (default)
Set the EDP panel as
+12 V
1.9.10 JEIDA/VESA Selection (JLVDS_VCON1)
Table 1.11: JEIDA/VESA Selection (JLVDS_VCON1)
Function
Pull high to +V5.
(JEIDA or VESA base
on panel definition)
Pull down to GND
(default)
(JEIDA or VESA base
on panel definition)
Chapter 1
1.9.9 EDP Panel Voltage Selection (JEDP1 + JEDP2) (optional)
Settings
1
1
13
AIMB-215 User Manual
1.9.11 RS-485/422 Terminal Resistor Jumper (SW_422_1)
Table 1.12: RS-485/422 Terminal Resistor Jumper (SW_422_1)
Function
Settings
Default
Add RS-485 terminator
Add RS-422 terminator
AIMB-215 User Manual
14
Chapter
2
Connecting
Peripherals
2
2.1 Introduction
Most of the device connectors can be accessed from the top of the board during
installation in the chassis. If the system is installed with several cards or the chassis
is packed, partial removal of the card may be necessary to make all connections.
2.2 LAN and USB Ports (LAN1/2, USB0102/
USB0304/USB0506/USB0708/USB0910)
AIMB-215 provides up to nine USB 2.0 and one USB 3.0 ports. One USB 3.0 and
three USB 2.0 are located on the rear side, and a six-pin header is located on the
board. The USB interface complies with the USB specification revision 2.0 that supports transmission rates of up to 480 Mbps, and revision 3.0 that supports transmission rates of up to 5 Gbps, and is also fuse protected. Furthermore, the USB
interface can be disabled in the system BIOS setup menu.
The AIMB-215 system is equipped with two high-performance 1000 Mbps Ethernet
LAN adapters, both of which are supported by all major network operating systems.
The RJ-45 jacks on the rear panel facilitate convenient LAN connection.
USB0102
USB0506
USB0304
USB0708
USB0910
Table 2.1: LAN LED Indicators
LAN Mode
LAN Indicator
1 Gbps link on
LED1 Green on
100 Mbps link on
LED1 Orange on
Active
LED2 Green flashing
Note!
1.
2.
AIMB-215 User Manual
Only USB 1/2/5/6 support S3 wakeup, USB 3/4/7/8/9/10 do NOT support
the S3 wakeup function.
If Windows 7 is selected as the OS, users must install a USB 3.0 XHCI
driver.
Please refer to Chapter 8 for information on XHCI driver installation.
16
Chapter 2
2.3 VGA Connector (VGA1)
VGA1 is a standard 15-pin D-SUB connector commonly used for VGA. The pin
assignments for VGA are detailed in Appendix B.
17
AIMB-215 User Manual
Connecting Peripherals
VGA1
2.4 Serial Ports (COM1 ~ COM6)
COM1
COM2
COM 3/4/5/6
AIMB-215 supports six serial ports. COM3 is RS-232/422/485 and COM1/2/4/5/6 are
RS-232. COM6 also supports 5 V/12 V according to jumper selection. Users can
employ JSETCOM3 to select between the RS-232/422/485 modes for COM3. Such
ports can be connected to serial devices, such as a mouse or printer, or to a communications network.
The IRQ and address ranges for both ports are fixed. However, users can disable the
port or change the parameters via the system BIOS setup.
Various devices implement the RS-232/422/485 standards in different manners.
Users who experience problems with a serial device are advised check the connector
pin assignments.
AIMB-215 User Manual
18
Onboard six-pin wafer box connector, which supports one standard PS/2 keyboard
and one standard PS/2 mouse.
2.6 Display Port Connector (DP1)
DP1
19
AIMB-215 User Manual
Connecting Peripherals
KBMS1
Chapter 2
2.5 PS/2 Keyboard and Mouse Connector (KBMS1)
2.7 System FAN Connector (SYSFAN1/2)
SYSFAN1
SYSFAN2
For devices with a fan installed, this connector supports cooling fans of up to 500 mA
(6 W).
2.8 Front Panel Connectors (JFP3/JFP1 + JFP2)
Several external switches are provided for monitoring and controlling the AIMB-215.
JFP3
JFP1+JFP2
AIMB-215 User Manual
20
For computer cases equipped with ATX power supply, users should connect the
Power On/Off button on the computer case to (JFP1 + JFP2/PWR_SW) for convenient Power On/Off functionality.
2.8.2 Reset (JFP1 + JFP2/RESET)
Many computer cases offer the convenience of a specific reset button. Connect the
wire for the reset button.
An LED can be linked to the connector (JFP2/HDDLED) to indicate when the HDD is
active.
2.8.4 External Speaker (JFP1 + JFP2/SPEAKER)
(JFP1 + JFP2/SPEAKER) is a four-pin connector for an external speaker. If no external speaker is available, the AIMB-215 provides an onboard buzzer as an alternative.
To enable the buzzer, set Pins 7-10 as closed.
2.8.5 Power LED and Keyboard Lock Connector (JFP3/PWR_LED
and KEY LOCK)
(JFP3/PWR_LED and KEY LOCK) is a five-pin connector for the Power-On LED and
Key Lock function. Refer to Appendix B for detailed information regarding the pin
assignments. The Power LED cable should be connected to Pins 1-3. The key lock
button cable should be connected to Pins 4 and 5.
Three power supply connection modes exist. The first is the ATX power mode, where
the system is powered on/off by momentarily pressing the power button. The second
is the AT power mode, where the system is powered on/off using the power supply
switch. The third is another AT power mode that involves the front panel power
switch. The status differences indicated by the power LED are listed in the following
table:
Table 2.2: ATX Power Supply LED Status (AT power not supported)
LED
(ATX power mode)
(On/off by
momentarily
pressing the power
button)
LED
(AT power mode)
(Powered on/off using
the power supply
switch)
LED
(AT power mode)
(Powered on/off
using the front panel
switch)
PSON1
(on the back plane) Pins 2-3 closed
jumper setting
Pins 1-2 closed
Connect Pins 1 and 2
to the panel switch
using a cable
System On
On
On
On
System Suspend
Fast flashes
Fast flashes
Fast flashes
System Off
Slow flashes
Off
Off
Power mode
21
AIMB-215 User Manual
Connecting Peripherals
2.8.3 HDD LED (JFP1 + JFP2/HDDLED)
Chapter 2
2.8.1 ATX Soft Power Switch (JFP1 + JFP2/PWR_SW)
2.9 Line-Out Connector (AUDIO1)
AUDIO1
This connects supports line-out, mic-in, and line-in functions.
2.10 Serial ATA Interface (SATA1/2) & SATADOM
Power Pin Header (JSATAPWR1)
SATA1
SATA2
JSATAPWR1
AIMB-215 User Manual
22
Note!
SATA2 is only supported when mSATA is not in use. SATA2 and
mSATA cannot be used concurrently.
Chapter 2
AIMB-215 features a high-performance Serial ATA interface (up to 300 MB/s) that
allows cabling to hard drives using long, thin cables.
Table 2.3: SATADOM Power Pin Header (JSATAPWR1)
Signal
1
GND
2
SATA_DOM
3
+V5
Connecting Peripherals
Pin
2.11 PCI-Express x1 Slot (PCIEX1_1)
The AIMB-215 features one PCIe x1 slot.
23
AIMB-215 User Manual
2.12 Front Panel Audio Connector (FPAUDIO1)
This connector is for a chassis-mounted front-panel audio I/O module that supports
either HD audio or a legacy AC’97 (optional) standard. This connector is attached
using the front panel audio I/O module cable.
FPAUDIO1
2.13 ATX 12V Power Connector (ATX12V1)
This connector is for an ATX Micro-Fit power supply. The plugs from the power supply are designed to fit these connectors in only one direction. Determine the correct
orientation and press firmly until the connectors mate completely.
ATX12V1
AIMB-215 User Manual
24
The SPI flash card pin header may be used to flash the BIOS if the AIMB-215 cannot
be powered on.
2.15 LVDS Backlight Inverter Power Connector
(INV1)
INV1
25
AIMB-215 User Manual
Connecting Peripherals
SPI_CN1
Chapter 2
2.14 SPI Flash Connector(SPI_CN1)
Note!

Signal Description
Signal
VR
Signal Description
Vadj=0.75 V
(Recommended: 4.7 K, 1/16 W)
LCD backlight ON/OFF control signal
ENBKL
2.16 LVDS Connector (LVDS1)
LVDS1
Pin 3: GND → Panel connected
NC/3.3 V → No panel
AIMB-215 User Manual
26
2.18 CMOS Battery Wafer Box (BAT1)
BAT1
27
AIMB-215 User Manual
Connecting Peripherals
GPIO1
Chapter 2
2.17 General Purpose I/O Connector (GPIO1)
2.19 SPI BIOS Socket (SPI1)
SPI1
2.20 SPDIF Interface Pin Header (SPDIF_OUT1)
SPDIF_OUT1
AIMB-215 User Manual
28
2.22 ATX Power Supply (5VSB) Connector
(ATX_5VSB1)
ATX_5VSB1
29
AIMB-215 User Manual
Connecting Peripherals
JAMP1
Chapter 2
2.21 Audio Amplifier Output Pin Header (JAMP1),
Optional BOM
2.23 SATA Power Connector (SATA_PWR1/2)
SATA_PWR1
SATA_PWR2
2.24 Case Open Pin Header (JCASE1)
JCASE1
AIMB-215 User Manual
30
DIMMA1
Note!
AIMB-215 supports 1.35 V memory only. Users must populate the memory on socket DIMMA1 first.
Users are advised to use memory modules of the same type, speed,
and frequency for each motherboard. Memory modules of different
types and speeds should not be used.
31
AIMB-215 User Manual
Connecting Peripherals
DIMMB1
Chapter 2
2.25 DDR3L SODIMM Socket (DIMMA1/B1)
2.26 Mini-PCIe and mSATA Connector (MINIPCIE1)
MINIPCIE1
2.27 Mini-PCIe Connector (MINIPCIE2)
MINIPCIE2
AIMB-215 User Manual
32
Chapter 2
2.28 Low Pin Count Interface Header
JRTCTEST1
33
AIMB-215 User Manual
Connecting Peripherals
2.29 RTC Reset Pin Header (JRTCTEST1)
2.30 eDP Connector (eDP1), Optional BOM
eDP1
2.31 eDP Backlight Inverter Power Connector (INVEDP1), Optional BOM
INV-EDP1
AIMB-215 User Manual
34
Chapter 2
2.32 SIM Card Holder (SIM2)
35
AIMB-215 User Manual
Connecting Peripherals
SIM2
AIMB-215 User Manual
36
Chapter
3
BIOS Operation
3
3.1 Introduction
AMI BIOS has been integrated into numerous motherboards for over a decade. The
AMI BIOS setup menu may also be referred to as the BIOS, BIOS setup, or CMOS
setup.
With the AMI BIOS Setup program, users can modify the BIOS settings and control
the special system features. The Setup program comprises several menus with
options for adjusting or turning special features on or off. This chapter describes the
basic navigation of the AIMB-215 BIOS setup menu pages.
3.2 BIOS Setup
The AIMB-215 Series is equipped with built-in AMI BIOS and a CMOS Setup Utility
that allows users to configure specific settings or activate certain system features.
The CMOS Setup Utility saves the configuration in the CMOS RAM of the motherboard. When the system power is turned off, the battery on the board supplies the
necessary power to preserve the CMOS RAM.
When the power is turned on, press the <Del> button during the BIOS power-on selftest (POST) to access the CMOS Setup Utility screen.
Control Keys
< ↑ >< ↓ >< ← >< → >
Move select item
<Enter>
Select item
<Esc>
Main Menu - Quit without saving changes to the CMOS
Sub Menu - Exit current page and return to the Main Menu
<Page Up/+>
Increase the numeric value or make changes
<Page Down/->
Decrease the numeric value or make changes
<F1>
General help, for Setup Sub Menu
<F2>
Item help
<F5>
Load previous values
<F7>
Load setup defaults
<F10>
Save all CMOS changes
AIMB-215 User Manual
38
Press <Del> to enter the AMI BIOS CMOS Setup Utility, the Main Menu will appear
on the screen. Use the arrow keys to select items and press <Enter> to access the
submenu.
Chapter 3
3.2.1 Main Menu
BIOS Operation
The Main BIOS Setup page comprises two main frames. The left frame displays all
configurable options. Grayed-out options cannot be configured, whereas the options
displayed in blue can be. The right frame also displays the key legend.
The area above the key legend is reserved for text messages. When an option is
selected in the left frame, the display text changes to white and is often accompanied
by a text message.
 System Time/System Date
Use this option to change the system time and date. Highlight the System Time
or System Date using the <Arrow> keys. Enter new values via the keyboard.
Press the <Tab> or <Arrow> keys to move between fields. The date must be
entered in MM/DD/YY format. The time must be entered in HH:MM:SS format.
39
AIMB-215 User Manual
3.2.2 Advanced BIOS Features
Select the Advanced tab from the AIMB-215 Setup menu to enter the Advanced
BIOS Setup page. Users can select any item in the left frame of the screen, such as
CPU Configuration, to access the submenu for that item. Select an Advanced BIOS
Setup option by highlighting the text using the <Arrow> keys. All Advanced BIOS
Setup options are described in this section. The Advanced BIOS Setup menu screen
is shown below. The submenus are described in the following pages.
AIMB-215 User Manual
40
Chapter 3
3.2.2.1 ACPI Settings
BIOS Operation
ACPI Settings
 Enable ACPI Auto Configuration
This item allows users to enable or disable ACPI auto configuration.
 Enable Hibernation
This item allows users to enable or disable hibernation.
 ACPI Sleep State
This item allows users to set the ACPI sleep state.
 Lock Legacy Resources
This item allows users to lock legacy device resources.
41
AIMB-215 User Manual
3.2.2.2 Super IO Configuration
AIMB-215 User Manual
42
Chapter 3
BIOS Operation
AIMB-215 User Manual
43
AIMB-215 User Manual
44
Chapter 3
BIOS Operation


Serial Ports 1/2/3/4/5/6
This item allows users to enable or disable serial Ports 1/2/3/4/5/6.
Change Settings
This item allows users to change the settings for serial Ports 1/2/3/4/5/6.
45
AIMB-215 User Manual
3.2.2.3 PC Health Status
This page shows the AIMB-215 PC health status.







Smart Fan Function
This item allows users to enable or disable the System Smart Fan function.
CPU Warning Temperature
This item allows users to set the CPU temperature threshold. When the system
CPU reaches the threshold temperature, a buzzer will emit a warning alert.
ACPI Shutdown Temperature
This item allows users to set the CPU temperature threshold at which the system automatically shuts down to prevent the CPU from overheating.
Case Open Warning
This item allows users to enable or disable the Case Open Warning function.
Wake On Ring
This item allows users to enable or disable Wake On Ring functionality.
RS-485 AUTO FLOW
This item allows users to enable or disable the RS-485 AUTO FLOW function.
Watchdog Timer
This item allows users to enable or disable the Watchdog timer.
AIMB-215 User Manual
46
Chapter 3
3.2.2.4 Smart Fan Mode Configuration
This page shows the Smart Fan Mode items.
BIOS Operation

Smart Fan Mode
This item allows users to enable or disable Smart Fan mode.
47
AIMB-215 User Manual
3.2.2.5 Digital I/O Configuration

Digital I/O Configuration
This item allows users to set digital I/O 1 to 8 as inputs or outputs.
3.2.2.6 ISCT Support

ISCT Support
This item allows users to enable or disable ISCT support.
AIMB-215 User Manual
48
Chapter 3
3.2.2.7 S5 RTC Wake Settings
BIOS Operation

Wake System From S5
This item allows users to enable or disable system wake on alarm event.
3.2.2.8 Serial Port Console Redirection

Console Redirection
This item allows users to enable or disable console redirection.
49
AIMB-215 User Manual
3.2.2.9 CPU Configuration



Limit CPUID Maximum
This item allows users to enable or disable the ability to limit the CPUID maximum.
Execute Disable Bit
This item allows users to enable or disable the Execute Disable Bit function.
Intel Virtualization Technology
This item allows users to enable or disable Intel® Virtualization Technology.
AIMB-215 User Manual
50
Chapter 3
This page shows the CPU information.
BIOS Operation
3.2.2.10 PPM Configuration

S0ix
This item allows users to enable or disable the CPU S0ix state.
51
AIMB-215 User Manual
3.2.2.11 IDE Configuration








Serial-ATA (SATA)
This item allows users to enable or disable the SATA device.
SATA Speed Support
This item allows users to select the SATA speed (Gen1 or Gen2).
SATA ODD Port
This item allows users to set Port 1 or 2 to have ODD functionality.
SATA Mode
This item allows users to select the mode for SATA controller(s).
Serial-ATA Port 1
This item allows users to enable or disable the Serial-ATA Port 1 device.
SATA Port 1 Hot Plug
This item allows users to enable or disable the SATA Port 1 hot plug.
Serial-ATA Port 2
This item allows users to enable or disable the Serial-ATA Port 2 device.
SATA Port 2 Hot Plug
This item allows users to enable or disable the SATA Port 2 hot plug.
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Chapter 3
3.2.2.12 Miscellaneous Configuration
BIOS Operation



High Precision Timer
This item allows users to enable or disable the high-precision timer.
PCI Express Dynamic Clock Gating
This item allows users to enable or disable the PCI Express Dynamic Clock Gating function.
OS Selection
This item allows users to set the OS as Windows 7 or Windows 8.
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3.2.2.13 PCI Subsystem Settings
General PCI Device Settings
 PCI Latency Timer
This item allows users to program the timer value into the PCI Latency Timer
Register.
 VGA Palette Snooping
This item allows users to enable or disable VGA palette register snooping.
 PERR# Generation
This item allows users to enable or disable PERR# Generation.
 SERR# Generation
This item allows users to enable or disable SERR# Generation.
 Above 4G Decoding
This item allows users to enable or disable 64-bit-capable device decoding in
above 4G address spaces (if the system supports 64-bit PCI decoding).
 SR-I0V Support
If the system has SR-IOV-capable PCIe devices, this item allows users to
enable or disable single root IO virtualization support.
.
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Chapter 3
BIOS Operation
PCI Express Device Register Settings
 Relaxed Ordering
This item allows users to enable or disable relaxed ordering.
 Extended Tag
This item allows users to enable or disable extended tags.
 No Snooping
This item allows users to enable or disable the No Snooping function.
 Maximum Payload
This item allows users to set the maximum payload for PCI Express devices or
authorize the system BIOS to select the value.
 Maximum Read Request
This item allows users to set the maximum read request size for PCI Express
devices or authorize the system BIOS to select the value.
PCI Express Link Register Settings
 ASPM Support
This item allows users to enable or disable ASPM support.
 Extended Synch
This item allows users to enable or disable the Extended Synch function.
 Link Training Retry
This item allows users to define the number of retry attempts for software link
training.
 Link Training Timeout
This item allows users to define the number of microseconds the software will
wait before polling the “Link Training” bit in the link status register. Values range
from 10 to 10000 uS.
 Unpopulated Links
To save power, the software will disable unpopulated PCI Express links if this
option set as “Disable Link”.
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
Restore PCIE Registers
On non-PCI Express aware OS (pre-Windows Vista), some devices may not be
correctly reinitialized after S3. Enabling this item restores PCI Express device
configurations upon S3 resume. Warning: Enabling this item can cause issues
with other hardware after S3 resume.
PCI Express GEN2 Device Register Settings
 Completion Timeout
This item is an in-device function that supports Completion Timeout programmability by allowing the system software to modify the Completion Timeout
value. The default value is 50us to 50ms. If the “Shorter” option is selected, the
software will use the shorter timeout ranges supported by the hardware. If the
“Longer” option is selected, the software will use longer timeout ranges.
 ARI Forwarding
If supported by the hardware and set to “Enabled”, the downstream port prevents the traditional device number field from being 0 enforcement when turning
a Type 1 Configuration Request into a Type 0 Configuration Request, thereby
permitting access to the extended functions of the ARI device located below the
port. The default value is “Disabled”.
 AtomicOp Requester Enable
If supported by the hardware and set to “Enabled”, this function initiates AtomicOp requests only if the Bus Master Enable bit is in the Command Register Set.
 AtomicOp Egress Blocking
If supported by the hardware and set to “Enabled”, outbound AtomicOp
requests transmitted via egress ports will be blocked.
 IDO Request Enable
If supported by the hardware and set to “Enabled”, this item allows users to set
the number of ID-based ordering (IDO) bit (Attribute[2]) requests to be initiated.
 IDO Completion Enable
If supported by the hardware and set to “Enabled”, this item allows users to set
the number of IDO bit (Attribute[2]) requests to be initiated.
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
LTR Mechanism Enable
If supported by the hardware and set to “Enabled”, the Latency Tolerance
Reporting (LTR) mechanism will be activated.
End-End TLP Prefix Blocking
If supported by the hardware and set to “Enabled”, this function blocks the forwarding of TLPs that contain End-End TLP Prefixes.
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BIOS Operation
PCI Express Gen2 Link Register Settings
 Target Link Speed
If supported by the hardware and set to “Force to 2.5 GT/s” to downstream
ports, users can determine the upper limit link operation speed by restricting the
values specified by the upstream component in its training sequences. When
the “Auto” option is selected, HW-initialized data will be used.
 Clock Power Management
If supported by the hardware and set to “Enabled”, the device is permitted to
use CLKREQ# signals to manage the link clock power according to the protocol
defined in an appropriate form factor specification.
 Compliance SOS
If supported by the hardware and set to “Enabled”, this option forces the LTSSM
to send SKP-ordered sets between sequences when sending compliance patterns or modified compliance patterns.
 Hardware Autonomous Width
If supported by the hardware and set to “Disabled”, the ability to alter the link
width using the hardware is disabled, except by reducing the size to correct
unstable link operation.
 Hardware Autonomous Speed
If supported by the hardware and set to “Disabled”, the ability to alter link speed
using the hardware is disabled, except by reducing the speed to correct unstable link operation.
Chapter 3

3.2.2.14 Network Stack

Network Stack
This item allows users to enable or disable the UEFI Network Stack function.
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Chapter 3
3.2.2.15 Compatibility Support Module Configuration
BIOS Operation






CSM Support
This item allows users to enable or disable CSM support.
GateA20 Active
Upon request - GA20 can be disabled using BIOS services. ALWAYS - do not
allow disabling GA20; this option is useful when any RT code is executed above
1MB.
Option ROM Messages
This item allows users to set the display mode for Option ROM.
INT19 Trap Response
This item allows users to set the BIOS reaction to INT19 trapping by Option
ROM: “Immediate” - execute the trap right away; “postponed” - execute the trap
during legacy boot.
Boot Options Filter
This item allows users to control the Legacy/UEFI ROM priority.
Option ROM Execution
– Network
Controls the execution of UEFI and Legacy PXE OpROM.
– Storage
Controls the execution of UEFI and Legacy Storage OpROM.
– Video
Controls the execution of UEFI and Legacy Video OpROM.
– Other PCI devices
Determines the OpROM execution policy for devices other than network,
storage, and/or video devices.
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
Security Device Support
This item allows users to enable or disable BIOS support for security devices.
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Chapter 3
3.2.2.16 USB Configuration
BIOS Operation








Legacy USB support
This item allows users to enable or disable support for legacy USB. The “Auto”
option disables legacy support if no USB devices are connected.
XHCI Hands Off
This is a workaround for OS without XHCI hands-off support. The change in
XHCI ownership should be claimed by the XHCI driver.
EHCI Hands Off
This is a workaround for OS without EHCI hands-off support. The change in
EHCI ownership should be claimed by the EHCI driver.
USB Mass Storage Driver Support
This item allows users to enable or disable the USB mass storage driver.
USB Transfer Timeouts
This item allows users to determine the timeout values for control, bulk, and
interrupt transfers.
Device Reset Timeout
This item allows users to set the USB mass storage device unit command timeout value.
Device Power-up Delay
Maximum time before the device issues a self-report to the host controller.
Mass Storage Device
This item allows users to determine the mass storage device emulation type.
The “Auto” option enumerates devices according to their media format. Optical
drives are emulated as CDROMs, and drives with no media are emulated
according to the drive type.
Note!
When the selected OS is Windows 7, users must install a USB 3.0 XHCI
driver.
Please refer to Chapter 8 for information on XHCI driver installation.
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3.2.2.17 Intel® TXE and Anti-Theft Technology Configuration







TXE
This item allows users to enable or disable TXE.
TXE HMRFPO
This item allows users to enable or disable TXE HMRFPO.
TXE Firmware Update
This item allows users to enable or disable TXE firmware updates.
TXE EOP Message
This item allows users to send EOP messages before entering the OS.
Intel® AT
This item allows users to enable or disable the BIOS AT code from running.
Intel® AT Platform PBA
This item allows users to enable or disable the BIOS AT code from running.
Enter Intel® AT Suspend Mode
This item allows users to request that a platform enter AT Suspend mode (this
option is only available when AT enrolled).
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Chapter 3
3.2.3 Chipset
This page provides information of the chipset on AIMB-215.
BIOS Operation


North Bridge
This item provides details of the North Bridge parameters.
South Bridge
This item provides details of the South Bridge parameters.
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
Max TOLUD
This item allows users to select the maximum TOLUD.
GOP and Intel IGD Configuration
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












VCC and VNN Configuration for Power State 2:
 Vcc_Vnn Config for Power State 2
This item allows users to enable or disable VCC and VNN Configuration for
Power State 2.
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BIOS Operation

GOP Driver
This item allows users to enable or disable the GOP driver.
Integrated Graphics Device
This item allows users to enable or disable an integrated graphics device.
IGD Turbo Enable
This item allows users to enable or disable the IGD Turbo Enable function.
Primary Display
This item allows users to select which IGD/PCI graphics device should be used
as the primary display.
GFX Boost
This item allows users to enable or disable GFX Boost.
PAVC
This item allows users to enable or disable Protected Audio Video Control.
DVMT Pre-Allocated
This item allows users to specify the DVMT 5.0 pre-allocated (fixed) graphics
memory size to be used by the internal graphics device.
DVMT Total Gfx Mem
This item allows users to specify the DVMT 5.0 total graphics memory size to be
used by the internal graphics device.
Aperture Size
This item allows users to select the aperture size.
DOP CG
This item allows users to enable or disable DOP CG.
GTT Size
This item allows users to select the GTT size.
IGD Thermal
This item allows users to enable or disable IGD thermal control.
Spread Spectrum clock
This item allows users to enable or disable the spread spectrum clock.
ISP Enable/Disable
This item allows users to enable or disable ISP function.
ISP PCI Device Selection
This item allows users to enable or disable ISP PCI device selection.
Chapter 3

IGD – LCD Control





Force Lid Status
For tests, this item forces the system to set the lid status as either “On” or “Off”.
BIA
Auto: GMCH uses the VBIOS default; Level n: Enabled with a selected aggressiveness level.
ALS Support
Only valid for ACPI.
IGD Flat Panel
This item allows users to adjust the IGD flat-panel options.
Panel Scaling
This item allows users to adjust the panel scaling options.
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Chapter 3
Graphics Power Management Control
BIOS Operation

RC6 (Render Standby)
This item allows users to enable render standby support.
LCD Control
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


Primary IGFX Boot Display (VBIOS Default)
This item allows users to select the video device activated during POST. Secondary boot display options are presented according to users’ selection.
LVDS Panel Type
This item allows users to specify the LVDS panel type.
Backlight Signal Control
This item allows users to set the backlight signal control as PWM or LINEAR.
Two display combinations tables are presented below. All combinations listed in
these tables have been tested and verified.
Single Display
BIOS Setup
Menu
DOS
Win8
CRT
PASS
PASS
PASS
DP
PASS
PASS
PASS
LVDS
PASS
PASS
PASS
DOS Mode
Win8.1
(Extended and
Clone modes)
Dual Display
Primary IGFX
Boot Display
BIOS Setup
Secondary
Menu
IGFX
Boot Display
CRT
DP
PASS
Only Primary.
PASS
CRT
LVDS
PASS
Only Primary.
PASS
DP
LVDS
PASS
Only Primary.
PASS
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Chapter 3
BIOS Operation













Azalia HD Audio
This item allows users to adjust the Azalia HD audio options.
USB Configuration
This item allows users to adjust the USB configuration.
PCI Express Configuration
This item allows users to adjust the PCI Express configuration.
High Precision Timer
This item allows users to enable or disable the high-precision timer.
LAN 1controller
This item allows users to enable or disable the LAN 1 controller.
LAN 1 PXE OpROM
This item allows users to enable or disable the LAN 1 option-ROM.
LAN 2 controller
This item allows users to enable or disable the LAN 2 controller.
LAN 2 PXE OpROM
This item allows users to enable or disable the LAN 2 option-ROM.
PCIe Wake
This item allows users to enable or disable the PCIe System Wakeup from S5
function.
Restore AC Power Loss
The configuration options for this item are “Off”, “On”, and “Last State”.
Global SMI Lock
This item allows users to enable or disable the Global SMI Lock function.
BIOS Read/Write Protection
This item allows users to enable or disable BIOS Read/Write Protection.
SATA Port 2/mSATA
This item allows users to specify SATA Port 2 or mSATA for use.
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Audio Configuration

Audio Controller
This item allows users to enable or disable the audio controller.
USB Configuration
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

XHCI Mode
This item allows users to enable or disable XHCI mode.
USB2 Link Power Management|
This item allows users to enable or disable USB2 link power management.
USB 2.0 (EHCI) Support
This item allows users to enable or disable USB 2.0 (EHCI) support.
Note!
PCI Express Configuration



PCI Express Port Slot
This item allows users to enable or disable the PCI Express port slot.
Hot Plug
This item allows users to enable or disable the PCI Express hot plug.
Speed
This item allows users to configure the PCIe port speed.
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BIOS Operation
When the selected OS is Windows 7, users must install a USB 3.0 XHCI
driver.
Please refer to Chapter 8 for information on XHCI driver installation.
Chapter 3

3.2.4 Security
Select the Security tab from the AIMB-215 BIOS Setup Utility main setup menu. All
Security options, such as password protection and virus protection, are described in
this section. To access the submenus for the “Change Administrator” and “User
Password” items, select the item and press <Enter>.
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Chapter 3
3.2.5 Boot
BIOS Operation





Setup Prompt Timeout
This item allows users to specify the number of seconds the system should wait
for a setup activation key.
Bootup NumLock State
This item allows users to select the power-on state for Numlock.
Quiet Boot
If this item is set to “Disabled”, the BIOS displays standard POST messages. If
set to “Enabled”, an OEM logo is shown instead of POST messages.
Fast Boot
This item allows users to enable or disable boot initialization with the minimum
number of devices necessary to launch the active boot option. These settings
have no effects for BBS boot options.
Boot Option Priorities
This item allows users to set the system boot order.
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3.2.6 Save and Exit











Save Changes and Exit
This item allows users to save changes and exit the system setup page.
Discard Changes and Exit
This item allows users to exit the system setup without saving changes.
Save Changes and Reset
This item allows users to reset the system setup after saving changes.
Discard Changes and Reset
This item allows users to reset the system setup without saving changes.
Save Changes
This item allows users to save changes to all options.
Discard Changes
This item allows users to discard changes to all options.
Restore Defaults
This item allows users to restore/load the default values for all options.
Save as User Defaults
This item allows users to save changes as user defaults.
Restore User Defaults
This item allows users to restore the user defaults for all options.
Boot Override
This item allows users to override boot priority with a selected boot device.
Launch EFI Shell From a Filesystem Device
This item allows users to launch an EFI Shell application (Shellx64.efi) from an
available filesystem device.
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Chapter
4
4
Software and Service
Introduction
4.1 Introduction
The mission of Advantech Embedded Software Services is to “enhance users’ quality
of life with Advantech platforms and Microsoft® Windows® embedded technology”.
We equip Advantech platforms with Windows® embedded software products to more
effectively support the embedded computing community. This eliminates the hassle
of dealing with multiple vendors (hardware suppliers, system integrators, and embedded OS distributors) for specific projects. Our aim is to make Windows® embedded
software solutions widely available to the embedded computing community.
4.2 Value-Added Software Services
Software API: An interface that defines the ways in which an application program
may request services from libraries and/or operating systems. This software provides
not only the underlying drivers required, but also a rich set of user-friendly, intelligent,
and integrated interfaces that speed development, enhance security, and offer addon value for Advantech platforms. Furthermore, this software serves as a catalyst
between developers and solutions, making Advantech embedded platforms easier
and simpler to adopt and operate with customer applications.
4.2.1 Software API
4.2.1.1 Control
GPIO
General purpose input/output is a flexible parallel interface
that allows various custom connections. This interface also
enables users to monitor the level of signal input or set the
output status to switch the device on or off. Our API also provides programmable GPIO, enabling developers to dynamically set the GPIO input or output status.
SMBus
SMBus is a system management bus defined by Intel Corporation in 1995. This interface is used in personal computers
and servers for low-speed system management communications. The SMBus API allows developers to interface with an
embedded system environment and transfer serial messages using SMBus protocols, facilitating multiple simultaneous device control.
4.2.1.2 Display
Brightness Control
The Brightness Control API allows developers to access
embedded devices and easily control brightness.
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The Backlight API allows developers to control the backlight
(screen) in embedded devices.
Chapter 4
Backlight
4.2.1.3 Monitor
A watchdog timer is a device that performs a specific operation after a specified period of time when a malfunction
occurs and the system cannot recover on its own. A watchdog timer can be programmed to perform a warm booting
(system restart) after a certain number of seconds.
Hardware Monitor
The Hardware Monitor API is a system health supervision
API that inspects certain condition indices, such as fan
speed, temperature, and voltage.
4.2.1.4 Power Saving
CPU Speed
This feature uses Intel SpeedStep® Technology to reduce
the system power consumption. The system automatically
adjusts the CPU speed according to the system load.
System Throttling
This refers to a series of methods for reducing system power
consumption by lowering the clock frequency. This API
allows users to adjust the clock frequency from 87.5% to
12.5%.
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Software and Service Introduction
Watchdog
4.2.2 Software Utility
BIOS Flash
The BIOS Flash utility allows customers to update the
flash ROM BIOS version, or backup the current BIOS by
copying the configuration from the flash chip to a file on
the users’ disk. The BIOS Flash utility also features a command line version and API for rapid implementation in customized applications.
Embedded Security ID
Embedded applications are the most important responsibilities for system integrators because they contain valuable
intellectual property, design knowledge, and innovations,
and are easily copied. This Embedded Security ID utility
offers reliable security functions that allow users to secure
application data within embedded BIOS.
Monitoring
The Monitoring API is a utility that allows users to monitor
the system health indicators, such as voltage, CPU and
system temperature, and fan speed. These system values
are crucial. If critical errors occur and are not solved immediately, permanent damage to the device may result.
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Chapter
5
Chipset Software
Install Utility
5
5.1 Before Installation
Before installing the enhanced display drivers and utility software, please read the
instructions provided in this chapter carefully. The drivers for AIMB-215 are provided
on the software installation CD. This driver will guide and link users to the utilities and
drivers required for Microsoft Windows-based systems. Software updates can be
accessed from Microsoft* software service packs.
Note!
The files on the software installation CD are compressed. Do not
attempt to install the drivers by copying the files manually. The Setup
program provided must be used to install the drivers.
Please note, for most display drivers, the relevant software application must be
installed on the system before enhanced display drivers can be installed. In addition,
for many of the installation procedures, user familiarity with both the relevant software applications and operating system commands is assumed. Thus, users are
advised to review relevant operating system commands and pertinent sections of the
application software user manual before attempting installation.
5.2 Introduction
The Intel® Chipset Software Installation (CSI) utility installs the Microsoft Windows
INF files that specify the chipset component configuration on the OS. This is essential to enable the following features and functionalities:
 Core PCI PnP services
 IDE Ultra ATA 100/66/33 and Serial ATA interface support
 USB 1.1/2.0/3.0 support (a USB 3.0 XHCI driver must be installed for Windows
7)


Identification of Intel® chipset components in the device manager
Integration of superior video features, including filtered sealing of 720 pixel DVD
content and MPEG-2 motion compensation for software DVD.
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Chapter
6
VGA Setup
6
6.1 Introduction
To benefit from the Intel® Celeron™ J1900/N2930/N2807 integrated graphics controller, users must install the graphics driver.
6.2 Windows 7/8.1
Note!
Before installing this driver, ensure the CSI utility is installed on the system. See Chapter 5 for information regarding installing the CSI utility.
Insert the driver CD into the system CD-ROM drive to access the driver folder items.
Navigate to the “VGA” folder and click “setup.exe” to initiate the installation of drivers
for Windows 7 and Windows 8.1.
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Chapter
7
7
LAN Configuration
7.1 Introduction
The AIMB-215 system features dual Gigabit Ethernet LANs via dedicated PCI
Express x1 lanes (Realtek RTL8111E (LAN1) and Realtek RTL8111E (LAN2)) that
offer a bandwidth of up to 500 MB/sec, eliminating bottlenecks in the flow of network
data by incorporating Gigabit Ethernet at 1000 Mbps.
7.2 Features






Integrated 10/100/1000 Mbps transceiver
10/100/1000 Mbps triple-speed MAC
High-speed RISC core with 24-KB cache
On-chip voltage regulation
Wake-on-LAN (WOL) support
PCI Express X1 host interface
7.3 Installation
Note!
Before installing LAN drivers, ensure the CSI utility is installed on the
system. See Chapter 5 for information regarding installing the CSI utility.
The Realtek 8111E (LAN1) and Realtek 8111E (LAN2) Gigabit integrated controllers
support all major network operating systems. However, the installation procedure
varies between systems. Please follow the driver setup procedure instructions specific to the operating system installed.
7.4 Windows 7/8.1 Driver Setup (Realtek 8111E)
Insert the driver CD into the system CD-ROM drive, open the LAN folder, and then
navigate to the directory for the correct OS.
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Chapter
8
XHCI Driver
Installation
8
8.1 Introduction
The XHCI driver is only built into the Window 8.x OS, not Windows 7.
If the selected OS is Windows 7, users must install the USB 3.0 XHCI driver.
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Insert the driver CD into the system CD-ROM drive, open the USB3 folder, and then
navigate to the directory for the correct OS.
Chapter 8
8.2 Installation
XHCI Driver Installation
Note!
For systems with Windows 7 as the OS, only USB 1/2/5/6 are operational prior to the USB 3.0 XHCI driver installation.
Users must install the USB 3.0 XHCI driver to ensure all USB ports are
operational.
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88
Appendix
A
A
Programming the
Watchdog Timer
A.1 Programming the Watchdog Timer
The AIMB-215 watchdog timer can be used to monitor system software operations
and execute corrective actions if the software fails to function within the programmed
period. The operations and procedures for programming the watchdog timer are
described in this section.
A.1.1 Watchdog Timer Overview
The watchdog timer is built into the NCT6106D super I/O controller, and facilitates
the following user-programmable functions:
 Can be enabled and disabled via a user program
 The timer interval can be set as 1 to 255 seconds or 1 to 255 minutes
 Generates an interrupt or reset signal if the software fails to reset the timer
before timeout
A.1.2 Programming the Watchdog Timer
The I/O port base addresses for the watchdog timer are 2E (hex) and 2F (hex),
where 2E (hex) is the address port, and 2F (hex) is the data port. Users must first
assign register addresses by inputting an address value into address port 2E (hex)
before writing/reading data to/from the assigned register through data port 2F (hex).
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Appendix A Programming the Watchdog Timer
Unlock NCT6106D
Select a register for
the watchdog timer
Enable the function of
the watchdog timer
Use the function of
the watchdog timer
Lock NCT6106D
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Table A.1: Watchdog Timer Registers
Register Address (2E)
Attribute
Read/Write
Value (2F)
and
description
87 (hex)
-----
Write this address to I/O address port 2E (hex)
twice to unlock NCT6106D.
07 (hex)
write
Write 08 (hex) to the selected watchdog timer register.
30 (hex)
write
Write 01 (hex) to enable the function of the watchdog timer. The default setting is “Disabled”.
F0 (hex)
write
Set the timer unit as seconds or minutes.
Write 0 to bit 3: set the unit of measurement as
seconds (default).
Write 1 to bit 3: set the unit of measurement as
minutes.
F1 (hex)
write
0: stop timer (default)
01~FF (hex): The timer value, in seconds or minutes, depends on the value set in Register F5
(hex). This value determines how long the watchdog timer waits for the strobe before generating an
interrupt or reset signal. Writing a new value to this
register resets the timer to count using the new
value.
F2 (hex)
read/write
Bit 7: Write 1 to enable the mouse to reset the
timer, or 0 to disable this function (default).
Bit 6: Write 1 to enable the keyboard to reset the
timer, or 0 to disable this function (default).
Bit 5: Write 1 to immediately generate a timeout
signal before automatically returning to 0 (default =
0).
Bit 4: Read the watchdog timer status, 1 means
the timer has reach timeout.
AA (hex)
-----
Write this address to I/O port 2E (hex) to lock the
watchdog timer.
AIMB-215 User Manual
92
1. Enable the watchdog timer and set the timeout interval as 10 seconds
;----------------------------------------------------------Mov dx,2eh; unlock NCT6106D
Mov al,87h
Out dx,al
Out dx,al
;----------------------------------------------------------Mov al,07h; select the watchdog timer registers
Out dx,al
Inc dx
Mov al,08h
Out dx,al
;----------------------------------------------------------Dec dx; enable the watchdog timer function
Mov al,30h
Out dx,al
Inc dx
Mov al,01h
Out dx,al
;----------------------------------------------------------Dec dx; set the unit of measurement as seconds
Mov al,0f0h
Out dx,al
Inc dx
In al,dx
And al,not 08h
Out dx,al
;----------------------------------------------------------Dec dx; set the timeout interval as 10 seconds and start counting
Mov al,0f1h
Out dx,al
Inc dx
Mov al,10
Out dx,al
;----------------------------------------------------------Dec dx; lock NCT6106D
Mov al,0aah
Out dx,al
2. Enable the watchdog timer and set the timeout interval as 5 minutes
;----------------------------------------------------------Mov dx,2eh; unlock NCT6106D
Mov al,87h
Out dx,al
Out dx,al
93
AIMB-215 User Manual
Appendix A Programming the Watchdog Timer
A.1.3 Example Program
;----------------------------------------------------------Mov al,07h; select the watchdog timer registers
Out dx,al
Inc dx
Mov al,08h
Out dx,al
;----------------------------------------------------------Dec dx; enable the watchdog timer function
Mov al,30h
Out dx,al
Inc dx
Mov al,01h
Out dx,al
;----------------------------------------------------------Dec dx; set the unit of measurement as minutes
Mov al,0f0h
Out dx,al
Inc dx
In al,dx
Or al,08h
Out dx,al
;----------------------------------------------------------Dec dx; set the timeout interval as 5 minutes and start counting
Mov al,0f1h
Out dx,al
Inc dx
Mov al,5
Out dx,al
;----------------------------------------------------------Dec dx; lock NCT6106D
Mov al,0aah
Out dx,al
3. Enable the watchdog timer to be reset using a mouse
;----------------------------------------------------------Mov dx,2eh; unlock NCT6106D
Mov al,87h
Out dx,al
Out dx,al
;----------------------------------------------------------Mov al,07h; select the watchdog timer registers
Out dx,al
Inc dx
Mov al,08h
Out dx,al
;-----------------------------------------------------------
AIMB-215 User Manual
94
95
AIMB-215 User Manual
Appendix A Programming the Watchdog Timer
Dec dx; enable the watchdog timer function
Mov al,30h
Out dx,al
Inc dx
Mov al,01h
Out dx,al
;----------------------------------------------------------Dec dx; enable the watchdog timer to be reset using a mouse
Mov al,0f2h
Out dx,al
Inc dx
In al,dx
Or al,80h
Out dx,al
;----------------------------------------------------------Dec dx; lock NCT6106D
Mov al,0aah
Out dx,al
4. Enable the watchdog timer to be reset using a keyboard
;----------------------------------------------------------Mov dx,2eh; unlock NCT6106D
Mov al,87h
Out dx,al
Out dx,al
;----------------------------------------------------------Mov al,07h; select the watchdog timer registers
Out dx,al
Inc dx
Mov al,08h
Out dx,al
;----------------------------------------------------------Dec dx; enable the watchdog timer function
Mov al,30h
Out dx,al
Inc dx
Mov al,01h
Out dx,al
;----------------------------------------------------------Dec dx; enable the watchdog timer to be strobed reset using a keyboard
Mov al,0f2h
Out dx,al
Inc dx
In al,dx
Or al,40h
Out dx,al
;----------------------------------------------------------Dec dx; lock NCT6106D
Mov al,0aah
Out dx,al
5. Generate a timeout signal without the timer counting
;----------------------------------------------------------Mov dx,2eh; unlock NCT6106D
Mov al,87h
Out dx,al
Out dx,al
;----------------------------------------------------------Mov al,07h; select the watchdog timer registers
Out dx,al
Inc dx
Mov al,08h
Out dx,al
;----------------------------------------------------------Dec dx; enable the watchdog timer function
Mov al,30h
Out dx,al
Inc dx
Mov al,01h
Out dx,al
;----------------------------------------------------------Dec dx; generate a timeout signal
Mov al,0f2h
Out dx,al; write 1 to Bit 5 of Register F7
Inc dx
In al,dx
Or al,20h
Out dx,al
;----------------------------------------------------------Dec dx; lock NCT6106D
Mov al,0aah
Out dx,al
AIMB-215 User Manual
96
Appendix
B
B
I/O Pin Assignments
B.1 DC-IN Adaptor Connector (DCIN1)
Pin
Signal
Pin
Signal
1
VCC
2
VCC
B.2 Display Port Connector (DP1)
Pin
Signal
Pin
Signal
1
ML_LANE0+
2
GND
3
ML_LANE0-
4
ML_LANE1+
5
GND
6
ML_LANE1-
7
ML_LANE2+
8
GND
9
ML_LANE2-
10
ML_LANE3+
11
GND
12
ML_LANE3-
13
Config 1
14
GND
15
AUX_CH+
16
GND
17
AUX_CH-
18
Hot Plug Detect
19
GND
20
+3.3V
AIMB-215 User Manual
98
JEDP-1
Pin
Signal
Pin
Signal
1
N.C
2
+V12
JEDP-2
Pin
Signal
Pin
Signal
1
+V3.3
3
+V5
2
VCC_eDP
B.4 VGA Connector (VGA1)
Pin
Signal
Pin
Signal
1
RED
9
VCC
2
GREEN
10
SGND
3
BLUE
11
N.C.
4
GND
12
SDA
5
VCC
13
HSYNC
6
RED GND
14
VSYNC
7
GREEN GND
15
SCL
8
BLUE GND
99
AIMB-215 User Manual
Appendix B I/O Pin Assignments
B.3 eDP Panel Voltage Selection (JEDP-1 + JEDP-2),
Optional BOM
B.5 Serial ATA Interface Connector (SATA2)
Pin
Signal
Pin
Signal
1
GND
5
RX-
2
TX+
6
RX+
3
TX-
7
GND
4
GND
B.6 SATADOM Power Pin Header (JSATAPWR1)
Pin
Signal
1
GND
2
SATA_DOM
3
+V5
B.7 Serial ATA Interface Connector (SATA1)
Pin
Signal
Pin
Signal
1
GND
5
RX-
2
TX+
6
RX+
3
TX-
7
GND
4
GND
AIMB-215 User Manual
100
Pin
Signal
Pin
Signal
1
VBAT
5
GND
B.9 System Fan Connector (SYSFAN2)
Pin
Signal
Pin
Signal
1
GND
3
FAN SPEED
2
VCC_FAN
4
PWM
B.10 USB3.0 + USB2.0 Stack Connector (USB0102)
USB02
USB01
Pin
Signal
Pin
Signal
1
VBUS_2
8
StdA_SSTX-
2
D-_2
9
StdA_SSTX+
3
D+_2
10
VBUS_1
4
GND_2
11
D-_1
5
StdA_SSRX-
12
D+_1
6
StdA_SSRX+
13
GND_1
7
GND_DRAIN
14
101
AIMB-215 User Manual
Appendix B I/O Pin Assignments
B.8 CMOS Battery Wafer Box (BAT1)
B.11 SPI BIOS Socket (SPI1)
Pin
Signal
Pin
Signal
1
CE#
5
SI
2
SO
6
SCK
3
WP#
7
HOLD#
4
GND
8
VCC_SPI
B.12 USB2.0 * 2 Stack Connector (USB0304)
USB04
USB03
Pin
Signal
Pin
Signal
1
VCC_USB0
5
VCC_USB1
2
USB-0_B
6
USB-1_B
3
USB+0_B
7
USB+1_B
4
GND_1
8
GND_2
AIMB-215 User Manual
102
Pin
Signal
Pin
Signal
1
DCD#
2
DSR#
3
SIN
4
RTS#
5
SOUT
6
CTS#
7
DTR#
8
RI#
9
GND
B.14 Watchdog Timer Output and OBS Beep (JOBS1
+ JWDT1)
Pin
Signal
1
NC
2
WDT
3
RESET#
4
SIO BEEP
5
FRP BEEP
103
AIMB-215 User Manual
Appendix B I/O Pin Assignments
B.13 COM1 Box Header (COM1)
B.15 RJ45 (LAN1 + LAN2) Connector (LAN12)
Pin
Signal
Pin
Signal
B1
LAN1_MID0+
C1
LAN2_MID0+
B2
LAN1_MID0-
C2
LAN2_MID0-
B3
LAN1_MID1+
C3
LAN2_MID1+
B4
LAN1_MID1-
C4
LAN2_MID1-
B5
LAN1_MID2+
C5
LAN2_MID2+
B6
LAN1_MID2-
C6
LAN2_MID2-
B7
LAN1_MID3+
C7
LAN2_MID3+
B8
LAN1_MID3-
C8
LAN2_MID3-
B.16 SPDIF Interface Pin Header (SPDIF_OUT1)
Pin
Signal
1
+5V
2
KEY
3
SPDIF OUT
4
GND
AIMB-215 User Manual
104
Pin
Signal
1
LINE OUT
B.18 Front Panel Audio Pin Header (FPAUD1)
Pin
Signal
Pin
Signal
1
MIC IN-L
2
GND
3
MIC IN-R
4
FPAUD_DETECT#
5
LINE OUT-R
6
SENSE R1
7
SENSE
8
KEY
9
LINE OUT-L
10
SENSE R2
B.19 Audio Amplifier Output Pin Header (JAMP1)
Pin
Signal
1
AMP_OUT-L
2
AMP_OUT+L
3
AMP_OUT-R
4
AMP_OUT+R
105
AIMB-215 User Manual
Appendix B I/O Pin Assignments
B.17 HD Analog Audio Interface (AUDIO1)
B.20 LVDS VESA and JEIDA Format Pin Header
Pin
Signal
Pin
Signal
1
+V3.3
3
GND
2
LVDS1_VCON
B.21 LVDS Panel Connector (LVDS1)
Pin
Signal
Pin
Signal
1
VDD
2
VDD
3
LVDS DETECT#
4
GND
5
VDD
6
VDD
7
OD0-
8
ED0-
9
OD0+
10
ED0+
11
GND
12
GND
13
OD1-
14
ED1-
15
OD1+
16
ED1+
17
GND
18
GND
19
OD2-
20
ED2-
21
OD2+
22
ED2+
23
GND
24
GND
25
OCK-
26
ECK-
27
OCK+
28
ECK+
29
GND
30
GND
31
DDC CLK
32
DDC DAT
33
GND
34
GND
35
OD3-
36
ED3-
37
OD3+
38
ED3+
39
LVDS ENBKL
40
LVDS VCON
Pin 3: GND → Panel connected
NC/3.3 V → No panel
AIMB-215 User Manual
106
Pin
Signal
Pin
Signal
1
VCC_USB1
2
VCC_USB2
3
USB1-
4
USB2-
5
USB1+
6
USB2+
7
GND
8
GND
9
X
10
N.C
B.23 LVDS Panel Voltage Selection (JLVDS1 +
JLVDS2)
JLVDS1
Pin
Signal
Pin
Signal
1
N.C
2
+V12
Pin
Signal
Pin
Signal
1
+V3.3
3
+V5
2
VCC_LVDS
JLVDS2
107
AIMB-215 User Manual
Appendix B I/O Pin Assignments
B.22 Dual-Port USB2.0 Box Header (USB0506)
B.24 COM6 RI# Selection Pin Header
(JSETCOM6_V1)
Pin
Signal
Pin
Signal
1
RI#
2
RI#_VCON
3
RI#_VCON
4
+5V
5
+12V
6
RI#_VCON
B.25 LVDS Backlight Inverter Power Connector
(INV1)
Pin
Signal
Pin
Signal
1
+V12
4
Backlight CTRL
2
GND
5
+V5
3
Backlight EN
B.26 8-bit General Purpose I/O Pin Header (GPIO1)
Pin
Signal
Pin
Signal
1
SIO_GPIO0
2
SIO_GPIO4
3
SIO_GPIO1
4
SIO_GPIO5
5
SIO_GPIO2
6
SIO_GPIO6
7
SIO_GPIO3
8
SIO_GPIO7
9
VCC
10
GND
AIMB-215 User Manual
108
Pin
Signal
Pin
Signal
1
DCD# [3]
2
DSR# [3]
3
RXD [3]
4
RST# [3]
5
TXD [3]
6
CTS# [3]
7
DTR# [3]
8
RI [3]
9
GND
10
GND
11
DCD# [4]
12
DSR# [4]
13
RXD [4]
14
RST# [4]
15
TXD [4]
16
CTS# [4]
17
DTR# [4]
18
RI [4]
19
GND
20
GND
21
DCD# [5]
22
DSR# [5]
23
RXD [5]
24
RST# [5]
25
TXD [5]
26
CTS# [5]
27
DTR# [5]
28
RI [5]
29
GND
30
GND
31
DCD# [6]
32
DSR# [6]
33
RXD [6]
34
RST# [6]
35
TXD [6]
36
CTS# [6]
37
DTR# [6]
38
RI [6]
39
GND
40
GND
109
AIMB-215 User Manual
Appendix B I/O Pin Assignments
B.27 COM3 ~ COM6 Box Header (COM3456)
B.28 AT/ATX Mode Selection (PSON1)
Pin
Signal
1
VCCAT
2
+3.3V
3
VCCATX
B.29 ATX Power Supply(5VSB) Connector
(ATX_5VSB1)
Pin
Signal
1
+V5SB
2
GND
3
PS_ON#
AIMB-215 User Manual
110
Pin
Signal
Pin
Signal
1
RX
2
RX_485
3
RX
4
RX_422
5
RX
6
RX_232
7
DCD [3]
8
SOUT [3]
9
DCD# [3]
10
COM_SOUT [3]
11
TX_485-
12
RX_485+
13
SIN [3]
14
DTR [3]
15
COM_SIN [3]
16
DTR# [3]
17
TX_485+
18
RX_485-
B.31 SATA Power Connector (SATA_PWR1)
Pin
Signal
Pin
1
+V5
3
GND
2
GND
4
+V12
111
Signal
AIMB-215 User Manual
Appendix B I/O Pin Assignments
B.30 COM3 RS232, RS422, and RS485 Selection Pin
Header (JSETCOM3)
B.32 COM2 Pin Header (COM2)
Pin
Signal
Pin
Signal
1
DCD#
2
DSR#
3
SIN
4
RTS#
5
SOUT
6
CTS#
7
DTR#
8
RI#
9
GND
B.33 System Fan Connector (SYSFAN1)
Pin
Signal
Pin
Signal
1
GND
3
FAN SPEED
2
VCC_FAN
4
PWM
B.34 Case Open Selection Pin Header
(JCASEOP_SW1)
Pin
Signal
1
CASEOP#
2
HWM_CASEOP#
3
CASEOP
AIMB-215 User Manual
112
Pin
Signal
1
CASEOP
2
GND
B.36 PS/2 Keyboard and PS/2 Mouse Connector
(KBMS1)
Pin
Signal
Pin
Signal
1
KB_CLK#
4
GND
2
KB_DAT#
5
VCC_KBMS
3
MS_CLK#
6
MS_DAT#
113
AIMB-215 User Manual
Appendix B I/O Pin Assignments
B.35 Case Open Pin Header (JCASE1)
B.37 Mini-PCIe Connector (MINIPCIE2)
Pin
Signal
Pin
Signal
1
WAKE#
2
+3.3V
3
Reserved
4
GND
5
Reserved
6
+1.5V
7
CLKREQ#
8
SIM_PWR
9
GND
10
SIM_DATA
11
REFCLK-
12
SIM_CLK
13
REFCLK+
14
SIM_RESET
15
GND
16
SIM_VPP
17
Reserved
18
GND
19
Reserved
20
DISABLE#
21
DETECT#
22
RESET#
23
PCIE_RX+
24
+3.3Vaux
25
PCIE_RX-
26
GND
27
GND
28
+1.5V
29
GND
30
SMB_CLK
31
PCIE_TX-
32
SMB_DATA
33
PCIE_TX+
34
GND
35
Reserved
36
USB_D-
37
Reserved
38
USB_D+
39
Reserved
40
GND
41
Reserved
42
Reserved
43
Reserved
44
LED_WLAN#
45
Reserved
46
Reserved
47
Reserved
48
+1.5V
49
Reserved
50
GND
51
Reserved
52
+3.3V
AIMB-215 User Manual
114
Mini-PCIe
Pin
Signal
Pin
Signal
1
WAKE#
2
+3.3Vaux
3
Reserved
4
GND
5
Reserved
6
+1.5 V
7
CLKREQ#
8
Reserved
9
GND
10
Reserved
11
REFCLK-
12
Reserved
13
REFCLK+
14
Reserved
15
GND
16
Reserved
17
Reserved
18
GND
19
Reserved
20
DISABLE#
21
DETECT#
22
RESET#
23
PCIE_RX+
24
+3.3Vaux
25
PCIE_RX-
26
GND
27
GND
28
+1.5V
29
GND
30
SMB_CLK
31
PCIE_TX-
32
SMB_DATA
33
PCIE_TX+
34
GND
35
GND
36
USB_D-
37
GND
38
USB_D+
39
+3.3Vaux
40
GND
41
+3.3Vaux
42
Reserved
43
V1.2_DETECT#
44
LED_WLAN#
45
Reserved
46
Reserved
47
Reserved
48
+1.5 V
49
Reserved
50
GND
51
MSATA_DETECT#
52
+3.3Vaux
115
AIMB-215 User Manual
Appendix B I/O Pin Assignments
B.38 Mini-PCIe and mSATA Connector (MINIPCIE1)
mSATA
Pin
Signal
Pin
Signal
1
Reserved
2
+3.3V
3
Reserved
4
GND
5
Reserved
6
+1.5V
7
Reserved
8
Reserved
9
GND
10
Reserved
11
Reserved
12
Reserved
13
Reserved
14
Reserved
15
GND
16
Reserved
17
Reserved
18
GND
19
Reserved
20
Reserved
21
DETECT#
22
Reserved
23
RX+
24
+3.3V
25
RX-
26
GND
27
GND
28
+1.5V
29
GND
30
SMB_CLK
31
TX-
32
SMB_DATA
33
TX+
34
GND
35
GND
36
Reserved
37
GND
38
Reserved
39
+3.3V
40
GND
41
+3.3V
42
Reserved
43
Reserved
44
Reserved
45
Reserved
46
Reserved
47
Reserved
48
+1.5V
49
Reserved
50
GND
51
MSATA_DETECT#
52
+3.3V
B.39 Low Pin Count Interface Header (LPC1)
Pin
Signal
Pin
Signal
1
LPC CLK
2
AD1
3
RESET#
4
AD0
5
FRAME#
6
+V3.3
7
AD3
8
GND
9
AD2
10
SMBus CLK
11
SERIRQ
12
SMBus DAT
13
+V5SB
14
+V5
AIMB-215 User Manual
116
Pin
Signal
Pin
Signal
1
VCC
2
GND
3
SPI_CS#
4
SPI_CLK
5
SPI_MISO
6
SPI_MOSI
8
N.C
B.41 RTC Reset Pin Header (JRTCTEST1)
Pin
Signal
1
NC
2
RTC RESET#
3
GND
B.42 SATA Power Connector (SATA_PWR2)
Pin
Signal
Pin
Signal
1
+V5
3
GND
2
GND
4
+V12
117
AIMB-215 User Manual
Appendix B I/O Pin Assignments
B.40 BIOS Flash Pin Header (SPI_CN1)
B.43 Dual-Port USB2.0 Pin Header (USB0708)
Pin
Signal
Pin
Signal
1
VCC_USB1
2
VCC_USB2
3
USB1-
4
USB2-
5
USB1+
6
USB2+
7
GND
8
GND
9
X
10
N.C
B.44 Dual-Port USB2.0 Pin Header (USB0910)
Pin
Signal
Pin
Signal
1
VCC_USB1
2
VCC_USB2
3
USB1-
4
USB2-
5
USB1+
6
USB2+
7
GND
8
GND
9
X
10
N.C
AIMB-215 User Manual
118
Pin
Signal
Pin
Signal
1
GND
2
GND
3
EDP0-
4
EDP3-
5
EDP0+
6
EDP3+
7
GND
8
N.C
9
EDP1-
10
GND
11
EDP1+
12
EAUX-
13
GND
14
EAUX+
15
EDP2-
16
GND
17
EDP2+
18
DP_HPD
19
VDD_EDP
20
VDD_EDP
B.46 Power LED and Keyboard Lock Pin Header
(JFP3)
Pin
Signal
Pin
Signal
1
VCC_LED
4
Keyboard LOCK#
2
N.C.
5
GND
3
GNC
119
AIMB-215 User Manual
Appendix B I/O Pin Assignments
B.45 eDP Connector (eDP1), Optional BOM
B.47 Power Switch/HDD LED/SMBus/Speaker Pin
Header (JFP1 + JFP2)
Pin
Signal
Pin
Signal
1
+5V
7
SPK_P3
2
HDD LED+
8
SMB_DATA
3
Power Button+
9
System Reset+
4
SPK_P2
10
SPK_P4
5
HDD LED-
11
SMB_CLK
6
Power Button-
12
System Reset-
B.48 LVDS2 Control Signal Pin Header (LVDS2),
Optional BOM
Pin
Signal
Pin
Signal
1
GND
2
+V5
3
LVDS2_BKLTEN
4
LVDS2_GPIO3
5
LVDS2_VDD_EN
6
LVDS2_GPIO2
7
LVDS2_RST#
8
LVDS2_GPIO1
9
X
10
LVDS2_GPIO0
AIMB-215 User Manual
120
Pin
Signal
Pin
Signal
1
+V12
4
Backlight CTRL
2
GND
5
+V5
3
Backlight EN
B.50 ATX 12 V Power Supply Connector (ATX12V1)
Pin
Signal
Pin
Signal
1
GND
3
VCC
2
GND
4
VCC
Pin
Signal
B.51 SIM Card Holder (SIM2)
Pin
Signal
1
UIM_PWR
5
GND
2
UIM_RESET
6
UIM_VPP
3
UIM_CLK
7
UIM_DATA
4
Reserved
8
Reserved
121
AIMB-215 User Manual
Appendix B I/O Pin Assignments
B.49 eDP Backlight Inverter Power Connector (INVEDP1), Optional BOM
B.52 RS-485/422 Terminal Resistor Jumper
(SW_422_1)
Pin
Signal
Pin
Signal
1
COM3_TXD485P
8
Pull-up terminator (+V5)
2
COM3_TXD485N
7
Pull-down terminator
(GND)
3
COM3_RXD422N
6
Pull-down terminator
(GND)
4
COM3_RXD422P
5
Pull-up terminator (+V5)
AIMB-215 User Manual
122
Appendix B I/O Pin Assignments
AIMB-215 User Manual
123
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