FIND Magazine article Vol.28 No.1 2010

New Products
MB39C313A
4 -Channel DC/DC Converter IC
for Large LCD Panels
MB39C313A
A system power management IC capable of supplying the four types of voltages
required in large LCD panels in a single chip. With built-in switching FET for large
current operation, this product is suitable for applications such as large LCD TVs and
monitors.
Overview
Sufficient protective functions
Short-circuit protection, overcurrent protection, overvoltage
protection, undervoltage lockout, over temperature protection
Built-in soft-start circuit independent of loads (Vlogic, Vs)
Frequency setting by input pin: 500kHz/750kHz
Package: TSSOP-28 (with exposed PAD)
Lead-free/conforms to RoHS Directive
● This product is a system power management IC with a builtin 4-channel power management control block. It consists of a
2-channel DC/DC converter with switching FET and a 2-channel
charge pump type DC/DC converter. The DC/DC converter block
offers excellent stability against input voltage fluctuations with
the input voltage feed-forward method. The output voltage in the
charge pump circuit block can be set by an external resistor using
the output voltage feedback method.
This product contributes to a reduction in the parts cost as a
result of the built-in switching FET and phase compensator.
Product Features
● ● ● ● Functions
Figure 1 presents the block diagram of this product.
Photo 1 External View
Power supply voltage range: 8V to 14V
DC/DC converter with built-in switching FET
Step-down converter (Vlogic): Output 1.8V to 3.3V 1.5A
(max.)
Step-up converter (Vs): Output 17.7V 1.5A (max.)
Charge pump with output voltage feedback method
Inverting charge pump (VGL): 100mA (max.)
Step-up charge pump (VGH): 100mA (max.)
Excellent line regulation with feed-forward control (Vlogic, Vs)
Built-in phase compensator (Vlogic)
Built-in startup sequence control function
● ● ● ● ● ● ● ● ● ● 2010
No.1
FIND Vol.28
New Products
MB39C313A
Figure 1 MB39C313A Block Diagram
A
BOOT
FBB
Error
Amp1
L priority
15
<<Vlogic (Buck)>>
VB REG
4V
(SWB + 4 V)
17
VINB
20 21
enb1
1.213 V
RON=230 m7
at VGS=4 V
PWM
Comp.1
PWM
Logic
Control
VTH
1.213 V ± 1.5%
OSC_CTL
fosc or
fosc/2 or
fosc/4
0.9V
VINB
SCP Comp.
18
Vlogic (3.3 V/1.5 A Max)
LEVEL
CONV
Current
Limmit
0.6V
B
DRV
A
SWB
ILIM
Comp.1
Saw tooth
Generator
COMP
2
FB
1
SS
28
Current
Limmit
GD
C
RON=10 7
at VGS=-12 V
Vs
(17.7 V / 1.5 A Max)
LEVEL
CONV
SW
PWM
Logic
Control
PWM
Comp.2
OS
3
18.7 V
Saw tooth
Generator
AVIN
1.03 V
<<Vs (Boost)>>
VTH
1.146 V ± 0.9%
1.146 V
enb2
B
OVP
Comp.
Error
Amp2
L priority
4
DRV
5
RON=110 m7
at VGS=5 V
6
ILIM
Comp.2
PGND
7
27
GD
Comp.
<<VGL (Negative Charge Pump)>> AVIN
FBN
Error
Amp3
13
DRN
DRV
11
C
VGL
(-5 V / 100 mA Max)
enb3
VTH
0 V ± 36 mV
D
Current
Control
Logic
SUP
<<VGH (Positive Charge Pump)>>
L priority Error
FBP
14
Amp4
DRP
Current
Control
Logic
enb4
8
DRV
10
VGH
(32 V/100 mA Max)
VTH
1.213 V ± 2.1%
FREQ
12
OSC
DLY1
L:OTP
OTP
DLY
Comp.1
25
D
L:Protection
UVLO
1.213 V
enb1
H:Vlogic ON
enb2
H:Vs ON
enb3
H:VGL ON
enb4
H:VGH ON
L : UVLO
DLY2
26
DLY
Comp.2
Vlogic
ss finish
1.213 V
AVIN
22
VREF
Buffer
BGR
Power
ON/OFF
CTL
16
9
EN1
EN2
VIN=12 V
19
NC
24
REF
1.213 V
23
GND
2010
No.1
FIND Vol.28
New Products
MB39C313A
■P
ower management voltage functions
Generates the voltages for the controller (Vlogic), source driver
(Vs), and gate driver (VGL, VGH) required in general LCD
panels.
Vlogic (Vo1): Step-down converter
The step-down converter uses pulse width modulation (PWM)
with built-in N-channel switching FET. The input voltage
feed-forward method ensures excellent line regulation. Phase
compensation constant is set by a built-in compensation circuit
and an external ceramic capacitor. The main switch of the
converter is an N-channel FET with 3.2A peak current rating
and the gate drive circuit is referenced to the SWB pin (source
terminal of N-channel switching FET). An external capacitor
connected between SWB pin and BOOT pin is charged to 4V
by the built-in 4V regulator during the period when N-channel
FET is off cycle. Since this capacitor turns ON the N-channel
FET fully, it bootstraps the gate driving voltage higher than
the power supply voltage along with the N-channel FET. As
a consequence, the gate-source voltage reaches 4V while the
N-channel FET is on.
can increase the maximum output voltage.
■S
tartup sequence
The startup sequence can be set using EN1 and EN2. The
startup sequence timing can be adjusted by the capacitors
connected to DLY1 and DLY2.
When EN1 is set at“H”with EN2 fixed at“H,”Vlogic starts
up first and VGL starts up after delay time DLY1. Vs and VGH
start up simultaneously after delay time DLY2 (Figure 2). When
EN2 is set at“H”with Vlogic already operating and with EN1
at“H,”the delay time DLY2 starts from the EN2 rising edge
(Figure 3). If EN2 is set to“H”before Vlogic operates, DLY2
starts after Vlogic finishes start up.
■S
oft-start function
Vlogic and Vs are equipped with a soft-start function to prevent
inrush current at startup. The soft-start period is approximately
1ms for Vlogic (fixed) and is set by the external capacitor for Vs.
■V
arious protective functions
Vlogic: Step-down converter
Short-circuit protection:
Protective circuit active at FBB pin<0.9V.
Overcurrent protection:
Protective circuit active at Vlogic output current≧3.2A.
Vs: Step-up converter
Overvoltage protection:
Protective circuit active at Vs output≧18.7V.
Overcurrent protection:
Protective circuit active at SW pin current≧3.5A.
VGL: Inverting charge pump: No protection circuit
VGH: Step-up charge pump: No protection circuit
Undervoltage lockout protection (UVLO)
All channels shut down at AVIN≦6V.
Over temperature protection (OTP)
Switching is stopped when the junction temperature reaches
150℃ .
Switching is resumed when the junction temperature drops
to 135℃ .
● Vs (Vo2): Step-up converter
The step-up converter containing a build-in N-channel switching
FET and an external diode operates as a pulse width modulated
(PWM) asynchronous DC/DC converter. It adopts the input
voltage feed-forward method to ensure excellent line regulation
under voltage mode. Phase compensation is set by external parts.
It operates in continuous conduction mode independent of loading
current due to the operation of the built-in P-channel switching
FET (ON resistance 10Ω) connected between the SW pin and the
OS pin along with the external flyback diode.
● ● ● ● VGL (Vo3): Inverting charge pump
The inverting charge pump operates at a fixed frequency and
the output voltage can be set by the divider ratio of the external
resistor divider. When the charge pump driver is connected to the
supply voltage (VIN), the maximum output voltage is −VIN+
Vloss. Vloss includes voltage drops in the output diode and driver
transistors. The addition of more charge pump stages can increase
the maximum negative voltage value.
VGH (Vo4): Step-up charge pump
Like the inverting charge pump, the step-up charge pump
operates at a fixed frequency and the output voltage can be set
by the divider ratio of the external resistor divider. By connecting
the step-up converter output (Vs) or MB39C313A input (VIN)
to the charge pump input (SUP), the maximum output voltage
becomes Vsup+Vs. The addition of more charge pump stages
● ■S
witching frequency
Table 1 presents the switching frequency.
Table 1 Switching Frequency
Terminal
FREQ
Setting
Switching frequency
H
750kHz
L
500kHz
2010
No.1
FIND Vol.28
New Products
Application Examples
Figure 4 presents application examples of
this product.
Evaluation Board
MB39C313A
Figure 2 Startup Sequence when EN2 is always set to“H”
EN2
EN1
DLY2
We offer an evaluation board to aid
evaluation of this product (Photo 2).
Vs
Vin
Vin
Vlogic
0V
Difference from
MB39C313
The charge pump current for VGL and
VGH has been expanded to 100mA (max.). Fall time of each channel depends
on load current and feedback
resistance.
VGH
VGL
DLY1
GD
Figure 3 Startup Sequence when EN1 and EN2 are set to“H”separately
Future Development
FUJITSU has developed system power
management ICs for LCD panels by
integrating D/A converters and DC/DC
converters using the core of our power
management IC analog technology. In the
future, we will continue to realize developments
that address our customer needs in order to
enable the further integration of peripheral
functions as well as cost reduction.
✱
EN2
EN1
DLY2
Fall time of each
channel depends
on load current and
feedback resistance.
VGH
Vs
Vin
Vin
Vlogic
0V
DLY1
VGL
GD
Figure 4 Application Examples
DC/DC converter
DDR
TCON
Step-down conversion
DC/DC 3.3V
MB39C313A
Step-up conversion DC/DC
17.7V
Charge pump
32V
Source driver
Gate driver
Photo 2 Evaluation Board
LCD panel
Charge pump
−5V
VIN=8V to 14V
2010
No.1
FIND Vol.28