DS708-00003-0v02-E

S6J3200 Series
32-bit Microcontroller
Spansion® TraveoTM Family
Data Sheet (Preliminary)
Notice to Readers: This document states the current technical specifications regarding the Cypress
product(s) described herein. Cypress Semiconductor Corp. deems the products to have been in sufficient
production volume such that subsequent versions of this document are not expected to change. However,
typographical or specification corrections, or modifications to the valid combinations offered may occur.
Publication Number S6J3200_DS708-00003
CONFIDENTIAL
Revision 0.4
Issue Date June 30, 2015
D a t a S h e e t ( P r e l i m i n a r y )
Notice On Data Sheet Designations
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advise readers of product information or intended specifications throughout the product life cycle, including
development, qualification, initial production, and full production. In all cases, however, readers are
encouraged to verify that they have the latest information before finalizing their design. The following
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The Advance Information designation indicates that Cypress Semiconductor Corp. is developing one or
more specific products, but has not committed any design to production. Information presented in a
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discontinue. Cypress Semiconductor Corp. therefore places the following conditions upon Advance
Information content:
“This document contains information on one or more products under development at Cypress
Semiconductor Corp. The information is intended to help you evaluate this product. Do not design in
this product without contacting the factory. Cypress Semiconductor Corp. reserves the right to
change or discontinue work on this proposed product without notice.”
Preliminary
The Preliminary designation indicates that the product development has progressed such that a commitment
to production has taken place. This designation covers several aspects of the product life cycle, including
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places the following conditions upon Preliminary content:
“This document states the current technical specifications regarding the Cypress product(s)
described herein. The Preliminary status of this document indicates that product qualification has
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Combination
Some data sheets contain a combination of products with different designations (Advance Information,
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wherever necessary, typically on the first page, the ordering information page, and pages with the DC
Characteristics table and the AC Erase and Program table (in the table notes). The disclaimer on the first
page refers the reader to the notice on this page.
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When a product has been in production for a period of time such that no changes or only nominal changes
are expected, the Preliminary designation is removed from the data sheet. Nominal changes may include
those affecting the number of ordering part numbers available, such as the addition or deletion of a speed
option, temperature range, package type, or VIO range. Changes may also include those needed to clarify a
description or to correct a typographical error or incorrect specification. Cypress Semiconductor Corp.
applies the following conditions to documents in this category:
“This document states the current technical specifications regarding the Cypress product(s)
described herein. Cypress Semiconductor Corp. deems the products to have been in sufficient
production volume such that subsequent versions of this document are not expected to change.
However, typographical or specification corrections, or modifications to the valid combinations
offered may occur.”
Questions regarding these document designations may be directed to your local sales office.
2
CONFIDENTIAL
S6J3200_DS708-00003-0v04-E, June 30, 2015
ver 1.2
D a t a S h e e t ( P r e l i m i n a r y )
Table of Contents
1.
2.
3.
4.
5.
6.
7.
8.
Overview ........................................................................................................................................ 5
1.1
Overview ........................................................................................................................... 5
1.2
Document Definition ............................................................................................................ 5
1.3
Abbreviation ........................................................................................................................ 6
Function List ................................................................................................................................... 9
2.1
Function List ........................................................................................................................ 9
2.2
Optional Function .............................................................................................................. 12
2.2.1
Basic Option ..................................................................................................... 12
2.2.2
ID ...................................................................................................................... 14
2.2.3
Restriction ........................................................................................................ 15
Product Description ...................................................................................................................... 17
3.1
Overview ......................................................................................................................... 17
3.2
Product Description ........................................................................................................... 17
3.2.1
Ethernet ............................................................................................................ 22
Package and Pin Assignment....................................................................................................... 23
4.1
Pin Assignment ................................................................................................................. 23
4.1.1
TEQFP-216 Pin Assignment............................................................................. 24
4.1.2
TEQPF-208 Pin Assignment............................................................................. 31
4.1.3
TEQPF-256 Pin Assignment............................................................................. 38
4.2
Package Dimensions......................................................................................................... 39
4.2.1
TEQFP216 ....................................................................................................... 40
4.2.2
TEQFP208 ....................................................................................................... 41
I/O Circuit Type............................................................................................................................. 43
5.1
I/O Circuit Type ................................................................................................................. 43
5.2
Note
......................................................................................................................... 50
Port Description ............................................................................................................................ 51
6.1
Port Description List .......................................................................................................... 51
6.2
Remark ......................................................................................................................... 68
Precautions and Handling Devices ............................................................................................... 69
7.1
Handling Precautions ........................................................................................................ 69
7.1.1
Precautions for Product Design ........................................................................ 69
7.1.2
Precautions for Package Mounting................................................................... 70
7.1.3
Precautions for Use Environment ..................................................................... 72
7.2
Handling Devices .............................................................................................................. 73
Electric Characteristics ................................................................................................................. 76
8.1
Absolute Maximum Rating ................................................................................................ 76
8.2
Operation Assurance Condition ........................................................................................ 80
8.3
DC Characteristics ............................................................................................................ 85
8.3.1
Port Function Characteristics ........................................................................... 85
8.3.2
Power Supply Current ...................................................................................... 92
8.4
AC Characteristics............................................................................................................. 97
8.4.1
Source Clock Timing ........................................................................................ 97
8.4.2
Sub Clock Timing ............................................................................................. 98
8.4.3
Internal Clock Timing ........................................................................................ 99
8.4.4
Reset Input ..................................................................................................... 105
8.4.5
Power-On Conditions ..................................................................................... 105
8.4.6
Multi-Function Serial ....................................................................................... 106
8.4.7
Timer Input ..................................................................................................... 121
8.4.8
Trigger Input ................................................................................................... 122
8.4.9
NMI Input ........................................................................................................ 123
June 30, 2015, S6J3200_DS708-00003-0v04-E
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D a t a S h e e t ( P r e l i m i n a r y )
8.4.10
Low-Voltage Detection ................................................................................... 124
8.4.11
High Current Output Slew Rate ...................................................................... 130
8.4.12
Display Controller ........................................................................................... 131
8.4.13
Video Capture ................................................................................................ 134
8.4.14
FPD-Link (LVDS) ............................................................................................ 135
8.4.15
DDR-HSSPI.................................................................................................... 138
8.4.16
HyperBus........................................................................................................ 142
8.4.17
Ethernet AVB .................................................................................................. 146
8.4.18
MediaLB ......................................................................................................... 149
8.4.19
Port Noise Filter.............................................................................................. 151
8.5
A/D Converter ................................................................................................................. 152
8.5.1
Electrical Characteristics ................................................................................ 152
8.5.2
Notes on A/D Converters ................................................................................ 153
8.5.3
Glossary ......................................................................................................... 153
8.6
Audio DAC ...................................................................................................................... 156
8.6.1
Electrical Characteristics ................................................................................ 156
8.7
Flash Memory ................................................................................................................. 159
8.7.1
Electrical Characteristics ................................................................................ 159
8.7.2
Notes .............................................................................................................. 159
9.
Ordering Information................................................................................................................... 160
10. Major Changes ........................................................................................................................... 161
4
CONFIDENTIAL
S6J3200_DS708-00003-0v04-E, June 30, 2015
ver 1.2
S6J3200 Series
32-bit Microcontroller
Spansion® TraveoTM Family
Data Sheet (Preliminary)
1. Overview
1.1 Overview
S6J3200 is a microcontroller series which is to be applied to automotive systems representative of a
graphical cluster control unit on a dashboard.
Trademark
ARM and Cortex are the trademarks of ARM Limited in the EU and other countries.
Microcontroller Support Information:
http://www.spansion.com/support/microcontrollers/
1.2 Document Definition
The related documents of S6J3200 are the followings.
Table 1-1
Document Type
Definition
Datasheet
Primary User
The function and its characteristics are
Investigator and hardware
specified quantitatively.
engineer
S6J3200 hardware
The function and its operation of
manual
S6J3200 series are described.
TraveoTM Platform
The function and its operation of CPU
hardware manual
core platform are described.
Supplementary
Supplementary information for
Information for
document such as difference with
Datasheet
previous revision.
Supplementary
Supplementary information for
Information for
document such as difference with
Hardware manual
previous revision.
Document Code
DS708-00003-Revision
Software engineer
MN708-00005-Revision
Software engineer
MN708-00006-Revision
DS708-00003-Revision-E-SI
Datasheet user.
Hardware manual user.
MN708-00005-Revision-E-SI
Software and hardware engineer
Under consideration
The reference software, sample
Application note
application, the reference board design
and so on are explained.
Notes:
−
−
−
Refer all documents for the system development.
"Primary user" is a most likely engineer for whom the document is the most useful.
The description of the datasheet and the S6J3200 hardware manual should precede the duplicated
description of Traveo platform hardware manual.
Publication Number S6J3200_DS708-00003
Revision 0.4
Issue Date June 30, 2015
This document states the current technical specifications regarding the Spansion product(s) described herein. Cypress Semiconductor Corp. deems the products to have been
in sufficient production volume such that subsequent versions of this document are not expected to change. However, typographical or specification corrections, or
modifications to the valid combinations offered may occur.
CONFIDENTIAL
1. Overview
D a t a S h e e t ( P r e l i m i n a r y )
−
−
−
Traveo platform hardware manual is expected to be used as dictionary of platform specification.
Document code usually includes its revision.
Revise information from the previous revision can be seen the supplementary information.
1.3 Abbreviation
Abbreviation
Definition
A/D converter
Analog to Digital Converter
ADC
Analog to Digital Converter
AHB
Advanced High performance Bus
AMBATM
Advanced Microcontroller Bus Architecture
APB
Advanced Peripheral Bus
ATCM
TCM-A port
AXI
Advanced eXtensible Interface
B0TCM
TCM B0 port
B1TCM
TCM B1 port
BBU
Bit Banding Unit
BDR
Boot Description Record
BT
Base Timer
BTL
Bridge-Tied Load
CAN
Control Area Network
CD
Clock Domain
CPU
Central Processing Unit
CR
CR Oscillator
CRC
Cyclic Redundancy Check
CSV
Clock SuperVisor
DAC
Digital Analog Converter
DAP
Debug Access Port
DED
Dual Error Detection
DMA
Direct Memory Access
DMAC
DMA Controller
EAM
Exclusive Access Memory
ECC
Error Correction Code
ETM
Embedded Trace Macro
EXT-IRC
External InteRrupt Controller
FIQ
Fast Interrupt Request
FPU
Floating Point Unit
FRT
Free-Run Timer
GPIO
General Purpose I/O
HPM
High Performance Matrix
HW-WDT
Hardware Watchdog Timer
I/O
Input or Output
I2S
Inter-IC Sound
ICU
Input Capture Unit
IPCU
Inter-Processor Communication Unit
IRC
InteRrupt Controller
6
CONFIDENTIAL
Remark
S6J3200_DS708-00003-0v04-E, June 30, 2015
1. Overview
D a t a S h e e t ( P r e l i m i n a r y )
Abbreviation
Definition
IRQ
InteRrupt Request
ISR
Interrupt Service Routine
JTAG
Joint Test Action Group
LLPP
Low Latency Peripheral Port
LVD
Low Voltage Detector
MCU
MicroController Unit
MFS
Multi-Function Serial interface
MLB
Media LB
NF
Noise Filter
NMI
Non Maskable Interrupt
OCU
Output Compare Unit
OSC
OSCillator
PCB
Printed Circuit Board
PCBA
Printed Circuit Board Assembly
PCM
Pulse Coded Module
PD
Power Domain
PLL
Phase Locked Loop
PONR
Power ON Reset
PPC
Port Pin Configuration
PSC
Power Supply Control
PSS
Power Saving State
PWM
Pulse Width Modulation
RAM
Random Access Memory
RIC
Resource Input Configuration
RLT
Reload Timer
ROM
Read Only Memory
RSDS
Reduced Swing Differential Signal
RTC
Real Time Clock
RVD
Low Voltage Detection and Reset for RAM Retention
SCT
Source Clock Timer
SEC
Single Error Correction
SECDED
Single Error Correction and Dual Error Detection
SG
Sound Generator
SHE
Secure Hardware Extension
SMC
Stepper Motor Controller
SMIX
Sound Mixer
SPI
Serial Peripheral Interface
SRAM
Static RAM
SSCG
Spread Spectrum Clock Generation
SWFG
Sound Waveform Generator
SW-WDT
Software Watchdog Timer
SYSC
System Controller
TCFLASH
FLASH connected to TCM
TCM
Tightly Coupled Memory
TCRAM
RAM connected to TCM
TPU
Timing Protection Unit
TSU
Time Stamp Unit
UDC
Up-down Counter
VIC
Vectored Interrupt Controller
VRAM
Video RAM
June 30, 2015, S6J3200_DS708-00003-0v04-E
CONFIDENTIAL
Remark
7
1. Overview
D a t a S h e e t ( P r e l i m i n a r y )
Abbreviation
WDR
Definition
WDT
Watchdog Timer
WFG
Waveform Generator
WorkFLASH
Work FLASH Memory
8
CONFIDENTIAL
Remark
Watchdog Description Record
S6J3200_DS708-00003-0v04-E, June 30, 2015
2. Function List
D a t a S h e e t ( P r e l i m i n a r y )
2. Function List
2.1 Function List
The table shows the functions which are implemented in S6J3200 series.
Table 2-1
Function
Description
CPU core
ARM Cortex R5F
FPU
Remark
Available
(Double precision and Single precision)
PPU
Available
MPU
Available
TPU
Available
Endian
Little endian
Core clock frequency
Option
See 2.2.1 and AC
specification on the
datasheet.
HPM bus frequency
Option
Resource clock frequency
40MHz (Max)
Embedded CR oscillation
Slow clock:100kHz, Fast clock: 4MHz (Center frequency)
PLL
PLL0, 1, 2, 3
SSCG PLL
SSCG0, 1, 2, 3
Clock supervisor
Available
DMA
16 ch
Boot-ROM
16 Kbytes
JTAG
Available
Data cache
16Kbytes
Instruction cache
16Kbytes
Program FLASH
Option
Work FLASH
112Kbytes
TC-RAM
Option
System-RAM
128Kbytes
Backup-RAM
16Kbytes
Security (SHE)
Option
Low latency interrupt
Available
Power domain
5 domains
Power supply
5V +/- 0.5V, 3.3V +/- 0.3V, 1.2V +/- 0.1V
Embedded LDO power supply for 5.0V
Available
Low-voltage detection of external
power supply
Low-voltage detection of internal LDO
output
See AC specification on
the datasheet
See 2.2.1
See 2.2.1
See 2.2.1
Available
Available
Software watchdog timer
Available
Package
Option
AUTOSAR
AUTOSAR 4.0.3
CONFIDENTIAL
the datasheet
Available
Hardware watchdog timer
June 30, 2015, S6J3200_DS708-00003-0v04-E
See AC specification on
See 2.2.1
9
2. Function List
D a t a S h e e t ( P r e l i m i n a r y )
Function
Description
Remark
General Purpose I/O
Option
See 2.2.3
Up/down counter
2 ch
I/O timer
3 unit x 8 ch
32bit Reload timer
14 ch
Real time clock
Available
Sound generator
4 ch
Sound waveform generator
Sound mixer
Stereo audio DAC
PCM-PWM
Automatic calibration
Option
See 2.2.1
1 unit x 5 outputs
Option
See 2.2.1
1 unit x 10 inputs
Option
See 2.2.1
1 unit (L and R)
Option
See 2.2.1
1 unit (L and R)
Base timer
12 units (24ch)
Free-run timer
12 ch
Input Capture Unit
12 unit (24channels of capture)
Output Compare Unit
12unit (24 channels of compare match)
Stepping motor controller (SMC)
For 6 gauges
12bit-A/D converter
Option
See 2.2.3
1 unit x 50 input ports (Max)
CRC
1 unit
Programmable CRC
1 unit
Source clock timer
4 ch
NMI
Available
External interrupt
16 ch
Internal interrupt
512 vectors
I2S
2 ch
One only supports an
output as a function of the
sound system.
DDR HSSPI
2 ch
A type of Quad SPI
HyperBus (RPC2)
Option
See AC specification on
Multi-function serial interface
12 ch
CAN-FD
4 ch
See 2.2.1
the datasheet.
CAN-FD RAM (ECC supported)
Ethernet AVB
Media-LB (MOST25)
LCD controller
16KB/ch
It equivalents to 128 message buffer per channel of CCAN module
Option
See 2.2.1
Option
See 2.2.1
Option
4COM x 32 SEG (Max)
See 2.2.3
Indicator PWM
1 ch
MPU for AHB
1 unit
MPU for AXI
1 unit
Internal VRAM
Option
See 2.2.1
Graphic engine clock
Option
See 2.2.1
Option
See 2.2.1
Graphic AXI clock
Display clock
10
CONFIDENTIAL
Option
80MHz (ch.0), 50MHz(ch.1)
See 2.2.1
S6J3200_DS708-00003-0v04-E, June 30, 2015
2. Function List
D a t a S h e e t ( P r e l i m i n a r y )
Function
Description
Display clock source
Graphic display controller clock or external clock
Target frame rate
Remark
60 fps
Number of display outputs
Option
Maximum 2 outputs simultaneously
TTL output (RGB888)
Option
RSDS/TCON support
1 output
Option
FPD-Link (LVDS)
1 output, 350Mbps (Max)
Video capture unit
Option
Video capture format
ITU656, YCbCr4:4:4, YCbCr4:2:2, RGB888, RGB666
2D Graphic engine
1 unit
2.5D support
Available
Vector drawing on 2D engine
Available
Warping
Available
Scale/Rotate/Blend
Available
2D Driver API
SPANSION proprietary
See 2.2.1
See 2.2.1
See 2.2.1
See 2.2.1
3D Graphic engine
Option
See 2.2.1
Vector drawing on 3D engine
Option
See 2.2.1
3D Driver API
Option
See 2.2.1
Notes:
−
−
−
−
The options are described in 2.2.
The described specifications in the table which are related the electric characteristics only show the
typical values. They don’t necessarily include the width of characteristics, errors, and so on. They
should be seen in the datasheet in detailed.
Target resolution of graphics is WVGA 800 x 480, WQVGA 480 x 272.
Target capture resolution of graphics is WVGA 800 x 480.
June 30, 2015, S6J3200_DS708-00003-0v04-E
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2. Function List
D a t a S h e e t ( P r e l i m i n a r y )
2.2 Optional Function
2.2.1
Basic Option
The figure shows the optional function and the part number relations of the series.
Figure 2-1: Option and Part Number
S 6
J 3 2 0 0 H A A x x x x x x x x
Ordering options 7 digit
Revision: Revision version
Description
Digit
C
Support MCAN 3.0.1, RTC limitation
D
Support MCAN 3.2. (ISO Certification), RTC limitation
E
Support MCAN 3.0.1.
F
Support MCAN 3.2. (ISO Certification)
Option
Digit
S
U
SHE
ON
OFF
Pin count
Digit
K
L
M
Pin count
208 pin
216 pin
256 pin
Memory size
Digit
A
C
Program FLASH
Work FLASH
1088KB
2112KB
112KB
TC-RAM
64KB
128KB
VRAM
1024KB
2048KB
Function
See the function digit table.
Product series
Digit
2
Product type
Graphic SoC
Identifier: Automotive MCU
12
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S6J3200_DS708-00003-0v04-E, June 30, 2015
2. Function List
D a t a S h e e t ( P r e l i m i n a r y )
Table 2-2: Function Digit Table
S6J32X
Part Number
Function Digit
CPU Clock
Maximum
Graphics Clock
Maximum
Display Output
Support
Video Capture
Support
Graphic Engine
Type
HyperBus
Interface
(X = Function Digit)
3
4
5
6
7
8
A
B
C
D
240MHz
240MHz
240MHz
240MHz
240MHz
240MHz
160MHz
160MHz
160MHz
160MHz
200MHz
200MHz
200MHz
200MHz
200MHz
200MHz
160MHz
160MHz
160MHz
160MHz
ch.0, 1
ch.0, 1
ch.0, 1
ch.0, 1
ch.0, 1
ch.0, 1
ch.0
ch.0
ch.0
ch.0
1 unit
1 unit
1 unit
1 unit
1 unit
1 unit
OFF
OFF
OFF
OFF
2D
2D
2D, 3D
2D, 3D
2D
2D, 3D
2D
2D
2D, 3D
2D, 3D
ch.0, 1
ch.0, 1
ch.0, 1
ch.0, 1
ch.0, 1, 2
ch.0, 1, 2
ch.0, 1
ch.0, 1
ch.0, 1
ch.0, 1
Sound System
OFF
ON
OFF
ON
ON
ON
OFF
ON
OFF
ON
FPD-Link
OFF
OFF
OFF
ON
OFF
ON
OFF
OFF
OFF
OFF
Media System
ON
ON
ON
ON
ON
ON
OFF
OFF
OFF
OFF
ON
ON
ON
ON
ON
ON
OFF
OFF
OFF
OFF
Chip Select
Output of MFS
Notes:
−
−
−
−
−
−
−
This table only shows the relations between the optional function and the part numbers. That is, all
products are not necessarily available for orders. See the order number on the datasheet, and
confirm actual availabilities of products.
The sound system is composed of the sound waveform generator, the sound mixer, the audio DAC,
PCM-PWM, and I2S0.
The media system means both Ethernet AVB and Media LB.
HyperBus Interface ch.1 of the function digit 3, 4, 5, and 6 support HyperRAM after Revision B.
Multi-function serial interface of the function digit 3, 4, 5, 6, 7, and 8 support SCL4, 10, 12 and SDA4,
2
10, 12 of I C after Revision D.
The CLK_CPU is assigned for CPU clock. The CLK_CD3A0 is assigned for Graphic clock. They are
defined at the chapter of Clock Configuration.
Display Output ch.0 is used for RSDS and FPD-LINK (LVDS) as well as DRGB (Digital RGB). The
ch.0 of the product which doesn’t support FPD-LINK is used for RSDS and DRGB. Display Output
ch.1 is used for DRGB only.
June 30, 2015, S6J3200_DS708-00003-0v04-E
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13
2. Function List
D a t a S h e e t ( P r e l i m i n a r y )
2.2.2
ID
ID is specified for each function digit and revision which is defined at Figure 2-1.
Function Digit
3, 4, 5, 6, 7, 8
A, B, C, D
14
CONFIDENTIAL
Revision
Chip ID
JTAG ID
A
0x10100000
0x100085CF
B
-
-
C and D
0x10100100
0x1000C5CF
E and F
0x10100101
0x1000C5CF
A
-
-
B
0x10110000
0x100095CF
C and D
-
-
E
0x10110001
0x100095CF
S6J3200_DS708-00003-0v04-E, June 30, 2015
2. Function List
D a t a S h e e t ( P r e l i m i n a r y )
2.2.3
Restriction
Some functions have restrictions which depend on package pin counts.
Table 2-3
Function
Analog input port (12bit-ADC)
SEG port of LCD controller
TEQFP256
TEQFP216
TEQFP208
AN0 to AN49
AN0 to AN49
(50 ports)
(50 ports)
SEG0 to SEG31
SEG0 to SEG31
SEG0 to SEG29
(32 ports)
(32 ports)
(30 ports)
AN1 to AN3, AN5 to AN17,
AN20 to AN49
(46 ports)
P0_00, P0_01, P0_02, P0_03,
P0_04, P0_05, P0_06, P0_07,
P0_08, P0_09, P0_10, P0_11,
P0_12, P0_13, P0_14, P0_15,
P0_16, P0_17, P0_18, P0_19,
P0_26, P0_27, P0_28, P0_30,
P0_31, P1_00, P1_01, P1_02,
P1_03, P1_04, P1_05, P1_06,
P1_07, P1_08, P1_09, P2_16,
P2_17, P2_19, P2_22, P2_24,
P2_25, P2_26, P2_27, P2_28,
P2_29, P2_30, P2_31, P3_00,
P3_01, P3_02, P3_03, P3_04,
P3_05, P3_06, P3_07, P3_08,
P3_09, P3_10, P3_11, P3_12,
P3_13, P3_14, P3_15, P3_16,
P3_17, P3_18, P3_19, P3_20,
P3_21, P3_22, P3_23, P3_24,
P3_25, P3_26, P3_27, P3_28,
General Purpose I/O
P3_29, P3_30, P3_31, P4_00,
P4_01, P4_02, P4_03, P4_04,
P4_05, P4_06, P4_07, P4_08,
P4_09, P4_10, P4_11, P4_12,
P4_25, P4_26, P4_27, P4_28,
P4_29, P4_30, P4_31, P5_00,
P5_01, P5_02, P5_03, P5_04,
P5_05, P5_06, P5_07, P5_08,
P5_09, P5_10, P5_11, P5_12,
P5_13, P5_14, P5_15, P5_16,
P5_17, P5_18, P5_19, P5_20,
P5_21, P5_22, P5_27, P5_28,
P5_29, P5_30, P5_31, P6_00,
P6_01, P6_02, P6_03, P6_04,
P6_05, P6_06, P6_07, P6_08,
P6_09, P6_10, P6_11, P6_12,
P6_13, P6_14, P6_15, P6_16,
P6_17, P6_18, P6_19, P6_20,
P0_00, P0_01, P0_02, P0_03,
P0_04, P0_05, P0_06, P0_07,
P0_08, P0_09, P0_10, P0_11,
P0_12, P0_13, P0_14, P0_15,
P0_16, P0_17, P0_18, P0_19,
P0_26, P0_27, P0_28, P0_30,
P0_31, P1_00, P1_01, P1_02,
P1_03, P1_04, P1_05, P1_06,
P1_07, P1_08, P1_09, P2_16,
P2_17, P2_19, P2_22, P2_24,
P2_25, P2_26, P2_27, P2_28,
P2_29, P2_30, P2_31, P3_00,
P3_01, P3_02, P3_03, P3_04,
P3_05, P3_06, P3_07, P3_08,
P3_09, P3_10, P3_11, P3_12,
P3_13, P3_14, P3_15, P3_16,
P3_17, P3_18, P3_19, P3_20,
P3_21, P3_22, P3_23, P3_24,
P3_25, P3_26, P3_27, P3_28,
P3_29, P3_30, P3_31, P4_00,
P4_01, P4_02, P4_03, P4_04,
P4_05, P4_06, P4_07, P4_08,
P4_09, P4_10, P4_11, P4_12,
P4_25, P4_26, P4_27, P4_28,
P4_29, P4_30, P4_31, P5_00,
P5_01, P5_02, P5_03, P5_04,
P5_05, P5_06, P5_07, P5_08,
P5_09, P5_10, P5_11, P5_12,
P5_13, P5_14, P5_15, P5_16,
P5_17, P5_18, P5_19, P5_20,
P5_21, P5_22, P5_27, P5_28,
P5_29, P5_30, P5_31, P6_00
P0_00, P0_01, P0_04, P0_05,
P0_06, P0_07, P0_08, P0_09,
P0_10, P0_11, P0_12, P0_13,
P0_14, P0_15, P0_16, P0_17,
P0_18, P0_19, P0_26, P0_27,
P0_28, P0_30, P0_31, P1_00,
P1_01, P1_02, P1_03, P1_04,
P1_05, P1_06, P1_07, P1_08,
P1_09, P2_16, P2_17, P2_19,
P2_22, P2_25, P2_26, P2_27,
P2_29, P2_30, P2_31, P3_00,
P3_01, P3_02, P3_03, P3_04,
P3_05, P3_06, P3_07, P3_08,
P3_09, P3_12, P3_13, P3_14,
P3_15, P3_16, P3_17, P3_18,
P3_21, P3_22, P3_23, P3_24,
P3_25, P3_26, P3_27, P3_28,
P3_29, P3_30, P3_31, P4_00,
P4_01, P4_02, P4_03, P4_04,
P4_05, P4_06, P4_07, P4_08,
P4_09, P4_10, P4_11, P4_12,
P4_25, P4_26, P4_27, P4_28,
P4_29, P4_30, P4_31, P5_00,
P5_01, P5_02, P5_03, P5_04,
P5_05, P5_06, P5_07, P5_08,
P5_09, P5_10, P5_11, P5_12,
P5_13, P5_14, P5_15, P5_16,
P5_17, P5_18, P5_19, P5_20,
P5_21, P5_22, P5_27, P5_28,
P5_29, P5_30, P5_31, P6_00
(120 ports)
(128 ports)
P6_21, P6_22, P6_23, P6_24,
P6_25, P6_26
(154 ports)
June 30, 2015, S6J3200_DS708-00003-0v04-E
CONFIDENTIAL
15
2. Function List
D a t a S h e e t ( P r e l i m i n a r y )
Function
PPG triggered input
TEQFP256
TEQFP216
PPG0/1/2/3/4/5_TIN1,
PPG0/1/2/3/4/5_TIN1,
PPG6/7/8/9/10/11_TIN
PPG6/7/8/9/10/11_TIN
TEQFP208
PPG6/7/8/9/10/11_TIN
Notes:
−
−
−
16
CONFIDENTIAL
See multiplexed functions on pin assignment sheet.
The optional restriction will be added without notification.
TEQFP-256 is a package option under planning
S6J3200_DS708-00003-0v04-E, June 30, 2015
3. Product Description
D a t a S h e e t ( P r e l i m i n a r y )
3. Product Description
3.1 Overview
This chapter explains the product features of S6J3200 series. The description of this chapter should precede
the duplicated description on platform manual.
3.2 Product Description
The table shows features.
Table 3-1
Feature
Technology
Description
55nm CMOS technology with embedded FLASH
Fully automotive qualified according to ISO/TS 16949 and AEC-Q100
Functional Safety
The product series has some functional safety features suited for ASIL-B application.
Peripherals
See function list.
See the platform manual and chapter STATE TRANSITION in detail.
The product series supports the power off control of PD1, PD2 (including PD3 and 5), and PD6.
Power Domain (PD)
The power domain resets of PD3 and PD5 included in PD2 are not supported in the product series, and
"0" is always read from the reset factor flags of them.
This series doesn't support partial wakeup for PD6.
See the platform manual in detail.
− Standard 5-pin JTAG interface
Debug and Trace
− 4kB Embedded Trace Buffer
4-bit trace support for TEQFP package.
Full trace (dedicated 16-bit port) with special bond-out package is planned.
See the platform manual in detail.
Main and sub oscillator is available.
System Control
− A wide range of 3.6 - 16MHz is available for main oscillator
− 32KHz is available for sub oscillator
Sub clock is enable/disable by register settings
Clock
See the platform manual in detail.
CLK_CLKO (Clock Output Function) is not supported.
See the platform manual in detail.
Embedded CR oscillation
Stabilization time is as followings.
− 5us for 4MHz (Fast clock)
− 20us for 100kHz (Slow clock)
See the platform manual in detail.
Clock Supervisor
This product series doesn’t support clock supervisor output port. (Related register and internal circuit is
implemented.)
See the platform manual in detail.
Reset
Following resets are not mounted on this device.
− INITX
− SRSTX (and nSRST pin)
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17
3. Product Description
D a t a S h e e t ( P r e l i m i n a r y )
Feature
Description
See the platform manual in detail.
Hardware watchdog function stops during PSS mode. In the related register of HWDG_CFG, the bit
Hardware Watchdog
ALLOWSTOPCLK is always read as 1 (HWDG_CFG.ALLOWSTOPCLK=1).
The product series doesn’t support Watchdog Counter Monitor Output port. (Related register and internal
circuit is implemented.)
See the platform manual in detail.
Software Watchdog
The product series doesn’t support Watchdog Counter Monitor Output port. (Related register and internal
circuit is implemented.)
See the platform manual in detail.
Standby Mode
Standby mode with 5V single power supply is available.
Turning off the 3.3V supply and the external 1.2V supply in standby mode is available.
The long term pulse of the indicator PWM can be outputted during RTC Standby mode.
See the platform manual in detail.
Use case assumption is following.
− PLL
 Sound system clock
 Sound frequency master clock
 Peripherals
 Display clock
PLL / SSCG PLL
 Trace clock
− SSCG
 CPU core
 GDC core
 HyperBus
 DDR-HSSPI
Down spread mode is only supported and available.
External Interrupts
NMI
See the platform manual in detail.
See the platform manual in detail.
1 NMI pin.
MPU16 AHB: See the platform manual in detail.
MPU for AXI: ch.0 (Supervise Ethernet)
MPU for AHB: ch.1 (Supervise Media LB)
Additional MPU for Graphic sub system, MediaLB and Ethernet AVB. They are described on the chapter
Memory Protection
of MPU for AHB and MPU for AXI.
To configure Lock or Unlock for both MPUXn_UNLOCK and MPUHn_UNLOCK,
− Lock: 0x112ABB56
− Unlock: 0xACCABB56
Peripheral Protection
Internal Memories
System RAM
Internal Memories
TCRAM
See the platform manual in detail.
Protected peripherals are described in the base address map.
See the platform manual in detail.
1 wait cycle is necessary for RAM read at over 160MHz.
No need to insert wait cycles for RAM write.
See the platform manual in detail.
16KBytes
Internal Memories
Backup RAM can only be operated in RUN mode (normal operation mode). In other mode the memory
Backup RAM
content should be retained, but it cannot be operated. SLEEP control for Buckup RAM is not supported
and cannot be used.
18
CONFIDENTIAL
S6J3200_DS708-00003-0v04-E, June 30, 2015
3. Product Description
D a t a S h e e t ( P r e l i m i n a r y )
Feature
Description
ECC region is shared with user region.
Internal Memories
Memory size available for user program become less when ECC is enabled.
VRAM
User can define ECC enabled area and ECC disabled area.
Single error correction, double error detection (SECDED) ECC support per 32-bit word.
Embedded Program Flash can be accessed with 0-wait-cycle if CPU frequency is 80MHz or less.
0-wait-cycle: 80MHz or less.
1-wait-cycle: 160MHz or less.
2-wait-cycle: more than 160MHz.
Embedded
The maximum frequency should be referred in datasheet.
Program/Work Flash Memory
Erase suspend is supported. Reading and writing to the other sector are possible when Flash Erase is
suspended.
Serial Flash programing and Parallel Flash programing are supported.
Margin mode is not supported.
PD1: Always ON
PD2: Cortex R5F platform/ GDC/ additional peripherals
Internal Power Domain
PD4: Backup RAM in Always On domain
PD6: Peripherals in Always On domain
* The chapter of the block diagram explains in detail.
External 5V, 3V, 1.2V is required.
Built in LDO provides internal 1.2V for Always On region (PD1).
Power Supply
External 1.2V power supply control pin is supported.
External 3.3V power supply should be controlled by GPIO.
There are constraints of power on/off sequence.
LVD for external voltage is supported.
Low-voltage Detection
LVD for internal voltage is supported.
See the specification of the detected level on the datasheet.
Low-voltage Detection for
RVD for RAM retention is effective during the standby mode only. That is, it is only for the Backup RAM of
RAM Retention (RVD)
16KB that the function is available.
Resource inter-connect
The output signal of some resources can be inputted to the other resource.
5V general purpose I/O
3V general purpose I/O
I/O Ports
Multi input level and multi output drivability
Pull-up, pull-down function is available.
Resource input and output is multiplexed.
+B input is allowed many pins of 3.3V, 5V and 3.3V/5V I/O domain.
12bit resolution, 1 unit
50 channels of analog input for TEQFP256 and TEQPF216
46 channel of analog input for TEQFP208
A/D Converter
24 channels of them are shared with the SMC for TEQFP256/216/208
External trigger and timer trigger are available.
The description of the A/D converter function should be referred in the S6J3200 hardware manual.
Though the chapter of I/O port in Traveo PF V3 hardware manual describes another A/D converter
function, do not refer it.
CRC
See the platform manual in detail.
Programmable CRC
DMA support
Produces sound/melody with varying frequency and amplitude for convenient duration
Sound Generator
Square wave sound output
Automatic linear amplitude increment or decrement
Interrupt request generated when specified sound length has ended
June 30, 2015, S6J3200_DS708-00003-0v04-E
CONFIDENTIAL
19
3. Product Description
D a t a S h e e t ( P r e l i m i n a r y )
Feature
Description
Sine waveform, saw-tooth waveform and Square waveform are generated with easy configuration of the
Sound Waveform Generator
parameters which specified sound sources.
Fade-in and Fade-out control for reverberation.
The input channels of 0 - 4 are reserved for waveform generator.
Mixing different sampling frequency sounds.
Mixing Internal sounds and External I2S input sounds.
Sound Mixer
Saturating addition function for keeping sound quality.
Cut a specific frequency data by digital filter.
LPF is support by FIR filter.
Fade-in and Fade-out control.
Conversion of PCM audio streaming to Pulse Width Modulated signals.
PCM-PWM
Supports 2 output channels for stereo and mono data
Up to 16-bit output sample resolution
Support for half and full H-bridges
The sound source of the fixed 48kHz sampling frequency can be outputted.
Audio DAC
1unit, L/R channels support.
BTL connection is available.
2ch.
I2S
− I2S0 only supports the output of sound sources.
− I2S1 supports both the input and the output.
− I2S has its own PPU, but the function is fixed to disable.
See the platform manual in detail.
Base Timer
A unit consists of a pair of 16bit base timers. 12 units, that is, 24 channels of base timers are available.
Reload Timer
See the platform manual in detail.
I/O Timer
See the platform manual in detail.
Up/Down Counter
See the platform manual in detail.
See the platform manual in detail.
2 ports of MFS only support I2C.
Note all pins do not necessarily support I2C, but the pins which have the dedicated I/O characteristics
Multi-functional Serial (MFS)
only support it. See the datasheet in detail.
Chip select function of CSIO is not supported yet and will be enhanced with next revision.
CTS/RTS is not mounted (hardware flow control is not supported for this series.)
Flexible data rate is supported.
16KB/ch of message RAM is available.
CAN-FD
The clock output from CAN pre-scaler is supplied to every CAN. ECC error generation function of the
message RAM is not supported for this device. Therefore CAN FD ECC Error Insertion Control Register
(FDFECR) is not writeable.
Real Time Clock (RTC)
with Auto-calibration
DDR High Speed SPI
20
CONFIDENTIAL
See the platform manual in detail.
ch.0: HSSPI as a MCU peripheral
ch.1: HSSPI on graphic subsystem
S6J3200_DS708-00003-0v04-E, June 30, 2015
3. Product Description
D a t a S h e e t ( P r e l i m i n a r y )
Feature
Description
ch.0: HyperBus as a MCU peripheral
ch.1: HyperBus on graphic subsystem
ch.2: HyperBus on graphic subsystem
The following register is not supported and cannot be used.
− Controller Status Register (HYPERBUSIn_CSR)
HyperBus I/F
− Interrupt Status Register (HYPERBUSIn_ISR)
− Write Protection Register (HYPERBUSIn_WPR)
− Test Register (HYPERBUSIn_TEST)
GPO signal can only be used for "Internal Control example by GPO" in this product, that is, it can select
using HyperBus of PF or using HyperBus of Graphic Sub System.
Stepper Motor Control (SMC)
External Interrupt Capture Unit
(EICU)
Each channel has 4 motor drivers with high output capability
See the platform manual in detail.
10/100 Mbps
MII-Interface
Supports Audio-Video Bridging (AVB)
ETHERNETn_revision_reg :
0x30070106 (Initial value) for revision B
Ethernet AVB
ETHERNETn_designcfg_debug6 :
0x0302000E (Initial value)
See 3.2.1 in details.
MOST25 (512FS)
MediaLB
3 wires
Maximum 15ch is available.
TEQFP256 : 4com x 32seg
TEQFP216 : 4com x 32seg
TEQFP208 : 4com x 30seg
LCD Controller
LCDC pins are initialized with Reset. (Stop LCDC alternating current output).
Duty and Static of segment output is supported. (SEG23/ST0, SEG24/ST1, SEG25/ST2, SEG26/ST3,
SEG27/ST4, SEG28/ST5, SEG29/ST6, SEG30/ST7, SEG31/ST8)
SHE
See the platform manual in detail.
Source Clock Timer
See the platform manual in detail.
Variable setting about GDC clock. (Asynchronous with CPU clock)
Two drawing engines for “2D drawing” and “3D drawing”. Parallel processing support.
Graphics Subsystem
Order replacement of RGB pins.
CPU can direct access to VRAM.
Programmable panel timing controller with RGB888 and RSDS support.
Note:
−
The description of the preliminary documentation will be changed without any notification.
June 30, 2015, S6J3200_DS708-00003-0v04-E
CONFIDENTIAL
21
3. Product Description
D a t a S h e e t ( P r e l i m i n a r y )
3.2.1
Ethernet
The following functions are not supported.
Functions
Remark
Direct Memory Access Interface.
- partial store and forward
- force max amba burst tx/rc
- Priority Queueing (Screening)
External FIFO Interface
Additional Low Latency TX FIFO Interface for DMA configurations
MAC Transmit Block
- half-duplex
- collision
- back_pressure
MAC Filtering Block
- external address match
- VLAN tag
- Wakeup On Lan
IEEE 1588 and IEEE 802.1AS Support
MAC PFC Priority Based Pause Frame Support
Energy Efficient Ethernet support
LPI Operation in Cadence IP
802.1Qav Support – Credit Based Shaping
PHY Interface
- GMII
- SGMII
- TBI
10/100/1000 Operation
- 10 M
- 1000 M
SGMII Operation
Jumbo Frames
Physical Control Sub-Layer
22
CONFIDENTIAL
S6J3200_DS708-00003-0v04-E, June 30, 2015
4. Package and Pin Assignment
D a t a S h e e t ( P r e l i m i n a r y )
4. Package and Pin Assignment
4.1 Pin Assignment
Alphabets with pin numbers are signs specify I/O circuit type.
The pins which are described in "red" character are not supported, and will be enhanced with next revision
products.
Function Digit
TEQFP-216
TEQFP-208
TEQFP-256
S6J328
Figure 4-1
Figure 4-8
Figure 4-15
S6J327
Figure 4-2
Figure 4-9
-
S6J326
Figure 4-3
Figure 4-10
-
S6J325
Figure 4-4
Figure 4-11
-
S6J324
Figure 4-5
Figure 4-12
-
S6J323
Figure 4-6
Figure 4-13
-
A, B, C, D
Figure 4-7
Figure 4-14
-
June 30, 2015, S6J3200_DS708-00003-0v04-E
CONFIDENTIAL
23
4. Package and Pin Assignment
D a t a S h e e t ( P r e l i m i n a r y )
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0 0
INDICATOR0_1 0
0 0
MFS8_CS2 0
MFS8_CS1 0
MFS8_CS3 0
MFS9_CS1 0
MFS9_CS0 0
MFS8_CS0 0
0 0
0 0
0 0
0 0
0 0
0 0
0 0
0 0
0
P2_16
P2_17
P3_17
P3_16
P3_15
P3_14
P3_13
P3_12
P3_11
P3_10
P3_09
P3_08
P3_07
P2_19
0
0
0
0
0
SEG24
SEG25
SEG26
SEG27
SEG28
SEG29
SEG30
SEG31
V0
V1
V2
V3
0
0
0
EINT0
EINT1
EINT1
EINT0
EINT15
EINT14
EINT13
EINT12
EINT11
EINT10
EINT9
EINT8
0
0
PPG0_TOUT2
PPG4_TOUT2
PPG4_TOUT0
PPG3_TOUT2
PPG3_TOUT0
PPG2_TOUT2
PPG2_TOUT0
PPG1_TOUT2
PPG1_TOUT0
PPG0_TOUT2
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TIN48
0
0
0
ICU0_IN0
ICU0_IN1
ICU4_IN1
ICU4_IN0
FRT4/5/6/7_TEXT ICU3_IN1
PPG0_TOUT0 PPG6/7/8/9/10/11_TIN
EINT7 PPG11_TOUT2
EINT3
0
PPG0_TOUT0
ICU3_IN0
ICU2_IN1
ICU2_IN0
ICU1_IN1
ICU1_IN0
ICU0_IN1
ICU0_IN0
ICU1_IN1
0
0
0
OCU0_OTD0
OCU0_OTD1
0
0 TIN18
OCU0_OTD0 WOT TOT18
0
0 TOT19
0
0
0
0
0
0
OCU2_OTD0 SGO0 TOT32 SOT10
0 TIN19
0
OCU2_OTD1 SGA0 TIN32 SCK10
0
0
0
OCU3_OTD0 SGA1 TOT33 SIN10
0
0
OCU3_OTD1 SGO1 TIN33 SOT11
OCU0_OTD1
0
0
OCU4_OTD0 SGA2 TOT34 SCK11
OCU1_OTD0
0
OCU4_OTD1 SGO2 TIN34 SIN11
OCU1_OTD1
0
0
0
SIN9
SCK9
SOT9
0
0
0
0
0
0
TX6
RX6
TX5
RX5
0
0
TX6
RX6
TX5
RX5
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
VCC5
X0A
X1A
AN25
AN24
AN23
AN22
AN21
AN20
AN19
AN18
AN17
AN16
AN15
0
VSS
VCC5
-
X
X
W
W
W
W
W
W
W
W
V
V
V
U
-
-
179
178
177
176
175
174
173
172
171
170
169
168
167
166
165
164
163
0
0
0
0
0
0
0
0
0
0
0
0
0
0 0
0 0
0 0
0 0
0 0
0 0
0 0
0 0
0 0
0 0
0 0
0 0
0 0
0 0
0 0
P5_07
P5_06
P5_05
0
0
0
0
P5_04
P5_03
P5_02
P5_01
P5_00
P4_31
P4_30
P4_29
0
0
SEG13
SEG14
SEG15
0
0
0
0
SEG16
SEG17
SEG18
SEG19
SEG20
SEG21
SEG22
SEG23
0
0
EINT7
EINT6
EINT5
0
0
0
0
EINT4
EINT3
EINT2
EINT1
EINT0
EINT15
EINT14
EINT13
0
0
PPG7_TOUT2
PPG7_TOUT0
PPG6_TOUT2
0
0
0
0
PPG6_TOUT0
PPG5_TOUT2
PPG5_TOUT0
PPG4_TOUT2
PPG4_TOUT0
PPG3_TOUT2
PPG3_TOUT0
PPG2_TOUT2
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
ICU8_IN1
ICU8_IN0
ICU7_IN1
ICU7_IN0
ICU6_IN1
0
0
0
0
ICU6_IN0
ICU5_IN1
ICU5_IN0
ICU4_IN1
ICU4_IN0
ICU3_IN1
ICU3_IN0
ICU2_IN1
0
0
OCU9_OTD1
OCU8_OTD1
OCU8_OTD0
OCU7_OTD1
OCU7_OTD0
OCU6_OTD1
0
0
0
0
OCU6_OTD0
OCU5_OTD1
OCU5_OTD0
OCU4_OTD1
OCU4_OTD0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
OCU3_OTD0 SGA3
0
AIN8
OCU3_OTD1 SGO3
OCU2_OTD1
ZIN8
OCU9_OTD0 BIN8
0
0
0
0 SCK10
0 SOT10
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
SIN9
SCK9
SOT9
0
0
0
0
0
SIN8
SCK8
SOT8
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
BN1(BL1)
BP1(BH1)
AN1(AL1)
AP1(AH1)
BN0(BL0)
BP0(BH0)
AN0(AL0)
AP0(AH0)
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
DSP1_DATA1_5
DSP1_DATA0_6
DSP1_DATA1_6
DSP1_DATA0_7
DSP1_DATA1_7
VCC53
VSS
VCC12
VCC12
DSP1_DATA0_8
DSP1_DATA1_8
DSP1_DATA0_9
DSP1_DATA1_9
0 DSP1_DATA1_10
0 DSP1_DATA0_11
0 DSP1_DATA1_11
0
DSP1_DATA0_5
0 DSP1_DATA0_10
0
DSP1_DATA1_4
VCC53
VSS
Y
Y
Y
Y
Y
Y
Y
-
-
-
-
Y
Y
Y
Y
Y
Y
Y
Y
-
-
200
199
198
197
196
195
194
193
192
191
190
189
188
187
186
185
184
183
182
181
180
0 TOT17
0
0
0 0
PPG8_TOUT0
ICU9_IN0
FRT0/1/2/3_TEXT ICU11_IN1 OCU11_OTD1
0
0
0 0
EINT8
0
ICU9_IN1
0
SEG12
0
0
P5_08
PPG8_TOUT2
0
0 0
EINT9
PPG9_TOUT0
0
SEG11
PPG9_TOUT2
P5_09
EINT10
201
0 0
EINT11
Y
0
SEG9
SEG10
DSP1_DATA0_4
202
P5_10
0
-
P5_11
0
VCC53
MFS8_CS0 0
0 SIN10
0
MFS9_CS0 0
AIN9
0
MFS10_SDA
0 ICU10_IN0 OCU10_OTD0
0
MFS10_SCL
EINT12 PPG10_TOUT0
0
SEG8
0
P5_12
0
203
MFS9_CS1 0
0
204
0
0
-
0
Y
0
VSS
0
DSP1_DATA1_3
0
0
0 0
0
0
0
0
DSP0_CTRL0
0
0
EINT13 PPG10_TOUT2
0
0
0
SEG7
0
0
0
P5_13
0
0 0
0
0 0
0
0
0 ICU10_IN1 OCU10_OTD1 BIN9
0
ZIN9
205
0 ICU11_IN0 OCU11_OTD0
Y
EINT14 PPG11_TOUT0
DSP1_DATA0_3
SEG6
0
P5_14
DSP0_CTRL1
MFS8_CS3 0
0 SOT11
0
206
CAP0_DATA16
DSP0_DATA_D6-
DSP0_DATA1_6
D
49
114
N2
JTAG_TDI
0
0
0
0
0
0
0
0
CAP0_DATA15
G_DQ0_2
0
0
0
0
P0_08
EINT9
PPG4_TOUT2
ICU4_IN1
OCU4_OTD1
0
TOT19
RXD0
CAP0_DATA17
DSP0_DATA_D7+
DSP0_DATA0_7
D
50
113
O
JTAG_TDO
0
0
0
0
0
0
0
0
0
G_CS#1_2
0
0
0
0
P0_09
EINT10
PPG5_TOUT0
ICU5_IN0
OCU5_OTD0
0
TIN19
RXD1
CAP0_DATA18
DSP0_DATA_D7-
DSP0_DATA1_7
D
51
112
N
JTAG_NTRST
0
0
0
0
0
0
0
0
0
0
G_RWDS_2
0
0
0
0
P0_10
EINT11
PPG5_TOUT2
ICU5_IN1
OCU5_OTD1S0_ECLK
TOT32
RXD2
CAP0_DATA19
DSP0_DATA_D8+
DSP0_DATA0_8
D
52
111
M
X0
0
0
0
0
0
0
0
0
0
0
G_CS#2_2
0
0
0
0
P0_11
EINT12
PPG6_TOUT0
ICU6_IN0
OCU6_OTD0 I2S0_SD
TIN32
RXD3
CAP0_DATA20
DSP0_DATA_D8-
DSP0_DATA1_8
D
53
110
M
X1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
VSS
-
54
109
-
VSS
0
0
0
0
0
0
0
0
0
TOT16
Y
TXD3
0
DSP1_DATA1_2
TIN18
0
DSP0_CTRL2 DSP1_CTRL2
0
0
0 SCK11
OCU4_OTD0
0
0
0
ICU4_IN0
0
0
0 ICU11_IN1 OCU11_OTD1
PPG4_TOUT0
0
0
EINT15 PPG11_TOUT2
EINT8
0
0
SEG5
P0_07
0
0
P5_15
0
0
0
MFS8_CS1 0
0
0
0
0
0
0
0
207
0
0
0
208
G_DQ1_2
0
0
Y
CAP0_DATA14
0
0
Y
0
0
0
DSP1_DATA0_2
0
0
0
TIN3
DSP1_DATA1_1
0
0
0
0
0
DSP1_CLK
0
0
0
0
OCU1_OTD0
DSP0_CTRL3
0
0
0
0
ICU1_IN0
DSP0_CTRL4 DSP1_CTRL0
0
0
0
0
0
PPG1_TOUT0
0
0
0
0
0
0
EINT2
0 SIN11
0
0
0
0
0
P0_01
0
0
0
0
0
JTAG_TCK
0
0
0
0
0
JTAG_TMS
N2
0
0
0
0
MODE
N2
115
0
OCU0_OTD0
0
RSTX
P
116
48
0
OCU0_OTD1
0
Q
117
47
D
0
ICU0_IN0
0
118
46
D
DSP0_DATA0_6
0
ICU0_IN1
VCC5
45
D
DSP0_DATA1_5
DSP0_DATA_D6+
0
0
-
D
DSP0_DATA0_5
DSP0_DATA_D5-
CAP0_DATA15
TOT3
0
119
DSP0_DATA1_4
DSP0_DATA_D5+
CAP0_DATA14
TXD2
0
PPG0_TOUT0
44
DSP0_DATA_D4-
CAP0_DATA13
TXD1
TOT18
OCU0_OTD1
PPG0_TOUT2
D
CAP0_DATA12
TXD0
TIN17
0
ICU0_IN1
EINT0
DSP0_DATA0_4
CRS
TOT17
SIN0
OCU3_OTD1
PPG0_TOUT2
EINT1
DSP0_DATA_D4+
TIN16
0
OCU3_OTD0
ICU3_IN1
EINT1
SEG4
CAP0_DATA11
0
OCU2_OTD1
ICU3_IN0
PPG3_TOUT2
P0_00
SEG3
COL
OCU2_OTD0
ICU2_IN1
PPG3_TOUT0
EINT7
0
P5_16
OCU1_OTD1
ICU2_IN0
PPG2_TOUT2
EINT6
P0_06
0
P5_17
ICU1_IN1
PPG2_TOUT0
EINT5
P0_05
0
0
0 0
PPG1_TOUT2
EINT4
P0_04
0
0
0
MFS8_CS2 0
EINT3
P0_03
0
0
0
0
0
P0_02
0
0
0
0
0
0
0
0
0
0
G_DQ2_2
CAP0_DATA8
209
P4_12
MFS0_CS2
0
PPG5_TOEINT11
P4_11
MFS0_CS1
MFS4_SCL
0
0
0
0
0
0
0
0
0
0
0
0
0
0
VSS_LVDS_Tx
0
PWM1M3
OCU1_OTD0 ICU1_IN0
PPG1_TOEINT2
P4_02
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TxDOUT3+
AN38
0
0
PWM1P3
OCU0_OTD1 ICU0_IN1
PPG0_TOEINT1
P4_01
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TxDOUT3-
B
17
S
AN37
0
0
PWM2M2
OCU0_OTD0 ICU0_IN0
PPG0_TOEINT0
P4_00
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TxDOUT2+
B
18
145
S
AN36
0
0
PWM2P2
OCU11_OTD ICU11_IN1
PPG11_T EINT15
P3_31
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TxDOUT2-
B
19
144
S
AN35
0
0
PWM1M2
OCU11_OTD ICU11_IN0
PPG11_T EINT14
P3_30
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TxCLK+
B
20
143
S
AN34
0
0
PWM1P2
OCU10_OTD ICU10_IN1
PPG10_T EINT13
P3_29
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TxCLK-
B
21
142
-
DVCC
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TxDOUT1+
B
22
141
-
DVSS
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TxDOUT1-
B
23
140
S
AN33
0
BN1(BL1)
PWM2M1
OCU10_OTD ICU10_IN0
PPG10_T EINT12
P3_28
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TxDOUT0+
B
24
139
S
AN32
0
BP1(BH1)
PWM2P1
OCU9_OTD1 ICU9_IN1
PPG9_TOEINT11
P3_27
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TxDOUT0-
B
25
138
S
AN31
0
AN1(AL1)
PWM1M1
OCU9_OTD0 ICU9_IN0
PPG9_TOEINT10
P3_26
0
0
0
0
0
0
0
0
0
0
0
0
G_DQ3_2
CAP0_DATA13
CAP0_DATA7
0
0
PPG6_TOEINT12
OCU5_OTD1 ICU5_IN1
0
0
0
0
G_CK_2
CAP0_DATA12
0
TIN2
Y
0
TOT2
0
DSP1_DATA0_1
0
0
SCK0
OCU0_OTD0
DSP0_CTRL5 DSP1_CTRL1
0
0
OCU11_OTD1
ICU0_IN0
0 SOT12
0
0
ICU11_IN1
PPG0_TOUT0
0
0
0
PPG11_TOUT2
EINT0
OCU1_OTD0
0
0
EINT15
P6_00
ICU1_IN0
0
0
P5_31
0
0
0
0
0
0
PPG1_TOUT0
0
0
0
0
EINT2
0
VSS
0
0
SEG2
C
0
0
P5_18
-
120
0
0
MFS12_SDA 0
121
43
0
0
42
DSP0_DATA_D1-
210
-
VCC3
CAP0_DATA6
Y
VSS
0
0
DSP1_DATA1_0
0
0
TIN1
0
0
0
SOT0
DSP0_CTRL6
0
0
OCU11_OTD0
0 SCK12
0
ICU11_IN0
0
0
PPG11_TOUT0
OCU1_OTD1
P3_18
EINT14
ICU1_IN1
PPG5_TOEINT2
P5_30
0
OCU5_OTD0 ICU5_IN0
0
PPG1_TOUT2
TOT35
0
EINT3
SGA3
0
SEG1
0
0
P5_19
ADTRG
0
MFS12_SCL 0
H
0
0
122
DSP0_DATA0_1
211
41
DSP0_DATA_D1+
212
D
CAP0_DATA5
213
DSP0_DATA1_3
0
214
DSP0_DATA_D3TOT1
215
CAP0_DATA10
0
216
TXEN
OCU10_OTD1
-
0
ICU10_IN1
Y
P3_19
PPG10_TOUT2
Y
PPG5_TOEINT3
EINT13
Y
OCU5_OTD1 ICU5_IN1
P5_29
Y
TIN35
0
Y
SGO3
0
VCC53
0
0
DSP1_CLK
0
0
DSP1_CTRL2
H
0
DSP1_CTRL1
123
0
DSP1_CTRL0
40
D
DSP1_DATA0_0
D
D
DSP0_DATA1_0
0
DSP0_DATA0_3
DSP0_DATA0_0
DSP0_DATA_D0-
0
DSP0_DATA_D3+
DSP0_DATA_D0+
CAP0_DATA4
0
CAP0_DATA9
CAP0_DATA3
0
0
0
0
0
TIN0
0
0
P3_20
TOT0
0
0
0
0
OCU10_OTD0
0
0
PPG6_TOEINT4
OCU9_OTD1
ICU10_IN0
DSP0_CTRL7
0
OCU6_OTD0 ICU6_IN0
ICU9_IN1
PPG10_TOUT0
DSP0_CTRL8
0
0
PPG9_TOUT2
EINT12
DSP0_CTRL9
0
0
EINT11
P5_28
0
0
0
0
P5_27
0
0 SIN12
0
0
0
0
0
AVCC5
H
0
0
0 SOT11
-
124
0
0
0 SCK11 DSP0_CTRL10
125
39
0
0
0 SIN11 DSP0_CTRL11
38
D
0
0
0
D
DSP0_DATA1_2
0
0
DSP0_DATA0_2
DSP0_DATA_D2-
33
0
DSP0_DATA_D2+
D
0
0
DSP0_CTRL2
0
0
DSP0_CLK-
0
0
CAP0_DATA2
OCU2_OTD0
0
0
OCU0_OTD1
0
DSP0_DATA1_4
OCU1_OTD0 SGA1
0
0
OCU1_OTD1 SGO1
0
OCU4_OTD0
OCU2_OTD0
0
ICU4_IN0
0
AVRH5
PPG4_TOUT0
ICU2_IN0
EINT0
ICU0_IN1
126
P0_19
ICU1_IN0
37
0
ICU1_IN1
D
0
ICU2_IN0
DSP0_DATA1_1
0
0
0
0
0
0
0
0
0
DSP0_DATA1_11
0
0
32
0
0
29
0
0
30
31
D
0
0
-
C
DSP0_CLK
PPG2_TOUT0
0
VCC3
DSP0_CTRL1
DSP0_CLK+
PPG0_TOUT2
AVSS
0
0
CAP0_DATA1
PPG1_TOUT0
-
0
CAP0_DATA0
MDIO
PPG1_TOUT2
127
0
MDC
0
PPG2_TOUT0
36
0
DSP0_DATA0_4
0
0
D
28
VCC12
0
VSS
0
0
0
0
0
0
0
0
0
0
EINT4
0
0
0
OCU3_OTD1
EINT9
0
0
0
OCU9_OTD1
ICU3_IN1
EINT10
0
0
0
ICU9_IN1
PPG3_TOUT2
EINT11
0
0
0
PPG9_TOUT2
EINT15
EINT12
0
0
0
EINT3
P0_18
0
0
0
0
P5_21
0
SEG0
0
0
-
0
COM3
0
0
0
0
0
COM2
0
VCC12
0
0
COM1
VCC12
-
0
0
0
COM0
-
128
0
0
0
129
35
0
0
0
P5_20
0
34
0
0
P4_25
0
0
0
0
P4_26
0
0
0
P4_27
0
0
P4_28
0
0
0
0 0
0
0
0
DSP0_DATA0_11
0 0
0
0
DSP0_DATA1_10
0 0
0
26
27
0 0
0
-
-
0 0
VSS
PWM2P0
AN0(AL0)
VSS_LVDS_Tx
VCC3_LVDS_Tx
0 0
-
BP0(BH0)
0
0
0
0
0
130
0
AN27
0
0
0
0
0
AN28
S
0
0
0
0
0
S
0
0
0
0
0
135
134
0
0
0
0
0
0
0
0
0
0
0
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
D
D
D
D
D
C
-
-
E
-
-
E
E
E
E
E
-
E
-
-
E
E
E
E
E
-
-
F
F
F
-
-
-
G
H
I
J
J
I
I
I
I
I
J
J
I
I
I
I
I
L
-
VCC3
DSP0_DATA0_9 DSP0_DATA_D9+ CAP0_DATA21 0
DSP0_DATA1_9 DSP0_DATA_D9-
DSP0_DATA1_11 DSP0_DATA_D11- CAP0_CLK
DSP0_CTRL0
VCC12
VSS
M_SCLK0
VSS
VCC3
M_SDATA0_0
M_SDATA0_2
M_SDATA0_1
M_SSEL0
M_SDATA0_3
VSS
0
VSS
VCC3
M_SDATA1_0
M_SDATA1_2
M_SDATA1_1
M_SSEL1
M_SDATA1_3
VSS
VCC3
MLBDAT
MLBSIG
MLBCLK
VCC12
VSS
VCC5
PSC_1
0
AN0
AN1
AN2
AN3
AN4
AN5
AN6
AN7
AN8
AN9
AN10
AN11
AN12
AN13
AN14
NMIX
VCC5
DSP0_CTRL2
0
0
0
0
0
G_SDATA1_0
G_SDATA1_2
G_SDATA1_1
G_SSEL1
G_SDATA1_3
0
G_SCLK0
0
0
G_SDATA0_0
G_SDATA0_2
G_SDATA0_1
G_SSEL0
G_SDATA0_3
0
0
DSP0_CTRL2
DSP0_CTRL3
DSP0_CTRL4
0
0
0
0
0
0
SOT0
SCK0
SIN0
0
SOT1
SCK1
SIN1
SOT16
SCK16
SIN16
SOT8
SCK8
SIN8
0
0
0
CAP0_DATA34 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
SOT17
SCK17
SIN17
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
CAP0_DATA25 0
0
0
CAP0_DATA24 0
0
0
0
0
0
0
0
0
0
MFS17_SDA
MFS17_SCL
0
0
0
0
0
MFS16_SDA
MFS16_SCL
0
0
0
0
0
0
0
RXCLK TIN33 I2S0_SCK
DSP0_DATA1_10 DSP0_DATA_D10- CAP0_DATA32 CAP0_DATA35 RXDV TIN34 I2S1_SD
DSP0_DATA0_11 DSP0_DATA_D11+ CAP0_DATA33 0
TXCLK TOT33 I2S0_WS
COL
0
TXER
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
CRS
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
RX0
TX0
RX1
TX1
0
0
TOT35 I2S1_WS
TIN35 I2S1_SCK
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TIN0
TIN1
TIN2
TIN3
TOT0
TOT1
TOT2
TOT3
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
SGO0
SGA0
SGA1
SGO1
SGA2
SGO2
SGA3
SGO3
SGO0
SGA0
SGA1
SGO1
TOT16 SGO2
TIN17 0
0
0
TIN16 SGA2
0
0
TIN49 0
0
0
0
0
0
0
0
DSP0_DATA0_10 DSP0_DATA_D10+ CAP0_DATA23 CAP0_DATA32 RXER TOT34 I2S1_ECLK 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
OCU9_OTD0
OCU8_OTD1
OCU5_OTD1
0
0
OCU6_OTD0
OCU7_OTD0
OCU6_OTD1
OCU8_OTD0
OCU7_OTD1
0
0
0
0
0
0
OCU3_OTD0
OCU5_OTD1
OCU6_OTD0
OCU8_OTD0
OCU8_OTD1
OCU9_OTD0
OCU9_OTD1
ICU8_IN1
ICU9_IN0
0
0
0
0
ICU9_IN0
ICU9_IN1
ICU8_IN1
0
ICU5_IN1
0
0
ICU6_IN0
ICU7_IN0
ICU6_IN1
ICU8_IN0
ICU7_IN1
0
0
0
0
ICU4_IN1
0
0
0
0
ICU3_IN0
ICU4_IN0
ICU4_IN1
ICU5_IN0
ICU5_IN1
ICU6_IN0
ICU6_IN1
ICU7_IN0
ICU7_IN1
ICU8_IN0
ICU8_IN1
ICU9_IN0
ICU9_IN1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
PPG6_TOUT2
PPG7_TOUT0
PPG7_TOUT2
PPG8_TOUT0
PPG8_TOUT2
PPG9_TOUT0
0
0
0
PPG9_TOUT0
PPG8_TOUT2
PPG5_TOUT2
0
0
PPG6_TOUT0
PPG7_TOUT0
PPG6_TOUT2
PPG8_TOUT0
PPG7_TOUT2
0
0
0
0
PPG4_TOUT2
0
0
0
0
PPG3_TOUT0
PPG4_TOUT0
PPG4_TOUT2
PPG5_TOUT0
PPG5_TOUT2
PPG6_TOUT2
PPG7_TOUT0
PPG8_TOUT0
PPG8_TOUT2
PPG9_TOUT0
PPG9_TOUT2
EINT1
EINT2
0
0
0
0
0
0
EINT6
EINT8
EINT7
0
0
EINT1
EINT2
EINT3
0
0
0
0
EINT6
EINT8
EINT9
0
0
P1_01 M_DQ4_0
P1_00 M_DQ5_0
P1_02 M_DQ7_0
0
P0_28 0
0
0
0
0
0
P2_24 0
P2_25 0
P3_00 0
P3_01 0
P3_02 0
P3_03 0
P3_04 0
P3_05 0
P3_06 0
0
0
P2_22 0
0
0
P0_27 0
0
0
P0_26 0
0
0
P0_31 M_CS#2_0
0
0
EINT15 P2_31 0
0
P0_30 M_RWDS_0
0
0
EINT14 P2_30 0
PPG11_TOUT0 EINT6
0
0
EINT13 P2_29 0
EINT3
0
0
P1_09 M_CK_0
0
0
EINT12 P2_28 0
EINT2
0
0
0
0
G_DQ4_2
G_DQ5_2
G_DQ6_2
G_DQ7_2
0
0
0
0
0
G_CK_1
0
0
G_DQ3_1
G_DQ2_1
G_DQ1_1
G_DQ0_1
0
0
G_DQ5_1
G_DQ6_1
G_DQ7_1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
DSP0_CTRL2
DSP0_CLK
DSP0_CTRL0
DSP0_CTRL1
0
0
0
0
0
0
0
0
0
0
0
G_CS#2_1 0
G_DQ4_1
0
G_RWDS_1 0
0
0
G_CS#1_1 0
EINT11 P2_27 INDICATOR0_0 0
EINT1
0
EINT10 P2_26 0
EINT0
P5_22 0
EINT10 P1_03 M_DQ6_0
EINT9
P0_17 0
EINT11 P1_04 M_DQ0_0
EINT5
P0_16 0
EINT13 P1_06 M_DQ1_0
0
P0_15 0
EINT12 P1_05 M_DQ3_0
PPG10_TOUT2 EINT5
0
EINT0
PPG10_TOUT0 EINT4
0
EINT15 P0_14 0
PPG10_TOUT2 EINT15 P1_08 M_CS#1_0
0
EINT14 P0_13 0
PPG10_TOUT0 EINT14 P1_07 M_DQ2_0
PPG9_TOUT2
EINT13 P0_12 0
PPG11_TOUT0 EINT0
0
0
PPG10_TOUT0 EINT4
FRT8/9/10/11_TEXT PPG7_TOUT2
0
0
PPG0/1/2/3/4/5_TIN1 PPG6_TOUT0
OCU11_OTD0 ICU11_IN0 0
0
0
OCU10_OTD1 ICU10_IN1 0
0
ICU8_IN0
OCU10_OTD0 ICU10_IN0 0
0
ICU7_IN1
OCU10_OTD1 ICU10_IN1 0
0
ICU7_IN0
OCU10_OTD0 ICU10_IN0 0
OCU9_OTD1
ICU6_IN1
OCU11_OTD0 ICU11_IN0 0
ZIN9 OCU7_OTD1
0
0
BIN9 OCU7_OTD0
0
0
0
OCU10_OTD0 ICU10_IN0 0
AIN9 OCU6_OTD1
0
OCU9_OTD0
ZIN8 OCU5_OTD0
0
OCU8_OTD1
BIN8 OCU4_OTD1
0
OCU8_OTD0
AIN8 OCU4_OTD0
0
OCU7_OTD1
SIN1 OCU4_OTD1
0
OCU7_OTD0
SCK1 0
0
OCU6_OTD1
SOT1 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TRACE0
TRACE1
TRACE2
TRACE3
TRACE_CLK
TRACE_CTL
0
0
0
0
CAP0_DATA22 0
0
0
0
62
D
0
61
-
0
60
0
59
0
58
0
57
0
56
0
55
CONFIDENTIAL
P3_21
0
0
P3_25
P3_24
0
0
S6J3200_DS708-00003-0v04-E, June 30, 2015
24
PPG6_TOEINT5
0
PPG8_TOEINT9
PPG8_TOEINT8
0
0
0
0
OCU6_OTD1 ICU6_IN1
0
OCU8_OTD1 ICU8_IN1
OCU8_OTD0 ICU8_IN0
0
0
0
0
PWM1P0
0
0
PWM1P1
PWM2M0
0
0
0
OCU6_OTD0 ICU6_IN0
0
0
0
0
CAP0_DATA11
0
0
AP0(AH0)
0
0
AP1(AH1)
BN0(BL0)
0
0
0
PWM2M5
PWM2P5
0
0
0
P3_22
0
0
DVSS
0
0
0
0
0
TX1
RX1
0
0
0
0
P3_23
PPG7_TOEINT6
AN26
DVCC
-
AN30
AN29
0
0
0
0
SIN4
SCK4
DVSS
0
PPG7_TOEINT7
OCU7_OTD0 ICU7_IN0
S
-
131
S
S
0
0
0
0
AN49
AN48
-
DVCC
-
0
OCU7_OTD1 ICU7_IN1
PWM1M0
133
132
137
136
0
0
0
0
S
S
161
0
0
0
0
0
TOP VIEW
TEQFP-216
0
0
0
0
0
160
159
162
○
2
-
0
0
0
0
3
4
A
1
VSS
0
AVSS
0
0
0
0
0
A
0
0
0
0
0
C_R
0
0
0
0
0
DAC_R
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TEQFP-216 Pin Assignment
4.1.1
Figure 4-1: TEQFP-216 (S6J328CLxx)
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
AVSS
-
5
158
S
AN47
SOT4
0
PWM1M5
OCU5_OTD0 ICU5_IN0
PPG5_TOEINT10
P4_10
MFS0_CS3
MFS4_SDA
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
AVCC3_DAC
-
6
157
S
AN46
0
0
PWM1P5
OCU4_OTD1 ICU4_IN1
PPG4_TOEINT9
P4_09
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
DAC_L
A
7
156
S
AN45
SIN3
0
PWM2M4
OCU4_OTD0 ICU4_IN0
PPG4_TOEINT8
P4_08
MFS2_CS1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
C_L
A
8
155
S
AN44
SCK3
0
PWM2P4
OCU3_OTD1 ICU3_IN1
PPG3_TOEINT7
P4_07
MFS2_CS0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
AVSS
-
9
154
S
AN43
SOT3
0
PWM1M4
OCU3_OTD0 ICU3_IN0
PPG3_TOEINT6
P4_06
MFS0_CS0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
VSS
-
10
153
S
AN42
0
0
PWM1P4
OCU2_OTD1 ICU2_IN1
PPG2_TOEINT5
P4_05
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
VCC12
-
11
152
-
DVCC
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
AVSS_LVDS_PLL
-
12
151
-
DVSS
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
AVCC3_LVDS_PLL
-
13
150
S
AN41
SIN2
0
PWM2M3
OCU2_OTD0 ICU2_IN0
PPG2_TOEINT4
P4_04
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
VCC3_LVDS_Tx
-
14
149
S
AN40
SCK2
0
PWM2P3
OCU1_OTD1 ICU1_IN1
PPG1_TOEINT3
P4_03
0
0
0
-
15
148
S
AN39
SOT2
0
B
16
147
S
146
4. Package and Pin Assignment
D a t a S h e e t ( P r e l i m i n a r y )
Figure 4-2: TEQFP-216 (S6J327CLxx)
0
0
0
0
0
0
0
0
0
0
0
0
0
MFS8_CS1 0
MFS8_CS3 0
MFS9_CS1 0
MFS9_CS0 0
MFS8_CS0 0
0 0
0 0
0 0
0 0
0 0
0 0
0 0
0 0
P3_16
P3_15
P3_14
P3_13
P3_12
P3_11
P3_10
P3_09
P3_08
P3_07
P2_19
0
0
SEG25
SEG26
SEG27
SEG28
SEG29
SEG30
SEG31
V0
V1
V2
V3
0
0
EINT0
EINT15
EINT14
EINT13
EINT12
EINT11
EINT10
EINT9
EINT8
0
0
PPG3_TOUT2
PPG3_TOUT0
PPG2_TOUT2
PPG2_TOUT0
PPG1_TOUT2
PPG1_TOUT0
PPG0_TOUT2
0
0
0
0
FRT4/5/6/7_TEXT
0
0
0
0
0
0
PPG0_TOUT0 PPG6/7/8/9/10/11_TIN
EINT7 PPG11_TOUT2
EINT3
PPG4_TOUT0
0
0
ICU3_IN1
ICU3_IN0
ICU2_IN1
ICU2_IN0
ICU1_IN1
ICU1_IN0
ICU0_IN1
ICU0_IN0
ICU1_IN1
0
0
OCU4_OTD0 SGA2 TOT34 SCK11
OCU3_OTD1 SGO1 TIN33 SOT11
OCU3_OTD0 SGA1 TOT33
OCU2_OTD0 SGO0 TOT32 SOT10
OCU1_OTD1
OCU1_OTD0
OCU0_OTD1
OCU0_OTD0
0
0
0
0 TIN19
0 TOT19
0 TIN18
WOT TOT18
0 TOT17
0
0
0
0
0
0
SIN10
OCU2_OTD1 SGA0 TIN32 SCK10
FRT0/1/2/3_TEXT ICU11_IN1 OCU11_OTD1
TIN48
ICU4_IN0
0
0
SIN9
SCK9
SOT9
0
0
0
TX6
RX6
TX5
RX5
0
0
TX6
RX6
TX5
RX5
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
AN25
AN24
AN23
AN22
AN21
AN20
AN19
AN18
AN17
AN16
AN15
0
VSS
VCC5
W
W
W
W
W
W
W
W
V
V
V
U
-
-
176
175
174
173
172
171
170
169
168
167
166
165
164
163
180
SIN11
181
OCU4_OTD1 SGO2 TIN34
182
ICU4_IN1
183
0
-
184
PPG4_TOUT2
-
185
EINT1
Y
186
SEG24
Y
187
P3_17
VSS
Y
188
MFS8_CS2 0
0
VCC53
Y
189
0
0 DSP1_DATA1_11
Y
190
177
0 DSP1_DATA0_11
Y
191
X
0 DSP1_DATA1_10
Y
192
X1A
0
DSP1_DATA1_9
0 DSP1_DATA0_10
0
DSP1_DATA0_9
-
Y
193
0
0
0
DSP1_DATA1_8
-
0
0
AN0(AL0)
AP0(AH0)
0
-
0
0
BP0(BH0)
0
VCC12
DSP1_DATA0_8
-
0
0
0
BN0(BL0)
0
VSS
VCC12
0
0
0
AP1(AH1)
0
VCC53
OCU0_OTD1
0
0
AN1(AL1)
0
ICU0_IN1
0
0
BP1(BH1)
0
0
0
0
0
BN1(BL1)
0
PPG0_TOUT2
0
SOT8
0
EINT1
0
SCK8
0
0
0
0
0
SIN8
0
P2_17
0
0
0
0 0
0
0
0
0
0
0
0
OCU3_OTD0 SGA3
0
0
0
0
178
0
0
OCU3_OTD1 SGO3
OCU2_OTD1
0
0
179
0
ICU2_IN1
OCU4_OTD0
0
0
194
-
0
ICU3_IN0
OCU4_OTD1
0
0
195
X
0
ICU3_IN1
OCU5_OTD0
0
Y
196
X0A
0
ICU4_IN0
OCU5_OTD1
0
Y
VCC5
0
0
ICU4_IN1
0
OCU6_OTD0
0
DSP1_DATA1_7
Y
0
0
0
ICU5_IN0
0
DSP1_DATA0_7
0
PPG2_TOUT2
0
ICU5_IN1
0
0
DSP1_DATA1_6
0
0
PPG3_TOUT0
0
0
ICU6_IN0
0
0
0
0
PPG3_TOUT2
0
0
0
0
0
EINT13
PPG4_TOUT0
0
0
0
0
0
EINT14
PPG4_TOUT2
0
0
0
0
0
0
EINT15
PPG5_TOUT0
0
SOT9
0
SEG23
EINT0
PPG5_TOUT2
0
0
SCK9
0
0
SEG22
EINT1
0
PPG6_TOUT0
0
0
0
0
SEG21
EINT2
0
0
0
197
0
0 0
P4_29
SEG20
EINT3
0
0
198
OCU0_OTD0
0 0
P4_30
SEG19
0
EINT4
0
OCU6_OTD1
0
Y
199
0
0 0
P4_31
SEG18
0
OCU7_OTD0
Y
200
ICU0_IN0
0
0 0
P5_00
SEG17
0
ICU6_IN1
OCU7_OTD1
DSP1_DATA0_6
Y
0
0
0 0
P5_01
0
SEG16
0
ICU7_IN0
DSP1_DATA1_5
Y
0
0
0 0
P5_02
0
0
ICU7_IN1
0
DSP1_DATA0_5
0
0
0 0
P5_03
0
0
0
DSP1_DATA1_4
PPG0_TOUT0
0
0 0
0
P5_04
0
PPG6_TOUT2
0
0
0
0
0
0 0
0
PPG7_TOUT0
SIN9
0
0
EINT0
0
0 0
0
EINT5
PPG7_TOUT2
0
0
0
0
0
0 0
0
EINT6
0
0
0
0
0 0
SEG15
EINT7
0
0 SOT10
0
0
0 0
SEG14
OCU8_OTD0
AIN8
0 SCK10
P2_16
0
0 0
P5_05
SEG13
OCU8_OTD1
ZIN8
BIN8
0 0
0
P5_06
ICU8_IN0
OCU9_OTD0
INDICATOR0_1 0
0
0 0
P5_07
0
ICU8_IN1
OCU9_OTD1
0
0
0 0
PPG8_TOUT0
ICU9_IN0
0
0
0 0
EINT8
0
ICU9_IN1
0
SEG12
0
0
P5_08
PPG8_TOUT2
0
0 0
EINT9
PPG9_TOUT0
0
SEG11
PPG9_TOUT2
201
P5_09
EINT10
Y
0 0
EINT11
DSP1_DATA0_4
0
SEG9
SEG10
0
P5_10
0
P5_11
SIN10
MFS8_CS0 0
0
MFS9_CS0 0
AIN9
MFS10_SDA
0 ICU10_IN0 OCU10_OTD0
MFS10_SCL
EINT12 PPG10_TOUT0
SEG8
202
P5_12
-
MFS9_CS1 0
VCC53
0
0
0
0
0
0
0
0
0
0
0
0
0
203
0 0
204
0
-
0
Y
0
VSS
0
DSP1_DATA1_3
0 ICU10_IN1 OCU10_OTD1
0
0
0
0
0
EINT13 PPG10_TOUT2
DSP0_CTRL0
0
0
SEG7
0
0
0
P5_13
0
0 0
0
0 0
BIN9
0
205
0
Y
0 ICU11_IN0 OCU11_OTD0
0
SIN11
DSP1_DATA0_3
EINT14 PPG11_TOUT0
0
0
SEG6
0
0
DSP0_CTRL1
P5_14
0
0 SOT11
MFS8_CS3 0
0 ICU11_IN1 OCU11_OTD1
0
ZIN9
0
OCU0_OTD0
206
EINT15 PPG11_TOUT2
OCU0_OTD1
Y
SEG5
ICU0_IN0
DSP1_DATA1_2
P5_15
ICU0_IN1
DSP0_CTRL2 DSP1_CTRL2
MFS8_CS1 0
0
0 SCK11
0
0
207
PPG0_TOUT0
208
PPG0_TOUT2
Y
EINT0
Y
EINT1
DSP1_DATA0_2
SEG4
DSP1_DATA1_1
SEG3
DSP1_CLK
P5_16
DSP0_CTRL3
P5_17
DSP0_CTRL4 DSP1_CTRL0
0 0
209
MFS8_CS2 0
Y
0
DSP1_DATA0_1
0
DSP0_CTRL5 DSP1_CTRL1
0 SOT12
0
0
0
0
OCU6_OTD0 ICU6_IN0
P3_20
0
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
D
D
D
D
D
C
-
-
E
-
-
E
E
E
E
E
-
E
-
-
E
E
E
E
E
-
-
F
F
F
-
-
-
G
H
I
J
J
I
I
I
I
I
J
J
I
I
I
I
I
L
-
VCC3
DSP0_DATA0_9 DSP0_DATA_D9+ CAP0_DATA21 0
DSP0_DATA1_9 DSP0_DATA_D9-
DSP0_DATA1_11 DSP0_DATA_D11- CAP0_CLK
DSP0_CTRL0
VCC12
VSS
M_SCLK0
VSS
VCC3
M_SDATA0_0
M_SDATA0_2
M_SDATA0_1
M_SSEL0
M_SDATA0_3
VSS
0
VSS
VCC3
M_SDATA1_0
M_SDATA1_2
M_SDATA1_1
M_SSEL1
M_SDATA1_3
VSS
VCC3
MLBDAT
MLBSIG
MLBCLK
VCC12
VSS
VCC5
PSC_1
0
AN0
AN1
AN2
AN3
AN4
AN5
AN6
AN7
AN8
AN9
AN10
AN11
AN12
AN13
AN14
NMIX
VCC5
DSP0_CTRL2
0
0
0
0
0
G_SDATA1_0
G_SDATA1_2
G_SDATA1_1
G_SSEL1
G_SDATA1_3
0
G_SCLK0
0
0
G_SDATA0_0
G_SDATA0_2
G_SDATA0_1
G_SSEL0
G_SDATA0_3
0
0
DSP0_CTRL2
DSP0_CTRL3
DSP0_CTRL4
0
0
0
0
0
0
SOT0
SCK0
SIN0
0
SOT1
SCK1
SIN1
SOT16
SCK16
SIN16
SOT8
SCK8
SIN8
0
0
0
CAP0_DATA34 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
SOT17
SCK17
SIN17
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
CAP0_DATA25 0
0
0
CAP0_DATA24 0
0
0
0
0
0
0
0
0
0
MFS17_SDA
MFS17_SCL
0
0
0
0
0
MFS16_SDA
MFS16_SCL
0
0
0
0
0
0
0
RXCLK TIN33 I2S0_SCK
DSP0_DATA1_10 DSP0_DATA_D10- CAP0_DATA32 CAP0_DATA35 RXDV TIN34 I2S1_SD
DSP0_DATA0_11 DSP0_DATA_D11+ CAP0_DATA33 0
TXCLK TOT33 I2S0_WS
COL
0
TXER
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
CRS
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
RX0
TX0
RX1
TX1
0
0
TOT35 I2S1_WS
TIN35 I2S1_SCK
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TIN0
TIN1
TIN2
TIN3
TOT0
TOT1
TOT2
TOT3
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
SGO0
SGA0
SGA1
SGO1
SGA2
SGO2
SGA3
SGO3
SGO0
SGA0
SGA1
SGO1
TOT16 SGO2
TIN17 0
0
0
TIN16 SGA2
0
0
TIN49 0
0
0
0
0
0
0
0
DSP0_DATA0_10 DSP0_DATA_D10+ CAP0_DATA23 CAP0_DATA32 RXER TOT34 I2S1_ECLK 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
OCU9_OTD0
OCU8_OTD1
OCU5_OTD1
0
0
OCU6_OTD0
OCU7_OTD0
OCU6_OTD1
OCU8_OTD0
OCU7_OTD1
0
0
0
0
0
0
OCU3_OTD0
OCU5_OTD1
OCU6_OTD0
OCU8_OTD0
OCU8_OTD1
OCU9_OTD0
OCU9_OTD1
ICU8_IN1
ICU9_IN0
0
0
0
0
ICU9_IN0
ICU9_IN1
ICU8_IN1
0
ICU5_IN1
0
0
ICU6_IN0
ICU7_IN0
ICU6_IN1
ICU8_IN0
ICU7_IN1
0
0
0
0
ICU4_IN1
0
0
0
0
ICU3_IN0
ICU4_IN0
ICU4_IN1
ICU5_IN0
ICU5_IN1
ICU6_IN0
ICU6_IN1
ICU7_IN0
ICU7_IN1
ICU8_IN0
ICU8_IN1
ICU9_IN0
ICU9_IN1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
PPG6_TOUT2
PPG7_TOUT0
PPG7_TOUT2
PPG8_TOUT0
PPG8_TOUT2
PPG9_TOUT0
0
0
0
PPG9_TOUT0
PPG8_TOUT2
PPG5_TOUT2
0
0
PPG6_TOUT0
PPG7_TOUT0
PPG6_TOUT2
PPG8_TOUT0
PPG7_TOUT2
0
0
0
0
PPG4_TOUT2
0
0
0
0
PPG3_TOUT0
PPG4_TOUT0
PPG4_TOUT2
PPG5_TOUT0
PPG5_TOUT2
PPG6_TOUT2
PPG7_TOUT0
PPG8_TOUT0
PPG8_TOUT2
PPG9_TOUT0
PPG9_TOUT2
EINT1
EINT2
0
0
0
0
0
0
EINT6
EINT8
EINT7
0
0
EINT1
EINT2
EINT3
0
0
0
0
EINT6
EINT8
EINT9
0
0
P1_01 M_DQ4_0
P1_00 M_DQ5_0
P1_02 M_DQ7_0
0
P0_28 0
0
0
0
0
0
P2_24 0
P2_25 0
P3_00 0
P3_01 0
P3_02 0
P3_03 0
P3_04 0
P3_05 0
P3_06 0
0
0
P2_22 0
0
0
P0_27 0
0
0
P0_26 0
0
0
P0_31 M_CS#2_0
0
0
EINT15 P2_31 0
0
P0_30 M_RWDS_0
0
0
EINT14 P2_30 0
PPG11_TOUT0 EINT6
0
0
EINT13 P2_29 0
EINT3
0
0
P1_09 M_CK_0
0
0
EINT12 P2_28 0
EINT2
0
0
0
0
G_DQ4_2
G_DQ5_2
G_DQ6_2
G_DQ7_2
0
0
0
0
0
G_CK_1
0
0
G_DQ3_1
G_DQ2_1
G_DQ1_1
G_DQ0_1
0
0
G_DQ5_1
G_DQ6_1
G_DQ7_1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
DSP0_CTRL2
DSP0_CLK
DSP0_CTRL0
DSP0_CTRL1
0
0
0
0
0
0
0
0
0
0
0
G_CS#2_1 0
G_DQ4_1
0
G_RWDS_1 0
0
0
G_CS#1_1 0
EINT11 P2_27 INDICATOR0_0 0
EINT1
0
EINT10 P2_26 0
EINT0
P5_22 0
EINT10 P1_03 M_DQ6_0
EINT9
P0_17 0
EINT11 P1_04 M_DQ0_0
EINT5
P0_16 0
EINT13 P1_06 M_DQ1_0
0
P0_15 0
EINT12 P1_05 M_DQ3_0
PPG10_TOUT2 EINT5
0
EINT0
PPG10_TOUT0 EINT4
0
EINT15 P0_14 0
PPG10_TOUT2 EINT15 P1_08 M_CS#1_0
0
EINT14 P0_13 0
PPG10_TOUT0 EINT14 P1_07 M_DQ2_0
PPG9_TOUT2
EINT13 P0_12 0
PPG11_TOUT0 EINT0
0
0
PPG10_TOUT0 EINT4
FRT8/9/10/11_TEXT PPG7_TOUT2
0
0
PPG0/1/2/3/4/5_TIN1 PPG6_TOUT0
OCU11_OTD0 ICU11_IN0 0
0
0
OCU10_OTD1 ICU10_IN1 0
0
ICU8_IN0
OCU10_OTD0 ICU10_IN0 0
0
ICU7_IN1
OCU10_OTD1 ICU10_IN1 0
0
ICU7_IN0
OCU10_OTD0 ICU10_IN0 0
OCU9_OTD1
ICU6_IN1
OCU11_OTD0 ICU11_IN0 0
ZIN9 OCU7_OTD1
0
0
BIN9 OCU7_OTD0
0
0
0
OCU10_OTD0 ICU10_IN0 0
AIN9 OCU6_OTD1
0
OCU9_OTD0
ZIN8 OCU5_OTD0
0
OCU8_OTD1
BIN8 OCU4_OTD1
0
OCU8_OTD0
AIN8 OCU4_OTD0
0
OCU7_OTD1
SIN1 OCU4_OTD1
0
OCU7_OTD0
SCK1 0
0
OCU6_OTD1
SOT1 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TRACE0
TRACE1
TRACE2
TRACE3
TRACE_CLK
TRACE_CTL
0
0
0
0
CAP0_DATA22 0
0
0
0
62
D
0
61
-
0
60
0
59
0
58
0
57
0
56
0
55
Package Pin Number
Condition on PCB
12 to 27
Set to ground
PPG6_TOEINT4
0
0
H
TIN2
OCU1_OTD0
124
0
ICU1_IN0
39
OCU0_OTD0
0
D
ICU0_IN0
PPG1_TOUT0
DSP0_DATA1_2
PPG0_TOUT0
EINT2
DSP0_DATA_D2EINT0
SEG2
0
CAP0_DATA8
P6_00
P5_18
0
0
MFS12_SDA 0
0
0
0
0
0
210
0
0
Y
0
0
DSP1_DATA1_0
0
0
0
0
CAP0_DATA7
DSP0_CTRL6
0
0
0
0 SCK12
AVCC5
TOT2
0
0
SCK0
0
OCU1_OTD1
125
OCU11_OTD1
0
ICU1_IN1
38
ICU11_IN1
0
0
D
PPG11_TOUT2
0
PPG1_TOUT2
DSP0_DATA0_2
EINT15
P5_30
EINT3
DSP0_DATA_D2+
P5_31
0
SEG1
0
0
P5_19
0
0
MFS12_SCL 0
0
0
0
0
0
211
0
0
212
0
DSP0_DATA_D1-
EINT13
213
0
CAP0_DATA6
EINT12
P5_29
214
0
0
P5_28
0
215
AVRH5
TIN1
0
0
216
SOT0
0
0
-
126
OCU11_OTD0
0
0
Y
37
ICU11_IN0
0
0
Y
D
PPG11_TOUT0
0
0
Y
DSP0_DATA1_1
EINT14
0
Y
0
PPG9_TOUT2
Y
0
0
EINT11
VCC53
0
0
P5_27
DSP1_CLK
0
0
0
DSP1_CTRL2
0
0
DSP0_DATA0_1
0
DSP1_CTRL1
0
0
DSP0_DATA1_0
DSP0_DATA_D1+
0
DSP1_CTRL0
0
0
DSP0_DATA_D0-
CAP0_DATA5
0
DSP1_DATA0_0
0
0
CAP0_DATA4
0
0
0
0
AVSS
0
TOT1
0
0
VCC12
-
TIN0
0
ICU4_IN0
0
127
0
OCU10_OTD1
PPG4_TOUT0
0
128
36
OCU10_OTD0
ICU10_IN1
EINT0
0
35
D
ICU10_IN0
PPG10_TOUT2
P0_19
0
0
D
PPG10_TOUT0
0
0
0
0
DSP0_CTRL7
0
0
DSP0_CTRL8
0
0
DSP0_CTRL9
0
D
0
0
0
0
0
DSP0_DATA0_0
DSP0_DATA1_11
0
SIN12
0
DSP0_DATA_D0+
OCU3_OTD1
0
0
SIN11 DSP0_CTRL11
0
CAP0_DATA3
ICU3_IN1
0
0
0
0
0
0
0
31
ICU9_IN1
PPG3_TOUT2
0
0
0
VCC12
TOT0
30
0
PPG9_TOUT2
EINT15
0
0 SOT11
0
29
0
EINT3
P0_18
0 SCK11 DSP0_CTRL10
129
OCU9_OTD1
27
28
-
0
P5_21
0
0
0
34
ICU9_IN1
-
-
0
0
0
0
0
VCC3_LVDS_Tx
0
0
0
0
0
33
0
C
VCC12
0
VSS
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
D
26
0
0
DSP0_CTRL2
-
0
0
DSP0_CLK-
VSS_LVDS_Tx
0
0
CAP0_DATA2
0
OCU2_OTD0
0
0
0
OCU0_OTD1
0
DSP0_DATA1_4
0
OCU1_OTD0 SGA1
VSS
0
0
OCU1_OTD1 SGO1
OCU4_OTD0
0
OCU2_OTD0
0
130
32
0
0
0
0
D
0
ICU2_IN0
0
0
DSP0_CLK
0
ICU0_IN1
0
0
DSP0_CTRL1
DSP0_CLK+
0
ICU1_IN0
0
0
0
VCC3
0
CAP0_DATA1
0
ICU1_IN1
P3_21
0
0
0
CAP0_DATA0
MDIO
0
ICU2_IN0
0
PPG6_TOEINT5
0
0
0
MDC
0
0
0
0
0
P3_22
OCU6_OTD1 ICU6_IN1
0
0
0
DSP0_DATA0_4
0
0
0
P3_24
P3_23
PPG7_TOEINT6
PWM1P0
0
0
0
0
0
0
PPG8_TOEINT8
PPG7_TOEINT7
OCU7_OTD0 ICU7_IN0
AP0(AH0)
0
0
0
0
OCU8_OTD0 ICU8_IN0
OCU7_OTD1 ICU7_IN1
PWM1M0
0
DVSS
AN29
AN28
S
0
0
0
0
PWM2M4
OCU4_OTD0 ICU4_IN0
PPG4_TOEINT8
P4_08
MFS2_CS1
0
SCK3
0
PWM2P4
OCU3_OTD1 ICU3_IN1
PPG3_TOEINT7
P4_07
MFS2_CS0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
AVSS
-
9
154
S
AN43
SOT3
0
PWM1M4
OCU3_OTD0 ICU3_IN0
PPG3_TOEINT6
P4_06
MFS0_CS0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
VSS
-
10
153
S
AN42
0
0
PWM1P4
OCU2_OTD1 ICU2_IN1
PPG2_TOEINT5
P4_05
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
VCC12
-
11
152
-
DVCC
0
0
0
0
0
0
AVSS_LVDS_PLL
0
0
0
0
0
0
0
0
0
0
AVCC3_LVDS_PLL
-
13
150
S
AN41
SIN2
0
PWM2M3
OCU2_OTD0 ICU2_IN0
PPG2_TOEINT4
P4_04
0
0
0
0
0
0
VCC3_LVDS_Tx
-
14
149
S
AN40
SCK2
0
PWM2P3
OCU1_OTD1 ICU1_IN1
PPG1_TOEINT3
P4_03
0
0
0
0
0
0
0
PWM2M0
PWM2P0
AN0(AL0)
AN26
DVCC
-
S
S
0
0
25
0
SIN3
AN44
0
0
0
BN0(BL0)
BP0(BH0)
0
S
131
134
0
0
B
0
AN45
S
0
0
0
0
0
AN27
133
132
136
135
0
0
OCU9_OTD1
TxDOUT0-
PPG2_TOUT0
0
0
PPG0_TOUT2
P3_25
0
PPG1_TOUT0
PPG8_TOEINT9
0
PPG1_TOUT2
OCU8_OTD1 ICU8_IN1
0
PPG2_TOUT0
PWM1P1
0
0
AP1(AH1)
0
EINT4
0
0
EINT9
AN30
0
EINT10
S
0
EINT11
137
0
EINT12
0
0
0
P3_26
0
SEG0
CONFIDENTIAL
PPG9_TOEINT10
0
COM3
S
155
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
VSS_LVDS_Tx
-
15
148
S
AN39
SOT2
0
PWM1M3
OCU1_OTD0 ICU1_IN0
PPG1_TOEINT2
P4_02
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TxDOUT3+
B
16
147
S
AN38
0
0
PWM1P3
OCU0_OTD1 ICU0_IN1
PPG0_TOEINT1
P4_01
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TxDOUT3-
B
17
146
S
AN37
0
0
PWM2M2
OCU0_OTD0 ICU0_IN0
PPG0_TOEINT0
P4_00
0
0
TxDOUT2+
B
18
145
S
AN36
0
0
PWM2P2
OCU11_OTD ICU11_IN1
PPG11_T EINT15
P3_31
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TxDOUT2-
B
19
144
S
AN35
0
0
PWM1M2
OCU11_OTD ICU11_IN0
PPG11_T EINT14
P3_30
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TxCLK+
B
20
143
S
AN34
0
0
PWM1P2
OCU10_OTD ICU10_IN1
PPG10_T EINT13
P3_29
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TxCLK-
B
21
142
-
DVCC
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TxDOUT1+
B
22
141
-
DVSS
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
VCC3
-
43
120
-
VSS
0
0
0
0
0
0
0
0
0
0
P0_02
EINT3
PPG1_TOUT2
ICU1_IN1
OCU1_OTD1
COL
CAP0_DATA11
DSP0_DATA_D4+
DSP0_DATA0_4
D
44
119
-
VCC5
0
0
0
0
0
0
0
0
0
0
0
P0_03
EINT4
PPG2_TOUT0
ICU2_IN0
OCU2_OTD0
0
TIN16
CRS
CAP0_DATA12
DSP0_DATA_D4-
DSP0_DATA1_4
D
45
118
Q
RSTX
0
0
0
0
0
0
0
0
0
0
0
0
P0_04
EINT5
PPG2_TOUT2
ICU2_IN1
OCU2_OTD1
0
TOT17
TXD0
CAP0_DATA13
DSP0_DATA_D5+
DSP0_DATA0_5
D
46
117
P
MODE
0
0
0
0
0
0
0
0
0
0
0
0
0
P0_05
EINT6
PPG3_TOUT0
ICU3_IN0
OCU3_OTD0
SIN0
TIN17
TXD1
CAP0_DATA14
DSP0_DATA_D5-
DSP0_DATA1_5
D
47
116
N2
JTAG_TMS
0
0
0
0
0
0
0
0
0
CAP0_DATA13
G_DQ2_2
0
0
0
0
P0_06
EINT7
PPG3_TOUT2
ICU3_IN1
OCU3_OTD1
0
TOT18
TXD2
CAP0_DATA15
DSP0_DATA_D6+
DSP0_DATA0_6
D
48
115
N2
JTAG_TCK
0
0
0
0
0
0
0
0
CAP0_DATA14
G_DQ1_2
0
0
0
0
P0_07
EINT8
PPG4_TOUT0
ICU4_IN0
OCU4_OTD0
0
TIN18
TXD3
CAP0_DATA16
DSP0_DATA_D6-
DSP0_DATA1_6
D
49
114
N2
JTAG_TDI
0
0
0
0
0
0
0
0
CAP0_DATA15
G_DQ0_2
0
0
0
0
P0_08
EINT9
PPG4_TOUT2
ICU4_IN1
OCU4_OTD1
0
TOT19
RXD0
CAP0_DATA17
DSP0_DATA_D7+
DSP0_DATA0_7
D
50
113
O
JTAG_TDO
0
0
0
0
0
0
0
0
0
G_CS#1_2
0
0
0
0
P0_09
EINT10
PPG5_TOUT0
ICU5_IN0
OCU5_OTD0
0
TIN19
RXD1
CAP0_DATA18
DSP0_DATA_D7-
DSP0_DATA1_7
D
51
112
N
JTAG_NTRST
0
0
0
0
0
0
0
0
0
0
0
0
P0_00
EINT1
PPG0_TOUT2
ICU0_IN1
OCU0_OTD1
0
TOT3
0
CAP0_DATA9
DSP0_DATA_D3+
DSP0_DATA0_3
D
40
123
H
0
0
SGO3
TIN35
OCU5_OTD1 ICU5_IN1
PPG5_TOEINT3
P3_19
0
0
0
0
0
P0_01
EINT2
PPG1_TOUT0
ICU1_IN0
OCU1_OTD0
0
TIN3
TXEN
CAP0_DATA10
DSP0_DATA_D3-
DSP0_DATA1_3
D
41
122
H
ADTRG
0
SGA3
TOT35
OCU5_OTD0 ICU5_IN0
PPG5_TOEINT2
P3_18
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
VSS
-
42
121
-
C
0
0
0
0
0
0
0
0
0
0
0
0
0
G_RWDS_2
0
0
0
0
P0_10
EINT11
PPG5_TOUT2
ICU5_IN1
OCU5_OTD1S0_ECLK
TOT32
RXD2
CAP0_DATA19
DSP0_DATA_D8+
DSP0_DATA0_8
D
52
111
M
X0
0
0
0
0
0
0
0
0
0
0
G_CS#2_2
0
0
0
0
P0_11
EINT12
PPG6_TOUT0
ICU6_IN0
OCU6_OTD0 I2S0_SD
TIN32
RXD3
CAP0_DATA20
DSP0_DATA_D8-
DSP0_DATA1_8
D
53
110
M
X1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
VSS
-
54
109
-
VSS
0
0
0
0
0
0
0
0
0
25
June 30, 2015, S6J3200_DS708-00003-0v04-E
OCU9_OTD0 ICU9_IN0
0
COM2
Notes:
Any function at the following pins is not supported.
−
PWM1M1
0
0
0
0
AN1(AL1)
0
0
0
0
23
24
0
TOT16
AN31
B
B
0
0
S
TxDOUT1-
TxDOUT0+
0
0
0
0
138
0
0
COM1
156
8
0
DVSS
0
0
0
0
0
G_DQ3_2
0
P3_28
P3_27
0
0
COM0
7
A
0
-
0
0
0
0
G_CK_2
CAP0_DATA12
0
0
0
PPG10_T EINT12
PPG9_TOEINT11
0
0
0
A
C_L
0
151
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
DVCC
0
DVSS
161
162
0
0
0
0
CAP0_DATA11
0
0
0
OCU10_OTD ICU10_IN0
OCU9_OTD1 ICU9_IN1
0
0
P5_20
DAC_L
0
12
PWM2M1
0
0
P4_25
0
0
0
-
P4_26
AVCC3_DAC
PWM2P1
0
0
0
0
0
BN1(BL1)
0
0
0
0
0
BP1(BH1)
0
0
0
P4_09
0
0
0
0
0
PPG4_TOEINT9
0
0
0
0
0
OCU4_OTD1 ICU4_IN1
0
AN33
0
0
0
PWM1P5
0
AN32
0
0
0
0
0
S
0
0
0
0
0
S
0
0
0
AN46
0
140
0
0
0
S
0
TOP VIEW
TEQFP-216
DSP0_DATA0_11
157
0
139
0
0
DSP0_DATA1_10
6
0
P4_27
0
0
0
0
MFS4_SDA
0
P4_28
0
0
0
0
MFS0_CS3
0
0 0
0
0
0
0
MFS0_CS1
P4_10
0
0 0
0
0
0
0
P4_11
PPG5_TOEINT10
0
0 0
0
0
0
0
PPG5_TOEINT11
OCU5_OTD0 ICU5_IN0
0
0 0
0
0
0
0
OCU5_OTD1 ICU5_IN1
PWM1M5
0
0
0 0
0
0
0
0
PWM2P5
0
0
0
0
0 0
0
0
0
0
MFS0_CS2
RX1
SOT4
0
0
0
○
AN49
0
0
0
0
0
0
0
0
P4_12
SCK4
AN47
0
0
0
2
S
0
0
0
0
0
0
0
0
PPG6_TOEINT12
AN48
S
0
0
0
-
160
0
0
0
0
0
0
0
0
OCU6_OTD0 ICU6_IN0
S
158
0
0
0
3
0
0
0
0
0
0
0
0
PWM2M5
159
5
0
0
0
0
0
0
0
0
TX1
4
0
0
0
0
0
0
0
0
SIN4
A
0
0
0
0
0
0
0
0
A
C_R
AVSS
0
0
0
1
0
DAC_R
0
0
0
VSS
0
MFS4_SCL
AVSS
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
4. Package and Pin Assignment
D a t a S h e e t ( P r e l i m i n a r y )
Figure 4-3: TEQFP-216 (S6J326CLxx)
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0 0
INDICATOR0_1 0
0 0
MFS8_CS2 0
MFS8_CS1 0
MFS8_CS3 0
MFS9_CS1 0
MFS9_CS0 0
MFS8_CS0 0
0 0
0 0
0 0
0 0
0 0
0 0
0 0
0 0
0
P2_16
P2_17
P3_17
P3_16
P3_15
P3_14
P3_13
P3_12
P3_11
P3_10
P3_09
P3_08
P3_07
P2_19
0
0
0
0
0
SEG24
SEG25
SEG26
SEG27
SEG28
SEG29
SEG30
SEG31
V0
V1
V2
V3
0
0
0
EINT0
EINT1
EINT1
EINT0
EINT15
EINT14
EINT13
EINT12
EINT11
EINT10
EINT9
EINT8
0
0
PPG0_TOUT2
PPG4_TOUT2
PPG4_TOUT0
PPG3_TOUT2
PPG3_TOUT0
PPG2_TOUT2
PPG2_TOUT0
PPG1_TOUT2
PPG1_TOUT0
PPG0_TOUT2
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TIN48
0
0
0
ICU0_IN0
ICU0_IN1
ICU4_IN1
ICU4_IN0
FRT4/5/6/7_TEXT ICU3_IN1
PPG0_TOUT0 PPG6/7/8/9/10/11_TIN
EINT7 PPG11_TOUT2
EINT3
0
PPG0_TOUT0
ICU3_IN0
ICU2_IN1
ICU2_IN0
ICU1_IN1
ICU1_IN0
ICU0_IN1
ICU0_IN0
ICU1_IN1
0
0
0
OCU0_OTD0
OCU0_OTD1
0
0 TIN18
OCU0_OTD0 WOT TOT18
0
0 TOT19
0
0
0
0
0
0
OCU2_OTD0 SGO0 TOT32 SOT10
0 TIN19
0
OCU2_OTD1 SGA0 TIN32 SCK10
0
0
0
OCU3_OTD0 SGA1 TOT33 SIN10
0
0
OCU3_OTD1 SGO1 TIN33 SOT11
OCU0_OTD1
0
0
OCU4_OTD0 SGA2 TOT34 SCK11
OCU1_OTD0
0
OCU4_OTD1 SGO2 TIN34 SIN11
OCU1_OTD1
0
0
0
SIN9
SCK9
SOT9
0
0
0
0
0
0
TX6
RX6
TX5
RX5
0
0
TX6
RX6
TX5
RX5
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
VCC5
X0A
X1A
AN25
AN24
AN23
AN22
AN21
AN20
AN19
AN18
AN17
AN16
AN15
0
VSS
VCC5
-
X
X
W
W
W
W
W
W
W
W
V
V
V
U
-
-
179
178
177
176
175
174
173
172
171
170
169
168
167
166
165
164
163
0
0
0
0
0
0
0
0
0
0
0
0
0
0 0
0 0
0 0
0 0
0 0
0 0
0 0
0 0
0 0
0 0
0 0
0 0
0 0
0 0
0 0
P5_07
P5_06
P5_05
0
0
0
0
P5_04
P5_03
P5_02
P5_01
P5_00
P4_31
P4_30
P4_29
0
0
SEG13
SEG14
SEG15
0
0
0
0
SEG16
SEG17
SEG18
SEG19
SEG20
SEG21
SEG22
SEG23
0
0
EINT7
EINT6
EINT5
0
0
0
0
EINT4
EINT3
EINT2
EINT1
EINT0
EINT15
EINT14
EINT13
0
0
PPG7_TOUT2
PPG7_TOUT0
PPG6_TOUT2
0
0
0
0
PPG6_TOUT0
PPG5_TOUT2
PPG5_TOUT0
PPG4_TOUT2
PPG4_TOUT0
PPG3_TOUT2
PPG3_TOUT0
PPG2_TOUT2
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
ICU8_IN1
ICU8_IN0
ICU7_IN1
ICU7_IN0
ICU6_IN1
0
0
0
0
ICU6_IN0
ICU5_IN1
ICU5_IN0
ICU4_IN1
ICU4_IN0
ICU3_IN1
ICU3_IN0
ICU2_IN1
0
0
OCU9_OTD1
OCU8_OTD1
OCU8_OTD0
OCU7_OTD1
OCU7_OTD0
OCU6_OTD1
0
0
0
0
OCU6_OTD0
OCU5_OTD1
OCU5_OTD0
OCU4_OTD1
OCU4_OTD0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
OCU3_OTD0 SGA3
0
AIN8
OCU3_OTD1 SGO3
OCU2_OTD1
ZIN8
OCU9_OTD0 BIN8
0
0
0
0 SCK10
0 SOT10
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
SIN9
SCK9
SOT9
0
0
0
0
0
SIN8
SCK8
SOT8
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
BN1(BL1)
BP1(BH1)
AN1(AL1)
AP1(AH1)
BN0(BL0)
BP0(BH0)
AN0(AL0)
AP0(AH0)
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
DSP1_DATA1_5
DSP1_DATA0_6
DSP1_DATA1_6
DSP1_DATA0_7
DSP1_DATA1_7
VCC53
VSS
VCC12
VCC12
DSP1_DATA0_8
DSP1_DATA1_8
DSP1_DATA0_9
DSP1_DATA1_9
0 DSP1_DATA1_10
0 DSP1_DATA0_11
0 DSP1_DATA1_11
0
DSP1_DATA0_5
0 DSP1_DATA0_10
0
DSP1_DATA1_4
VCC53
VSS
Y
Y
Y
Y
Y
Y
Y
-
-
-
-
Y
Y
Y
Y
Y
Y
Y
Y
-
-
200
199
198
197
196
195
194
193
192
191
190
189
188
187
186
185
184
183
182
181
180
0 TOT17
0
0
0 0
PPG8_TOUT0
ICU9_IN0
FRT0/1/2/3_TEXT ICU11_IN1 OCU11_OTD1
0
0
0 0
EINT8
0
ICU9_IN1
0
SEG12
0
0
P5_08
PPG8_TOUT2
0
0 0
EINT9
PPG9_TOUT0
201
0
SEG11
PPG9_TOUT2
202
P5_09
EINT10
Y
203
0 0
EINT11
204
0
SEG9
SEG10
DSP1_DATA0_4
-
P5_10
0
VCC53
Y
P5_11
0
VSS
MFS8_CS0 0
0 SIN10
0
DSP1_DATA1_3
MFS9_CS0 0
AIN9
0
0
MFS10_SDA
0 ICU10_IN0 OCU10_OTD0
0
0
MFS10_SCL
EINT12 PPG10_TOUT0
0
0
SEG8
0
DSP0_CTRL0
P5_12
0
0
MFS9_CS1 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0 0
0
0
0 ICU10_IN1 OCU10_OTD1 BIN9
0
DSP0_DATA_D2+
0
CAP0_DATA7
EINT13 PPG10_TOUT2
0
0
TOT2
SEG7
SCK0
0
OCU11_OTD1
P5_13
ICU11_IN1
0 0
PPG11_TOUT2
0 0
EINT15
0
P5_31
0
0
205
0
Y
0
DSP1_DATA0_3
0
0
0
DSP0_CTRL1
0
0 SOT11
DSP0_DATA_D1-
ZIN9
CAP0_DATA6
0 ICU11_IN0 OCU11_OTD0
0
EINT14 PPG11_TOUT0
TIN1
SEG6
SOT0
P5_14
OCU11_OTD0
MFS8_CS3 0
ICU11_IN0
0
PPG11_TOUT0
206
EINT14
Y
P5_30
DSP1_DATA1_2
0
DSP0_CTRL2 DSP1_CTRL2
0
0 SCK11
0
0
0
0 ICU11_IN1 OCU11_OTD1
0
EINT15 PPG11_TOUT2
0
SEG5
DSP0_DATA0_1
P5_15
DSP0_DATA1_0
DSP0_DATA_D1+
MFS8_CS1 0
DSP0_DATA_D0-
CAP0_DATA5
0
CAP0_DATA4
0
207
0
TOT1
208
TIN0
0
Y
0
OCU10_OTD1
Y
OCU10_OTD0
ICU10_IN1
DSP1_DATA0_2
ICU10_IN0
PPG10_TOUT2
DSP1_DATA1_1
PPG10_TOUT0
EINT13
DSP1_CLK
EINT12
P5_29
DSP0_CTRL3
P5_28
0
DSP0_CTRL4 DSP1_CTRL0
0
0
0
0
0
0 SIN11
0
0
0
0
0
0
0
0
0
0
OCU0_OTD0
D
OCU0_OTD1
DSP0_DATA0_0
ICU0_IN0
DSP0_DATA_D0+
ICU0_IN1
CAP0_DATA3
0
0
0
TOT0
PPG0_TOUT0
0
PPG0_TOUT2
OCU9_OTD1
EINT0
0
ICU9_IN1
EINT1
0
PPG9_TOUT2
SEG4
0
EINT11
SEG3
0
P5_27
P5_16
0
0
P5_17
0
0
0 0
0
0
MFS8_CS2 0
0
0
0
AVCC5
0
0
-
0
209
125
33
Y
38
D
DSP1_DATA0_1
D
DSP0_CTRL2
DSP0_CTRL5 DSP1_CTRL1
DSP0_DATA0_2
DSP0_CLK-
0 SOT12
0
CAP0_DATA2
0
0
0
OCU1_OTD0
0
DSP0_DATA1_4
ICU1_IN0
0
0
0
0
OCU4_OTD0
PPG1_TOUT0
0
ICU4_IN0
EINT2
0
PPG4_TOUT0
SEG2
0
EINT0
P5_18
AVRH5
P0_19
MFS12_SDA 0
-
0
0
126
0
210
37
0
Y
D
0
DSP1_DATA1_0
DSP0_DATA1_1
0
0
0
DSP0_DATA1_11
DSP0_CTRL6
0
0
32
0 SCK12
0
0
30
31
D
0
0
0
29
VSS
OCU1_OTD1
0
0
-
C
DSP0_CLK
ICU1_IN1
0
0
VCC3
DSP0_CTRL1
DSP0_CLK+
0
0
0
0
0
CAP0_DATA1
PPG1_TOUT2
0
0
0
CAP0_DATA0
MDIO
EINT3
0
AVSS
0
MDC
0
SEG1
VCC12
-
28
VCC12
0
0
0
0
0
0
0
0
P5_19
127
0
DSP0_DATA0_4
0
MFS12_SCL 0
128
36
0
0
OCU3_OTD1
0
35
D
-
0
0
211
0
D
0
0
0
212
0
0
OCU9_OTD1
ICU3_IN1
213
0
0
ICU9_IN1
PPG3_TOUT2
214
0
0
PPG9_TOUT2
EINT15
215
0
0
EINT3
P0_18
216
0
0
P5_21
0
-
0
0
0
Y
0
0
0
0
Y
0
0
0
Y
VCC12
0
0
0
Y
-
0
0
Y
129
0
0
0
VCC53
0
34
0
0
DSP1_CLK
0
0
0
0
DSP1_CTRL2
0
0
0
DSP1_CTRL1
0
0
0
DSP1_CTRL0
0
0
DSP1_DATA0_0
0
0
0
DSP0_DATA0_11
0
0
0
DSP0_DATA1_10
0
0
26
27
0
0
-
-
0
VSS
PWM2P0
AN0(AL0)
VSS_LVDS_Tx
VCC3_LVDS_Tx
0
-
BP0(BH0)
0
0
0
0
0
130
0
AN27
0
0
0
0
0
AN28
S
0
0
DSP0_CTRL7
0
0
S
134
0
0
DSP0_CTRL8
0
0
135
0
0
DSP0_CTRL9
0
0
0
0
0
0
0
0
0
P3_21
0
0
P3_25
P3_24
0
0
0 SIN12
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
D
D
D
D
D
C
-
-
E
-
-
E
E
E
E
E
-
E
-
-
E
E
E
E
E
-
-
F
F
F
-
-
-
G
H
I
J
J
I
I
I
I
I
J
J
I
I
I
I
I
L
-
VCC3
DSP0_DATA0_9 DSP0_DATA_D9+ CAP0_DATA21 0
DSP0_DATA1_9 DSP0_DATA_D9-
DSP0_DATA1_11 DSP0_DATA_D11- CAP0_CLK
DSP0_CTRL0
VCC12
VSS
M_SCLK0
VSS
VCC3
M_SDATA0_0
M_SDATA0_2
M_SDATA0_1
M_SSEL0
M_SDATA0_3
VSS
0
VSS
VCC3
M_SDATA1_0
M_SDATA1_2
M_SDATA1_1
M_SSEL1
M_SDATA1_3
VSS
VCC3
MLBDAT
MLBSIG
MLBCLK
VCC12
VSS
VCC5
PSC_1
0
AN0
AN1
AN2
AN3
AN4
AN5
AN6
AN7
AN8
AN9
AN10
AN11
AN12
AN13
AN14
NMIX
VCC5
DSP0_CTRL2
0
0
0
0
0
G_SDATA1_0
G_SDATA1_2
G_SDATA1_1
G_SSEL1
G_SDATA1_3
0
G_SCLK0
0
0
G_SDATA0_0
G_SDATA0_2
G_SDATA0_1
G_SSEL0
G_SDATA0_3
0
0
DSP0_CTRL2
DSP0_CTRL3
DSP0_CTRL4
0
0
0
0
0
0
SOT0
SCK0
SIN0
0
SOT1
SCK1
SIN1
SOT16
SCK16
SIN16
SOT8
SCK8
SIN8
0
0
0
CAP0_DATA34 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
SOT17
SCK17
SIN17
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
CAP0_DATA25 0
0
0
CAP0_DATA24 0
0
0
0
0
0
0
0
0
0
MFS17_SDA
MFS17_SCL
0
0
0
0
0
MFS16_SDA
MFS16_SCL
0
0
0
0
0
0
0
RXCLK TIN33 I2S0_SCK
DSP0_DATA1_10 DSP0_DATA_D10- CAP0_DATA32 CAP0_DATA35 RXDV TIN34 I2S1_SD
DSP0_DATA0_11 DSP0_DATA_D11+ CAP0_DATA33 0
TXCLK TOT33 I2S0_WS
COL
0
TXER
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
CRS
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
RX0
TX0
RX1
TX1
0
0
TOT35 I2S1_WS
TIN35 I2S1_SCK
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TIN0
TIN1
TIN2
TIN3
TOT0
TOT1
TOT2
TOT3
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
SGO0
SGA0
SGA1
SGO1
SGA2
SGO2
SGA3
SGO3
SGO0
SGA0
SGA1
SGO1
TOT16 SGO2
TIN17 0
0
0
TIN16 SGA2
0
0
TIN49 0
0
0
0
0
0
0
0
DSP0_DATA0_10 DSP0_DATA_D10+ CAP0_DATA23 CAP0_DATA32 RXER TOT34 I2S1_ECLK 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
OCU9_OTD0
OCU8_OTD1
OCU5_OTD1
0
0
OCU6_OTD0
OCU7_OTD0
OCU6_OTD1
OCU8_OTD0
OCU7_OTD1
0
0
0
0
0
0
OCU3_OTD0
OCU5_OTD1
OCU6_OTD0
OCU8_OTD0
OCU8_OTD1
OCU9_OTD0
OCU9_OTD1
ICU8_IN1
ICU9_IN0
0
0
0
0
ICU9_IN0
ICU9_IN1
ICU8_IN1
0
ICU5_IN1
0
0
ICU6_IN0
ICU7_IN0
ICU6_IN1
ICU8_IN0
ICU7_IN1
0
0
0
0
ICU4_IN1
0
0
0
0
ICU3_IN0
ICU4_IN0
ICU4_IN1
ICU5_IN0
ICU5_IN1
ICU6_IN0
ICU6_IN1
ICU7_IN0
ICU7_IN1
ICU8_IN0
ICU8_IN1
ICU9_IN0
ICU9_IN1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
PPG6_TOUT2
PPG7_TOUT0
PPG7_TOUT2
PPG8_TOUT0
PPG8_TOUT2
PPG9_TOUT0
0
0
0
PPG9_TOUT0
PPG8_TOUT2
PPG5_TOUT2
0
0
PPG6_TOUT0
PPG7_TOUT0
PPG6_TOUT2
PPG8_TOUT0
PPG7_TOUT2
0
0
0
0
PPG4_TOUT2
0
0
0
0
PPG3_TOUT0
PPG4_TOUT0
PPG4_TOUT2
PPG5_TOUT0
PPG5_TOUT2
PPG6_TOUT2
PPG7_TOUT0
PPG8_TOUT0
PPG8_TOUT2
PPG9_TOUT0
PPG9_TOUT2
EINT1
EINT2
0
0
0
0
0
0
EINT6
EINT8
EINT7
0
0
EINT1
EINT2
EINT3
0
0
0
0
EINT6
EINT8
EINT9
0
0
P1_01 M_DQ4_0
P1_00 M_DQ5_0
P1_02 M_DQ7_0
0
P0_28 0
0
0
0
0
0
P2_24 0
P2_25 0
P3_00 0
P3_01 0
P3_02 0
P3_03 0
P3_04 0
P3_05 0
P3_06 0
0
0
P2_22 0
0
0
P0_27 0
0
0
P0_26 0
0
0
P0_31 M_CS#2_0
0
0
EINT15 P2_31 0
0
P0_30 M_RWDS_0
0
0
EINT14 P2_30 0
PPG11_TOUT0 EINT6
0
0
EINT13 P2_29 0
EINT3
0
0
P1_09 M_CK_0
0
0
EINT12 P2_28 0
EINT2
0
0
0
0
G_DQ4_2
G_DQ5_2
G_DQ6_2
G_DQ7_2
0
0
0
0
0
G_CK_1
0
0
G_DQ3_1
G_DQ2_1
G_DQ1_1
G_DQ0_1
0
0
G_DQ5_1
G_DQ6_1
G_DQ7_1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
DSP0_CTRL2
DSP0_CLK
DSP0_CTRL0
DSP0_CTRL1
0
0
0
0
0
0
0
0
0
0
0
G_CS#2_1 0
G_DQ4_1
0
G_RWDS_1 0
0
0
G_CS#1_1 0
EINT11 P2_27 INDICATOR0_0 0
EINT1
0
EINT10 P2_26 0
EINT0
P5_22 0
EINT10 P1_03 M_DQ6_0
EINT9
P0_17 0
EINT11 P1_04 M_DQ0_0
EINT5
P0_16 0
EINT13 P1_06 M_DQ1_0
0
P0_15 0
EINT12 P1_05 M_DQ3_0
PPG10_TOUT2 EINT5
0
EINT0
PPG10_TOUT0 EINT4
0
EINT15 P0_14 0
PPG10_TOUT2 EINT15 P1_08 M_CS#1_0
0
EINT14 P0_13 0
PPG10_TOUT0 EINT14 P1_07 M_DQ2_0
PPG9_TOUT2
EINT13 P0_12 0
PPG11_TOUT0 EINT0
0
0
PPG10_TOUT0 EINT4
FRT8/9/10/11_TEXT PPG7_TOUT2
0
0
PPG0/1/2/3/4/5_TIN1 PPG6_TOUT0
OCU11_OTD0 ICU11_IN0 0
0
0
OCU10_OTD1 ICU10_IN1 0
0
ICU8_IN0
OCU10_OTD0 ICU10_IN0 0
0
ICU7_IN1
OCU10_OTD1 ICU10_IN1 0
0
ICU7_IN0
OCU10_OTD0 ICU10_IN0 0
OCU9_OTD1
ICU6_IN1
OCU11_OTD0 ICU11_IN0 0
ZIN9 OCU7_OTD1
0
0
BIN9 OCU7_OTD0
0
0
0
OCU10_OTD0 ICU10_IN0 0
AIN9 OCU6_OTD1
0
OCU9_OTD0
ZIN8 OCU5_OTD0
0
OCU8_OTD1
BIN8 OCU4_OTD1
0
OCU8_OTD0
AIN8 OCU4_OTD0
0
OCU7_OTD1
SIN1 OCU4_OTD1
0
OCU7_OTD0
SCK1 0
0
OCU6_OTD1
SOT1 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TRACE0
TRACE1
TRACE2
TRACE3
TRACE_CLK
TRACE_CTL
0
0
0
0
CAP0_DATA22 0
0
0
0
62
D
0
61
-
0
60
0
59
0
58
0
57
0
56
0
55
CONFIDENTIAL
PPG6_TOEINT5
0
PPG8_TOEINT9
PPG8_TOEINT8
0
0
S6J3200_DS708-00003-0v04-E, June 30, 2015
26
OCU6_OTD1 ICU6_IN1
0
OCU8_OTD1 ICU8_IN1
OCU8_OTD0 ICU8_IN0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
AVSS_LVDS_PLL
-
12
151
-
DVSS
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
AVCC3_LVDS_PLL
-
13
150
S
AN41
SIN2
0
PWM2M3
OCU2_OTD0 ICU2_IN0
P4_04
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
VCC3_LVDS_Tx
149
S
AN40
SCK2
0
PWM2P3
0
0
0
0
0
0
0
0
0
0
0
0
VSS_LVDS_Tx
S
AN39
PWM1M3
0
0
0
0
0
0
0
0
0
0
S
AN38
0
0
0
0
0
0
0
0
0
0
S
OCU1_OTD1 ICU1_IN1
PPG1_TOEINT3
P4_03
OCU1_OTD0 ICU1_IN0
PPG1_TOEINT2
P4_02
PWM1P3
OCU0_OTD1 ICU0_IN1
PPG0_TOEINT1
P4_01
0
0
TxDOUT3-
17
146
AN37
0
0
PWM2M2
OCU0_OTD0 ICU0_IN0
PPG0_TOEINT0
P4_00
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TxDOUT2+
B
18
145
S
AN36
0
0
PWM2P2
OCU11_OTD ICU11_IN1
PPG11_T EINT15
P3_31
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TxDOUT2-
B
19
144
S
AN35
0
0
PWM1M2
OCU11_OTD ICU11_IN0
PPG11_T EINT14
P3_30
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TxCLK+
B
20
143
S
AN34
0
0
PWM1P2
OCU10_OTD ICU10_IN1
PPG10_T EINT13
P3_29
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TxCLK-
B
21
142
-
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
VCC3
-
43
120
-
VSS
0
0
0
0
0
0
0
0
0
0
P0_02
EINT3
PPG1_TOUT2
ICU1_IN1
OCU1_OTD1
COL
CAP0_DATA11
DSP0_DATA_D4+
DSP0_DATA0_4
D
44
119
-
VCC5
0
0
0
0
0
0
0
0
0
0
0
P0_03
EINT4
PPG2_TOUT0
ICU2_IN0
OCU2_OTD0
0
TIN16
CRS
CAP0_DATA12
DSP0_DATA_D4-
DSP0_DATA1_4
D
45
118
Q
RSTX
0
0
0
0
0
0
0
0
0
0
0
0
P0_04
EINT5
PPG2_TOUT2
ICU2_IN1
OCU2_OTD1
0
TOT17
TXD0
CAP0_DATA13
DSP0_DATA_D5+
DSP0_DATA0_5
D
46
117
P
MODE
0
0
0
0
0
0
0
0
0
0
0
0
0
P0_05
EINT6
PPG3_TOUT0
ICU3_IN0
OCU3_OTD0
SIN0
TIN17
TXD1
CAP0_DATA14
DSP0_DATA_D5-
DSP0_DATA1_5
D
47
116
N2
JTAG_TMS
0
0
0
0
0
0
0
0
G_DQ2_2
0
0
0
0
P0_06
EINT7
PPG3_TOUT2
ICU3_IN1
OCU3_OTD1
0
TOT18
TXD2
CAP0_DATA15
DSP0_DATA_D6+
DSP0_DATA0_6
D
48
115
N2
JTAG_TCK
0
0
0
0
0
0
0
0
CAP0_DATA14
G_DQ1_2
0
0
0
0
P0_07
EINT8
PPG4_TOUT0
ICU4_IN0
OCU4_OTD0
0
TIN18
TXD3
CAP0_DATA16
DSP0_DATA_D6-
DSP0_DATA1_6
D
49
114
N2
JTAG_TDI
0
0
0
0
0
0
0
0
CAP0_DATA15
G_DQ0_2
0
0
0
0
P0_08
EINT9
PPG4_TOUT2
ICU4_IN1
OCU4_OTD1
0
TOT19
RXD0
CAP0_DATA17
DSP0_DATA_D7+
DSP0_DATA0_7
D
50
113
O
JTAG_TDO
0
0
0
0
0
0
0
0
0
G_CS#1_2
0
0
0
0
P0_09
EINT10
PPG5_TOUT0
ICU5_IN0
OCU5_OTD0
0
TIN19
RXD1
CAP0_DATA18
DSP0_DATA_D7-
DSP0_DATA1_7
D
51
112
N
JTAG_NTRST
0
0
0
0
0
0
0
0
0
0
G_RWDS_2
0
0
0
0
P0_10
EINT11
PPG5_TOUT2
ICU5_IN1
OCU5_OTD1S0_ECLK
TOT32
RXD2
CAP0_DATA19
DSP0_DATA_D8+
DSP0_DATA0_8
D
52
111
M
X0
0
0
0
0
0
0
0
0
0
0
G_CS#2_2
0
0
0
0
P0_11
EINT12
PPG6_TOUT0
ICU6_IN0
OCU6_OTD0 I2S0_SD
TIN32
RXD3
CAP0_DATA20
DSP0_DATA_D8-
DSP0_DATA1_8
D
53
110
M
X1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
VSS
-
54
109
-
VSS
0
0
0
0
0
0
0
0
0
0
PWM1P0
0
0
PWM1P1
PWM2M0
0
0
0
0
0
AP0(AH0)
0
0
AP1(AH1)
BN0(BL0)
0
0
0
0
0
0
0
0
0
P3_22
0
0
DVSS
0
0
0
0
0 SOT11
25
0 SCK11 DSP0_CTRL10
24
B
0 SIN11 DSP0_CTRL11
0
0
0
P3_23
PPG7_TOEINT6
AN26
DVCC
-
AN30
AN29
0
0
0
0
0
0
0
P6_00
EINT0
PPG0_TOUT0
ICU0_IN0
OCU0_OTD0
0
TIN2
0
CAP0_DATA8
DSP0_DATA_D2-
DSP0_DATA1_2
D
39
124
H
0
0
0
0
OCU6_OTD0 ICU6_IN0
PPG6_TOEINT4
P3_20
0
0
0
0
0
P0_00
EINT1
PPG0_TOUT2
ICU0_IN1
OCU0_OTD1
0
TOT3
0
CAP0_DATA9
DSP0_DATA_D3+
DSP0_DATA0_3
D
40
123
H
0
0
SGO3
TIN35
OCU5_OTD1 ICU5_IN1
PPG5_TOEINT3
P3_19
0
0
0
0
0
0
0
P0_01
EINT2
PPG1_TOUT0
ICU1_IN0
OCU1_OTD0
0
TIN3
TXEN
CAP0_DATA10
DSP0_DATA_D3-
DSP0_DATA1_3
D
41
122
H
ADTRG
0
SGA3
TOT35
OCU5_OTD0 ICU5_IN0
PPG5_TOEINT2
P3_18
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
VSS
-
42
121
-
C
0
0
0
0
0
0
0
0
0
0
0
0
0
0
B
TxDOUT0-
0
0
0
0
PPG7_TOEINT7
OCU7_OTD0 ICU7_IN0
S
131
S
S
0
0
0
TOT16
0
P3_26
TxDOUT1-
TxDOUT0+
0
0
0
0
0
OCU7_OTD1 ICU7_IN1
PWM1M0
133
132
137
136
0
0
0
0
0
P3_27
PPG9_TOEINT10
0
0
0
0
0
0
0
DVCC
0
DVSS
141
TOP VIEW
TEQFP-216
0
0
0
0
0
P3_28
PPG9_TOEINT11
0
0
0
0
MFS4_SCL
MFS0_CS3
MFS4_SDA
0
0
0
0
0
0
0
G_DQ3_2
CAP0_DATA13
0
0
PPG10_T EINT12
0
0
0
0
0
MFS0_CS1
P4_10
0
0
0
0
0
0
G_CK_2
CAP0_DATA12
0
0
0
0
0
0
0
0
MFS0_CS2
P4_11
PPG5_TOEINT10
0
0
0
0
0
CAP0_DATA11
0
0
0
0
0
OCU9_OTD0 ICU9_IN0
0
0
0
OCU2_OTD0
P4_12
PPG5_TOEINT11
OCU5_OTD0 ICU5_IN0
0
0
0
OCU9_OTD1 ICU9_IN1
PWM1M1
0
0
0
OCU0_OTD1
P4_05
0
SOT2
BN1(BL1)
OCU10_OTD ICU10_IN0
BP1(BH1)
AN1(AL1)
0
0
0
OCU1_OTD0 SGA1
PPG2_TOEINT5
0
147
0
0
0
0
OCU1_OTD1 SGO1
PPG6_TOEINT12
OCU5_OTD1 ICU5_IN1
PWM1M5
0
PWM2M1
0
0
0
0
0
OCU2_OTD0
OCU2_OTD1 ICU2_IN1
148
AN33
0
0
0
0
OCU6_OTD0 ICU6_IN0
PWM2P5
0
0
0
0
0
AN32
AN31
0
0
0
ICU2_IN0
PWM2M5
RX1
SOT4
DVSS
PWM2P1
S
S
0
0
0
ICU0_IN1
PWM1P4
0
16
S
140
0
0
0
ICU1_IN0
0
0
14
139
0
0
0
ICU1_IN1
0
0
15
138
0
0
0
B
22
B
TxDOUT1+
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
23
0
0
ICU2_IN0
AN42
DVCC
-
0
S
-
-
0
153
152
B
0
10
11
B
0
-
-
TxDOUT3+
0
VSS
VCC12
0
0
0
0
0
0
0
0
0
PPG2_TOUT0
0
0
0
PPG0_TOUT2
0
0
0
PPG1_TOUT0
0
0
0
PPG1_TOUT2
0
0
0
PPG2_TOUT0
0
0
0
0
0
0
0
EINT4
0
0
0
EINT9
0
0
0
EINT10
0
0
0
EINT11
0
0
0
EINT12
0
0
0
0
0
0
0
SEG0
TX1
SCK4
AN47
-
DVCC
-
0
0
0
0
COM3
SIN4
AN48
S
161
0
0
0
0
COM2
AN49
S
158
162
○
2
COM1
S
159
5
1
COM0
160
4
-
-
0
3
A
-
P5_20
A
C_R
AVSS
VSS
P4_25
DAC_R
0
0
0
0
P4_26
0
0
0
0
P4_27
0
0
0
0
0
0
P4_28
0
0
0
0
0 0
0
0
0
0
0
0
0 0
0
0
0
0
0 0
0
0
0
0
0
0
0 0
0
0
0
0
0 0
0
0
0
0
0
0
0 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
AVSS
0
0
0
0
PPG2_TOEINT4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
AVCC3_DAC
-
6
157
S
AN46
0
0
PWM1P5
OCU4_OTD1 ICU4_IN1
PPG4_TOEINT9
P4_09
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
DAC_L
A
7
156
S
AN45
SIN3
0
PWM2M4
OCU4_OTD0 ICU4_IN0
PPG4_TOEINT8
P4_08
MFS2_CS1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
C_L
A
8
155
S
AN44
SCK3
0
PWM2P4
OCU3_OTD1 ICU3_IN1
PPG3_TOEINT7
P4_07
MFS2_CS0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
AVSS
-
9
154
S
AN43
SOT3
0
PWM1M4
OCU3_OTD0 ICU3_IN0
PPG3_TOEINT6
P4_06
MFS0_CS0
0
4. Package and Pin Assignment
D a t a S h e e t ( P r e l i m i n a r y )
Figure 4-4: TEQFP-216 (S6J325CLxx)
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0 0
INDICATOR0_1 0
0 0
MFS8_CS2 0
MFS8_CS1 0
MFS8_CS3 0
MFS9_CS1 0
MFS9_CS0 0
MFS8_CS0 0
0 0
0 0
0 0
0 0
0 0
0 0
0 0
0 0
0
P2_16
P2_17
P3_17
P3_16
P3_15
P3_14
P3_13
P3_12
P3_11
P3_10
P3_09
P3_08
P3_07
P2_19
0
0
0
0
0
SEG24
SEG25
SEG26
SEG27
SEG28
SEG29
SEG30
SEG31
V0
V1
V2
V3
0
0
0
EINT0
EINT1
EINT1
EINT0
EINT15
EINT14
EINT13
EINT12
EINT11
EINT10
EINT9
EINT8
0
0
PPG0_TOUT2
PPG4_TOUT2
PPG4_TOUT0
PPG3_TOUT2
PPG3_TOUT0
PPG2_TOUT2
PPG2_TOUT0
PPG1_TOUT2
PPG1_TOUT0
PPG0_TOUT2
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TIN48
0
0
0
ICU0_IN0
ICU0_IN1
ICU4_IN1
ICU4_IN0
FRT4/5/6/7_TEXT ICU3_IN1
PPG0_TOUT0 PPG6/7/8/9/10/11_TIN
EINT7 PPG11_TOUT2
EINT3
0
PPG0_TOUT0
ICU3_IN0
ICU2_IN1
ICU2_IN0
ICU1_IN1
ICU1_IN0
ICU0_IN1
ICU0_IN0
ICU1_IN1
0
0
0
OCU0_OTD0
OCU0_OTD1
0
0 TIN18
OCU0_OTD0 WOT TOT18
0
0 TOT19
0
0
0
0
0
0
OCU2_OTD0 SGO0 TOT32 SOT10
0 TIN19
0
OCU2_OTD1 SGA0 TIN32 SCK10
0
0
0
OCU3_OTD0 SGA1 TOT33 SIN10
0
0
OCU3_OTD1 SGO1 TIN33 SOT11
OCU0_OTD1
0
0
OCU4_OTD0 SGA2 TOT34 SCK11
OCU1_OTD0
0
OCU4_OTD1 SGO2 TIN34 SIN11
OCU1_OTD1
0
0
0
SIN9
SCK9
SOT9
0
0
0
0
0
0
TX6
RX6
TX5
RX5
0
0
TX6
RX6
TX5
RX5
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
VCC5
X0A
X1A
AN25
AN24
AN23
AN22
AN21
AN20
AN19
AN18
AN17
AN16
AN15
0
VSS
VCC5
-
X
X
W
W
W
W
W
W
W
W
V
V
V
U
-
-
179
178
177
176
175
174
173
172
171
170
169
168
167
166
165
164
163
0
0
0
0
0
0
0
0
0
0
0
0
0
0 0
0 0
0 0
0 0
0 0
0 0
0 0
0 0
0 0
0 0
0 0
0 0
0 0
0 0
0 0
P5_07
P5_06
P5_05
0
0
0
0
P5_04
P5_03
P5_02
P5_01
P5_00
P4_31
P4_30
P4_29
0
0
SEG13
SEG14
SEG15
0
0
0
0
SEG16
SEG17
SEG18
SEG19
SEG20
SEG21
SEG22
SEG23
0
0
EINT7
EINT6
EINT5
0
0
0
0
EINT4
EINT3
EINT2
EINT1
EINT0
EINT15
EINT14
EINT13
0
0
PPG7_TOUT2
PPG7_TOUT0
PPG6_TOUT2
0
0
0
0
PPG6_TOUT0
PPG5_TOUT2
PPG5_TOUT0
PPG4_TOUT2
PPG4_TOUT0
PPG3_TOUT2
PPG3_TOUT0
PPG2_TOUT2
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
ICU8_IN1
ICU8_IN0
ICU7_IN1
ICU7_IN0
ICU6_IN1
0
0
0
0
ICU6_IN0
ICU5_IN1
ICU5_IN0
ICU4_IN1
ICU4_IN0
ICU3_IN1
ICU3_IN0
ICU2_IN1
0
0
OCU9_OTD1
OCU8_OTD1
OCU8_OTD0
OCU7_OTD1
OCU7_OTD0
OCU6_OTD1
0
0
0
0
OCU6_OTD0
OCU5_OTD1
OCU5_OTD0
OCU4_OTD1
OCU4_OTD0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
OCU3_OTD0 SGA3
0
AIN8
OCU3_OTD1 SGO3
OCU2_OTD1
ZIN8
OCU9_OTD0 BIN8
0
0
0
0 SCK10
0 SOT10
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
SIN9
SCK9
SOT9
0
0
0
0
0
SIN8
SCK8
SOT8
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
BN1(BL1)
BP1(BH1)
AN1(AL1)
AP1(AH1)
BN0(BL0)
BP0(BH0)
AN0(AL0)
AP0(AH0)
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
DSP1_DATA1_5
DSP1_DATA0_6
DSP1_DATA1_6
DSP1_DATA0_7
DSP1_DATA1_7
VCC53
VSS
VCC12
VCC12
DSP1_DATA0_8
DSP1_DATA1_8
DSP1_DATA0_9
DSP1_DATA1_9
0 DSP1_DATA1_10
0 DSP1_DATA0_11
0 DSP1_DATA1_11
0
DSP1_DATA0_5
0 DSP1_DATA0_10
0
DSP1_DATA1_4
VCC53
VSS
Y
Y
Y
Y
Y
Y
Y
-
-
-
-
Y
Y
Y
Y
Y
Y
Y
Y
-
-
200
199
198
197
196
195
194
193
192
191
190
189
188
187
186
185
184
183
182
181
180
0 TOT17
0
0
0 0
PPG8_TOUT0
ICU9_IN0
FRT0/1/2/3_TEXT ICU11_IN1 OCU11_OTD1
0
0
0 0
EINT8
0
ICU9_IN1
0
SEG12
0
0
P5_08
PPG8_TOUT2
0
0 0
EINT9
PPG9_TOUT0
0
SEG11
PPG9_TOUT2
P5_09
EINT10
201
0 0
EINT11
Y
0
SEG9
SEG10
DSP1_DATA0_4
202
P5_10
0
-
P5_11
0
VCC53
MFS8_CS0 0
0 SIN10
0
MFS9_CS0 0
AIN9
0
MFS10_SDA
0 ICU10_IN0 OCU10_OTD0
0
203
MFS10_SCL
EINT12 PPG10_TOUT0
0
204
SEG8
0
-
P5_12
0
Y
MFS9_CS1 0
0
VSS
0
0
DSP1_DATA1_3
0
0
0
0
0
0
0
DSP0_CTRL0
0 0
0
0
0
0
0
0
0
EINT13 PPG10_TOUT2
0
0
0
SEG7
0
0
0
P5_13
0 ICU10_IN1 OCU10_OTD1 BIN9
0 0
205
0 0
Y
0
DSP1_DATA0_3
0
0
ZIN9
DSP0_CTRL1
0 ICU11_IN0 OCU11_OTD0
0 SOT11
EINT14 PPG11_TOUT0
206
SEG6
Y
P5_14
DSP1_DATA1_2
MFS8_CS3 0
DSP0_CTRL2 DSP1_CTRL2
207
0
0 SCK11
208
0
Y
0 ICU11_IN1 OCU11_OTD1
Y
EINT15 PPG11_TOUT2
DSP1_DATA0_2
SEG5
DSP1_DATA1_1
P5_15
DSP1_CLK
MFS8_CS1 0
DSP0_CTRL3
0
DSP0_CTRL4 DSP1_CTRL0
0
DSP0_DATA_D2+
0 SIN11
CAP0_DATA7
0
0
0
TOT2
0
SCK0
OCU0_OTD0
OCU11_OTD1
OCU0_OTD1
ICU11_IN1
ICU0_IN0
PPG11_TOUT2
ICU0_IN1
EINT15
0
P5_31
0
0
PPG0_TOUT0
0
PPG0_TOUT2
0
EINT0
0
EINT1
0
SEG4
0
SEG3
DSP0_DATA_D1-
P5_16
CAP0_DATA6
P5_17
0
0 0
TIN1
MFS8_CS2 0
SOT0
0
OCU11_OTD0
0
ICU11_IN0
209
PPG11_TOUT0
Y
EINT14
DSP1_DATA0_1
P5_30
DSP0_CTRL5 DSP1_CTRL1
0
0 SOT12
0
0
0
OCU1_OTD0
0
ICU1_IN0
0
0
0
PPG1_TOUT0
DSP0_DATA0_1
EINT2
DSP0_DATA1_0
DSP0_DATA_D1+
SEG2
DSP0_DATA_D0-
CAP0_DATA5
P5_18
CAP0_DATA4
0
MFS12_SDA 0
0
TOT1
0
TIN0
0
210
0
OCU10_OTD1
Y
0
OCU10_OTD0
ICU10_IN1
DSP1_DATA1_0
0
ICU10_IN0
PPG10_TOUT2
0
0
PPG10_TOUT0
EINT13
DSP0_CTRL6
0
EINT12
P5_29
0 SCK12
0
P5_28
0
0
0
0
0
OCU1_OTD1
0
0
0
ICU1_IN1
0
0
0
0
AVCC5
0
0
PPG1_TOUT2
-
0
0
EINT3
125
0
SEG1
38
D
P5_19
D
DSP0_DATA0_0
MFS12_SCL 0
DSP0_DATA0_2
DSP0_DATA_D0+
0
0
CAP0_DATA3
211
0
0
212
0
TOT0
213
0
0
214
0
OCU9_OTD1
215
0
ICU9_IN1
216
0
PPG9_TOUT2
-
0
EINT11
Y
AVRH5
P5_27
Y
-
0
Y
126
0
Y
37
0
Y
D
0
VCC53
DSP0_DATA1_1
0
DSP1_CLK
0
0
DSP1_CTRL2
0
0
33
DSP1_CTRL1
0
0
D
DSP1_CTRL0
0
0
DSP0_CTRL2
DSP1_DATA0_0
0
0
DSP0_CLK-
0
0
0
CAP0_DATA2
0
0
0
0
0
0
0
DSP0_DATA1_4
0
0
AVSS
0
0
VCC12
-
OCU4_OTD0
0
127
ICU4_IN0
0
128
36
PPG4_TOUT0
DSP0_CTRL7
35
D
EINT0
DSP0_CTRL8
0
D
P0_19
DSP0_CTRL9
0
0
0
0
0
0
0 SIN12
0
0
0
0
0
0 SOT11
0
0
0 SCK11 DSP0_CTRL10
0
DSP0_DATA1_11
0 SIN11 DSP0_CTRL11
0
32
0
0
31
135
28
0
VCC12
30
D
VSS
0
-
-
C
DSP0_CLK
VCC12
0
0
0
0
0
0
0
0
0
129
VCC3
DSP0_CTRL1
DSP0_CLK+
0
0
0
0
34
0
0
CAP0_DATA1
0
0
0
0
0
0
CAP0_DATA0
MDIO
0
0
OCU2_OTD0
0
0
MDC
0
0
0
OCU0_OTD1
0
0
DSP0_DATA0_4
0
0
0
OCU1_OTD0 SGA1
0
0
0
OCU3_OTD1
0
0
OCU1_OTD1 SGO1
0
0
OCU9_OTD1
ICU3_IN1
0
0
OCU2_OTD0
0
0
ICU9_IN1
PPG3_TOUT2
0
0
0
0
0
PPG9_TOUT2
EINT15
0
ICU2_IN0
0
0
EINT3
P0_18
26
27
ICU0_IN1
VSS
0
P5_21
0
-
-
ICU1_IN0
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
D
D
D
D
D
C
-
-
E
-
-
E
E
E
E
E
-
E
-
-
E
E
E
E
E
-
-
F
F
F
-
-
-
G
H
I
J
J
I
I
I
I
I
J
J
I
I
I
I
I
L
-
VCC3
DSP0_DATA0_9 DSP0_DATA_D9+ CAP0_DATA21 0
DSP0_DATA1_9 DSP0_DATA_D9-
DSP0_DATA1_11 DSP0_DATA_D11- CAP0_CLK
DSP0_CTRL0
VCC12
VSS
M_SCLK0
VSS
VCC3
M_SDATA0_0
M_SDATA0_2
M_SDATA0_1
M_SSEL0
M_SDATA0_3
VSS
0
VSS
VCC3
M_SDATA1_0
M_SDATA1_2
M_SDATA1_1
M_SSEL1
M_SDATA1_3
VSS
VCC3
MLBDAT
MLBSIG
MLBCLK
VCC12
VSS
VCC5
PSC_1
0
AN0
AN1
AN2
AN3
AN4
AN5
AN6
AN7
AN8
AN9
AN10
AN11
AN12
AN13
AN14
NMIX
VCC5
DSP0_CTRL2
0
0
0
0
0
G_SDATA1_0
G_SDATA1_2
G_SDATA1_1
G_SSEL1
G_SDATA1_3
0
G_SCLK0
0
0
G_SDATA0_0
G_SDATA0_2
G_SDATA0_1
G_SSEL0
G_SDATA0_3
0
0
DSP0_CTRL2
DSP0_CTRL3
DSP0_CTRL4
0
0
0
0
0
0
SOT0
SCK0
SIN0
0
SOT1
SCK1
SIN1
SOT16
SCK16
SIN16
SOT8
SCK8
SIN8
0
0
0
CAP0_DATA34 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
SOT17
SCK17
SIN17
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
CAP0_DATA25 0
0
0
CAP0_DATA24 0
0
0
0
0
0
0
0
0
0
MFS17_SDA
MFS17_SCL
0
0
0
0
0
MFS16_SDA
MFS16_SCL
0
0
0
0
0
0
0
RXCLK TIN33 I2S0_SCK
DSP0_DATA1_10 DSP0_DATA_D10- CAP0_DATA32 CAP0_DATA35 RXDV TIN34 I2S1_SD
DSP0_DATA0_11 DSP0_DATA_D11+ CAP0_DATA33 0
TXCLK TOT33 I2S0_WS
COL
0
TXER
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
CRS
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
RX0
TX0
RX1
TX1
0
0
TOT35 I2S1_WS
TIN35 I2S1_SCK
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TIN0
TIN1
TIN2
TIN3
TOT0
TOT1
TOT2
TOT3
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
SGO0
SGA0
SGA1
SGO1
SGA2
SGO2
SGA3
SGO3
SGO0
SGA0
SGA1
SGO1
TOT16 SGO2
TIN17 0
0
0
TIN16 SGA2
0
0
TIN49 0
0
0
0
0
0
0
0
DSP0_DATA0_10 DSP0_DATA_D10+ CAP0_DATA23 CAP0_DATA32 RXER TOT34 I2S1_ECLK 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
OCU9_OTD0
OCU8_OTD1
OCU5_OTD1
0
0
OCU6_OTD0
OCU7_OTD0
OCU6_OTD1
OCU8_OTD0
OCU7_OTD1
0
0
0
0
0
0
OCU3_OTD0
OCU5_OTD1
OCU6_OTD0
OCU8_OTD0
OCU8_OTD1
OCU9_OTD0
OCU9_OTD1
ICU8_IN1
ICU9_IN0
0
0
0
0
ICU9_IN0
ICU9_IN1
ICU8_IN1
0
ICU5_IN1
0
0
ICU6_IN0
ICU7_IN0
ICU6_IN1
ICU8_IN0
ICU7_IN1
0
0
0
0
ICU4_IN1
0
0
0
0
ICU3_IN0
ICU4_IN0
ICU4_IN1
ICU5_IN0
ICU5_IN1
ICU6_IN0
ICU6_IN1
ICU7_IN0
ICU7_IN1
ICU8_IN0
ICU8_IN1
ICU9_IN0
ICU9_IN1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
PPG6_TOUT2
PPG7_TOUT0
PPG7_TOUT2
PPG8_TOUT0
PPG8_TOUT2
PPG9_TOUT0
0
0
0
PPG9_TOUT0
PPG8_TOUT2
PPG5_TOUT2
0
0
PPG6_TOUT0
PPG7_TOUT0
PPG6_TOUT2
PPG8_TOUT0
PPG7_TOUT2
0
0
0
0
PPG4_TOUT2
0
0
0
0
PPG3_TOUT0
PPG4_TOUT0
PPG4_TOUT2
PPG5_TOUT0
PPG5_TOUT2
PPG6_TOUT2
PPG7_TOUT0
PPG8_TOUT0
PPG8_TOUT2
PPG9_TOUT0
PPG9_TOUT2
EINT1
EINT2
0
0
0
0
0
0
EINT6
EINT8
EINT7
0
0
EINT1
EINT2
EINT3
0
0
0
0
EINT6
EINT8
EINT9
0
0
P1_01 M_DQ4_0
P1_00 M_DQ5_0
P1_02 M_DQ7_0
0
P0_28 0
0
0
0
0
0
P2_24 0
P2_25 0
P3_00 0
P3_01 0
P3_02 0
P3_03 0
P3_04 0
P3_05 0
P3_06 0
0
0
P2_22 0
0
0
P0_27 0
0
0
P0_26 0
0
0
P0_31 M_CS#2_0
0
0
EINT15 P2_31 0
0
P0_30 M_RWDS_0
0
0
EINT14 P2_30 0
PPG11_TOUT0 EINT6
0
0
EINT13 P2_29 0
EINT3
0
0
P1_09 M_CK_0
0
0
EINT12 P2_28 0
EINT2
0
0
0
0
G_DQ4_2
G_DQ5_2
G_DQ6_2
G_DQ7_2
0
0
0
0
0
G_CK_1
0
0
G_DQ3_1
G_DQ2_1
G_DQ1_1
G_DQ0_1
0
0
G_DQ5_1
G_DQ6_1
G_DQ7_1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
DSP0_CTRL2
DSP0_CLK
DSP0_CTRL0
DSP0_CTRL1
0
0
0
0
0
0
0
0
0
0
0
G_CS#2_1 0
G_DQ4_1
0
G_RWDS_1 0
0
0
G_CS#1_1 0
EINT11 P2_27 INDICATOR0_0 0
EINT1
0
EINT10 P2_26 0
EINT0
P5_22 0
EINT10 P1_03 M_DQ6_0
EINT9
P0_17 0
EINT11 P1_04 M_DQ0_0
EINT5
P0_16 0
EINT13 P1_06 M_DQ1_0
0
P0_15 0
EINT12 P1_05 M_DQ3_0
PPG10_TOUT2 EINT5
0
EINT0
PPG10_TOUT0 EINT4
0
EINT15 P0_14 0
PPG10_TOUT2 EINT15 P1_08 M_CS#1_0
0
EINT14 P0_13 0
PPG10_TOUT0 EINT14 P1_07 M_DQ2_0
PPG9_TOUT2
EINT13 P0_12 0
PPG11_TOUT0 EINT0
0
0
PPG10_TOUT0 EINT4
FRT8/9/10/11_TEXT PPG7_TOUT2
0
0
PPG0/1/2/3/4/5_TIN1 PPG6_TOUT0
OCU11_OTD0 ICU11_IN0 0
0
0
OCU10_OTD1 ICU10_IN1 0
0
ICU8_IN0
OCU10_OTD0 ICU10_IN0 0
0
ICU7_IN1
OCU10_OTD1 ICU10_IN1 0
0
ICU7_IN0
OCU10_OTD0 ICU10_IN0 0
OCU9_OTD1
ICU6_IN1
OCU11_OTD0 ICU11_IN0 0
ZIN9 OCU7_OTD1
0
0
BIN9 OCU7_OTD0
0
0
0
OCU10_OTD0 ICU10_IN0 0
AIN9 OCU6_OTD1
0
OCU9_OTD0
ZIN8 OCU5_OTD0
0
OCU8_OTD1
BIN8 OCU4_OTD1
0
OCU8_OTD0
AIN8 OCU4_OTD0
0
OCU7_OTD1
SIN1 OCU4_OTD1
0
OCU7_OTD0
SCK1 0
0
OCU6_OTD1
SOT1 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TRACE0
TRACE1
TRACE2
TRACE3
TRACE_CLK
TRACE_CTL
0
0
0
0
CAP0_DATA22 0
0
0
0
62
D
0
61
-
0
60
0
59
0
58
0
57
0
56
0
55
CONFIDENTIAL
-
0
0
0
VSS_LVDS_Tx
VCC3_LVDS_Tx
ICU1_IN1
MFS4_SCL
MFS0_CS3
MFS4_SDA
Package Pin Number
Condition on PCB
2, 5, 6, 9, and 12 to 27
Set to ground
3, 4, 7, 8
Open
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
AVCC3_DAC
-
6
157
S
AN46
0
0
PWM1P5
OCU4_OTD1 ICU4_IN1
PPG4_TOEINT9
P4_09
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
DAC_L
A
7
156
S
AN45
SIN3
0
PWM2M4
OCU4_OTD0 ICU4_IN0
PPG4_TOEINT8
P4_08
MFS2_CS1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
C_L
A
8
155
S
AN44
SCK3
0
PWM2P4
OCU3_OTD1 ICU3_IN1
PPG3_TOEINT7
P4_07
MFS2_CS0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
AVSS
-
9
154
S
AN43
SOT3
0
PWM1M4
OCU3_OTD0 ICU3_IN0
PPG3_TOEINT6
P4_06
MFS0_CS0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
VSS
-
10
153
S
AN42
0
0
PWM1P4
OCU2_OTD1 ICU2_IN1
PPG2_TOEINT5
P4_05
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
VCC12
-
11
152
-
DVCC
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
AVSS_LVDS_PLL
-
12
151
-
DVSS
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
AVCC3_LVDS_PLL
-
13
150
S
AN41
SIN2
0
PWM2M3
OCU2_OTD0 ICU2_IN0
P4_04
0
0
P4_03
0
PPG1_TOEINT2
P4_02
0
OCU0_OTD1 ICU0_IN1
PPG0_TOEINT1
P4_01
0
PWM2M2
OCU0_OTD0 ICU0_IN0
PPG0_TOEINT0
P4_00
0
0
0
TxDOUT2+
B
18
145
S
AN36
0
0
PWM2P2
OCU11_OTD ICU11_IN1
PPG11_T EINT15
P3_31
0
0
0
0
TxDOUT2-
B
19
144
S
AN35
0
0
PWM1M2
OCU11_OTD ICU11_IN0
PPG11_T EINT14
P3_30
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TxCLK+
B
20
143
S
AN34
0
0
PWM1P2
OCU10_OTD ICU10_IN1
PPG10_T EINT13
P3_29
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TxCLK-
B
21
142
-
DVCC
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TxDOUT1+
B
22
141
-
DVSS
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TxDOUT1-
B
23
140
S
AN33
0
BN1(BL1)
PWM2M1
OCU10_OTD ICU10_IN0
PPG10_T EINT12
P3_28
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TxDOUT0+
B
24
139
S
AN32
0
BP1(BH1) PWM2P1
OCU9_OTD1 ICU9_IN1
PPG9_TOEINT11
P3_27
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TxDOUT0-
B
25
138
S
AN31
0
AN1(AL1)
PWM1M1
OCU9_OTD0 ICU9_IN0
PPG9_TOEINT10
P3_26
0
0
0
0
0
0
0
0
0
0
VCC3
-
43
120
-
VSS
0
0
0
0
0
0
0
0
0
0
P0_02
EINT3
PPG1_TOUT2
ICU1_IN1
OCU1_OTD1
COL
CAP0_DATA11
DSP0_DATA_D4+
DSP0_DATA0_4
D
44
119
-
VCC5
0
0
0
0
0
0
0
0
0
0
0
P0_03
EINT4
PPG2_TOUT0
ICU2_IN0
OCU2_OTD0
0
TIN16
CRS
CAP0_DATA12
DSP0_DATA_D4-
DSP0_DATA1_4
D
45
118
Q
RSTX
0
0
0
0
0
0
0
0
0
0
0
0
P0_04
EINT5
PPG2_TOUT2
ICU2_IN1
OCU2_OTD1
0
TOT17
TXD0
CAP0_DATA13
DSP0_DATA_D5+
DSP0_DATA0_5
D
46
117
P
MODE
0
0
0
0
0
0
0
0
0
0
0
0
0
P0_05
EINT6
PPG3_TOUT0
ICU3_IN0
OCU3_OTD0
SIN0
TIN17
TXD1
CAP0_DATA14
DSP0_DATA_D5-
DSP0_DATA1_5
D
47
116
N2
JTAG_TMS
0
0
0
0
0
0
0
0
G_DQ2_2
0
0
0
0
P0_06
EINT7
PPG3_TOUT2
ICU3_IN1
OCU3_OTD1
0
TOT18
TXD2
CAP0_DATA15
DSP0_DATA_D6+
DSP0_DATA0_6
D
48
115
N2
JTAG_TCK
0
0
0
0
0
0
0
0
CAP0_DATA14
G_DQ1_2
0
0
0
0
P0_07
EINT8
PPG4_TOUT0
ICU4_IN0
OCU4_OTD0
0
TIN18
TXD3
CAP0_DATA16
DSP0_DATA_D6-
DSP0_DATA1_6
D
49
114
N2
JTAG_TDI
0
0
0
0
0
0
0
0
CAP0_DATA15
G_DQ0_2
0
0
0
0
P0_08
EINT9
PPG4_TOUT2
ICU4_IN1
OCU4_OTD1
0
TOT19
RXD0
CAP0_DATA17
DSP0_DATA_D7+
DSP0_DATA0_7
D
50
113
O
JTAG_TDO
0
0
0
0
0
0
0
0
0
G_CS#1_2
0
0
0
0
P0_09
EINT10
PPG5_TOUT0
ICU5_IN0
OCU5_OTD0
0
TIN19
RXD1
CAP0_DATA18
DSP0_DATA_D7-
DSP0_DATA1_7
D
51
112
N
JTAG_NTRST
0
0
0
0
0
0
0
0
0
0
G_RWDS_2
0
0
0
0
P0_10
EINT11
PPG5_TOUT2
ICU5_IN1
OCU5_OTD1S0_ECLK
TOT32
RXD2
CAP0_DATA19
DSP0_DATA_D8+
DSP0_DATA0_8
D
52
111
M
X0
0
0
0
0
0
0
0
0
0
0
G_CS#2_2
0
0
0
0
P0_11
EINT12
PPG6_TOUT0
ICU6_IN0
OCU6_OTD0 I2S0_SD
TIN32
RXD3
CAP0_DATA20
DSP0_DATA_D8-
DSP0_DATA1_8
D
53
110
M
X1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
VSS
-
54
109
-
VSS
0
0
0
0
0
0
0
0
0
0
0
0
0
P6_00
EINT0
PPG0_TOUT0
ICU0_IN0
OCU0_OTD0
0
TIN2
0
CAP0_DATA8
DSP0_DATA_D2-
DSP0_DATA1_2
D
39
124
H
0
0
0
0
OCU6_OTD0 ICU6_IN0
PPG6_TOEINT4
P3_20
0
0
0
0
0
P0_00
EINT1
PPG0_TOUT2
ICU0_IN1
OCU0_OTD1
0
TOT3
0
CAP0_DATA9
DSP0_DATA_D3+
DSP0_DATA0_3
D
40
123
H
0
0
SGO3
TIN35
OCU5_OTD1 ICU5_IN1
PPG5_TOEINT3
P3_19
0
0
0
0
0
0
0
P0_01
EINT2
PPG1_TOUT0
ICU1_IN0
OCU1_OTD0
0
TIN3
TXEN
CAP0_DATA10
DSP0_DATA_D3-
DSP0_DATA1_3
D
41
122
H
ADTRG
0
SGA3
TOT35
OCU5_OTD0 ICU5_IN0
PPG5_TOEINT2
P3_18
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
VSS
-
42
121
-
C
0
0
0
0
0
0
0
0
0
0
0
0
27
June 30, 2015, S6J3200_DS708-00003-0v04-E
0
130
0
0
0
0
0
ICU2_IN0
Notes:
Any function at the following pins is not supported.
−
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
29
0
0
DSP0_DATA0_11
0
0
0
0
0
0
0
-
0
DSP0_DATA1_10
0
0
0
TOT16
0
P3_21
0
0
0
0
0
0
0
0
P3_22
PPG6_TOEINT5
0
0
P3_25
P3_24
0
0
0
0
0
PPG7_TOEINT6
OCU6_OTD1 ICU6_IN1
0
0
PPG8_TOEINT9
PPG8_TOEINT8
0
0
0
0
MFS0_CS1
P4_10
0
0
0
0
0
0
0
G_DQ3_2
CAP0_DATA13
0
P3_23
OCU7_OTD0 ICU7_IN0
PWM1P0
0
0
OCU8_OTD1 ICU8_IN1
OCU8_OTD0 ICU8_IN0
0
0
0
MFS0_CS2
P4_11
PPG5_TOEINT10
0
0
0
0
0
G_CK_2
CAP0_DATA12
0
0
0
PPG7_TOEINT7
PWM1M0
AP0(AH0)
0
DVSS
PWM1P1
PWM2M0
0
0
0
P4_12
PPG5_TOEINT11
OCU5_OTD0 ICU5_IN0
0
0
0
0
0
CAP0_DATA11
0
0
0
OCU7_OTD1 ICU7_IN1
AN0(AL0)
0
DVCC
-
AP1(AH1)
BN0(BL0)
0
0
0
PPG6_TOEINT12
OCU5_OTD1 ICU5_IN1
PWM1M5
0
0
BP0(BH0) PWM2P0
0
AN26
-
0
0
0
0
0
OCU6_OTD0 ICU6_IN0
PWM2P5
0
0
0
0
0
0
AN27
S
131
AN30
AN29
0
0
0
PWM2M5
RX1
SOT4
DVSS
0
AN28
S
132
S
S
0
0
0
TX1
SCK4
AN47
-
DVCC
-
0
S
134
133
137
136
0
0
PPG2_TOUT0
PPG1_TOEINT3
OCU1_OTD0 ICU1_IN0
PWM1P3
0
0
0
TOP VIEW
TEQFP-216
0
0
PPG0_TOUT2
OCU1_OTD1 ICU1_IN1
PWM1M3
0
0
0
0
0
0
0
PPG1_TOUT0
PWM2P3
0
0
AN37
0
0
0
0
0
0
PPG1_TOUT2
0
SOT2
AN38
S
0
0
0
0
0
0
PPG2_TOUT0
SCK2
AN39
S
146
0
0
0
0
0
0
0
AN40
S
147
17
0
0
0
0
0
0
EINT4
S
148
16
B
0
0
0
0
0
0
EINT9
149
15
B
TxDOUT3-
0
0
0
0
0
0
EINT10
14
-
TxDOUT3+
0
0
0
0
0
0
EINT11
-
VSS_LVDS_Tx
0
0
0
0
0
0
0
EINT12
VCC3_LVDS_Tx
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
SEG0
0
0
0
0
0
0
0
0
0
COM3
SIN4
AN48
S
161
0
0
0
0
0
0
0
0
0
COM2
AN49
S
158
162
○
2
COM1
S
159
5
1
COM0
160
4
-
-
0
3
A
-
P5_20
A
C_R
AVSS
VSS
P4_25
DAC_R
0
0
0
0
P4_26
0
0
0
0
P4_27
0
0
0
0
0
0
P4_28
0
0
0
0
0 0
0
0
0
0
0
0
0 0
0
0
0
0
0
0 0
0
0
0
0
0
0 0
0
0
0
0
0 0
0
0
0
0
0
0
0 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
AVSS
0
0
0
0
PPG2_TOEINT4
0
0
0
0
0
0
4. Package and Pin Assignment
D a t a S h e e t ( P r e l i m i n a r y )
Figure 4-5: TEQFP-216 (S6J324CLxx)
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0 0
INDICATOR0_1 0
0 0
MFS8_CS2 0
MFS8_CS1 0
MFS8_CS3 0
MFS9_CS1 0
MFS9_CS0 0
MFS8_CS0 0
0 0
0 0
0 0
0 0
0 0
0 0
0 0
0 0
0
P2_16
P2_17
P3_17
P3_16
P3_15
P3_14
P3_13
P3_12
P3_11
P3_10
P3_09
P3_08
P3_07
P2_19
0
0
0
0
0
SEG24
SEG25
SEG26
SEG27
SEG28
SEG29
SEG30
SEG31
V0
V1
V2
V3
0
0
0
EINT0
EINT1
EINT1
EINT0
EINT15
EINT14
EINT13
EINT12
EINT11
EINT10
EINT9
EINT8
0
0
PPG0_TOUT2
PPG4_TOUT2
PPG4_TOUT0
PPG3_TOUT2
PPG3_TOUT0
PPG2_TOUT2
PPG2_TOUT0
PPG1_TOUT2
PPG1_TOUT0
PPG0_TOUT2
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TIN48
0
0
0
ICU0_IN0
ICU0_IN1
ICU4_IN1
ICU4_IN0
FRT4/5/6/7_TEXT ICU3_IN1
PPG0_TOUT0 PPG6/7/8/9/10/11_TIN
EINT7 PPG11_TOUT2
EINT3
0
PPG0_TOUT0
ICU3_IN0
ICU2_IN1
ICU2_IN0
ICU1_IN1
ICU1_IN0
ICU0_IN1
ICU0_IN0
ICU1_IN1
0
0
0
OCU0_OTD0
OCU0_OTD1
0
0 TIN18
OCU0_OTD0 WOT TOT18
0
0 TOT19
0
0
0
0
0
0
OCU2_OTD0 SGO0 TOT32 SOT10
0 TIN19
0
OCU2_OTD1 SGA0 TIN32 SCK10
0
0
0
OCU3_OTD0 SGA1 TOT33 SIN10
0
0
OCU3_OTD1 SGO1 TIN33 SOT11
OCU0_OTD1
0
0
OCU4_OTD0 SGA2 TOT34 SCK11
OCU1_OTD0
0
OCU4_OTD1 SGO2 TIN34 SIN11
OCU1_OTD1
0
0
0
SIN9
SCK9
SOT9
0
0
0
0
0
0
TX6
RX6
TX5
RX5
0
0
TX6
RX6
TX5
RX5
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
VCC5
X0A
X1A
AN25
AN24
AN23
AN22
AN21
AN20
AN19
AN18
AN17
AN16
AN15
0
VSS
VCC5
-
X
X
W
W
W
W
W
W
W
W
V
V
V
U
-
-
179
178
177
176
175
174
173
172
171
170
169
168
167
166
165
164
163
0
0
0
0
0
0
0
0
0
0
0
0
0
0 0
0 0
0 0
0 0
0 0
0 0
0 0
0 0
0 0
0 0
0 0
0 0
0 0
0 0
0 0
P5_07
P5_06
P5_05
0
0
0
0
P5_04
P5_03
P5_02
P5_01
P5_00
P4_31
P4_30
P4_29
0
0
SEG13
SEG14
SEG15
0
0
0
0
SEG16
SEG17
SEG18
SEG19
SEG20
SEG21
SEG22
SEG23
0
0
EINT7
EINT6
EINT5
0
0
0
0
EINT4
EINT3
EINT2
EINT1
EINT0
EINT15
EINT14
EINT13
0
0
PPG7_TOUT2
PPG7_TOUT0
PPG6_TOUT2
0
0
0
0
PPG6_TOUT0
PPG5_TOUT2
PPG5_TOUT0
PPG4_TOUT2
PPG4_TOUT0
PPG3_TOUT2
PPG3_TOUT0
PPG2_TOUT2
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
ICU8_IN1
ICU8_IN0
ICU7_IN1
ICU7_IN0
ICU6_IN1
0
0
0
0
ICU6_IN0
ICU5_IN1
ICU5_IN0
ICU4_IN1
ICU4_IN0
ICU3_IN1
ICU3_IN0
ICU2_IN1
0
0
OCU9_OTD1
OCU8_OTD1
OCU8_OTD0
OCU7_OTD1
OCU7_OTD0
OCU6_OTD1
0
0
0
0
OCU6_OTD0
OCU5_OTD1
OCU5_OTD0
OCU4_OTD1
OCU4_OTD0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
OCU3_OTD0 SGA3
0
AIN8
OCU3_OTD1 SGO3
OCU2_OTD1
ZIN8
OCU9_OTD0 BIN8
0
0
0
0 SCK10
0 SOT10
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
SIN9
SCK9
SOT9
0
0
0
0
0
SIN8
SCK8
SOT8
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
BN1(BL1)
BP1(BH1)
AN1(AL1)
AP1(AH1)
BN0(BL0)
BP0(BH0)
AN0(AL0)
AP0(AH0)
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
DSP1_DATA1_5
DSP1_DATA0_6
DSP1_DATA1_6
DSP1_DATA0_7
DSP1_DATA1_7
VCC53
VSS
VCC12
VCC12
DSP1_DATA0_8
DSP1_DATA1_8
DSP1_DATA0_9
DSP1_DATA1_9
0 DSP1_DATA1_10
0 DSP1_DATA0_11
0 DSP1_DATA1_11
0
DSP1_DATA0_5
0 DSP1_DATA0_10
0
DSP1_DATA1_4
VCC53
VSS
Y
Y
Y
Y
Y
Y
Y
-
-
-
-
Y
Y
Y
Y
Y
Y
Y
Y
-
-
200
199
198
197
196
195
194
193
192
191
190
189
188
187
186
185
184
183
182
181
180
0 TOT17
0
0
0 0
PPG8_TOUT0
ICU9_IN0
FRT0/1/2/3_TEXT ICU11_IN1 OCU11_OTD1
0
0
0 0
EINT8
0
ICU9_IN1
0
SEG12
0
0
P5_08
PPG8_TOUT2
0
0 0
EINT9
PPG9_TOUT0
0
SEG11
PPG9_TOUT2
P5_09
EINT10
201
0 0
EINT11
Y
0
SEG9
SEG10
DSP1_DATA0_4
202
P5_10
0
-
P5_11
0
VCC53
MFS8_CS0 0
0 SIN10
0
MFS9_CS0 0
AIN9
0
MFS10_SDA
0 ICU10_IN0 OCU10_OTD0
0
MFS10_SCL
EINT12 PPG10_TOUT0
0
SEG8
0
P5_12
0
203
MFS9_CS1 0
0
204
0
0
-
0
Y
0
VSS
0
DSP1_DATA1_3
0
0
0 0
0
0
0
0
DSP0_CTRL0
0
0
EINT13 PPG10_TOUT2
0
0
0
SEG7
0
0
0
P5_13
0
0 0
0
0 0
0
0
0 ICU10_IN1 OCU10_OTD1 BIN9
0
205
ZIN9
Y
0 ICU11_IN0 OCU11_OTD0
DSP1_DATA0_3
EINT14 PPG11_TOUT0
0
SEG6
DSP0_CTRL1
P5_14
0 SOT11
MFS8_CS3 0
206
0
Y
DSP0_DATA_D2+
DSP1_DATA1_2
CAP0_DATA7
DSP0_CTRL2 DSP1_CTRL2
0
0 SCK11
TOT2
0
SCK0
0 ICU11_IN1 OCU11_OTD1
OCU11_OTD1
EINT15 PPG11_TOUT2
ICU11_IN1
SEG5
PPG11_TOUT2
P5_15
EINT15
MFS8_CS1 0
P5_31
0
0
207
0
208
0
Y
0
Y
0
DSP1_DATA0_2
0
DSP1_DATA1_1
DSP0_DATA_D1-
DSP1_CLK
CAP0_DATA6
DSP0_CTRL3
0
DSP0_CTRL4 DSP1_CTRL0
TIN1
0
SOT0
0 SIN11
OCU11_OTD0
0
ICU11_IN0
0
PPG11_TOUT0
0
EINT14
OCU0_OTD0
P5_30
OCU0_OTD1
0
ICU0_IN0
0
ICU0_IN1
0
0
0
0
0
PPG0_TOUT0
0
PPG0_TOUT2
DSP0_DATA0_1
EINT0
DSP0_DATA1_0
DSP0_DATA_D1+
EINT1
DSP0_DATA_D0-
CAP0_DATA5
SEG4
CAP0_DATA4
0
SEG3
0
TOT1
P5_16
TIN0
0
P5_17
0
OCU10_OTD1
0 0
OCU10_OTD0
ICU10_IN1
MFS8_CS2 0
ICU10_IN0
PPG10_TOUT2
0
PPG10_TOUT0
EINT13
0
EINT12
P5_29
209
P5_28
0
Y
0
0
DSP1_DATA0_1
0
0
DSP0_CTRL5 DSP1_CTRL1
0
0
0 SOT12
0
0
0
0
0
OCU1_OTD0
0
ICU1_IN0
D
0
DSP0_DATA0_0
PPG1_TOUT0
DSP0_DATA_D0+
EINT2
CAP0_DATA3
SEG2
0
P5_18
TOT0
MFS12_SDA 0
0
0
OCU9_OTD1
210
ICU9_IN1
Y
PPG9_TOUT2
DSP1_DATA1_0
EINT11
0
P5_27
DSP0_CTRL6
0
0 SCK12
0
0
0
OCU1_OTD1
0
ICU1_IN1
0
0
0
PPG1_TOUT2
33
EINT3
D
SEG1
0
DSP0_CTRL2
P5_19
0
DSP0_CLK-
MFS12_SCL 0
0
CAP0_DATA2
0
0
0
211
0
-
DSP0_DATA1_4
212
0
125
0
213
0
38
OCU4_OTD0
214
0
D
ICU4_IN0
215
AVCC5
DSP0_DATA0_2
PPG4_TOUT0
216
0
-
EINT0
-
0
126
P0_19
Y
0
37
0
Y
0
D
0
Y
0
DSP0_DATA1_1
0
Y
0
AVSS
0
Y
0
VCC12
-
0
VCC53
0
127
DSP0_DATA1_11
DSP1_CLK
AVRH5
128
36
32
DSP1_CTRL2
0
35
D
30
31
D
DSP1_CTRL1
0
0
VCC12
DSP1_CTRL0
0
0
D
-
C
DSP0_CLK
DSP1_DATA0_0
0
0
0
VCC3
DSP0_CTRL1
DSP0_CLK+
0
0
0
VCC12
0
0
CAP0_DATA1
0
0
0
-
0
CAP0_DATA0
MDIO
0
0
0
129
0
MDC
0
0
0
0
34
0
DSP0_DATA0_4
0
0
0
0
0
0
0
OCU3_OTD1
0
0
VSS
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
OCU9_OTD1
ICU3_IN1
DSP0_CTRL7
0
VSS
0
ICU9_IN1
PPG3_TOUT2
DSP0_CTRL8
0
-
0
PPG9_TOUT2
EINT15
DSP0_CTRL9
0
130
0
EINT3
P0_18
0
0
0
0
0
P5_21
0
0 SIN12
0
0
0
0
0
0
0
0
0
0 SOT11
0
0
0
0 SCK11 DSP0_CTRL10
0
AP0(AH0)
0
0
0
0
0
0 SIN11 DSP0_CTRL11
0
0
0
0
0
0
0
DVSS
0
0
0
0
0
0
0
0
0
0
0
AN26
DVCC
-
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
OCU2_OTD0
0
P3_21
0
0
S
131
0
0
DSP0_DATA0_11
OCU0_OTD1
0
P3_22
PPG6_TOEINT5
0
133
132
0
DSP0_DATA1_10
OCU1_OTD0 SGA1
P3_23
PPG7_TOEINT6
OCU6_OTD1 ICU6_IN1
26
27
OCU1_OTD1 SGO1
PPG7_TOEINT7
OCU7_OTD0 ICU7_IN0
PWM1P0
0
-
-
OCU2_OTD0
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
D
D
D
D
D
C
-
-
E
-
-
E
E
E
E
E
-
E
-
-
E
E
E
E
E
-
-
F
F
F
-
-
-
G
H
I
J
J
I
I
I
I
I
J
J
I
I
I
I
I
L
-
VCC3
DSP0_DATA0_9 DSP0_DATA_D9+ CAP0_DATA21 0
DSP0_DATA1_9 DSP0_DATA_D9-
DSP0_DATA1_11 DSP0_DATA_D11- CAP0_CLK
DSP0_CTRL0
VCC12
VSS
M_SCLK0
VSS
VCC3
M_SDATA0_0
M_SDATA0_2
M_SDATA0_1
M_SSEL0
M_SDATA0_3
VSS
0
VSS
VCC3
M_SDATA1_0
M_SDATA1_2
M_SDATA1_1
M_SSEL1
M_SDATA1_3
VSS
VCC3
MLBDAT
MLBSIG
MLBCLK
VCC12
VSS
VCC5
PSC_1
0
AN0
AN1
AN2
AN3
AN4
AN5
AN6
AN7
AN8
AN9
AN10
AN11
AN12
AN13
AN14
NMIX
VCC5
DSP0_CTRL2
0
0
0
0
0
G_SDATA1_0
G_SDATA1_2
G_SDATA1_1
G_SSEL1
G_SDATA1_3
0
G_SCLK0
0
0
G_SDATA0_0
G_SDATA0_2
G_SDATA0_1
G_SSEL0
G_SDATA0_3
0
0
DSP0_CTRL2
DSP0_CTRL3
DSP0_CTRL4
0
0
0
0
0
0
SOT0
SCK0
SIN0
0
SOT1
SCK1
SIN1
SOT16
SCK16
SIN16
SOT8
SCK8
SIN8
0
0
0
CAP0_DATA34 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
SOT17
SCK17
SIN17
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
CAP0_DATA25 0
0
0
CAP0_DATA24 0
0
0
0
0
0
0
0
0
0
MFS17_SDA
MFS17_SCL
0
0
0
0
0
MFS16_SDA
MFS16_SCL
0
0
0
0
0
0
0
RXCLK TIN33 I2S0_SCK
DSP0_DATA1_10 DSP0_DATA_D10- CAP0_DATA32 CAP0_DATA35 RXDV TIN34 I2S1_SD
DSP0_DATA0_11 DSP0_DATA_D11+ CAP0_DATA33 0
TXCLK TOT33 I2S0_WS
COL
0
TXER
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
CRS
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
RX0
TX0
RX1
TX1
0
0
TOT35 I2S1_WS
TIN35 I2S1_SCK
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TIN0
TIN1
TIN2
TIN3
TOT0
TOT1
TOT2
TOT3
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
SGO0
SGA0
SGA1
SGO1
SGA2
SGO2
SGA3
SGO3
SGO0
SGA0
SGA1
SGO1
TOT16 SGO2
TIN17 0
0
0
TIN16 SGA2
0
0
TIN49 0
0
0
0
0
0
0
0
DSP0_DATA0_10 DSP0_DATA_D10+ CAP0_DATA23 CAP0_DATA32 RXER TOT34 I2S1_ECLK 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
OCU9_OTD0
OCU8_OTD1
OCU5_OTD1
0
0
OCU6_OTD0
OCU7_OTD0
OCU6_OTD1
OCU8_OTD0
OCU7_OTD1
0
0
0
0
0
0
OCU3_OTD0
OCU5_OTD1
OCU6_OTD0
OCU8_OTD0
OCU8_OTD1
OCU9_OTD0
OCU9_OTD1
ICU8_IN1
ICU9_IN0
0
0
0
0
ICU9_IN0
ICU9_IN1
ICU8_IN1
0
ICU5_IN1
0
0
ICU6_IN0
ICU7_IN0
ICU6_IN1
ICU8_IN0
ICU7_IN1
0
0
0
0
ICU4_IN1
0
0
0
0
ICU3_IN0
ICU4_IN0
ICU4_IN1
ICU5_IN0
ICU5_IN1
ICU6_IN0
ICU6_IN1
ICU7_IN0
ICU7_IN1
ICU8_IN0
ICU8_IN1
ICU9_IN0
ICU9_IN1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
PPG6_TOUT2
PPG7_TOUT0
PPG7_TOUT2
PPG8_TOUT0
PPG8_TOUT2
PPG9_TOUT0
0
0
0
PPG9_TOUT0
PPG8_TOUT2
PPG5_TOUT2
0
0
PPG6_TOUT0
PPG7_TOUT0
PPG6_TOUT2
PPG8_TOUT0
PPG7_TOUT2
0
0
0
0
PPG4_TOUT2
0
0
0
0
PPG3_TOUT0
PPG4_TOUT0
PPG4_TOUT2
PPG5_TOUT0
PPG5_TOUT2
PPG6_TOUT2
PPG7_TOUT0
PPG8_TOUT0
PPG8_TOUT2
PPG9_TOUT0
PPG9_TOUT2
EINT1
EINT2
0
0
0
0
0
0
EINT6
EINT8
EINT7
0
0
EINT1
EINT2
EINT3
0
0
0
0
EINT6
EINT8
EINT9
0
0
P1_01 M_DQ4_0
P1_00 M_DQ5_0
P1_02 M_DQ7_0
0
P0_28 0
0
0
0
0
0
P2_24 0
P2_25 0
P3_00 0
P3_01 0
P3_02 0
P3_03 0
P3_04 0
P3_05 0
P3_06 0
0
0
P2_22 0
0
0
P0_27 0
0
0
P0_26 0
0
0
P0_31 M_CS#2_0
0
0
EINT15 P2_31 0
0
P0_30 M_RWDS_0
0
0
EINT14 P2_30 0
PPG11_TOUT0 EINT6
0
0
EINT13 P2_29 0
EINT3
0
0
P1_09 M_CK_0
0
0
EINT12 P2_28 0
EINT2
0
0
0
0
G_DQ4_2
G_DQ5_2
G_DQ6_2
G_DQ7_2
0
0
0
0
0
G_CK_1
0
0
G_DQ3_1
G_DQ2_1
G_DQ1_1
G_DQ0_1
0
0
G_DQ5_1
G_DQ6_1
G_DQ7_1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
DSP0_CTRL2
DSP0_CLK
DSP0_CTRL0
DSP0_CTRL1
0
0
0
0
0
0
0
0
0
0
0
G_CS#2_1 0
G_DQ4_1
0
G_RWDS_1 0
0
0
G_CS#1_1 0
EINT11 P2_27 INDICATOR0_0 0
EINT1
0
EINT10 P2_26 0
EINT0
P5_22 0
EINT10 P1_03 M_DQ6_0
EINT9
P0_17 0
EINT11 P1_04 M_DQ0_0
EINT5
P0_16 0
EINT13 P1_06 M_DQ1_0
0
P0_15 0
EINT12 P1_05 M_DQ3_0
PPG10_TOUT2 EINT5
0
EINT0
PPG10_TOUT0 EINT4
0
EINT15 P0_14 0
PPG10_TOUT2 EINT15 P1_08 M_CS#1_0
0
EINT14 P0_13 0
PPG10_TOUT0 EINT14 P1_07 M_DQ2_0
PPG9_TOUT2
EINT13 P0_12 0
PPG11_TOUT0 EINT0
0
0
PPG10_TOUT0 EINT4
FRT8/9/10/11_TEXT PPG7_TOUT2
0
0
PPG0/1/2/3/4/5_TIN1 PPG6_TOUT0
OCU11_OTD0 ICU11_IN0 0
0
0
OCU10_OTD1 ICU10_IN1 0
0
ICU8_IN0
OCU10_OTD0 ICU10_IN0 0
0
ICU7_IN1
OCU10_OTD1 ICU10_IN1 0
0
ICU7_IN0
OCU10_OTD0 ICU10_IN0 0
OCU9_OTD1
ICU6_IN1
OCU11_OTD0 ICU11_IN0 0
ZIN9 OCU7_OTD1
0
0
BIN9 OCU7_OTD0
0
0
0
OCU10_OTD0 ICU10_IN0 0
AIN9 OCU6_OTD1
0
OCU9_OTD0
ZIN8 OCU5_OTD0
0
OCU8_OTD1
BIN8 OCU4_OTD1
0
OCU8_OTD0
AIN8 OCU4_OTD0
0
OCU7_OTD1
SIN1 OCU4_OTD1
0
OCU7_OTD0
SCK1 0
0
OCU6_OTD1
SOT1 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TRACE0
TRACE1
TRACE2
TRACE3
TRACE_CLK
TRACE_CTL
0
0
0
0
CAP0_DATA22 0
0
0
0
62
D
0
61
-
0
60
0
59
0
58
0
57
0
56
0
55
CONFIDENTIAL
OCU7_OTD1 ICU7_IN1
PWM1M0
VSS_LVDS_Tx
VCC3_LVDS_Tx
S6J3200_DS708-00003-0v04-E, June 30, 2015
28
BP0(BH0) PWM2P0
AN0(AL0)
0
0
0
0
MFS0_CS1
MFS4_SCL
P4_10
MFS0_CS3
MFS4_SDA
145
S
AN36
0
0
PWM2P2
OCU11_OTD ICU11_IN1
PPG11_T EINT15
P3_31
0
19
144
S
AN35
0
0
PWM1M2
OCU11_OTD ICU11_IN0
PPG11_T EINT14
P3_30
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TxCLK+
B
20
143
S
AN34
0
0
PWM1P2
OCU10_OTD ICU10_IN1
PPG10_T EINT13
P3_29
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TxCLK-
B
21
142
-
DVCC
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TxDOUT1+
B
22
141
-
DVSS
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TxDOUT1-
B
23
140
S
AN33
0
BN1(BL1)
PWM2M1
OCU10_OTD ICU10_IN0
PPG10_T EINT12
P3_28
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TxDOUT0+
B
24
139
S
AN32
0
BP1(BH1) PWM2P1
OCU9_OTD1 ICU9_IN1
PPG9_TOEINT11
P3_27
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TxDOUT0-
B
25
138
S
AN31
0
AN1(AL1)
OCU9_OTD0 ICU9_IN0
PPG9_TOEINT10
P3_26
0
PWM1M1
Package Pin Number
Condition on PCB
12 to 27
Set to ground
0
0
0
0
0
0
0
0
0
0
ICU2_IN0
MFS0_CS2
P4_11
PPG5_TOEINT10
0
0
AN28
AN27
0
0
ICU0_IN1
P4_12
PPG5_TOEINT11
OCU5_OTD0 ICU5_IN0
0
0
S
S
28
29
0
0
ICU1_IN0
PPG6_TOEINT12
OCU5_OTD1 ICU5_IN1
PWM1M5
0
0
0
135
134
-
0
0
ICU1_IN1
Notes:
Any function at the following pins is not supported.
−
0
0
0
0
0
0
0
0
0
0
0
0
0
0
VCC3
-
43
120
-
VSS
0
0
0
0
0
0
0
0
0
0
P0_02
EINT3
PPG1_TOUT2
ICU1_IN1
OCU1_OTD1
COL
CAP0_DATA11
DSP0_DATA_D4+
DSP0_DATA0_4
D
44
119
-
VCC5
0
0
0
0
0
0
0
0
0
0
0
P0_03
EINT4
PPG2_TOUT0
ICU2_IN0
OCU2_OTD0
0
TIN16
CRS
CAP0_DATA12
DSP0_DATA_D4-
DSP0_DATA1_4
D
45
118
Q
RSTX
0
0
0
0
0
0
0
0
0
0
0
0
P0_04
EINT5
PPG2_TOUT2
ICU2_IN1
OCU2_OTD1
0
TOT17
TXD0
CAP0_DATA13
DSP0_DATA_D5+
DSP0_DATA0_5
D
46
117
P
MODE
0
0
0
0
0
0
0
0
0
0
0
0
0
P0_05
EINT6
PPG3_TOUT0
ICU3_IN0
OCU3_OTD0
SIN0
TIN17
TXD1
CAP0_DATA14
DSP0_DATA_D5-
DSP0_DATA1_5
D
47
116
N2
JTAG_TMS
0
0
0
0
0
0
0
0
G_DQ2_2
0
0
0
0
P0_06
EINT7
PPG3_TOUT2
ICU3_IN1
OCU3_OTD1
0
TOT18
TXD2
CAP0_DATA15
DSP0_DATA_D6+
DSP0_DATA0_6
D
48
115
N2
JTAG_TCK
0
0
0
0
0
0
0
0
CAP0_DATA14
G_DQ1_2
0
0
0
0
P0_07
EINT8
PPG4_TOUT0
ICU4_IN0
OCU4_OTD0
0
TIN18
TXD3
CAP0_DATA16
DSP0_DATA_D6-
DSP0_DATA1_6
D
49
114
N2
JTAG_TDI
0
0
0
0
0
0
0
0
CAP0_DATA15
G_DQ0_2
0
0
0
0
P0_08
EINT9
PPG4_TOUT2
ICU4_IN1
OCU4_OTD1
0
TOT19
RXD0
CAP0_DATA17
DSP0_DATA_D7+
DSP0_DATA0_7
D
50
113
O
JTAG_TDO
0
0
0
0
0
0
0
0
0
G_CS#1_2
0
0
0
0
P0_09
EINT10
PPG5_TOUT0
ICU5_IN0
OCU5_OTD0
0
TIN19
RXD1
CAP0_DATA18
DSP0_DATA_D7-
DSP0_DATA1_7
D
51
112
N
JTAG_NTRST
0
0
0
0
0
0
0
0
0
0
G_RWDS_2
0
0
0
0
P0_10
EINT11
PPG5_TOUT2
ICU5_IN1
OCU5_OTD1S0_ECLK
TOT32
RXD2
CAP0_DATA19
DSP0_DATA_D8+
DSP0_DATA0_8
D
52
111
M
X0
0
0
0
0
0
0
0
0
0
0
G_CS#2_2
0
0
0
0
P0_11
EINT12
PPG6_TOUT0
ICU6_IN0
OCU6_OTD0 I2S0_SD
TIN32
RXD3
CAP0_DATA20
DSP0_DATA_D8-
DSP0_DATA1_8
D
53
110
M
X1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
VSS
-
54
109
-
VSS
0
0
0
0
0
0
0
0
0
0
P3_25
P3_24
0
0
0
0
PPG8_TOEINT9
PPG8_TOEINT8
0
0
0
0
0
0
0
P6_00
EINT0
PPG0_TOUT0
ICU0_IN0
OCU0_OTD0
0
TIN2
0
CAP0_DATA8
DSP0_DATA_D2-
DSP0_DATA1_2
D
39
124
H
0
0
0
0
OCU6_OTD0 ICU6_IN0
PPG6_TOEINT4
P3_20
0
0
0
0
0
P0_00
EINT1
PPG0_TOUT2
ICU0_IN1
OCU0_OTD1
0
TOT3
0
CAP0_DATA9
DSP0_DATA_D3+
DSP0_DATA0_3
D
40
123
H
0
0
SGO3
TIN35
OCU5_OTD1 ICU5_IN1
PPG5_TOEINT3
P3_19
0
0
0
0
0
0
0
P0_01
EINT2
PPG1_TOUT0
ICU1_IN0
OCU1_OTD0
0
TIN3
TXEN
CAP0_DATA10
DSP0_DATA_D3-
DSP0_DATA1_3
D
41
122
H
ADTRG
0
SGA3
TOT35
OCU5_OTD0 ICU5_IN0
PPG5_TOEINT2
P3_18
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
VSS
-
42
121
-
C
0
0
0
0
0
0
0
0
0
0
0
0
0
OCU8_OTD1 ICU8_IN1
OCU8_OTD0 ICU8_IN0
0
0
0
TOT16
PWM1P1
PWM2M0
0
0
0
0
AP1(AH1)
BN0(BL0)
0
0
0
0
0
0
0
0
ICU2_IN0
OCU6_OTD0 ICU6_IN0
PWM2P5
0
0
DVSS
0
0
0
0
0
G_DQ3_2
CAP0_DATA13
0
AN30
AN29
0
0
0
PWM2M5
RX1
SOT4
DVCC
-
0
0
0
0
G_CK_2
CAP0_DATA12
0
0
0
S
S
0
0
0
TX1
SCK4
AN47
161
0
0
0
0
CAP0_DATA11
0
0
0
137
136
0
0
0
18
B
TOP VIEW
TEQFP-216
0
0
0
B
TxDOUT2-
VSS_LVDS_Tx
0
TxDOUT2+
VCC3_LVDS_Tx
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
PPG2_TOUT0
0
0
0
0
0
0
0
PPG0_TOUT2
0
P4_00
0
0
0
0
0
0
PPG1_TOUT0
0
0
P4_01
PPG0_TOEINT0
0
0
0
0
0
0
PPG1_TOUT2
P4_03
P4_02
PPG0_TOEINT1
OCU0_OTD0 ICU0_IN0
0
0
0
0
0
0
PPG2_TOUT0
PPG1_TOEINT3
PPG1_TOEINT2
OCU0_OTD1 ICU0_IN1
PWM2M2
0
0
0
0
0
0
0
OCU1_OTD1 ICU1_IN1
OCU1_OTD0 ICU1_IN0
PWM1P3
0
0
0
0
0
0
0
EINT4
PWM2P3
PWM1M3
0
0
0
0
0
0
0
0
EINT9
0
0
0
AN37
0
0
0
0
0
0
EINT10
SCK2
SOT2
AN38
S
0
0
0
0
0
0
EINT11
AN40
AN39
S
146
0
0
0
0
0
0
EINT12
S
S
147
17
0
0
0
0
0
0
0
149
148
16
B
0
0
0
0
0
0
SEG0
14
15
B
TxDOUT3-
0
0
0
0
0
COM3
SIN4
AN48
S
162
0
-
-
TxDOUT3+
0
0
0
0
0
COM2
AN49
S
158
2
○
1
COM1
S
159
5
-
COM0
160
4
-
-
0
3
A
VSS
P5_20
A
C_R
AVSS
0
0
P4_25
DAC_R
0
0
0
P4_26
0
0
0
0
0
P4_27
0
0
0
0
0
P4_28
0
0
0
0
0
0 0
0
0
0
0
0
0 0
0
0
0
0
0
0 0
0
0
0
0
0
0 0
0
0
0
0
0
0 0
0
0
0
0
0
0 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
AVSS
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
VSS
-
10
153
S
AN42
0
0
PWM1P4
OCU2_OTD1 ICU2_IN1
PPG2_TOEINT5
P4_05
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
VCC12
-
11
152
-
DVCC
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
AVSS_LVDS_PLL
-
12
151
-
DVSS
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
AVCC3_LVDS_PLL
-
13
150
S
AN41
SIN2
0
PWM2M3
OCU2_OTD0 ICU2_IN0
P4_04
0
PPG2_TOEINT4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
AVCC3_DAC
-
6
157
S
AN46
0
0
PWM1P5
OCU4_OTD1 ICU4_IN1
PPG4_TOEINT9
P4_09
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
DAC_L
A
7
156
S
AN45
SIN3
0
PWM2M4
OCU4_OTD0 ICU4_IN0
PPG4_TOEINT8
P4_08
MFS2_CS1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
C_L
A
8
155
S
AN44
SCK3
0
PWM2P4
OCU3_OTD1 ICU3_IN1
PPG3_TOEINT7
P4_07
MFS2_CS0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
AVSS
-
9
154
S
AN43
SOT3
0
PWM1M4
OCU3_OTD0 ICU3_IN0
PPG3_TOEINT6
P4_06
MFS0_CS0
0
4. Package and Pin Assignment
D a t a S h e e t ( P r e l i m i n a r y )
Figure 4-6: TEQFP-216 (S6J323CLxx)
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0 0
INDICATOR0_1 0
0 0
MFS8_CS2 0
MFS8_CS1 0
MFS8_CS3 0
MFS9_CS1 0
MFS9_CS0 0
MFS8_CS0 0
0 0
0 0
0 0
0 0
0 0
0 0
0 0
0 0
0
P2_16
P2_17
P3_17
P3_16
P3_15
P3_14
P3_13
P3_12
P3_11
P3_10
P3_09
P3_08
P3_07
P2_19
0
0
0
0
0
SEG24
SEG25
SEG26
SEG27
SEG28
SEG29
SEG30
SEG31
V0
V1
V2
V3
0
0
0
EINT0
EINT1
EINT1
EINT0
EINT15
EINT14
EINT13
EINT12
EINT11
EINT10
EINT9
EINT8
0
0
PPG0_TOUT2
PPG4_TOUT2
PPG4_TOUT0
PPG3_TOUT2
PPG3_TOUT0
PPG2_TOUT2
PPG2_TOUT0
PPG1_TOUT2
PPG1_TOUT0
PPG0_TOUT2
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TIN48
0
0
0
ICU0_IN0
ICU0_IN1
ICU4_IN1
ICU4_IN0
FRT4/5/6/7_TEXT ICU3_IN1
PPG0_TOUT0 PPG6/7/8/9/10/11_TIN
EINT7 PPG11_TOUT2
EINT3
0
PPG0_TOUT0
ICU3_IN0
ICU2_IN1
ICU2_IN0
ICU1_IN1
ICU1_IN0
ICU0_IN1
ICU0_IN0
ICU1_IN1
0
0
0
OCU0_OTD0
OCU0_OTD1
0
0 TIN18
OCU0_OTD0 WOT TOT18
0
0 TOT19
0
0
0
0
0
0
OCU2_OTD0 SGO0 TOT32 SOT10
0 TIN19
0
OCU2_OTD1 SGA0 TIN32 SCK10
0
0
0
OCU3_OTD0 SGA1 TOT33 SIN10
0
0
OCU3_OTD1 SGO1 TIN33 SOT11
OCU0_OTD1
0
0
OCU4_OTD0 SGA2 TOT34 SCK11
OCU1_OTD0
0
OCU4_OTD1 SGO2 TIN34 SIN11
OCU1_OTD1
0
0
0
SIN9
SCK9
SOT9
0
0
0
0
0
0
TX6
RX6
TX5
RX5
0
0
TX6
RX6
TX5
RX5
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
VCC5
X0A
X1A
AN25
AN24
AN23
AN22
AN21
AN20
AN19
AN18
AN17
AN16
AN15
0
VSS
VCC5
-
X
X
W
W
W
W
W
W
W
W
V
V
V
U
-
-
179
178
177
176
175
174
173
172
171
170
169
168
167
166
165
164
163
0
0
0
0
0
0
0
0
0
0
0
0
0
0 0
0 0
0 0
0 0
0 0
0 0
0 0
0 0
0 0
0 0
0 0
0 0
0 0
0 0
0 0
P5_07
P5_06
P5_05
0
0
0
0
P5_04
P5_03
P5_02
P5_01
P5_00
P4_31
P4_30
P4_29
0
0
SEG13
SEG14
SEG15
0
0
0
0
SEG16
SEG17
SEG18
SEG19
SEG20
SEG21
SEG22
SEG23
0
0
EINT7
EINT6
EINT5
0
0
0
0
EINT4
EINT3
EINT2
EINT1
EINT0
EINT15
EINT14
EINT13
0
0
PPG7_TOUT2
PPG7_TOUT0
PPG6_TOUT2
0
0
0
0
PPG6_TOUT0
PPG5_TOUT2
PPG5_TOUT0
PPG4_TOUT2
PPG4_TOUT0
PPG3_TOUT2
PPG3_TOUT0
PPG2_TOUT2
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
ICU8_IN1
ICU8_IN0
ICU7_IN1
ICU7_IN0
ICU6_IN1
0
0
0
0
ICU6_IN0
ICU5_IN1
ICU5_IN0
ICU4_IN1
ICU4_IN0
ICU3_IN1
ICU3_IN0
ICU2_IN1
0
0
OCU9_OTD1
OCU8_OTD1
OCU8_OTD0
OCU7_OTD1
OCU7_OTD0
OCU6_OTD1
0
0
0
0
OCU6_OTD0
OCU5_OTD1
OCU5_OTD0
OCU4_OTD1
OCU4_OTD0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
OCU3_OTD0 SGA3
0
AIN8
OCU3_OTD1 SGO3
OCU2_OTD1
ZIN8
OCU9_OTD0 BIN8
0
0
0
0 SCK10
0 SOT10
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
SIN9
SCK9
SOT9
0
0
0
0
0
SIN8
SCK8
SOT8
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
BN1(BL1)
BP1(BH1)
AN1(AL1)
AP1(AH1)
BN0(BL0)
BP0(BH0)
AN0(AL0)
AP0(AH0)
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
DSP1_DATA1_5
DSP1_DATA0_6
DSP1_DATA1_6
DSP1_DATA0_7
DSP1_DATA1_7
VCC53
VSS
VCC12
VCC12
DSP1_DATA0_8
DSP1_DATA1_8
DSP1_DATA0_9
DSP1_DATA1_9
0 DSP1_DATA1_10
0 DSP1_DATA0_11
0 DSP1_DATA1_11
0
DSP1_DATA0_5
0 DSP1_DATA0_10
0
DSP1_DATA1_4
VCC53
VSS
Y
Y
Y
Y
Y
Y
Y
-
-
-
-
Y
Y
Y
Y
Y
Y
Y
Y
-
-
200
199
198
197
196
195
194
193
192
191
190
189
188
187
186
185
184
183
182
181
180
0 TOT17
0
0
0 0
PPG8_TOUT0
ICU9_IN0
FRT0/1/2/3_TEXT ICU11_IN1 OCU11_OTD1
0
0
0 0
EINT8
0
ICU9_IN1
0
SEG12
0
0
P5_08
PPG8_TOUT2
0
0 0
EINT9
PPG9_TOUT0
0
SEG11
PPG9_TOUT2
P5_09
EINT10
201
0 0
EINT11
Y
0
SEG9
SEG10
DSP1_DATA0_4
202
P5_10
0
-
P5_11
0
VCC53
MFS8_CS0 0
0 SIN10
0
MFS9_CS0 0
AIN9
0
MFS10_SDA
0 ICU10_IN0 OCU10_OTD0
0
203
MFS10_SCL
EINT12 PPG10_TOUT0
0
204
SEG8
0
-
P5_12
0
Y
MFS9_CS1 0
0
VSS
0
0
DSP1_DATA1_3
0
0
0
0
0
0
0
DSP0_CTRL0
0 0
0
0
0
0
0
0
0
EINT13 PPG10_TOUT2
0
0
0
SEG7
0
0
0
P5_13
0 ICU10_IN1 OCU10_OTD1 BIN9
0 0
205
0 0
Y
0
DSP1_DATA0_3
0
0
ZIN9
DSP0_CTRL1
0 ICU11_IN0 OCU11_OTD0
0 SOT11
EINT14 PPG11_TOUT0
206
SEG6
Y
P5_14
DSP1_DATA1_2
MFS8_CS3 0
DSP0_CTRL2 DSP1_CTRL2
207
0
0 SCK11
208
0
Y
0 ICU11_IN1 OCU11_OTD1
Y
EINT15 PPG11_TOUT2
DSP1_DATA0_2
SEG5
DSP1_DATA1_1
P5_15
DSP1_CLK
MFS8_CS1 0
DSP0_CTRL3
0
DSP0_CTRL4 DSP1_CTRL0
0
DSP0_DATA_D2+
0 SIN11
CAP0_DATA7
0
0
0
TOT2
0
SCK0
OCU0_OTD0
OCU11_OTD1
OCU0_OTD1
ICU11_IN1
ICU0_IN0
PPG11_TOUT2
ICU0_IN1
EINT15
0
P5_31
0
0
PPG0_TOUT0
0
PPG0_TOUT2
0
EINT0
0
EINT1
0
SEG4
0
SEG3
DSP0_DATA_D1-
P5_16
CAP0_DATA6
P5_17
0
0 0
TIN1
MFS8_CS2 0
SOT0
0
OCU11_OTD0
0
ICU11_IN0
209
PPG11_TOUT0
Y
EINT14
DSP1_DATA0_1
P5_30
DSP0_CTRL5 DSP1_CTRL1
0
0 SOT12
0
0
0
OCU1_OTD0
0
ICU1_IN0
0
0
0
PPG1_TOUT0
DSP0_DATA0_1
EINT2
DSP0_DATA1_0
DSP0_DATA_D1+
SEG2
DSP0_DATA_D0-
CAP0_DATA5
P5_18
CAP0_DATA4
0
MFS12_SDA 0
0
TOT1
0
TIN0
0
210
0
OCU10_OTD1
Y
0
OCU10_OTD0
ICU10_IN1
DSP1_DATA1_0
0
ICU10_IN0
PPG10_TOUT2
0
0
PPG10_TOUT0
EINT13
DSP0_CTRL6
0
EINT12
P5_29
0 SCK12
0
P5_28
0
0
0
0
0
OCU1_OTD1
0
0
0
ICU1_IN1
0
0
0
0
AVCC5
0
0
PPG1_TOUT2
-
0
0
EINT3
125
0
SEG1
38
D
P5_19
D
DSP0_DATA0_0
MFS12_SCL 0
DSP0_DATA0_2
DSP0_DATA_D0+
0
0
CAP0_DATA3
211
0
0
212
0
TOT0
213
0
0
214
0
OCU9_OTD1
215
0
ICU9_IN1
216
0
PPG9_TOUT2
-
0
EINT11
Y
AVRH5
P5_27
Y
-
0
Y
126
0
Y
37
0
Y
D
0
VCC53
DSP0_DATA1_1
0
DSP1_CLK
0
0
DSP1_CTRL2
0
0
33
DSP1_CTRL1
0
0
D
DSP1_CTRL0
0
0
DSP0_CTRL2
DSP1_DATA0_0
0
0
DSP0_CLK-
0
0
0
CAP0_DATA2
0
0
0
0
0
0
0
DSP0_DATA1_4
0
0
AVSS
0
0
VCC12
-
OCU4_OTD0
0
127
ICU4_IN0
0
128
36
PPG4_TOUT0
DSP0_CTRL7
35
D
EINT0
DSP0_CTRL8
0
D
P0_19
DSP0_CTRL9
0
0
0
0
0
0
0 SIN12
0
0
0
0
0
0 SOT11
0
0
0 SCK11 DSP0_CTRL10
0
DSP0_DATA1_11
0 SIN11 DSP0_CTRL11
0
32
0
0
31
135
28
0
VCC12
30
D
VSS
0
-
-
C
DSP0_CLK
VCC12
0
0
0
0
0
0
0
0
0
129
VCC3
DSP0_CTRL1
DSP0_CLK+
0
0
0
0
34
0
0
CAP0_DATA1
0
0
0
0
0
0
CAP0_DATA0
MDIO
0
0
OCU2_OTD0
0
0
MDC
0
0
0
OCU0_OTD1
0
0
DSP0_DATA0_4
0
0
0
OCU1_OTD0 SGA1
0
0
0
OCU3_OTD1
0
0
OCU1_OTD1 SGO1
0
0
OCU9_OTD1
ICU3_IN1
0
0
OCU2_OTD0
0
0
ICU9_IN1
PPG3_TOUT2
0
0
0
0
0
PPG9_TOUT2
EINT15
0
ICU2_IN0
0
0
EINT3
P0_18
26
27
ICU0_IN1
VSS
0
P5_21
0
-
-
ICU1_IN0
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
D
D
D
D
D
C
-
-
E
-
-
E
E
E
E
E
-
E
-
-
E
E
E
E
E
-
-
F
F
F
-
-
-
G
H
I
J
J
I
I
I
I
I
J
J
I
I
I
I
I
L
-
VCC3
DSP0_DATA0_9 DSP0_DATA_D9+ CAP0_DATA21 0
DSP0_DATA1_9 DSP0_DATA_D9-
DSP0_DATA1_11 DSP0_DATA_D11- CAP0_CLK
DSP0_CTRL0
VCC12
VSS
M_SCLK0
VSS
VCC3
M_SDATA0_0
M_SDATA0_2
M_SDATA0_1
M_SSEL0
M_SDATA0_3
VSS
0
VSS
VCC3
M_SDATA1_0
M_SDATA1_2
M_SDATA1_1
M_SSEL1
M_SDATA1_3
VSS
VCC3
MLBDAT
MLBSIG
MLBCLK
VCC12
VSS
VCC5
PSC_1
0
AN0
AN1
AN2
AN3
AN4
AN5
AN6
AN7
AN8
AN9
AN10
AN11
AN12
AN13
AN14
NMIX
VCC5
DSP0_CTRL2
0
0
0
0
0
G_SDATA1_0
G_SDATA1_2
G_SDATA1_1
G_SSEL1
G_SDATA1_3
0
G_SCLK0
0
0
G_SDATA0_0
G_SDATA0_2
G_SDATA0_1
G_SSEL0
G_SDATA0_3
0
0
DSP0_CTRL2
DSP0_CTRL3
DSP0_CTRL4
0
0
0
0
0
0
SOT0
SCK0
SIN0
0
SOT1
SCK1
SIN1
SOT16
SCK16
SIN16
SOT8
SCK8
SIN8
0
0
0
CAP0_DATA34 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
SOT17
SCK17
SIN17
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
CAP0_DATA25 0
0
0
CAP0_DATA24 0
0
0
0
0
0
0
0
0
0
MFS17_SDA
MFS17_SCL
0
0
0
0
0
MFS16_SDA
MFS16_SCL
0
0
0
0
0
0
0
RXCLK TIN33 I2S0_SCK
DSP0_DATA1_10 DSP0_DATA_D10- CAP0_DATA32 CAP0_DATA35 RXDV TIN34 I2S1_SD
DSP0_DATA0_11 DSP0_DATA_D11+ CAP0_DATA33 0
TXCLK TOT33 I2S0_WS
COL
0
TXER
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
CRS
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
RX0
TX0
RX1
TX1
0
0
TOT35 I2S1_WS
TIN35 I2S1_SCK
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TIN0
TIN1
TIN2
TIN3
TOT0
TOT1
TOT2
TOT3
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
SGO0
SGA0
SGA1
SGO1
SGA2
SGO2
SGA3
SGO3
SGO0
SGA0
SGA1
SGO1
TOT16 SGO2
TIN17 0
0
0
TIN16 SGA2
0
0
TIN49 0
0
0
0
0
0
0
0
DSP0_DATA0_10 DSP0_DATA_D10+ CAP0_DATA23 CAP0_DATA32 RXER TOT34 I2S1_ECLK 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
OCU9_OTD0
OCU8_OTD1
OCU5_OTD1
0
0
OCU6_OTD0
OCU7_OTD0
OCU6_OTD1
OCU8_OTD0
OCU7_OTD1
0
0
0
0
0
0
OCU3_OTD0
OCU5_OTD1
OCU6_OTD0
OCU8_OTD0
OCU8_OTD1
OCU9_OTD0
OCU9_OTD1
ICU8_IN1
ICU9_IN0
0
0
0
0
ICU9_IN0
ICU9_IN1
ICU8_IN1
0
ICU5_IN1
0
0
ICU6_IN0
ICU7_IN0
ICU6_IN1
ICU8_IN0
ICU7_IN1
0
0
0
0
ICU4_IN1
0
0
0
0
ICU3_IN0
ICU4_IN0
ICU4_IN1
ICU5_IN0
ICU5_IN1
ICU6_IN0
ICU6_IN1
ICU7_IN0
ICU7_IN1
ICU8_IN0
ICU8_IN1
ICU9_IN0
ICU9_IN1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
PPG6_TOUT2
PPG7_TOUT0
PPG7_TOUT2
PPG8_TOUT0
PPG8_TOUT2
PPG9_TOUT0
0
0
0
PPG9_TOUT0
PPG8_TOUT2
PPG5_TOUT2
0
0
PPG6_TOUT0
PPG7_TOUT0
PPG6_TOUT2
PPG8_TOUT0
PPG7_TOUT2
0
0
0
0
PPG4_TOUT2
0
0
0
0
PPG3_TOUT0
PPG4_TOUT0
PPG4_TOUT2
PPG5_TOUT0
PPG5_TOUT2
PPG6_TOUT2
PPG7_TOUT0
PPG8_TOUT0
PPG8_TOUT2
PPG9_TOUT0
PPG9_TOUT2
EINT1
EINT2
0
0
0
0
0
0
EINT6
EINT8
EINT7
0
0
EINT1
EINT2
EINT3
0
0
0
0
EINT6
EINT8
EINT9
0
0
P1_01 M_DQ4_0
P1_00 M_DQ5_0
P1_02 M_DQ7_0
0
P0_28 0
0
0
0
0
0
P2_24 0
P2_25 0
P3_00 0
P3_01 0
P3_02 0
P3_03 0
P3_04 0
P3_05 0
P3_06 0
0
0
P2_22 0
0
0
P0_27 0
0
0
P0_26 0
0
0
P0_31 M_CS#2_0
0
0
EINT15 P2_31 0
0
P0_30 M_RWDS_0
0
0
EINT14 P2_30 0
PPG11_TOUT0 EINT6
0
0
EINT13 P2_29 0
EINT3
0
0
P1_09 M_CK_0
0
0
EINT12 P2_28 0
EINT2
0
0
0
0
G_DQ4_2
G_DQ5_2
G_DQ6_2
G_DQ7_2
0
0
0
0
0
G_CK_1
0
0
G_DQ3_1
G_DQ2_1
G_DQ1_1
G_DQ0_1
0
0
G_DQ5_1
G_DQ6_1
G_DQ7_1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
DSP0_CTRL2
DSP0_CLK
DSP0_CTRL0
DSP0_CTRL1
0
0
0
0
0
0
0
0
0
0
0
G_CS#2_1 0
G_DQ4_1
0
G_RWDS_1 0
0
0
G_CS#1_1 0
EINT11 P2_27 INDICATOR0_0 0
EINT1
0
EINT10 P2_26 0
EINT0
P5_22 0
EINT10 P1_03 M_DQ6_0
EINT9
P0_17 0
EINT11 P1_04 M_DQ0_0
EINT5
P0_16 0
EINT13 P1_06 M_DQ1_0
0
P0_15 0
EINT12 P1_05 M_DQ3_0
PPG10_TOUT2 EINT5
0
EINT0
PPG10_TOUT0 EINT4
0
EINT15 P0_14 0
PPG10_TOUT2 EINT15 P1_08 M_CS#1_0
0
EINT14 P0_13 0
PPG10_TOUT0 EINT14 P1_07 M_DQ2_0
PPG9_TOUT2
EINT13 P0_12 0
PPG11_TOUT0 EINT0
0
0
PPG10_TOUT0 EINT4
FRT8/9/10/11_TEXT PPG7_TOUT2
0
0
PPG0/1/2/3/4/5_TIN1 PPG6_TOUT0
OCU11_OTD0 ICU11_IN0 0
0
0
OCU10_OTD1 ICU10_IN1 0
0
ICU8_IN0
OCU10_OTD0 ICU10_IN0 0
0
ICU7_IN1
OCU10_OTD1 ICU10_IN1 0
0
ICU7_IN0
OCU10_OTD0 ICU10_IN0 0
OCU9_OTD1
ICU6_IN1
OCU11_OTD0 ICU11_IN0 0
ZIN9 OCU7_OTD1
0
0
BIN9 OCU7_OTD0
0
0
0
OCU10_OTD0 ICU10_IN0 0
AIN9 OCU6_OTD1
0
OCU9_OTD0
ZIN8 OCU5_OTD0
0
OCU8_OTD1
BIN8 OCU4_OTD1
0
OCU8_OTD0
AIN8 OCU4_OTD0
0
OCU7_OTD1
SIN1 OCU4_OTD1
0
OCU7_OTD0
SCK1 0
0
OCU6_OTD1
SOT1 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TRACE0
TRACE1
TRACE2
TRACE3
TRACE_CLK
TRACE_CTL
0
0
0
0
CAP0_DATA22 0
0
0
0
62
D
0
61
-
0
60
0
59
0
58
0
57
0
56
0
55
CONFIDENTIAL
-
0
0
0
VSS_LVDS_Tx
VCC3_LVDS_Tx
ICU1_IN1
MFS4_SCL
MFS0_CS3
MFS4_SDA
Package Pin Number
Condition on PCB
2, 5, 6, 9, and 12 to 27
Set to ground
3, 4, 7, 8
Open
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
AVCC3_DAC
-
6
157
S
AN46
0
0
PWM1P5
OCU4_OTD1 ICU4_IN1
PPG4_TOEINT9
P4_09
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
DAC_L
A
7
156
S
AN45
SIN3
0
PWM2M4
OCU4_OTD0 ICU4_IN0
PPG4_TOEINT8
P4_08
MFS2_CS1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
C_L
A
8
155
S
AN44
SCK3
0
PWM2P4
OCU3_OTD1 ICU3_IN1
PPG3_TOEINT7
P4_07
MFS2_CS0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
AVSS
-
9
154
S
AN43
SOT3
0
PWM1M4
OCU3_OTD0 ICU3_IN0
PPG3_TOEINT6
P4_06
MFS0_CS0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
VSS
-
10
153
S
AN42
0
0
PWM1P4
OCU2_OTD1 ICU2_IN1
PPG2_TOEINT5
P4_05
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
VCC12
-
11
152
-
DVCC
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
AVSS_LVDS_PLL
-
12
151
-
DVSS
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
AVCC3_LVDS_PLL
-
13
150
S
AN41
SIN2
0
PWM2M3
OCU2_OTD0 ICU2_IN0
P4_04
0
0
P4_03
0
PPG1_TOEINT2
P4_02
0
OCU0_OTD1 ICU0_IN1
PPG0_TOEINT1
P4_01
0
PWM2M2
OCU0_OTD0 ICU0_IN0
PPG0_TOEINT0
P4_00
0
0
0
TxDOUT2+
B
18
145
S
AN36
0
0
PWM2P2
OCU11_OTD ICU11_IN1
PPG11_T EINT15
P3_31
0
0
0
0
TxDOUT2-
B
19
144
S
AN35
0
0
PWM1M2
OCU11_OTD ICU11_IN0
PPG11_T EINT14
P3_30
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TxCLK+
B
20
143
S
AN34
0
0
PWM1P2
OCU10_OTD ICU10_IN1
PPG10_T EINT13
P3_29
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TxCLK-
B
21
142
-
DVCC
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TxDOUT1+
B
22
141
-
DVSS
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TxDOUT1-
B
23
140
S
AN33
0
BN1(BL1)
PWM2M1
OCU10_OTD ICU10_IN0
PPG10_T EINT12
P3_28
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TxDOUT0+
B
24
139
S
AN32
0
BP1(BH1) PWM2P1
OCU9_OTD1 ICU9_IN1
PPG9_TOEINT11
P3_27
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TxDOUT0-
B
25
138
S
AN31
0
AN1(AL1)
PWM1M1
OCU9_OTD0 ICU9_IN0
PPG9_TOEINT10
P3_26
0
0
0
0
0
0
0
0
0
0
VCC3
-
43
120
-
VSS
0
0
0
0
0
0
0
0
0
0
P0_02
EINT3
PPG1_TOUT2
ICU1_IN1
OCU1_OTD1
COL
CAP0_DATA11
DSP0_DATA_D4+
DSP0_DATA0_4
D
44
119
-
VCC5
0
0
0
0
0
0
0
0
0
0
0
P0_03
EINT4
PPG2_TOUT0
ICU2_IN0
OCU2_OTD0
0
TIN16
CRS
CAP0_DATA12
DSP0_DATA_D4-
DSP0_DATA1_4
D
45
118
Q
RSTX
0
0
0
0
0
0
0
0
0
0
0
0
P0_04
EINT5
PPG2_TOUT2
ICU2_IN1
OCU2_OTD1
0
TOT17
TXD0
CAP0_DATA13
DSP0_DATA_D5+
DSP0_DATA0_5
D
46
117
P
MODE
0
0
0
0
0
0
0
0
0
0
0
0
0
P0_05
EINT6
PPG3_TOUT0
ICU3_IN0
OCU3_OTD0
SIN0
TIN17
TXD1
CAP0_DATA14
DSP0_DATA_D5-
DSP0_DATA1_5
D
47
116
N2
JTAG_TMS
0
0
0
0
0
0
0
0
G_DQ2_2
0
0
0
0
P0_06
EINT7
PPG3_TOUT2
ICU3_IN1
OCU3_OTD1
0
TOT18
TXD2
CAP0_DATA15
DSP0_DATA_D6+
DSP0_DATA0_6
D
48
115
N2
JTAG_TCK
0
0
0
0
0
0
0
0
CAP0_DATA14
G_DQ1_2
0
0
0
0
P0_07
EINT8
PPG4_TOUT0
ICU4_IN0
OCU4_OTD0
0
TIN18
TXD3
CAP0_DATA16
DSP0_DATA_D6-
DSP0_DATA1_6
D
49
114
N2
JTAG_TDI
0
0
0
0
0
0
0
0
CAP0_DATA15
G_DQ0_2
0
0
0
0
P0_08
EINT9
PPG4_TOUT2
ICU4_IN1
OCU4_OTD1
0
TOT19
RXD0
CAP0_DATA17
DSP0_DATA_D7+
DSP0_DATA0_7
D
50
113
O
JTAG_TDO
0
0
0
0
0
0
0
0
0
G_CS#1_2
0
0
0
0
P0_09
EINT10
PPG5_TOUT0
ICU5_IN0
OCU5_OTD0
0
TIN19
RXD1
CAP0_DATA18
DSP0_DATA_D7-
DSP0_DATA1_7
D
51
112
N
JTAG_NTRST
0
0
0
0
0
0
0
0
0
0
G_RWDS_2
0
0
0
0
P0_10
EINT11
PPG5_TOUT2
ICU5_IN1
OCU5_OTD1S0_ECLK
TOT32
RXD2
CAP0_DATA19
DSP0_DATA_D8+
DSP0_DATA0_8
D
52
111
M
X0
0
0
0
0
0
0
0
0
0
0
G_CS#2_2
0
0
0
0
P0_11
EINT12
PPG6_TOUT0
ICU6_IN0
OCU6_OTD0 I2S0_SD
TIN32
RXD3
CAP0_DATA20
DSP0_DATA_D8-
DSP0_DATA1_8
D
53
110
M
X1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
VSS
-
54
109
-
VSS
0
0
0
0
0
0
0
0
0
0
0
0
0
P6_00
EINT0
PPG0_TOUT0
ICU0_IN0
OCU0_OTD0
0
TIN2
0
CAP0_DATA8
DSP0_DATA_D2-
DSP0_DATA1_2
D
39
124
H
0
0
0
0
OCU6_OTD0 ICU6_IN0
PPG6_TOEINT4
P3_20
0
0
0
0
0
P0_00
EINT1
PPG0_TOUT2
ICU0_IN1
OCU0_OTD1
0
TOT3
0
CAP0_DATA9
DSP0_DATA_D3+
DSP0_DATA0_3
D
40
123
H
0
0
SGO3
TIN35
OCU5_OTD1 ICU5_IN1
PPG5_TOEINT3
P3_19
0
0
0
0
0
0
0
P0_01
EINT2
PPG1_TOUT0
ICU1_IN0
OCU1_OTD0
0
TIN3
TXEN
CAP0_DATA10
DSP0_DATA_D3-
DSP0_DATA1_3
D
41
122
H
ADTRG
0
SGA3
TOT35
OCU5_OTD0 ICU5_IN0
PPG5_TOEINT2
P3_18
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
VSS
-
42
121
-
C
0
0
0
0
0
0
0
0
0
0
0
0
29
June 30, 2015, S6J3200_DS708-00003-0v04-E
0
130
0
0
0
0
0
ICU2_IN0
Notes:
Any function at the following pins is not supported.
−
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
29
0
0
DSP0_DATA0_11
0
0
0
0
0
0
0
-
0
DSP0_DATA1_10
0
0
0
TOT16
0
P3_21
0
0
0
0
0
0
0
0
P3_22
PPG6_TOEINT5
0
0
P3_25
P3_24
0
0
0
0
0
PPG7_TOEINT6
OCU6_OTD1 ICU6_IN1
0
0
PPG8_TOEINT9
PPG8_TOEINT8
0
0
0
0
MFS0_CS1
P4_10
0
0
0
0
0
0
0
G_DQ3_2
CAP0_DATA13
0
P3_23
OCU7_OTD0 ICU7_IN0
PWM1P0
0
0
OCU8_OTD1 ICU8_IN1
OCU8_OTD0 ICU8_IN0
0
0
0
MFS0_CS2
P4_11
PPG5_TOEINT10
0
0
0
0
0
G_CK_2
CAP0_DATA12
0
0
0
PPG7_TOEINT7
PWM1M0
AP0(AH0)
0
DVSS
PWM1P1
PWM2M0
0
0
0
P4_12
PPG5_TOEINT11
OCU5_OTD0 ICU5_IN0
0
0
0
0
0
CAP0_DATA11
0
0
0
OCU7_OTD1 ICU7_IN1
AN0(AL0)
0
DVCC
-
AP1(AH1)
BN0(BL0)
0
0
0
PPG6_TOEINT12
OCU5_OTD1 ICU5_IN1
PWM1M5
0
0
BP0(BH0) PWM2P0
0
AN26
-
0
0
0
0
0
OCU6_OTD0 ICU6_IN0
PWM2P5
0
0
0
0
0
0
AN27
S
131
AN30
AN29
0
0
0
PWM2M5
RX1
SOT4
DVSS
0
AN28
S
132
S
S
0
0
0
TX1
SCK4
AN47
-
DVCC
-
0
S
134
133
137
136
0
0
PPG2_TOUT0
PPG1_TOEINT3
OCU1_OTD0 ICU1_IN0
PWM1P3
0
0
0
TOP VIEW
TEQFP-216
0
0
PPG0_TOUT2
OCU1_OTD1 ICU1_IN1
PWM1M3
0
0
0
0
0
0
0
PPG1_TOUT0
PWM2P3
0
0
AN37
0
0
0
0
0
0
PPG1_TOUT2
0
SOT2
AN38
S
0
0
0
0
0
0
PPG2_TOUT0
SCK2
AN39
S
146
0
0
0
0
0
0
0
AN40
S
147
17
0
0
0
0
0
0
EINT4
S
148
16
B
0
0
0
0
0
0
EINT9
149
15
B
TxDOUT3-
0
0
0
0
0
0
EINT10
14
-
TxDOUT3+
0
0
0
0
0
0
EINT11
-
VSS_LVDS_Tx
0
0
0
0
0
0
0
EINT12
VCC3_LVDS_Tx
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
SEG0
0
0
0
0
0
0
0
0
0
COM3
SIN4
AN48
S
161
0
0
0
0
0
0
0
0
0
COM2
AN49
S
158
162
○
2
COM1
S
159
5
1
COM0
160
4
-
-
0
3
A
-
P5_20
A
C_R
AVSS
VSS
P4_25
DAC_R
0
0
0
0
P4_26
0
0
0
0
P4_27
0
0
0
0
0
0
P4_28
0
0
0
0
0 0
0
0
0
0
0
0
0 0
0
0
0
0
0
0 0
0
0
0
0
0
0 0
0
0
0
0
0 0
0
0
0
0
0
0
0 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
AVSS
0
0
0
0
PPG2_TOEINT4
0
0
0
0
0
0
4. Package and Pin Assignment
D a t a S h e e t ( P r e l i m i n a r y )
Figure 4-7: TEQFP-216
0 0
0 0
0 0
0 0
0 0
0 0
0 0
0 0
0 0
0 0
0 0
0 0
0 0
0 0
0 0
0 0
0 0
0 0
INDICATOR0_1 0
0 0
MFS8_CS2 0
MFS8_CS1 0
MFS8_CS3 0
MFS9_CS1 0
0
0
0
0
0
0
0 0
0 0
0 0
0 0
P5_07
P5_06
P5_05
0
0
0
0
P5_04
P5_03
P5_02
P5_01
P5_00
P4_31
P4_30
P4_29
0
0
0
P2_16
P2_17
P3_17
P3_16
P3_15
P3_14
P3_13
P3_12
P3_11
P3_10
P3_09
P3_08
P3_07
P2_19
0
0
SEG13
SEG14
SEG15
0
0
0
0
SEG16
SEG17
SEG18
SEG19
SEG20
SEG21
SEG22
SEG23
0
0
0
0
0
SEG24
SEG25
SEG26
SEG27
SEG28
SEG29
SEG30
SEG31
V0
V1
V2
V3
0
0
EINT7
EINT6
EINT5
0
0
0
0
EINT4
EINT3
EINT2
EINT1
EINT0
EINT15
EINT14
EINT13
0
0
0
EINT0
EINT1
EINT1
EINT0
EINT15
EINT14
EINT13
EINT12
EINT11
EINT10
EINT9
EINT8
EINT7
EINT3
0
0
PPG7_TOUT2
PPG7_TOUT0
PPG6_TOUT2
0
0
0
0
PPG6_TOUT0
PPG5_TOUT2
PPG5_TOUT0
PPG4_TOUT2
PPG4_TOUT0
PPG3_TOUT2
PPG3_TOUT0
PPG2_TOUT2
0
0
0
PPG0_TOUT0
PPG0_TOUT2
PPG4_TOUT2
PPG4_TOUT0
PPG3_TOUT2
PPG3_TOUT0
PPG2_TOUT2
PPG2_TOUT0
PPG1_TOUT2
PPG1_TOUT0
PPG0_TOUT2
PPG0_TOUT0
PPG11_TOUT2
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
FRT4/5/6/7_TEXT
0
0
0
0
0
0
PPG6/7/8/9/10/11_TIN
FRT0/1/2/3_TEXT
TIN48
0
0
ICU7_IN1
ICU7_IN0
ICU6_IN1
0
0
0
0
ICU6_IN0
ICU5_IN1
ICU5_IN0
ICU4_IN1
ICU4_IN0
ICU3_IN1
ICU3_IN0
ICU2_IN1
0
0
0
ICU0_IN0
ICU0_IN1
ICU4_IN1
ICU4_IN0
ICU3_IN1
ICU3_IN0
ICU2_IN1
ICU2_IN0
ICU1_IN1
ICU1_IN0
ICU0_IN1
ICU0_IN0
ICU11_IN1
ICU1_IN1
0
0
OCU8_OTD0
OCU7_OTD1
OCU7_OTD0
OCU6_OTD1
0
0
0
0
OCU6_OTD0
OCU5_OTD1
OCU5_OTD0
OCU4_OTD1
OCU4_OTD0
0
0
OCU0_OTD0
OCU0_OTD1
0
0
0
0
0
0
0
0
0
0
0
0
0
OCU0_OTD0 WOT
0
0
OCU2_OTD0 SGO0
0
0
OCU2_OTD1 SGA0
0
0
OCU3_OTD0 SGA1
OCU11_OTD1
0
OCU3_OTD1 SGO1
OCU0_OTD1
0
OCU4_OTD0 SGA2
OCU1_OTD0
0
OCU4_OTD1 SGO2
OCU1_OTD1
0
OCU3_OTD0 SGA3
0
0
OCU3_OTD1 SGO3
OCU2_OTD1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TIN34
TOT34
TIN33
TOT33
TIN32
TOT32
TIN19
TOT19
TIN18
TOT18
TOT17
0
0
0
SIN9
SCK9
SOT9
0
0
0
0
0
SIN8
SCK8
SOT8
0
0
0
0
0
0
0
0
0
0
SIN11
SCK11
SOT11
SIN10
SCK10
SOT10
0
0
SIN9
SCK9
SOT9
0
0
0
0
0
0
0
0
0
0
0
BN1(BL1)
BP1(BH1)
AN1(AL1)
AP1(AH1)
BN0(BL0)
BP0(BH0)
AN0(AL0)
AP0(AH0)
0
0
0
0
0
TX6
RX6
TX5
RX5
0
0
TX6
RX6
TX5
RX5
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
VCC53
VSS
VCC12
VCC12
DSP1_DATA0_8
DSP1_DATA1_8
DSP1_DATA0_9
DSP1_DATA1_9
0 DSP1_DATA1_11
0
DSP1_DATA1_7
0 DSP1_DATA0_11
0
DSP1_DATA0_7
0 DSP1_DATA1_10
0
DSP1_DATA1_6
0 DSP1_DATA0_10
0
DSP1_DATA0_6
VCC53
VSS
VCC5
X0A
X1A
AN25
AN24
AN23
AN22
AN21
AN20
AN19
AN18
AN17
AN16
AN15
0
VSS
VCC5
Y
Y
Y
Y
-
-
-
-
Y
Y
Y
Y
Y
Y
Y
Y
-
-
-
X
X
W
W
W
W
W
W
W
W
V
V
V
U
-
-
197
196
195
194
193
192
191
190
189
188
187
186
185
184
183
182
181
180
179
178
177
176
175
174
173
172
171
170
169
168
167
166
165
164
163
0
TOT19
RXD0
CAP0_DATA17
DSP0_DATA_D7+
DSP0_DATA0_7
D
50
113
O
JTAG_TDO
0
0
0
0
0
0
0
OCU5_OTD0
0
TIN19
RXD1
CAP0_DATA18
DSP0_DATA_D7-
DSP0_DATA1_7
D
51
112
N
JTAG_NTRST
0
0
0
0
0
0
0
0
0
0
0
0
0
P0_10
EINT11
PPG5_TOUT2
ICU5_IN1
OCU5_OTD1S0_ECLK
TOT32
RXD2
CAP0_DATA19
DSP0_DATA_D8+
DSP0_DATA0_8
D
52
111
M
X0
0
0
0
0
0
0
0
0
0
0
0
0
0
P0_11
EINT12
PPG6_TOUT0
ICU6_IN0
OCU6_OTD0 I2S0_SD
TIN32
RXD3
CAP0_DATA20
DSP0_DATA_D8-
DSP0_DATA1_8
D
53
110
M
X1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
VSS
-
54
109
-
VSS
0
0
0
0
0
0
0
0
0
ICU8_IN0
OCU4_OTD1
ICU5_IN0
0
0
ICU4_IN1
PPG5_TOUT0
TOT16
PPG8_TOUT0
PPG4_TOUT2
EINT10
0
EINT8
EINT9
P0_09
OCU1_OTD1
SEG12
P0_08
0
ICU1_IN1
P5_08
0
0
PPG1_TOUT2
0 0
0
0
EINT3
198
0
0
P0_02
Y
0
0
0
DSP1_DATA1_5
CAP0_DATA15
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
AIN8
0
0
0
0
0
0
OCU8_OTD1
0
0
0
0
0
0
ICU8_IN1
0
0
0
0
0
0
0
0
0
0
0
JTAG_TDI
0
PPG8_TOUT2
0
0
0
JTAG_TCK
N2
0
EINT9
0
0
JTAG_TMS
N2
114
0
SEG11
0
MODE
N2
115
49
0
P5_09
RSTX
P
116
48
D
0
0 0
Q
117
47
D
DSP0_DATA1_6
0
199
118
46
D
DSP0_DATA0_6
DSP0_DATA_D60
Y
45
D
DSP0_DATA1_5
DSP0_DATA_D6+
CAP0_DATA16
0
DSP1_DATA0_5
D
DSP0_DATA0_5
DSP0_DATA_D5-
CAP0_DATA15
TXD3
0
0
DSP0_DATA1_4
DSP0_DATA_D5+
CAP0_DATA14
TXD2
TIN18
0
0
DSP0_DATA_D4-
CAP0_DATA13
TXD1
TOT18
0
0
SOT10
CAP0_DATA12
TXD0
TIN17
0
OCU4_OTD0
TXEN
0
0
CRS
TOT17
SIN0
OCU3_OTD1
ICU4_IN0
TIN3
0
OCU9_OTD0 BIN8
TIN16
0
OCU3_OTD0
ICU3_IN1
PPG4_TOUT0
0
0
ICU9_IN0
0
OCU2_OTD1
ICU3_IN0
PPG3_TOUT2
EINT8
OCU1_OTD0
0
0
OCU2_OTD0
ICU2_IN1
PPG3_TOUT0
EINT7
P0_07
ICU1_IN0
0
PPG9_TOUT0
ICU2_IN0
PPG2_TOUT2
EINT6
P0_06
0
PPG1_TOUT0
0
EINT10
PPG2_TOUT0
EINT5
P0_05
0
0
EINT2
0
SEG10
EINT4
P0_04
0
0
0
P0_01
0
P5_10
P0_03
0
0
0
0
0
0
0
0
0
0
0
CAP0_DATA14
0
0
200
0
0
0
0
CAP0_DATA13
0
0
201
0
0
0
Y
0
0
0
Y
0
0
DSP1_DATA1_4
0
CAP0_DATA9
DSP1_DATA0_4
0
0
0
0
TOT3
0
0
0
0
0
OCU0_OTD1
0
VCC5
ICU0_IN1
SIN10
PPG0_TOUT2
SCK10
119
EINT1
0
44
P0_00
0
D
0
ZIN8
DSP0_DATA0_4
0
AIN9
DSP0_DATA_D4+
0
OCU9_OTD1
CAP0_DATA11
0
OCU10_OTD0
COL
0
ICU9_IN1
0
0
ICU10_IN0
0
DSP0_DATA_D2-
0
0
CAP0_DATA8
0
0
0
PPG9_TOUT2
0
TIN2
PPG10_TOUT0
0
0
EINT11
0
OCU0_OTD0
EINT12
0
ICU0_IN0
SEG9
VSS
PPG0_TOUT0
SEG8
-
EINT0
P5_11
120
P6_00
P5_12
43
0
0
0
0
VCC3
0
202
0
0
-
0
0
VCC53
0
0
0
0
DSP0_DATA0_2
0
P3_18
0
DSP0_DATA_D2+
0
EINT2
0
CAP0_DATA7
0
PPG5_TOUT0
0
0
0
ICU5_IN0
0
TOT2
0
OCU5_OTD0
0
SCK0
0
TOT35
0
OCU11_OTD1
0
SGA3
0
ICU11_IN1
0
0
C
PPG11_TOUT2
0
ADTRG
-
EINT15
0
H
121
P5_31
0
122
42
0
0
41
0
203
D
VSS
0
-
DSP0_DATA1_3
0
0
VSS
DSP0_DATA_D3-
0
0
0
P3_19
CAP0_DATA10
0
0
EINT3
D
0
PPG5_TOUT2
D
DSP0_DATA1_1
0
ICU5_IN1
DSP0_DATA0_1
DSP0_DATA_D1-
0
OCU5_OTD1
DSP0_DATA_D1+
CAP0_DATA6
0
TIN35
CAP0_DATA5
0
0
SGO3
0
TIN1
0
0
TOT1
SOT0
0
0
0
OCU11_OTD0
0
H
OCU10_OTD1
ICU11_IN0
0
123
ICU10_IN1
PPG11_TOUT0
0
40
PPG10_TOUT2
EINT14
0
D
EINT13
P5_30
204
DSP0_DATA0_3
P5_29
0
Y
DSP0_DATA_D3+
0
0
DSP1_DATA1_3
EINT4
0
0
0
PPG6_TOUT0
0
0
DSP0_CTRL0
ICU6_IN0
0
0
0
OCU6_OTD0
0
0
0
0
0
OCU10_OTD1 BIN9
0
35
ICU10_IN1
0
34
D
0
0
0
D
DSP0_DATA1_0
DSP0_CLK+
PPG10_TOUT2
H
DSP0_DATA0_0
DSP0_DATA_D0-
EINT13
124
33
DSP0_DATA_D0+
CAP0_DATA4
SEG7
39
D
CAP0_DATA3
0
P5_13
D
32
DSP0_CTRL2
0
TIN0
0
DSP0_DATA1_2
31
D
DSP0_CLK-
TOT0
0
205
0
C
DSP0_CLK
CAP0_DATA2
0
OCU10_OTD0
206
0
DSP0_CTRL1
CAP0_DATA1
0
OCU9_OTD1
ICU10_IN0
Y
0
CAP0_DATA0
MDIO
DSP0_DATA1_4
ICU9_IN1
PPG10_TOUT0
Y
0
MDC
0
0
PPG9_TOUT2
EINT12
DSP1_DATA0_3
0
DSP0_DATA0_4
0
OCU4_OTD0
EINT11
P5_28
DSP1_DATA1_2
0
0
OCU3_OTD1
EINT0
P5_27
0
0
0
OCU9_OTD1
EINT15
P0_19
0
0
DSP0_CTRL1
AVCC5
EINT3
P0_18
0
0
0
DSP0_CTRL2 DSP1_CTRL2
-
P5_21
0
0
0
0
SOT11
125
0
0
0
0
0
SCK11
38
0
0
0
0
0
0
0
D
0
0
0
0
0
0
0
0
0
DSP0_DATA1_11
0
0
0
0
DSP0_DATA0_11
ZIN9
0
0
DSP0_DATA1_10
OCU11_OTD0
0
0
30
OCU11_OTD1
0
0
-
ICU11_IN0
0
0
VCC3
ICU11_IN1
0
0
0
0
0
AVRH5
0
0
AVSS
-
0
PPG11_TOUT0
126
0
PPG11_TOUT2
127
37
0
EINT14
0
36
0
EINT15
0
0
0
SEG6
0
0
0
0
SEG5
0
0
0
0
0
P5_14
0
0
0
0
0
0
P5_15
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
207
0
0
0
0
VCC12
0
Y
0
0
0
VCC12
-
0
DSP1_DATA0_2
0
0
VSS
128
0
DSP1_CLK
0
DVSS
129
29
DSP0_CTRL3
DVCC
130
-
SIN11
131
VSS
0
132
0
0
P3_21
0
OCU0_OTD0
EINT5
0
ICU0_IN0
PPG6_TOUT2
0
0
ICU6_IN1
0
PPG0_TOUT0
OCU6_OTD1
0
EINT0
PWM1P0
0
SEG4
AP0(AH0)
0
P5_16
0
0
0
AN26
0
208
S
0
Y
133
0
DSP1_DATA1_1
P3_22
0
DSP0_CTRL4 DSP1_CTRL0
EINT6
0
0
PPG7_TOUT0
0
0
ICU7_IN0
0
0
OCU7_OTD0
27
28
OCU0_OTD1
PWM1M0
-
-
ICU0_IN1
AN0(AL0)
NC
VCC12
0
0
0
0
PPG0_TOUT2
AN27
0
0
EINT1
S
0
0
SEG3
134
0
0
P5_17
P3_23
0
0
0
P3_24
EINT7
0
0
209
EINT8
PPG7_TOUT2
0
0
210
PPG8_TOUT0
ICU7_IN1
0
0
Y
ICU8_IN0
OCU7_OTD1
0
0
Y
0
DSP1_DATA0_1
0
DSP1_DATA1_0
0
0
0
DSP0_CTRL5 DSP1_CTRL1
0
DSP0_CTRL6
0
SOT12
0
SCK12
0
0
0
0
0
0
0
0
0
OCU1_OTD0
0
OCU1_OTD1
0
ICU1_IN0
P4_04
0
ICU1_IN1
EINT4
0
0
PPG2_TOUT0
0
0
ICU2_IN0
0
PPG1_TOUT0
OCU2_OTD0
0
PPG1_TOUT2
PWM2M3
0
EINT2
0
0
EINT3
SIN2
0
SEG2
AN41
0
SEG1
S
0
P5_18
150
0
P5_19
13
0
0
0
0
NC
0
211
0
0
Y
0
0
DSP1_DATA0_0
0
0
0
0
0
DSP0_CTRL7
0
0
SIN12
0
0
0
0
0
0
0
0
OCU2_OTD0
0
0
ICU2_IN0
0
0
0
0
0
PPG2_TOUT0
DVSS
0
EINT4
-
0
0
SEG0
151
0
0
P5_20
12
0
0
0 0
0
0
212
NC
0
0
213
0
0
0
214
0
0
0
215
0
0
0
216
0
0
0
-
0
0
0
Y
0
0
0
Y
0
0
0
Y
0
0
0
Y
0
0
0
VCC53
0
0
DSP1_CLK
DVCC
0
DSP1_CTRL2
-
0
DSP1_CTRL1
152
0
DSP1_CTRL0
11
0
0
0
0
VCC12
0
0
0
0
0
P4_05
0
0
0
P4_06
EINT5
0
0
EINT6
PPG2_TOUT2
0
DSP0_CTRL8
PPG3_TOUT0
ICU2_IN1
0
DSP0_CTRL9
ICU3_IN0
OCU2_OTD1
0
DSP0_CTRL10
OCU3_OTD0
PWM1P4
0
DSP0_CTRL11
PWM1M4
0
0
0
0
0
0
0
SOT3
AN42
0
SIN11
AN43
S
DAC_L
SOT11
S
153
0
SCK11
154
10
0
0
9
0
0
-
VSS
0
0
AVSS
0
0
0
P4_07
0
0
0
EINT7
0
0
PPG3_TOUT2
0
0
ICU3_IN1
0
0
OCU3_OTD1
0
0
PWM2P4
0
OCU0_OTD1
0
0
OCU1_OTD0 SGA1
SCK3
0
OCU1_OTD1 SGO1
AN44
0
OCU2_OTD0
S
0
0
155
0
ICU0_IN1
8
-
ICU1_IN0
A
AVCC3_DAC
ICU1_IN1
P4_08
C_L
0
ICU2_IN0
EINT8
0
0
PPG4_TOUT0
0
0
ICU4_IN0
0
0
OCU4_OTD0
0
0
PWM2M4
0
0
0
0
0
SIN3
0
PPG0_TOUT2
AN45
0
PPG1_TOUT0
S
0
PPG1_TOUT2
156
0
PPG2_TOUT0
7
0
0
P4_09
A
0
EINT9
EINT9
0
EINT10
PPG4_TOUT2
0
EINT11
ICU4_IN1
0
EINT12
OCU4_OTD1
5
0
PWM1P5
4
VSS
COM3
0
3
A
AVSS
COM2
0
2
A
C_R
0
COM1
AN46
-
DAC_R
0
0
COM0
S
1
AVSS
0
0
0
0
157
-
0
0
0
0
P4_25
P4_10
6
0
0
0
0
0
P4_26
P4_11
EINT10
0
0
0
0
0
P4_27
P4_12
EINT11
PPG5_TOUT0
0
0
0
0
0
P4_28
0
EINT12
PPG5_TOUT2
ICU5_IN0
0
0
0
0
0
0 0
0
0
PPG6_TOUT0
ICU5_IN1
OCU5_OTD0
0
0
0
0
0
0 0
0
0
ICU6_IN0
OCU5_OTD1
PWM1M5
0
0
0
0
0
0 0
0
0
OCU6_OTD0
PWM2P5
0
0
0
0
0
0
0 0
0
0
PWM2M5
RX1
SOT4
0
0
0
0
0
0 0
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
-
D
D
D
D
D
D
C
-
-
E
-
-
E
E
E
E
E
-
E
-
-
E
E
E
E
E
-
-
F
F
F
-
-
-
G
H
I
J
J
I
I
I
I
I
J
J
I
I
I
I
I
L
-
VCC3
DSP0_DATA0_9
DSP0_DATA1_9
DSP0_DATA1_11 DSP0_DATA_D11-
VSS
M_SCLK0
VSS
VCC3
M_SDATA0_0
M_SDATA0_2
M_SDATA0_1
M_SSEL0
M_SDATA0_3
VSS
0
VSS
VCC3
M_SDATA1_0
M_SDATA1_2
M_SDATA1_1
M_SSEL1
M_SDATA1_3
VSS
VCC3
MLBDAT
MLBSIG
MLBCLK
VCC12
VSS
VCC5
PSC_1
0
AN0
AN1
AN2
AN3
AN4
AN5
AN6
AN7
AN8
AN9
AN10
AN11
AN12
AN13
AN14
NMIX
VCC5
DSP0_DATA_D9-
DSP0_CTRL2
0
0
0
0
0
G_SDATA1_0
G_SDATA1_2
G_SDATA1_1
G_SSEL1
G_SDATA1_3
0
G_SCLK0
0
0
G_SDATA0_0
G_SDATA0_2
G_SDATA0_1
G_SSEL0
G_SDATA0_3
0
0
DSP0_CTRL2
DSP0_CTRL3
DSP0_CTRL4
0
0
0
0
0
0
SOT0
SCK0
SIN0
0
SOT1
SCK1
SIN1
SOT16
SCK16
SIN16
SOT8
SCK8
SIN8
0
0
0
0
CAP0_DAT0
CAP0_DAT0
DSP0_DATA0_11 DSP0_DATA_D11+ CAP0_DAT0
VCC12
DSP0_DATA_D9+
DSP0_DATA1_10 DSP0_DATA_D10-
DSP0_CTRL0
0
CAP0_CLK0
CAP0_DAT0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
SOT17
SCK17
SIN17
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
CAP0_DAT0
0
0
CAP0_DAT0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TXER 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
RX0
TX0
RX1
TX1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
CRS 0
MFS16_SCL 0
0
0
MFS16_SDA 0
0
COL TOT35 I2S1_WS
MFS17_SCL 0
0
RXCLKTIN33 I2S0_SCK
MFS17_SDA 0
0
TXCLKTOT33 I2S0_WS
0
0
0
0
0
0
0
TIN0
TIN1
TIN2
TIN3
TOT0
TOT1
TOT2
TOT3
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
SGO0
SGA0
SGA1
SGO1
SGA2
SGO2
SGA3
SGO3
SGO0
SGA0
SGA1
SGO1
TOT16 SGO2
TIN17 0
0
0
TIN16 SGA2
0
0
TIN49 0
0
0
0
0
0
0
0
DSP0_DATA0_10 DSP0_DATA_D10+ CAP0_DATCAP0_DATA3 RXER TOT34 I2S1_ECLK 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
SOT1
SCK1
SIN1
0
0
0
0
0
AIN8
BIN8
ZIN8
0
0
AIN9
BIN9
ZIN9
0
0
0
0
0
0
0
0
0
0
OCU6_OTD1
OCU7_OTD0
OCU7_OTD1
OCU8_OTD0
OCU8_OTD1
OCU9_OTD0
OCU10_OTD0
0
0
OCU11_OTD0
0
0
OCU9_OTD0
OCU10_OTD0
OCU9_OTD1
OCU8_OTD1
OCU10_OTD1
0
OCU5_OTD1
0
0
OCU6_OTD0
OCU7_OTD0
OCU6_OTD1
OCU8_OTD0
OCU7_OTD1
0
0
0
0
OCU4_OTD1
0
0
0
0
OCU3_OTD0
OCU4_OTD0
OCU4_OTD1
OCU5_OTD0
OCU5_OTD1
OCU6_OTD0
OCU6_OTD1
OCU7_OTD0
OCU7_OTD1
OCU8_OTD0
OCU8_OTD1
OCU9_OTD0
OCU9_OTD1
OCU10_OTD0
OCU10_OTD1
OCU11_OTD0
0
0
0
ICU6_IN1
ICU7_IN0
ICU7_IN1
ICU8_IN0
ICU8_IN1
ICU9_IN0
ICU10_IN0
0
0
ICU11_IN0
0
0
ICU9_IN0
ICU10_IN0
ICU9_IN1
ICU8_IN1
ICU10_IN1
0
ICU5_IN1
0
0
ICU6_IN0
ICU7_IN0
ICU6_IN1
ICU8_IN0
ICU7_IN1
0
0
0
0
ICU4_IN1
0
0
0
0
ICU3_IN0
ICU4_IN0
ICU4_IN1
ICU5_IN0
ICU5_IN1
ICU6_IN0
ICU6_IN1
ICU7_IN0
ICU7_IN1
ICU8_IN0
ICU8_IN1
ICU9_IN0
ICU9_IN1
ICU10_IN0
ICU10_IN1
ICU11_IN0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
PPG0/1/2/3/4/5_TIN1
0
0
FRT8/9/10/11_TEXT
0
0
0
0
0
0
0
0
0
0
PPG6_TOUT2
PPG7_TOUT0
PPG7_TOUT2
PPG8_TOUT0
PPG8_TOUT2
PPG9_TOUT0
PPG10_TOUT0
0
0
PPG11_TOUT0
0
0
PPG9_TOUT0
PPG10_TOUT0
PPG9_TOUT2
PPG8_TOUT2
PPG10_TOUT2
0
PPG5_TOUT2
0
0
PPG6_TOUT0
PPG7_TOUT0
PPG6_TOUT2
PPG8_TOUT0
PPG7_TOUT2
0
0
0
0
PPG4_TOUT2
0
0
0
0
PPG3_TOUT0
PPG4_TOUT0
PPG4_TOUT2
PPG5_TOUT0
PPG5_TOUT2
PPG6_TOUT0
PPG6_TOUT2
PPG7_TOUT0
PPG7_TOUT2
PPG8_TOUT0
PPG8_TOUT2
PPG9_TOUT0
PPG9_TOUT2
PPG10_TOUT0
PPG10_TOUT2
PPG11_TOUT0
0
0
0
EINT13
EINT14
EINT15
EINT0
EINT1
EINT2
EINT4
0
0
EINT0
0
0
EINT12
EINT14
EINT13
EINT11
EINT15
0
EINT5
0
0
EINT6
EINT8
EINT7
EINT10
EINT9
0
0
EINT1
EINT2
EINT3
0
0
0
0
EINT6
EINT8
EINT9
EINT10
EINT11
EINT12
EINT13
EINT14
EINT15
EINT0
EINT1
EINT2
EINT3
EINT4
EINT5
EINT6
0
0
0
P0_12
P0_13
P0_14
P0_15
P0_16
P0_17
P5_22
0
0
P1_09
0
0
P1_05
P1_07
P1_06
P1_04
P1_08
0
P0_30
0
0
P0_31
P1_01
P1_00
P1_03
P1_02
0
0
P0_26
P0_27
P0_28
0
0
0
0
P2_22
P2_24
P2_25
P2_26
P2_27
P2_28
P2_29
P2_30
P2_31
P3_00
P3_01
P3_02
P3_03
P3_04
P3_05
P3_06
0
0
0
0
0
0
0
0
0
0
0
0
M_CK_0
0
0
M_DQ3_0
M_DQ2_0
M_DQ1_0
M_DQ0_0
M_CS#1_0
0
M_RWDS_0
0
0
M_CS#2_0
M_DQ4_0
M_DQ5_0
M_DQ6_0
M_DQ7_0
0
0
0
0
0
0
0
0
0
0
0
0
0
INDICATOR0_0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
G_CK_1
0
0
G_DQ3_1
G_DQ2_1
G_DQ1_1
G_DQ0_1
G_CS#1_1
0
0
G_CS#2_1
G_DQ4_1
G_DQ5_1
G_DQ6_1
G_DQ7_1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
DSP0_CTRL0
DSP0_CTRL1
0
0
0
0
0
0
0
0
0
0
0
G_RWDS_1 0
0
DSP0_CLK
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TRACE0
TRACE1
TRACE2
TRACE3
TRACE_CLK
TRACE_CTL
0
0
0
0
0
0
0
CAP0_DATCAP0_DATA3 RXDV TIN34 I2S1_SD
0
0
0
0
DSP0_CTRL2
57
TIN35 I2S1_SCK
56
0
55
CONFIDENTIAL
0
0
TX1
SCK4
AN47
0
0
0
0
0
S6J3200_DS708-00003-0v04-E, June 30, 2015
30
OCU8_OTD0
PWM2P0
0
0
ICU4_IN0
0
PWM2M0
BP0(BH0)
0
0
ICU3_IN1
0
BN0(BL0)
0
0
0
ICU9_IN1
0
0
SIN4
AN48
S
0
0
0
0
0
0
0
0
CAP0_DATA12
0
0
AN28
0
0
PPG4_TOUT0
0
0
AN49
S
158
0
0
0
0
0
0
0
CAP0_DATA11
0
AN29
S
0
0
PPG3_TOUT2
0
DVSS
S
159
0
0
0
0
0
P3_20
S
0
0
PPG9_TOUT2
DVCC
160
0
0
0
0
0
136
135
0
0
0
161
0
0
0
P3_28
P3_27
P3_26
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
NC
-
14
149
S
AN40
SCK2
0
PWM2P3
OCU1_OTD1
ICU1_IN1
PPG1_TOUT2
EINT3
P4_03
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
NC
-
15
148
S
AN39
SOT2
0
PWM1M3
OCU1_OTD0
ICU1_IN0
PPG1_TOUT0
EINT2
P4_02
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
NC
-
16
147
S
AN38
0
0
PWM1P3
OCU0_OTD1
ICU0_IN1
PPG0_TOUT2
EINT1
P4_01
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
NC
-
17
146
S
AN37
0
0
PWM2M2
OCU0_OTD0
ICU0_IN0
PPG0_TOUT0
EINT0
P4_00
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
NC
-
18
145
S
AN36
0
0
PWM2P2
OCU11_OTD1
ICU11_IN1
PPG11_TOUT2
EINT15
P3_31
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
NC
-
19
144
S
AN35
0
0
PWM1M2
OCU11_OTD0
ICU11_IN0
PPG11_TOUT0
EINT14
P3_30
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
NC
-
20
143
S
AN34
0
0
PWM1P2
OCU10_OTD1
ICU10_IN1
PPG10_TOUT2
EINT13
P3_29
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
NC
-
21
142
-
DVCC
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
NC
-
22
141
-
DVSS
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
NC
-
23
140
S
AN33
0
BN1(BL1)
PWM2M1
OCU10_OTD0
ICU10_IN0
PPG10_TOUT0
EINT12
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
NC
-
24
139
S
AN32
0
BP1(BH1)
PWM2P1
OCU9_OTD1
ICU9_IN1
PPG9_TOUT2
EINT11
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
NC
-
25
138
S
AN31
0
AN1(AL1)
PWM1M1
OCU9_OTD0
ICU9_IN0
PPG9_TOUT0
EINT10
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
NC
-
26
137
S
AN30
0
AP1(AH1)
PWM1P1
OCU8_OTD1
ICU8_IN1
PPG8_TOUT2
EINT9
P3_25
TOP VIEW
TEQFP-216
0
162
0
0
○
0
4. Package and Pin Assignment
D a t a S h e e t ( P r e l i m i n a r y )
0 0
0
0
0
0
PPG3_TOUT2
PPG3_TOUT0
PPG2_TOUT2
PPG2_TOUT0
PPG0_TOUT2
0
0
0
0
0
FRT4/5/6/7_TEXT
0
0
0
0
PPG0_TOUT0 PPG6/7/8/9/10/11_TIN
0
0
0
ICU0_IN0
ICU0_IN1
ICU4_IN1
ICU4_IN0
ICU3_IN1
ICU3_IN0
ICU2_IN1
ICU2_IN0
ICU0_IN1
ICU0_IN0
0
0
OCU0_OTD0
OCU0_OTD1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
SIN8
SCK8
SOT8
0
0
0
0
0
0
0
0
0
0
OCU3_OTD1 SGO1 TIN33 SOT11
OCU3_OTD0 SGA1 TOT33 SIN10
OCU2_OTD1 SGA0 TIN32 SCK10
OCU2_OTD0 SGO0 TOT32 SOT10
OCU0_OTD0 WOT TOT18
0
OCU4_OTD0 SGA2 TOT34 SCK11
0 TIN18
0
OCU4_OTD1 SGO2 TIN34 SIN11
OCU0_OTD1
0
OCU3_OTD0 SGA3
0
0
OCU3_OTD1 SGO3
OCU2_OTD1
0
0
SIN9
SCK9
SOT9
0
0
0
0
BN1(BL1)
BP1(BH1)
AN1(AL1)
AP1(AH1)
BN0(BL0)
BP0(BH0)
AN0(AL0)
AP0(AH0)
0
0
0
0
0
TX6
RX6
TX5
RX5
0
0
TX5
RX5
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
VSS
VCC12
VCC12
DSP1_DATA0_8
DSP1_DATA1_8
DSP1_DATA0_9
DSP1_DATA1_9
0 DSP1_DATA1_11
0
VCC53
0 DSP1_DATA0_11
0
DSP1_DATA1_7
0 DSP1_DATA1_10
0
DSP1_DATA0_7
0 DSP1_DATA0_10
0
DSP1_DATA1_6
VCC53
VSS
VCC5
X0A
X1A
AN25
AN24
AN23
AN22
AN21
AN20
AN17
AN16
AN15
Y
Y
Y
-
-
-
-
Y
Y
Y
Y
Y
Y
Y
Y
-
-
-
X
X
W
W
W
W
W
W
V
V
V
188
187
186
185
184
183
182
181
180
179
178
177
176
175
174
173
172
171
170
169
168
167
166
165
164
163
162
161
160
157
0 0
PPG4_TOUT0
V2 EINT7 PPG11_TOUT2
V3 EINT3
PPG4_TOUT2
0
ICU2_IN1
OCU4_OTD0
0
0
0
-
0 0 P2_19
V1 EINT8
PPG0_TOUT2
0
ICU3_IN0
OCU4_OTD1
0
0
0
VCC5
0 0 P3_07
PPG0_TOUT0
0
ICU3_IN1
OCU5_OTD0
0
0
0
0 0 P3_08
V0 EINT9
0
0
ICU4_IN0
OCU5_OTD1
0
0
0
0
MFS8_CS0 0 P3_12 SEG29 EINT12
0
0
ICU4_IN1
0
OCU6_OTD0
0
0
0
0
MFS9_CS0 0 P3_13 SEG28 EINT13
0
0
ICU5_IN0
0
0
0
0
0
MFS9_CS1 0 P3_14 SEG27 EINT14
PPG2_TOUT2
0
ICU5_IN1
0
SOT9
0
0
0
EINT0
MFS8_CS3 0 P3_15 SEG26 EINT15
0 0 P3_09
EINT1
PPG3_TOUT0
0
0
ICU6_IN0
0
SCK9
0
0
0
MFS8_CS1 0 P3_16 SEG25
EINT1
PPG3_TOUT2
0
0
0
0
0
0
MFS8_CS2 0 P3_17 SEG24
EINT0
PPG4_TOUT0
0
0
0
0
0
0
0
PPG4_TOUT2
0
0
0
0
0
0
0
0
PPG5_TOUT0
0
0
0
0
0
0 0 P2_17
0
0
PPG5_TOUT2
0
0
158
0
0
0
0
PPG6_TOUT0
0
0
-
0
0
0 0
0
0
0
OCU6_OTD1
VSS
0
0
0 0
EINT0
0 0 P4_29 SEG23 EINT13
0
EINT1
0 0 P4_30 SEG22 EINT14
0
EINT2
0 0 P4_31 SEG21 EINT15
0 0
EINT3
0
OCU7_OTD0
0
0
0
0 0 P5_00 SEG20
0 INDICATOR0_1 0 P2_16
0
0 0 P5_01 SEG19
0
EINT4
0
OCU7_OTD1
0
0
0
0 0 P5_02 SEG18
0
ICU6_IN1
0
0
0
0 0 P5_03 SEG17
0
ICU7_IN0
0
0
0
0
0 0 P5_04 SEG16
0
ICU7_IN1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
PPG6_TOUT2
189
0
0
0
0
PPG7_TOUT0
Y
190
0
0
0
0 0
0
PPG7_TOUT2
DSP1_DATA0_6
Y
159
0
0
0 0
EINT5
0
DSP1_DATA1_5
U
0
0
0 0
EINT6
0
0
0
0
0
0 0
EINT7
SIN9
0
0
0
0
0 0 P5_05 SEG15
0
0
0
0
0
0 0 P5_06 SEG14
0
0
0
0
0
0 0 P5_07 SEG13
OCU8_OTD0
AIN8
0
0
0
ICU8_IN0
OCU8_OTD1
0
0
0
0
ICU8_IN1
0
0
0
PPG8_TOUT0
0
ICU1_IN1
0
EINT8
PPG8_TOUT2
TIN48
0
0 0 P5_08 SEG12
EINT9
0
0
0
0 0 P5_09 SEG11
PPG9_TOUT0
0
ICU9_IN0
OCU9_OTD0 BIN8
0 SOT10
0
0
DSP1_DATA0_5
Y
Y
193
192
191
0 TOT17
0
0
MFS8_CS0 0 P5_10 SEG10 EINT10
Y
FRT0/1/2/3_TEXT ICU11_IN1 OCU11_OTD1
0
0 MFS10_SDA
DSP1_DATA1_4
0
0
0
0
0
0
0
0
0
0
TOT35
OCU5_OTD0
ICU5_IN0
PPG5_TOUT0
EINT2
P3_18
0
0
0
0
0
0
P0_00
EINT1
PPG0_TOUT2
ICU0_IN1
OCU0_OTD1
0
TOT3
0
CAP0_DATA9
DSP0_DATA_D3+
DSP0_DATA0_3
D
40
117
-
C
0
0
0
0
0
0
0
0
0
0
0
0
0
0
P0_01
EINT2
PPG1_TOUT0
ICU1_IN0
OCU1_OTD0
0
TIN3
TXEN
CAP0_DATA10
DSP0_DATA_D3-
DSP0_DATA1_3
D
41
116
-
VSS
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
VSS
-
42
115
-
VCC5
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
VCC3
-
43
114
Q
RSTX
0
0
0
0
0
0
0
0
CAP0_DATA11
G_CK_2
0
0
0
0
P0_04
EINT5
PPG2_TOUT2
ICU2_IN1
OCU2_OTD1
0
TOT17
TXD0
CAP0_DATA13
DSP0_DATA_D5+
DSP0_DATA0_5
D
44
113
P
MODE
0
0
0
0
0
0
0
0
CAP0_DATA12
G_DQ3_2
0
0
0
0
P0_05
EINT6
PPG3_TOUT0
ICU3_IN0
OCU3_OTD0
SIN0
TIN17
TXD1
CAP0_DATA14
DSP0_DATA_D5-
DSP0_DATA1_5
D
45
112
N2
JTAG_TMS
0
0
0
0
0
0
0
0
CAP0_DATA13
G_DQ2_2
0
0
0
0
P0_06
EINT7
PPG3_TOUT2
ICU3_IN1
OCU3_OTD1
0
TOT18
TXD2
CAP0_DATA15
DSP0_DATA_D6+
DSP0_DATA0_6
D
46
111
N2
JTAG_TCK
0
0
0
0
0
0
0
0
TOT1
DSP1_DATA0_4
0
0
0
SGA3
TIN0
0
0
0
0
0
0
0
0
0
0
0
0
0
ADTRG
0
0
0
0
0
0
AVCC5
H
0
0
0
0
AVRH5
-
118
D
0 SCK10
0
0
-
119
39
D
DSP0_DATA0_0
0 SIN10
0
0
120
38
D
DSP0_CTRL2
DSP0_DATA_D0+
ZIN8
0
AVSS
37
D
DSP0_DATA1_2
DSP0_CLK-
CAP0_DATA3
AIN9
0
-
D
DSP0_DATA0_2
DSP0_DATA_D2CAP0_DATA2
0
OCU9_OTD1
VCC12
121
DSP0_DATA1_1
DSP0_DATA_D2+
CAP0_DATA8
0
TOT0
ICU9_IN1
-
36
DSP0_DATA_D1-
CAP0_DATA7
0
DSP0_DATA1_4
0
0
122
D
CAP0_DATA6
0
TIN2
0
OCU9_OTD1
0 ICU10_IN0 OCU10_OTD0
35
DSP0_DATA0_1
0
TOT2
0
OCU4_OTD0
ICU9_IN1
PPG9_TOUT2
D
DSP0_DATA_D1+
TIN1
SCK0
OCU0_OTD0
ICU4_IN0
PPG9_TOUT2
SEG9 EINT11
DSP0_DATA1_0
CAP0_DATA5
SOT0
OCU11_OTD1
ICU0_IN0
PPG4_TOUT0
EINT11
SEG8 EINT12 PPG10_TOUT0
DSP0_DATA_D0-
0
OCU11_OTD0
ICU11_IN1
PPG0_TOUT0
EINT0
P5_27
MFS9_CS0 0 P5_11
CAP0_DATA4
OCU10_OTD1
ICU11_IN0
PPG11_TOUT2
EINT0
P0_19
0
MFS9_CS1 0 P5_12
OCU10_OTD0
ICU10_IN1
PPG11_TOUT0
EINT15
P6_00
0
0
0
0
0
PWM2M2
OCU0_OTD0
ICU0_IN0
PPG0_TOUT0
EINT0
P4_00
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TxDOUT2+
B
18
139
S
AN36
0
0
PWM2P2
OCU11_OTD1
ICU11_IN1
PPG11_TOUT2
EINT15
P3_31
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TxDOUT2-
B
19
138
S
AN35
0
0
PWM1M2
OCU11_OTD0
ICU11_IN0
PPG11_TOUT0
EINT14
P3_30
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TxCLK+
B
20
137
S
AN34
0
0
PWM1P2
OCU10_OTD1
ICU10_IN1
PPG10_TOUT2
EINT13
P3_29
0
0
0
0
0
OCU8_OTD0
EINT8
P3_24
0
0
0
0
0
0
0
0
0
0
DVSS
0
DVCC
136
135
22
0 MFS10_SCL
ICU10_IN0
PPG10_TOUT2
EINT14
P5_31
0
0
0
0
PPG10_TOUT0
EINT13
P5_30
0
0
0
0
194
EINT12
P5_29
0
0
0
0
0
-
P5_28
0
0
0
0
0
0
VCC53
0
0
0
0
0
DSP0_DATA1_11
0
0
0
0
0
0
32
0
0
0
0
0
D
0
AN37
21
0
0
0
0
DSP0_CLK
0
0
DSP0_CLK+
0
0
0
CAP0_DATA1
0
0
0
MDIO
0
0
0
0
0
0
0
0
0
0
0
OCU3_OTD1
0
0
0
ICU3_IN1
0
0
0
PPG3_TOUT2
0
0
VCC12
EINT15
0 0
VSS
P0_18
0
-
123
0
0
124
34
0
195
33
0
-
0
0
VSS
0
0
0
0
DSP0_DATA0_11
0
S
BN0(BLPWM2M0
27
0
140
0
-
0
0
31
VSS
0
0
30
C
VCC12
0
0
-
DSP0_CTRL1
0
17
AN29
VCC3_LVDS_Tx
0
B
S
0
0
TxDOUT3-
130
0
0
0
VCC3
0
0
0
0
0
CAP0_DATA0
0
0
0
DVSS
0
MDC
0
0
0
0 0
-
0
DSP0_DATA0_4
0
125
0
0
0
0
0
0
196
0
P3_25
0
Y
0
0
0
OCU9_OTD1
DSP1_DATA1_3
0
P3_21
0
28
29
0
ICU9_IN1
0
0
P3_22
EINT5
0
-
-
0
PPG9_TOUT2
DSP0_CTRL0
P3_23
EINT6
PPG6_TOUT2
0
0
0
0
EINT3
0
EINT7
PPG7_TOUT0
0
0
0
0
P5_21
0
0
EINT9
0
0 ICU10_IN1 OCU10_OTD1 BIN9
0
PPG8_TOUT2
0
SEG7 EINT13 PPG10_TOUT2
0
ICU8_IN1
0
0 0 P5_13
0
OCU8_OTD1
0
0
0
AP1(AH PWM1P1
0
0
0
0
0
197
0
AN30
26
198
0
S
-
Y
0
131
VSS_LVDS_Tx
Y
0
0
0
DSP1_DATA0_3
0
0
0
DSP1_DATA1_2
0
0
0
0
0
P3_26
0
DSP0_CTRL1
0
0
P3_28
0
DSP0_CTRL2 DSP1_CTRL2
0
P3_27
0
0 SOT11
P4_01
EINT10
0
0 SCK11
EINT1
EINT12
0
0
PPG0_TOUT2
EINT11
0
ZIN9
ICU0_IN1
PPG9_TOUT0
0
0 ICU11_IN0 OCU11_OTD0
OCU0_OTD1
PPG10_TOUT0
0
0 ICU11_IN1 OCU11_OTD1
PWM1P3
PPG9_TOUT2
0
SEG6 EINT14 PPG11_TOUT0
0
0
0
SEG5 EINT15 PPG11_TOUT2
0
ICU9_IN0
0
MFS8_CS3 0 P5_14
AN38
ICU9_IN1
0
MFS8_CS1 0 P5_15
S
ICU10_IN0
0
0
141
0
25
0
16
B
0
B
B
0
TxDOUT3+
OCU9_OTD0
23
24
B
199
0
TxCLK-
Y
0
OCU9_OTD1
B
B
TxDOUT0-
DSP1_DATA0_2
0
TxDOUT1+
DSP1_CLK
0
0
DSP0_CTRL3
0
0
0 SIN11
0
OCU10_OTD0
TxDOUT1-
TxDOUT0+
0
0
0
0
OCU0_OTD0
0
0
ICU0_IN0
0
AN1(AL PWM1M1
0
0
0
0
0
0
PPG0_TOUT0
0
0
EINT0
0
BN1(BLPWM2M1
0
0
0
SEG4
0
0
MFS8_CS2 0 P5_16
0
0
0
0
BP1(BHPWM2P1
0
0
0
0
0
0
0
0
0
0
200
0
0
0
0
0
0
Y
0
P4_02
0
0
0
0
DSP1_DATA1_1
P4_03
EINT2
AN33
0
0
0
DSP0_CTRL4 DSP1_CTRL0
EINT3
PPG1_TOUT0
AN31
0
0
0
0
PPG1_TOUT2
ICU1_IN0
AN32
0
0
0
0
ICU1_IN1
OCU1_OTD0
S
0
0
0
0
OCU1_OTD1
PWM1M3
S
0
0
0
OCU0_OTD1
PWM2P3
0
S
0
0
0
ICU0_IN1
0
0
0
PPG0_TOUT2
0
0
EINT1
0
0
SEG3
P4_04
0
0 0 P5_17
EINT4
0
0
PPG2_TOUT0
0
0
ICU2_IN0
0
201
OCU2_OTD0
0
202
PWM2M3
0
Y
0
0
Y
SIN2
0
DSP1_DATA0_1
AN41
0
DSP1_DATA1_0
S
0
0
144
0
DSP0_CTRL5 DSP1_CTRL1
13
0
DSP0_CTRL6
0
0 SOT12
AVCC3_LVDS_PLL
0
0 SCK12
0
0
0
0
0
0
0
0
OCU1_OTD0
0
0
0
OCU1_OTD1
0
0
ICU1_IN0
0
0
ICU1_IN1
0
0
0
0
0
0
0
0
PPG1_TOUT0
0
0
PPG1_TOUT2
0
0
EINT2
0
0
EINT3
0
0
SEG2
DVSS
0
SEG1
-
0
MFS12_SDA 0 P5_18
145
0
MFS12_SCL 0 P5_19
12
0
0
0
0
AVSS_LVDS_PLL
0
0
0
0
0
0
0
203
0
0
0
Y
0
0
0
DSP1_DATA0_0
0
0
0
0
0
0
0
DSP0_CTRL7
0
0
0
0 SIN12
0
0
0
0
0
0
0
OCU2_OTD0
0
0
0
ICU2_IN0
0
0
0
0
0
0
0
PPG2_TOUT0
DVCC
0
0
EINT4
-
0
0
SEG0
146
0
0
0 0 P5_20
11
0
0
0
0
0
0
VCC12
0
204
0
0
205
0
0
0
206
0
0
0
207
MFS0_CS0
P4_05
0
208
P4_06
EINT5
0
-
EINT6
PPG2_TOUT2
0
Y
PPG3_TOUT0
ICU2_IN1
0
Y
ICU3_IN0
OCU2_OTD1
0
Y
OCU3_OTD0
PWM1P4
0
Y
PWM1M4
0
0
VCC53
0
0
0
DSP1_CLK
SOT3
AN42
0
DSP1_CTRL2
AN43
S
0
DSP1_CTRL1
S
147
0
DSP1_CTRL0
148
10
0
0
9
0
0
-
VSS
DAC_L
0
AVSS
0
0
0
0
0
0
0
0
MFS2_CS0
0
DSP0_CTRL8
P4_07
0
DSP0_CTRL9
EINT7
0
0
0
PPG3_TOUT2
0
0
ICU3_IN1
0
0 SOT11
OCU3_OTD1
0
0 SCK11 DSP0_CTRL10
PWM2P4
0
0 SIN11 DSP0_CTRL11
0
0
0
SCK3
0
0
AN44
0
0
S
0
0
149
0
0
8
0
OCU0_OTD1
A
0
OCU1_OTD0 SGA1
0
C_L
-
OCU1_OTD1 SGO1
MFS2_CS1
-
AVCC3_DAC
OCU2_OTD0
P4_08
AVSS
0
0
EINT8
0
0
ICU0_IN1
PPG4_TOUT0
0
0
ICU1_IN0
ICU4_IN0
0
0
ICU1_IN1
OCU4_OTD0
0
0
ICU2_IN0
PPG7_TOUT2
ICU6_IN1
0
0
0
0
0
0
PWM2M4
0
0
0
ICU7_IN1
ICU7_IN0
OCU6_OTD1
0
0
0
0
0
0
0
0
0
134
0
0
0
0
SIN3
0
0
0
OCU7_OTD1
OCU7_OTD0
AP0(AH PWM1P0
0
0
0
0
0
0
AN45
0
0
0
BP0(BHPWM2P0
AN0(AL PWM1M0
0
DVCC
0
0
0
0
0
S
0
0
132
0
0
0
0
0
150
0
0
0
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
D
D
D
D
C
-
-
E
-
-
E
E
E
E
E
-
E
-
-
E
E
E
E
E
-
-
F
F
F
-
-
-
G
H
J
J
I
I
I
I
J
J
I
I
I
I
I
L
-
VCC3
DSP0_DATA0_9 DSP0_DATA_D9+ CAP0_DATA21 0
DSP0_DATA1_9 DSP0_DATA_D9-
DSP0_DATA1_11 DSP0_DATA_D11- CAP0_CLK
DSP0_CTRL0
VCC12
VSS
M_SCLK0
VSS
VCC3
M_SDATA0_0
M_SDATA0_2
M_SDATA0_1
M_SSEL0
M_SDATA0_3
VSS
0
VSS
VCC3
M_SDATA1_0
M_SDATA1_2
M_SDATA1_1
M_SSEL1
M_SDATA1_3
VSS
VCC3
MLBDAT
MLBSIG
MLBCLK
VCC12
VSS
VCC5
PSC_1
0
AN1
AN2
AN3
AN5
AN6
AN7
AN8
AN9
AN10
AN11
AN12
AN13
AN14
NMIX
VCC5
DSP0_CTRL2
0
0
0
0
0
G_SDATA1_0
G_SDATA1_2
G_SDATA1_1
G_SSEL1
G_SDATA1_3
0
G_SCLK0
0
0
G_SDATA0_0
G_SDATA0_2
G_SDATA0_1
G_SSEL0
G_SDATA0_3
0
0
DSP0_CTRL2
DSP0_CTRL3
DSP0_CTRL4
0
0
0
0
0
SOT0
SCK0
SIN0
SOT1
SCK1
SIN1
SOT16
SCK16
SIN16
SOT8
SCK8
SIN8
0
0
0
CAP0_DATA34 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
SOT17
SCK17
SIN17
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
CAP0_DATA25 0
0
0
CAP0_DATA24 0
0
0
0
0
0
0
0
0
MFS17_SDA
MFS17_SCL
0
0
0
0
MFS16_SDA
MFS16_SCL
0
0
0
0
0
0
0
RXCLK TIN33 I2S0_SCK
DSP0_DATA1_10 DSP0_DATA_D10- CAP0_DATA32 CAP0_DATA35 RXDV TIN34 I2S1_SD
DSP0_DATA0_11 DSP0_DATA_D11+ CAP0_DATA33 0
TXCLK TOT33 I2S0_WS
COL
0
TXER
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
CRS
0
0
0
0
0
0
0
0
0
0
0
0
0
0
RX0
TX0
RX1
TX1
0
0
TOT35 I2S1_WS
TIN35 I2S1_SCK
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TIN1
TIN2
TIN3
TOT0
TOT1
TOT2
TOT3
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
SGA0
SGA1
SGO1
SGO2
SGA3
SGO3
SGO0
SGA0
SGA1
SGO1
TOT16 SGO2
TIN17 0
0
0
TIN16 SGA2
0
0
TIN49 0
0
0
0
0
0
0
0
DSP0_DATA0_10 DSP0_DATA_D10+ CAP0_DATA23 CAP0_DATA32 RXER TOT34 I2S1_ECLK 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
OCU9_OTD0
OCU8_OTD1
OCU5_OTD1
0
0
OCU6_OTD0
OCU7_OTD0
OCU6_OTD1
OCU8_OTD0
OCU7_OTD1
0
0
0
0
0
0
OCU3_OTD0
OCU5_OTD1
OCU8_OTD0
OCU8_OTD1
OCU9_OTD0
OCU9_OTD1
ICU8_IN1
ICU9_IN0
0
0
0
0
ICU9_IN0
ICU9_IN1
ICU8_IN1
0
ICU5_IN1
0
0
ICU6_IN0
ICU7_IN0
ICU6_IN1
ICU8_IN0
ICU7_IN1
0
0
0
0
ICU4_IN1
0
0
0
0
ICU3_IN0
ICU4_IN1
ICU5_IN0
ICU5_IN1
ICU6_IN1
ICU7_IN0
ICU7_IN1
ICU8_IN0
ICU8_IN1
ICU9_IN0
ICU9_IN1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
PPG6_TOUT2
PPG7_TOUT0
PPG7_TOUT2
PPG8_TOUT0
PPG8_TOUT2
PPG9_TOUT0
0
0
0
PPG9_TOUT0
PPG8_TOUT2
PPG5_TOUT2
0
0
PPG6_TOUT0
PPG7_TOUT0
PPG6_TOUT2
PPG8_TOUT0
PPG7_TOUT2
0
0
0
0
PPG4_TOUT2
0
0
0
0
PPG3_TOUT0
PPG4_TOUT2
PPG5_TOUT0
PPG5_TOUT2
PPG6_TOUT2
PPG7_TOUT0
PPG8_TOUT0
PPG8_TOUT2
PPG9_TOUT0
PPG9_TOUT2
EINT1
EINT2
0
0
0
0
0
0
EINT6
EINT8
EINT7
0
0
EINT1
EINT2
EINT3
0
0
0
0
EINT6
EINT9
0
0
0
P0_30 M_RWDS_0
0
0
P1_00 M_DQ5_0
P1_02 M_DQ7_0
P0_28 0
0
0
0
0
0
P2_25 0
P3_00 0
P3_01 0
P3_02 0
P3_03 0
P3_04 0
P3_05 0
P3_06 0
0
0
P2_22 0
0
0
P0_27 0
0
0
P0_26 0
0
0
P1_01 M_DQ4_0
0
0
P0_31 M_CS#2_0
0
0
EINT15 P2_31 0
PPG11_TOUT0 EINT6
0
0
EINT14 P2_30 0
EINT3
P1_09 M_CK_0
0
0
EINT13 P2_29 0
EINT2
0
0
0
0
0
G_DQ4_2
G_DQ5_2
G_DQ6_2
G_DQ7_2
0
0
0
0
0
G_CK_1
0
0
G_DQ3_1
G_DQ2_1
G_DQ1_1
G_DQ0_1
0
0
G_DQ5_1
G_DQ6_1
G_DQ7_1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
DSP0_CTRL2
DSP0_CLK
DSP0_CTRL0
DSP0_CTRL1
0
0
0
0
0
0
0
0
0
0
0
G_CS#2_1 0
G_DQ4_1
0
G_RWDS_1 0
0
0
G_CS#1_1 0
EINT11 P2_27 INDICATOR0_0 0
EINT1
0
EINT10 P2_26 0
EINT0
P5_22 0
EINT10 P1_03 M_DQ6_0
EINT9
P0_17 0
EINT11 P1_04 M_DQ0_0
EINT5
P0_16 0
EINT13 P1_06 M_DQ1_0
0
P0_15 0
EINT12 P1_05 M_DQ3_0
PPG10_TOUT2 EINT5
0
EINT0
PPG10_TOUT0 EINT4
0
EINT15 P0_14 0
PPG10_TOUT2 EINT15 P1_08 M_CS#1_0
0
EINT14 P0_13 0
PPG10_TOUT0 EINT14 P1_07 M_DQ2_0
PPG9_TOUT2
EINT13 P0_12 0
PPG11_TOUT0 EINT0
0
0
PPG10_TOUT0 EINT4
FRT8/9/10/11_TEXT PPG7_TOUT2
OCU11_OTD0 ICU11_IN0 0
0
0
OCU10_OTD1 ICU10_IN1 0
0
ICU8_IN0
OCU10_OTD0 ICU10_IN0 0
0
ICU7_IN1
OCU10_OTD1 ICU10_IN1 0
0
ICU7_IN0
OCU10_OTD0 ICU10_IN0 0
OCU9_OTD1
ICU6_IN1
OCU11_OTD0 ICU11_IN0 0
ZIN9 OCU7_OTD1
0
0
0
OCU10_OTD0 ICU10_IN0 0
BIN9 OCU7_OTD0
0
OCU9_OTD0
AIN9 OCU6_OTD1
0
OCU8_OTD1
ZIN8 OCU5_OTD0
0
OCU8_OTD0
BIN8 OCU4_OTD1
0
OCU7_OTD1
SIN1 OCU4_OTD1
0
OCU7_OTD0
SCK1 0
0
OCU6_OTD1
SOT1 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TRACE0
TRACE1
TRACE2
TRACE3
TRACE_CLK
TRACE_CTL
0
0
0
0
CAP0_DATA22 0
0
0
0
60
D
0
59
D
0
58
-
0
57
0
56
0
55
0
54
0
53
CONFIDENTIAL
0
0
AN26
-
0
0
0
0
0
MFS4_SDA
0
7
0
0
0
0
CAP0_DATA14
G_DQ1_2
0
0
0
0
P0_07
EINT8
PPG4_TOUT0
ICU4_IN0
OCU4_OTD0
0
TIN18
TXD3
CAP0_DATA16
DSP0_DATA_D6-
DSP0_DATA1_6
D
47
110
N2
JTAG_TDI
0
0
0
0
0
0
0
CAP0_DATA15
G_DQ0_2
0
0
0
0
P0_08
EINT9
PPG4_TOUT2
ICU4_IN1
OCU4_OTD1
0
TOT19
RXD0
CAP0_DATA17
DSP0_DATA_D7+
DSP0_DATA0_7
D
48
109
O
JTAG_TDO
0
0
0
0
0
0
0
0
G_CS#1_2
0
0
0
0
P0_09
EINT10
PPG5_TOUT0
ICU5_IN0
OCU5_OTD0
0
TIN19
RXD1
CAP0_DATA18
DSP0_DATA_D7-
DSP0_DATA1_7
D
49
108
N
JTAG_NTRST
0
0
0
0
0
0
0
0
0
G_RWDS_2
0
0
0
0
P0_10
EINT11
PPG5_TOUT2
ICU5_IN1
OCU5_OTD1S0_ECLK
TOT32
RXD2
CAP0_DATA19
DSP0_DATA_D8+
DSP0_DATA0_8
D
50
107
M
X0
0
0
0
0
0
0
0
0
0
G_CS#2_2
0
0
0
0
P0_11
EINT12
PPG6_TOUT0
ICU6_IN0
OCU6_OTD0 I2S0_SD
TIN32
RXD3
CAP0_DATA20
DSP0_DATA_D8-
DSP0_DATA1_8
D
51
106
M
X1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
VSS
-
52
105
-
VSS
0
0
0
0
0
0
0
0
31
June 30, 2015, S6J3200_DS708-00003-0v04-E
AN28
AN27
S
126
0
0
0
0
MFS0_CS3
P4_09
A
0
0
133
0
0
0
0
0
PPG8_TOUT0
S
S
127
0
0
0
0
0
ICU8_IN0
129
128
0
0
DSP0_DATA1_10
0
P4_10
EINT9
0
0
TOP VIEW
TEQFP-208
0
0
0
EINT10
PPG4_TOUT2
0
0
0
0
SOT2
0
PPG5_TOUT0
ICU4_IN1
0
0
0
SCK2
AN39
0
ICU5_IN0
OCU4_OTD1
0
PPG0_TOUT2
AN40
S
0
OCU5_OTD0
PWM1P5
4
PPG1_TOUT0
S
142
0
PWM1M5
0
3
A
VSS
PPG1_TOUT2
143
15
0
0
0
2
A
C_R
PPG2_TOUT0
0
14
-
0
SOT4
AN46
-
DAC_R
0
0
0
-
VSS_LVDS_Tx
0
AN47
S
1
AVSS
0
0
0 0 P4_25 COM3 EINT9
VCC3_LVDS_Tx
0
0
MFS4_SCL
S
151
-
0
0
0
0 0 P4_26 COM2 EINT10
0
0
0
0
MFS0_CS1
152
6
0
0
0
0
0 0 P4_27 COM1 EINT11
0
0
0
MFS0_CS2
P4_11
5
0
0
0
0
0 0 P4_28 COM0 EINT12
0
0
0
P4_12
EINT11
0
0
0
0
0 0
0
0
0
0
EINT12
PPG5_TOUT2
0
0
0
0
0
0
0
0
0
0
PPG6_TOUT0
ICU5_IN1
0
0
0
0
0
0
0
0
0
0
ICU6_IN0
OCU5_OTD1
0
0
0
0
0
0
0
0
0
0
OCU6_OTD0
PWM2P5
0
0
0
0
0
0
0
0
0
0
PWM2M5
RX1
0
0
0
0
0
0
0
0
0
0
TX1
SCK4
0
0
0
0
0
0
0
0
0
0
SIN4
AN48
0
0
0
0
0
0
0
0
0
0
AN49
S
0
0
0
0
0
0
0
0
0
DVSS
S
153
0
0
0
0
0
0
0
0
DVCC
154
0
0
0
0
0
0
0
0
155
0
0
0
0
0
0
156
0
0
○
0
0
0
0
0
TEQPF-208 Pin Assignment
4.1.2
Figure 4-8: TEQFP-208 (S6J328CLxx)
4. Package and Pin Assignment
D a t a S h e e t ( P r e l i m i n a r y )
Figure 4-9: TEQFP-208 (S6J327CLxx)
0
ICU2_IN0
ICU0_IN1
ICU0_IN0
0
0
0
0
0
0
0
0
OCU3_OTD1 SGO1 TIN33 SOT11
OCU3_OTD0 SGA1 TOT33 SIN10
OCU2_OTD1 SGA0 TIN32 SCK10
OCU2_OTD0 SGO0 TOT32 SOT10
0 TIN18
0
OCU4_OTD0 SGA2 TOT34 SCK11
OCU0_OTD0 WOT TOT18
0
OCU4_OTD1 SGO2 TIN34 SIN11
OCU0_OTD1
0
0
SIN9
SCK9
SOT9
BP0(BH0)
AN0(AL0)
AP0(AH0)
0
0
0
0
0
TX6
RX6
TX5
RX5
0
0
TX5
RX5
0
0
0 DSP1_DATA0_11
0 DSP1_DATA1_11
0
0
0
0
0
0
0
0
0
0
0
0
DSP1_DATA1_9
0 DSP1_DATA1_10
0
DSP1_DATA0_9
0 DSP1_DATA0_10
0
DSP1_DATA1_8
VCC53
VSS
VCC5
X0A
X1A
AN25
AN24
AN23
AN22
AN21
AN20
AN17
AN16
AN15
-
Y
Y
Y
Y
Y
Y
Y
Y
-
-
-
X
X
W
W
W
W
W
W
V
V
V
183
182
181
180
179
178
177
176
175
174
173
172
171
170
169
168
167
166
165
164
163
162
161
160
157
0
0
0
ICU2_IN1
0
0
0
0
VCC12
DSP1_DATA0_8
184
-
0 0
0
0
ICU3_IN0
0
0
BN0(BL0)
0
185
VCC5
0 0
0
PPG0_TOUT0 PPG6/7/8/9/10/11_TIN
V2 EINT7 PPG11_TOUT2
V3 EINT3
PPG0_TOUT2
0
ICU4_IN0
FRT4/5/6/7_TEXT ICU3_IN1
OCU0_OTD1
0
0
0
AP1(AH1)
0
-
0
0 0 P2_19
V1 EINT8
PPG2_TOUT0
0
ICU4_IN1
0
OCU0_OTD0
0
0
0
AN1(AL1)
0
VCC12
-
0
0 0 P3_07
V0 EINT9
PPG2_TOUT2
0
ICU0_IN1
0
0
0
SOT8
0
BN1(BL1)
BP1(BH1)
VSS
0
0
0 0 P3_08
PPG3_TOUT0
0
0
ICU0_IN0
0
0
0
SIN8
SCK8
0
VCC53
0
0
0 0 P3_09
PPG3_TOUT2
0
0
OCU3_OTD0 SGA3
0
0
186
0
0
0
MFS8_CS0 0 P3_12 SEG29 EINT12
PPG4_TOUT0
0
0
0
OCU3_OTD1 SGO3
OCU2_OTD1
0
0
0
0
187
0
0
0
MFS9_CS0 0 P3_13 SEG28 EINT13
PPG4_TOUT2
0
ICU2_IN1
0
0
0
Y
0
0
0
MFS9_CS1 0 P3_14 SEG27 EINT14
PPG0_TOUT2
0
ICU3_IN0
OCU4_OTD0
0
0
0
Y
188
0
0
0
EINT0
MFS8_CS3 0 P3_15 SEG26 EINT15
0
PPG0_TOUT0
0
ICU3_IN1
OCU4_OTD1
0
0
DSP1_DATA1_7
189
0
0
0
MFS8_CS1 0 P3_16 SEG25
EINT1
0
0
ICU4_IN0
OCU5_OTD0
0
0
0
DSP1_DATA0_7
Y
190
0
0
0
MFS8_CS2 0 P3_17 SEG24
EINT1
0
0
ICU4_IN1
OCU5_OTD1
0
0
Y
158
0
0
0
0
EINT0
PPG2_TOUT2
0
ICU5_IN0
0
OCU6_OTD0
0
0
0
DSP1_DATA1_6
Y
-
0
0
0
PPG3_TOUT0
0
ICU5_IN1
0
0
DSP1_DATA0_6
VSS
0
0
0 0 P2_17
0
0
PPG3_TOUT2
0
0
ICU6_IN0
0
0
0
0
DSP1_DATA1_5
0
0
0
0
0
PPG4_TOUT0
0
0
0
0
0
0
0
0 0
0
0 INDICATOR0_1 0 P2_16
0
0 0
0
PPG4_TOUT2
0
0
0
SOT9
0
0
0
0
0
0 0 P4_29 SEG23 EINT13
PPG5_TOUT0
0
0
0
0
0
0
0
0 0 P4_30 SEG22 EINT14
0
EINT0
0 0 P4_31 SEG21 EINT15
0 0
EINT1
PPG5_TOUT2
0
0
0
SCK9
0
0
0
0
0 0 P5_00 SEG20
EINT2
0
PPG6_TOUT0
0
0
0
0
SIN9
0
0
0
0 0 P5_01 SEG19
EINT3
0
0
0
0
0
0
0
0 0 P5_02 SEG18
0
EINT4
0
OCU6_OTD1
0
0
0
0
0
0 0 P5_03 SEG17
0
0
OCU7_OTD0
0
0
0
0
0
0 0 P5_04 SEG16
0
ICU6_IN1
OCU7_OTD1
AIN8
0
0
0
0
0
0
ICU7_IN0
OCU8_OTD0
159
0
0
0 0
0
0
ICU7_IN1
OCU8_OTD1
U
0
0
0
0
0
ICU8_IN0
0
0
0
0
PPG6_TOUT2
0
ICU8_IN1
0
0
0
0 0
0
PPG7_TOUT0
0
0
0
0 0
EINT5
PPG7_TOUT2
0
0
0
0
0 0
EINT6
PPG8_TOUT0
0
0
0
0 0 P5_05 SEG15
EINT7
PPG8_TOUT2
0
0
0
0 0 P5_06 SEG14
EINT8
0
0
0
0 0 P5_07 SEG13
EINT9
ICU1_IN1
0
0
0 0 P5_08 SEG12
TIN48
0
0
0 0 P5_09 SEG11
0
0
0
0
0
DSP1_DATA0_5
Y
191
0 TOT17
0
0
0 SOT10
192
FRT0/1/2/3_TEXT ICU11_IN1 OCU11_OTD1
0
OCU9_OTD0 BIN8
Y
0
0
ICU9_IN0
DSP1_DATA1_4
0
0
193
PPG9_TOUT0
0
194
MFS8_CS0 0 P5_10 SEG10 EINT10
0 SCK10
-
Y
0 MFS10_SDA
ZIN8
VCC53
DSP1_DATA0_4
OCU9_OTD1
0
ICU9_IN1
0
0
0
PPG9_TOUT2
0
SEG9 EINT11
0
0 SIN10
MFS9_CS0 0 P5_11
0
AIN9
0 MFS10_SCL
0
0
0
SEG8 EINT12 PPG10_TOUT0
0 ICU10_IN0 OCU10_OTD0
0
0
0 0
MFS9_CS1 0 P5_12
0
0
0
0
0
0
33
0
D
195
DSP0_CTRL2
-
DSP0_CLK-
VSS
CAP0_DATA2
0
0
0
DSP0_DATA1_4
0
0
0
OCU4_OTD0
0
ICU4_IN0
0
PPG4_TOUT0
0
EINT0
0
P0_19
0
0
0
0
0
0
0
0
0 0
0
0
DSP0_DATA1_11
0
32
196
D
Y
DSP0_CLK
DSP1_DATA1_3
DSP0_CLK+
0
CAP0_DATA1
DSP0_CTRL0
MDIO
0
0
0
0
0 ICU10_IN1 OCU10_OTD1 BIN9
OCU3_OTD1
SEG7 EINT13 PPG10_TOUT2
ICU3_IN1
0 0 P5_13
PPG3_TOUT2
0
EINT15
0
P0_18
197
0
Y
0
0
DSP1_DATA0_3
0
0
0
0
0
DSP0_CTRL1
0
0
0 SOT11
0
DSP0_DATA0_11
ZIN9
0
31
0 ICU11_IN0 OCU11_OTD0
0
C
SEG6 EINT14 PPG11_TOUT0
0
DSP0_CTRL1
MFS8_CS3 0 P5_14
VSS
0
0
-
CAP0_DATA0
0
124
MDC
198
0
DSP0_DATA0_4
199
0
0
Y
0
OCU9_OTD1
Y
0
ICU9_IN1
DSP1_DATA1_2
0
PPG9_TOUT2
DSP1_DATA0_2
0
EINT3
DSP1_CLK
0
P5_21
DSP0_CTRL2 DSP1_CTRL2
0
0
DSP0_CTRL3
DVSS
0
0 SCK11
-
0
0 SIN11
125
0
0
0
0
0
0
DSP0_DATA1_10
OCU0_OTD0
0
29
30
ICU0_IN0
0
-
-
0 ICU11_IN1 OCU11_OTD1
0
VSS
VCC3
0
0
0
0
PPG0_TOUT0
0
0
0
EINT0
0
0
0
SEG5 EINT15 PPG11_TOUT2
DVCC
0
0
SEG4
-
0
0
MFS8_CS1 0 P5_15
0
0
126
0
0
MFS8_CS2 0 P5_16
P3_22
P3_21
0
0
0
EINT6
EINT5
0
0
0
PPG7_TOUT0
PPG6_TOUT2
0
0
0
ICU7_IN0
ICU6_IN1
0
0
0
OCU7_OTD0
OCU6_OTD1
0
0
200
AN0(AL PWM1M0
AP0(AH PWM1P0
0
0
Y
0
0
0
0
DSP1_DATA1_1
AN27
AN26
0
0
DSP0_CTRL4 DSP1_CTRL0
S
S
0
0
0
128
127
0
0
0
28
0
-
OCU0_OTD1
VCC12
ICU0_IN1
0
0
0
PPG0_TOUT2
0
EINT1
0
SEG3
0
0 0 P5_17
0
0
0
0
0
201
0
Y
0
DSP1_DATA0_1
0
DSP0_CTRL5 DSP1_CTRL1
0
0 SOT12
0
0
0
OCU1_OTD0
0
ICU1_IN0
0
0
27
PPG1_TOUT0
26
-
EINT2
-
VCC3_LVDS_Tx
SEG2
VSS_LVDS_Tx
0
MFS12_SDA 0 P5_18
0
0
0
0
0
0
0
0
202
0
0
Y
0
0
0
DSP1_DATA1_0
P3_23
0
0
0
EINT7
0
0
DSP0_CTRL6
PPG7_TOUT2
0
0
0 SCK12
ICU7_IN1
0
0
0
OCU7_OTD1
0
0
OCU1_OTD1
BP0(BHPWM2P0
0
0
ICU1_IN1
0
0
0
0
AN28
0
0
PPG1_TOUT2
S
0
0
EINT3
0
129
0
0
SEG1
0
P3_24
0
MFS12_SCL 0 P5_19
P3_25
EINT8
25
0
EINT9
PPG8_TOUT0
24
B
0
PPG8_TOUT2
ICU8_IN0
B
TxDOUT0-
203
ICU8_IN1
OCU8_OTD0
TxDOUT0+
204
OCU8_OTD1
BN0(BLPWM2M0
0
0
205
AP1(AH PWM1P1
0
0
0
206
0
AN29
0
0
207
AN30
S
0
0
208
S
130
0
0
-
0
0
131
0
0
Y
P3_27
P3_26
0
0
Y
EINT11
EINT10
0
0
Y
PPG9_TOUT2
PPG9_TOUT0
0
0
Y
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
D
D
D
D
D
C
-
-
E
-
-
E
E
E
E
E
-
E
-
-
E
E
E
E
E
-
-
F
F
F
-
-
-
G
H
J
J
I
I
I
I
J
J
I
I
I
I
I
L
-
VCC3
DSP0_DATA0_9 DSP0_DATA_D9+ CAP0_DATA21 0
DSP0_DATA1_9 DSP0_DATA_D9-
DSP0_DATA1_11 DSP0_DATA_D11- CAP0_CLK
DSP0_CTRL0
VCC12
VSS
M_SCLK0
VSS
VCC3
M_SDATA0_0
M_SDATA0_2
M_SDATA0_1
M_SSEL0
M_SDATA0_3
VSS
0
VSS
VCC3
M_SDATA1_0
M_SDATA1_2
M_SDATA1_1
M_SSEL1
M_SDATA1_3
VSS
VCC3
MLBDAT
MLBSIG
MLBCLK
VCC12
VSS
VCC5
PSC_1
0
AN1
AN2
AN3
AN5
AN6
AN7
AN8
AN9
AN10
AN11
AN12
AN13
AN14
NMIX
VCC5
DSP0_CTRL2
0
0
0
0
0
G_SDATA1_0
G_SDATA1_2
G_SDATA1_1
G_SSEL1
G_SDATA1_3
0
G_SCLK0
0
0
G_SDATA0_0
G_SDATA0_2
G_SDATA0_1
G_SSEL0
G_SDATA0_3
0
0
DSP0_CTRL2
DSP0_CTRL3
DSP0_CTRL4
0
0
0
0
0
SOT0
SCK0
SIN0
SOT1
SCK1
SIN1
SOT16
SCK16
SIN16
SOT8
SCK8
SIN8
0
0
0
CAP0_DATA34 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
SOT17
SCK17
SIN17
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
CAP0_DATA25 0
0
0
CAP0_DATA24 0
0
0
0
0
0
0
0
0
MFS17_SDA
MFS17_SCL
0
0
0
0
MFS16_SDA
MFS16_SCL
0
0
0
0
0
0
0
RXCLK TIN33 I2S0_SCK
DSP0_DATA1_10 DSP0_DATA_D10- CAP0_DATA32 CAP0_DATA35 RXDV TIN34 I2S1_SD
DSP0_DATA0_11 DSP0_DATA_D11+ CAP0_DATA33 0
TXCLK TOT33 I2S0_WS
COL
0
TXER
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
CRS
0
0
0
0
0
0
0
0
0
0
0
0
0
0
RX0
TX0
RX1
TX1
0
0
TOT35 I2S1_WS
TIN35 I2S1_SCK
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TIN1
TIN2
TIN3
TOT0
TOT1
TOT2
TOT3
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
SGA0
SGA1
SGO1
SGO2
SGA3
SGO3
SGO0
SGA0
SGA1
SGO1
TOT16 SGO2
TIN17 0
0
0
TIN16 SGA2
0
0
TIN49 0
0
0
0
0
0
0
0
DSP0_DATA0_10 DSP0_DATA_D10+ CAP0_DATA23 CAP0_DATA32 RXER TOT34 I2S1_ECLK 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
OCU9_OTD0
OCU8_OTD1
OCU5_OTD1
0
0
OCU6_OTD0
OCU7_OTD0
OCU6_OTD1
OCU8_OTD0
OCU7_OTD1
0
0
0
0
0
0
OCU3_OTD0
OCU5_OTD1
OCU8_OTD0
OCU8_OTD1
OCU9_OTD0
OCU9_OTD1
ICU8_IN1
ICU9_IN0
0
0
0
0
ICU9_IN0
ICU9_IN1
ICU8_IN1
0
ICU5_IN1
0
0
ICU6_IN0
ICU7_IN0
ICU6_IN1
ICU8_IN0
ICU7_IN1
0
0
0
0
ICU4_IN1
0
0
0
0
ICU3_IN0
ICU4_IN1
ICU5_IN0
ICU5_IN1
ICU6_IN1
ICU7_IN0
ICU7_IN1
ICU8_IN0
ICU8_IN1
ICU9_IN0
ICU9_IN1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
PPG6_TOUT2
PPG7_TOUT0
PPG7_TOUT2
PPG8_TOUT0
PPG8_TOUT2
PPG9_TOUT0
0
0
0
PPG9_TOUT0
PPG8_TOUT2
PPG5_TOUT2
0
0
PPG6_TOUT0
PPG7_TOUT0
PPG6_TOUT2
PPG8_TOUT0
PPG7_TOUT2
0
0
0
0
PPG4_TOUT2
0
0
0
0
PPG3_TOUT0
PPG4_TOUT2
PPG5_TOUT0
PPG5_TOUT2
PPG6_TOUT2
PPG7_TOUT0
PPG8_TOUT0
PPG8_TOUT2
PPG9_TOUT0
PPG9_TOUT2
EINT1
EINT2
0
0
0
0
0
0
EINT6
EINT8
EINT7
0
0
EINT1
EINT2
EINT3
0
0
0
0
EINT6
EINT9
0
0
0
P0_30 M_RWDS_0
0
0
P1_00 M_DQ5_0
P1_02 M_DQ7_0
P0_28 0
0
0
0
0
0
P2_25 0
P3_00 0
P3_01 0
P3_02 0
P3_03 0
P3_04 0
P3_05 0
P3_06 0
0
0
P2_22 0
0
0
P0_27 0
0
0
P0_26 0
0
0
P1_01 M_DQ4_0
0
0
P0_31 M_CS#2_0
0
0
EINT15 P2_31 0
PPG11_TOUT0 EINT6
0
0
EINT14 P2_30 0
EINT3
0
0
P1_09 M_CK_0
EINT13 P2_29 0
EINT2
0
0
0
0
0
G_DQ4_2
G_DQ5_2
G_DQ6_2
G_DQ7_2
0
0
0
0
0
G_CK_1
0
0
G_DQ3_1
G_DQ2_1
G_DQ1_1
G_DQ0_1
0
0
G_DQ5_1
G_DQ6_1
G_DQ7_1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
DSP0_CTRL2
DSP0_CLK
DSP0_CTRL0
DSP0_CTRL1
0
0
0
0
0
0
0
0
0
0
0
G_CS#2_1 0
G_DQ4_1
0
G_RWDS_1 0
0
0
G_CS#1_1 0
EINT11 P2_27 INDICATOR0_0 0
EINT1
0
EINT10 P2_26 0
EINT0
P5_22 0
EINT10 P1_03 M_DQ6_0
EINT9
P0_17 0
EINT11 P1_04 M_DQ0_0
EINT5
P0_16 0
EINT13 P1_06 M_DQ1_0
0
P0_15 0
EINT12 P1_05 M_DQ3_0
PPG10_TOUT2 EINT5
0
EINT0
PPG10_TOUT0 EINT4
0
EINT15 P0_14 0
PPG10_TOUT2 EINT15 P1_08 M_CS#1_0
0
EINT14 P0_13 0
PPG10_TOUT0 EINT14 P1_07 M_DQ2_0
PPG9_TOUT2
EINT13 P0_12 0
PPG11_TOUT0 EINT0
0
0
PPG10_TOUT0 EINT4
FRT8/9/10/11_TEXT PPG7_TOUT2
OCU11_OTD0 ICU11_IN0 0
0
0
OCU10_OTD1 ICU10_IN1 0
0
ICU8_IN0
OCU10_OTD0 ICU10_IN0 0
0
ICU7_IN1
OCU10_OTD1 ICU10_IN1 0
0
ICU7_IN0
OCU10_OTD0 ICU10_IN0 0
OCU9_OTD1
ICU6_IN1
OCU11_OTD0 ICU11_IN0 0
ZIN9 OCU7_OTD1
0
0
0
OCU10_OTD0 ICU10_IN0 0
BIN9 OCU7_OTD0
0
OCU9_OTD0
AIN9 OCU6_OTD1
0
OCU8_OTD1
ZIN8 OCU5_OTD0
0
OCU8_OTD0
BIN8 OCU4_OTD1
0
OCU7_OTD1
SIN1 OCU4_OTD1
0
OCU7_OTD0
SCK1 0
0
OCU6_OTD1
SOT1 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TRACE0
TRACE1
TRACE2
TRACE3
TRACE_CLK
TRACE_CTL
0
0
0
0
CAP0_DATA22 0
0
0
0
60
D
0
59
-
0
58
0
57
0
56
0
55
0
54
0
53
CONFIDENTIAL
ICU9_IN1
ICU9_IN0
0
0
S6J3200_DS708-00003-0v04-E, June 30, 2015
32
OCU9_OTD1
OCU9_OTD0
0
0
Y
Notes:
Any function at the following pins is not supported.
−
BP1(BHPWM2P1
AN1(AL PWM1M1
0
0
VCC53
0
0
0
P0_07
EINT8
PPG4_TOUT0
ICU4_IN0
OCU4_OTD0
0
TIN18
TXD3
CAP0_DATA16
DSP0_DATA_D6-
DSP0_DATA1_6
D
47
110
N2
JTAG_TDI
0
0
0
0
0
0
0
0
0
0
0
0
P0_08
EINT9
PPG4_TOUT2
ICU4_IN1
OCU4_OTD1
0
TOT19
RXD0
CAP0_DATA17
DSP0_DATA_D7+
DSP0_DATA0_7
D
48
109
O
JTAG_TDO
0
0
0
0
0
0
0
0
G_CS#1_2
0
0
0
0
P0_09
EINT10
PPG5_TOUT0
ICU5_IN0
OCU5_OTD0
0
TIN19
RXD1
CAP0_DATA18
DSP0_DATA_D7-
DSP0_DATA1_7
D
49
108
N
JTAG_NTRST
0
0
0
0
0
0
0
0
0
G_RWDS_2
0
0
0
0
P0_10
EINT11
PPG5_TOUT2
ICU5_IN1
OCU5_OTD1S0_ECLK
TOT32
RXD2
CAP0_DATA19
DSP0_DATA_D8+
DSP0_DATA0_8
D
50
107
M
X0
0
0
0
0
0
0
0
0
0
G_CS#2_2
0
0
0
0
P0_11
EINT12
PPG6_TOUT0
ICU6_IN0
OCU6_OTD0 I2S0_SD
TIN32
RXD3
CAP0_DATA20
DSP0_DATA_D8-
DSP0_DATA1_8
D
51
106
M
X1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
VSS
-
52
105
-
VSS
0
0
0
0
0
0
0
0
0
0
0
0
0
DSP1_CLK
0
G_DQ0_2
0
0
AN32
AN31
0
0
DSP1_CTRL2
G_DQ1_2
CAP0_DATA15
CAP0_DATA14
S
S
0
0
DSP1_CTRL1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
VCC3
-
43
114
Q
RSTX
0
0
0
0
0
0
0
0
G_CK_2
0
0
0
0
P0_04
EINT5
PPG2_TOUT2
ICU2_IN1
OCU2_OTD1
0
TOT17
TXD0
CAP0_DATA13
DSP0_DATA_D5+
DSP0_DATA0_5
D
44
113
P
MODE
0
0
0
0
0
0
0
0
G_DQ3_2
0
0
0
0
P0_05
EINT6
PPG3_TOUT0
ICU3_IN0
OCU3_OTD0
SIN0
TIN17
G_DQ2_2
0
0
0
0
P0_06
EINT7
PPG3_TOUT2
ICU3_IN1
OCU3_OTD1
0
TOT18
TXD1
CAP0_DATA14
DSP0_DATA_D5-
DSP0_DATA1_5
D
45
112
N2
JTAG_TMS
0
0
0
0
0
0
0
0
TXD2
CAP0_DATA15
DSP0_DATA_D6+
DSP0_DATA0_6
D
46
111
N2
JTAG_TCK
0
0
0
0
0
0
0
0
CAP0_DATA13
133
132
0
0
DSP1_CTRL0
0
CAP0_DATA11
CAP0_DATA12
0
23
PPG0_TOUT2
EINT1
P4_01
0
0
ICU0_IN0
PPG0_TOUT0
EINT0
OCU4_OTD1
ICU4_IN1
PPG4_TOUT2
EINT9
P4_09
0
0
PWM2M4
OCU4_OTD0
ICU4_IN0
PPG4_TOUT0
EINT8
P4_08
MFS2_CS1
0
C_L
A
0
0
0
0
-
10
147
S
0
0
ICU2_IN1
PPG2_TOUT2
0
0
0
0
0
0
0
0
0
0
VCC12
-
11
146
-
DVCC
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
AVSS_LVDS_PLL
-
12
145
-
DVSS
0
0
0
0
0
0
0
0
0
0
P4_00
0
OCU11_OTD1
SCK0
TOT2
0
CAP0_DATA7
DSP0_DATA_D2+
DSP0_DATA0_2
D
38
119
-
AVCC5
0
0
0
0
0
0
0
0
ICU0_IN0
OCU0_OTD0
0
TIN2
0
CAP0_DATA8
DSP0_DATA_D2-
DSP0_DATA1_2
D
39
118
H
ADTRG
0
SGA3
TOT35
OCU5_OTD0
ICU5_IN0
PPG5_TOUT0
EINT2
P3_18
Package Pin Number
Condition on PCB
12 to 27
Set to ground
0
0
0
0
0
0
0
0
0
0
0
0
0
0
VCC5
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
AVRH5
0
VCC12
-
VCC12
-
AVSS
121
120
0
P4_04
0
P3_30
EINT14
0
P3_31
EINT15
PPG11_TOUT2
ICU11_IN1
PPG11_TOUT0
ICU11_IN0
OCU11_OTD0
PWM1M2
OCU11_OTD1
PWM2P2
0
0
0
0
AN35
S
AN36
S
P4_02
MFS2_CS0
0
MFS0_CS0
P4_06
0
P4_03
EINT3
PPG1_TOUT2
EINT2
PPG1_TOUT0
P4_05
EINT5
P4_07
EINT7
PPG3_TOUT2
EINT6
PPG3_TOUT0
EINT4
PPG2_TOUT0
ICU2_IN0
OCU2_OTD0
ICU1_IN1
OCU1_OTD1
PWM2P3
0
0
VSS
-
117
0
P3_28
B
DSP1_DATA0_0
ICU0_IN1
OCU0_OTD0
PWM2M3
0
PWM1M3
0
0
C
115
0
0
EINT12
TxDOUT1-
0
OCU0_OTD1
PWM2M2
0
SCK2
0
116
42
0
0
PPG10_TOUT0
0
0
PWM1P3
0
SIN2
AN41
SOT2
AN39
0
40
41
DSP0_DATA1_3
0
0
0
0
ICU10_IN0
0
0
0
0
AN40
S
0
D
VSS
D
DSP0_DATA0_3
DSP0_DATA_D3CAP0_DATA9
CAP0_DATA10
DSP0_DATA_D3+
0
TXEN
0
0
0
0
0
TIN3
0
0
0
TOT3
OCU0_OTD1
ICU0_IN1
OCU1_OTD0
0
0
0
ICU1_IN0
EINT2
0
0
0
0
PPG0_TOUT2
EINT1
P0_01
PPG1_TOUT0
P0_00
0
0
0
0
0
0
OCU10_OTD0
0
123
34
BN1(BLPWM2M1
0
0
ICU11_IN1
PPG0_TOUT0
37
0
0
122
35
D
AN33
0
0
DSP0_DATA_D1-
PPG11_TOUT2
EINT0
D
36
D
DSP0_DATA0_1
S
0
0
CAP0_DATA6
EINT15
DSP0_DATA1_1
D
DSP0_DATA0_0
DSP0_DATA_D0+
DSP0_DATA1_0
DSP0_DATA_D0CAP0_DATA4
DSP0_DATA_D1+
CAP0_DATA5
0
134
0
0
TIN1
P5_31
P6_00
0
CAP0_DATA3
0
TOT0
0
TIN0
0
TOT1
0
OCU10_OTD1
0
OCU9_OTD1
ICU9_IN1
OCU10_OTD0
ICU10_IN0
PPG10_TOUT0
ICU10_IN1
PPG10_TOUT2
EINT13
PPG9_TOUT2
EINT11
P5_27
EINT12
P5_28
0
0
0
0
DSP0_CTRL7
PWM1P5
0
ICU3_IN1
P3_29
0
DSP0_CTRL8
SOT0
0
0
0
P5_29
0
0
0
0
0
DSP0_CTRL9
0
SIN3
OCU3_OTD1
ICU3_IN0
OCU3_OTD0
EINT13
0
0
0
OCU11_OTD0
0
0
0
0
0
0
0
0
0
0 SIN12
0
0
0
OCU2_OTD1
PPG10_TOUT2
0
0
ICU11_IN0
0
0
0
0
0
0
0
0
0
0
0
0 SOT11
0
AN45
PWM2P4
ICU10_IN1
0
0 SCK11 DSP0_CTRL10
PPG11_TOUT0
0
0
0
0
0
22
0 SIN11 DSP0_CTRL11
0
0
0
PWM1P4
OCU10_OTD1
21
B
0
EINT14
0
0
0
0
0
0
0
0
0
0
0
0
B
TxDOUT1+
0
AN46
S
0
PWM1M4
0
PWM1P2
TxCLK-
0
0
S
150
SCK3
0
P5_30
0
0
0
0
0
0
0
0
151
7
AN44
SOT3
AN43
0
0
0
TOP VIEW
TEQFP-208
0
0
0
0
0
0
0
0
AN42
0
0
0
0
6
A
S
0
0
0
0
139
18
0
0
0
138
19
B
TxDOUT2-
B
TxDOUT2+
0
0
0
0
0
AN34
0
0
0
0
0
0
DVSS
B
0
0
0
0
0
0
0
DVCC
TxCLK+
0
0
0
0
0
0
S
0
0
0
0
0
0
0
0
0
-
0
0
0
0
0
0
-
0
0
0
0
0
0
137
0
0
0
0
0
0
OCU2_OTD0
0
AN37
S
144
S
142
15
136
0
0
0
0
0
0
0
OCU0_OTD1
AN38
S
143
14
135
0
0
0
0
0
0
20
0
0
0
OCU1_OTD0 SGA1
S
140
13
-
OCU1_OTD1 SGO1
141
17
-
OCU2_OTD0
16
B
-
0
B
TxDOUT30
ICU2_IN0
TxDOUT3+
0
ICU0_IN1
0
0
0
0
ICU1_IN0
0
0
0
0
0
0
ICU1_IN1
0
0
0
0
ICU2_IN0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
ICU1_IN0
0
0
0
0
0
0
PPG2_TOUT0
OCU1_OTD0
0
0
0
0
PPG0_TOUT2
VSS_LVDS_Tx
0
0
0
0
0
0
PPG1_TOUT0
VCC3_LVDS_Tx
0
0
0
0
PPG1_TOUT2
-
DAC_L
149
0
AVCC3_LVDS_PLL
0
0
0
PPG2_TOUT0
AVCC3_DAC
8
S
148
9
0
0
0
0
0
0
0
0
0
0
0
0
0
VSS
AVSS
EINT4
0
0
0
0
SEG0
0
0
0
0
0
0 0 P5_20
0
0
0
0
0
0 0 P4_25 COM3 EINT9
0
0
0
0
0 0 P4_26 COM2 EINT10
0
0
0
0 0 P4_27 COM1 EINT11
0
0
0
0
0
0 0 P4_28 COM0 EINT12
0
0
0
0 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
EINT12
PPG6_TOUT0
ICU6_IN0
0
0
0
0
0
0
OCU6_OTD0
PWM2M5
TX1
0
0
0
0
0
DVSS
SIN4
AN49
S
154
3
155
○
2
-
0
0
0
0
0
0
0
P4_10
0
0
0
0
0
0
P4_11
EINT10
0
0
0
0
0
0
0
0
EINT11
PPG5_TOUT0
0
0
0
0
0
0
PPG5_TOUT2
ICU5_IN0
0
0
0
0
0
0
0
0
0
ICU5_IN1
OCU5_OTD0
0
0
0
0
0
0
OCU5_OTD1
PWM1M5
0
0
0
0
0
0
PWM2P5
0
0
0
0
0
0
0
0
0
0
RX1
SOT4
0
0
0
0
0
0
SCK4
AN47
0
0
DVCC
0
AN48
S
0
0
-
MFS4_SCL
S
152
0
0
1
MFS4_SDA
153
5
0
0
-
MFS0_CS2
4
-
MFS0_CS1
A
0
0
VSS
0
MFS0_CS3
A
C_R
AVSS
0
0
156
0
AVSS
DAC_R
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
P4_12
0
0
0
0
4. Package and Pin Assignment
D a t a S h e e t ( P r e l i m i n a r y )
Figure 4-10: TEQFP-208 (S6J326CLxx)
0
ICU2_IN0
ICU0_IN1
ICU0_IN0
0
0
0
0
0
0
0
0
OCU3_OTD1 SGO1 TIN33 SOT11
OCU3_OTD0 SGA1 TOT33 SIN10
OCU2_OTD1 SGA0 TIN32 SCK10
OCU2_OTD0 SGO0 TOT32 SOT10
0 TIN18
0
OCU4_OTD0 SGA2 TOT34 SCK11
OCU0_OTD0 WOT TOT18
0
OCU4_OTD1 SGO2 TIN34 SIN11
OCU0_OTD1
0
0
SIN9
SCK9
SOT9
BP0(BH0)
AN0(AL0)
AP0(AH0)
0
0
0
0
0
TX6
RX6
TX5
RX5
0
0
TX5
RX5
0
0
0 DSP1_DATA0_11
0 DSP1_DATA1_11
0
0
0
0
0
0
0
0
0
0
0
0
DSP1_DATA1_9
0 DSP1_DATA1_10
0
DSP1_DATA0_9
0 DSP1_DATA0_10
0
DSP1_DATA1_8
VCC53
VSS
VCC5
X0A
X1A
AN25
AN24
AN23
AN22
AN21
AN20
AN17
AN16
AN15
-
Y
Y
Y
Y
Y
Y
Y
Y
-
-
-
X
X
W
W
W
W
W
W
V
V
V
183
182
181
180
179
178
177
176
175
174
173
172
171
170
169
168
167
166
165
164
163
162
161
160
157
0
0
0
ICU2_IN1
0
0
0
0
VCC12
DSP1_DATA0_8
184
-
0 0
0
0
ICU3_IN0
0
0
BN0(BL0)
0
185
VCC5
0 0
0
PPG0_TOUT0 PPG6/7/8/9/10/11_TIN
V2 EINT7 PPG11_TOUT2
V3 EINT3
PPG0_TOUT2
0
ICU4_IN0
FRT4/5/6/7_TEXT ICU3_IN1
OCU0_OTD1
0
0
0
AP1(AH1)
0
-
0
0 0 P2_19
V1 EINT8
PPG2_TOUT0
0
ICU4_IN1
0
OCU0_OTD0
0
0
0
AN1(AL1)
0
VCC12
-
0
0 0 P3_07
V0 EINT9
PPG2_TOUT2
0
ICU0_IN1
0
0
0
SOT8
0
BN1(BL1)
BP1(BH1)
VSS
0
0
0 0 P3_08
PPG3_TOUT0
0
0
ICU0_IN0
0
0
0
SIN8
SCK8
0
VCC53
0
0
0 0 P3_09
PPG3_TOUT2
0
0
OCU3_OTD0 SGA3
0
0
186
0
0
0
MFS8_CS0 0 P3_12 SEG29 EINT12
PPG4_TOUT0
0
0
0
OCU3_OTD1 SGO3
OCU2_OTD1
0
0
0
0
187
0
0
0
MFS9_CS0 0 P3_13 SEG28 EINT13
PPG4_TOUT2
0
ICU2_IN1
0
0
0
Y
0
0
0
MFS9_CS1 0 P3_14 SEG27 EINT14
PPG0_TOUT2
0
ICU3_IN0
OCU4_OTD0
0
0
0
Y
188
0
0
0
EINT0
MFS8_CS3 0 P3_15 SEG26 EINT15
0
PPG0_TOUT0
0
ICU3_IN1
OCU4_OTD1
0
0
DSP1_DATA1_7
189
0
0
0
MFS8_CS1 0 P3_16 SEG25
EINT1
0
0
ICU4_IN0
OCU5_OTD0
0
0
0
DSP1_DATA0_7
Y
190
0
0
0
MFS8_CS2 0 P3_17 SEG24
EINT1
0
0
ICU4_IN1
OCU5_OTD1
0
0
Y
158
0
0
0
0
EINT0
PPG2_TOUT2
0
ICU5_IN0
0
OCU6_OTD0
0
0
0
DSP1_DATA1_6
Y
-
0
0
0
PPG3_TOUT0
0
ICU5_IN1
0
0
DSP1_DATA0_6
VSS
0
0
0 0 P2_17
0
0
PPG3_TOUT2
0
0
ICU6_IN0
0
0
0
0
DSP1_DATA1_5
0
0
0
0
0
PPG4_TOUT0
0
0
0
0
0
0
0
0 0
0
0 INDICATOR0_1 0 P2_16
0
0 0
0
PPG4_TOUT2
0
0
0
SOT9
0
0
0
0
0
0 0 P4_29 SEG23 EINT13
PPG5_TOUT0
0
0
0
0
0
0
0
0 0 P4_30 SEG22 EINT14
0
EINT0
0 0 P4_31 SEG21 EINT15
0 0
EINT1
PPG5_TOUT2
0
0
0
SCK9
0
0
0
0
0 0 P5_00 SEG20
EINT2
0
PPG6_TOUT0
0
0
0
0
SIN9
0
0
0
0 0 P5_01 SEG19
EINT3
0
0
0
0
0
0
0
0 0 P5_02 SEG18
0
EINT4
0
OCU6_OTD1
0
0
0
0
0
0 0 P5_03 SEG17
0
0
OCU7_OTD0
0
0
0
0
0
0 0 P5_04 SEG16
0
ICU6_IN1
OCU7_OTD1
AIN8
0
0
0
0
0
0
ICU7_IN0
OCU8_OTD0
159
0
0
0 0
0
0
ICU7_IN1
OCU8_OTD1
U
0
0
0
0
0
ICU8_IN0
0
0
0
0
PPG6_TOUT2
0
ICU8_IN1
0
0
0
0 0
0
PPG7_TOUT0
0
0
0
0 0
EINT5
PPG7_TOUT2
0
0
0
0
0 0
EINT6
PPG8_TOUT0
0
0
0
0 0 P5_05 SEG15
EINT7
PPG8_TOUT2
0
0
0
0 0 P5_06 SEG14
EINT8
0
0
0
0 0 P5_07 SEG13
EINT9
ICU1_IN1
0
0
0 0 P5_08 SEG12
TIN48
0
0
0 0 P5_09 SEG11
0
0
0
ICU9_IN0
OCU9_OTD1
ZIN8
OCU9_OTD0 BIN8
0 SCK10
0 SOT10
0
0
0
0
0
0
0
0
VSS
VCC53
DSP1_DATA0_4
DSP1_DATA1_4
DSP1_DATA0_5
-
-
Y
Y
Y
195
194
193
192
191
0 TOT17
0
0
0
ICU9_IN1
0
FRT0/1/2/3_TEXT ICU11_IN1 OCU11_OTD1
0
PPG9_TOUT0
0
0 SIN10
0
0
0
MFS8_CS0 0 P5_10 SEG10 EINT10
PPG9_TOUT2
0
0 MFS10_SDA
SEG9 EINT11
AIN9
0
MFS9_CS0 0 P5_11
0 ICU10_IN0 OCU10_OTD0
0
0 MFS10_SCL
SEG8 EINT12 PPG10_TOUT0
0
MFS9_CS1 0 P5_12
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0 0
0
0 0
196
0
Y
0
DSP1_DATA1_3
0
0
0
DSP0_CTRL0
SEG7 EINT13 PPG10_TOUT2
0
0 0 P5_13
0
0
0 ICU10_IN1 OCU10_OTD1 BIN9
0
197
ZIN9
Y
0 ICU11_IN0 OCU11_OTD0
DSP1_DATA0_3
SEG6 EINT14 PPG11_TOUT0
0
MFS8_CS3 0 P5_14
DSP0_CTRL1
0
0 SOT11
0
0
198
0
199
OCU0_OTD0
Y
ICU0_IN0
0 ICU11_IN1 OCU11_OTD1
Y
0
DSP1_DATA1_2
PPG0_TOUT0
DSP1_DATA0_2
EINT0
SEG5 EINT15 PPG11_TOUT2
DSP1_CLK
SEG4
DSP0_CTRL2 DSP1_CTRL2
MFS8_CS1 0 P5_15
DSP0_CTRL3
MFS8_CS2 0 P5_16
0 SCK11
0
0 SIN11
0
32
0
D
0
DSP0_CLK
200
DSP0_CLK+
Y
CAP0_DATA1
DSP1_DATA1_1
MDIO
DSP0_CTRL4 DSP1_CTRL0
0
0
0
0
OCU3_OTD1
0
ICU3_IN1
OCU0_OTD1
PPG3_TOUT2
ICU0_IN1
EINT15
0
P0_18
PPG0_TOUT2
0
EINT1
0
SEG3
0
0 0 P5_17
0
0
0
0
DSP0_DATA0_11
201
31
Y
C
DSP1_DATA0_1
DSP0_CTRL1
DSP0_CTRL5 DSP1_CTRL1
0
0 SOT12
CAP0_DATA0
0
MDC
OCU1_OTD0
0
DSP0_DATA0_4
ICU1_IN0
0
0
0
0
OCU9_OTD1
PPG1_TOUT0
0
ICU9_IN1
EINT2
0
PPG9_TOUT2
SEG2
0
EINT3
MFS12_SDA 0 P5_18
0
P5_21
0
0
0
0
DVSS
0
202
-
0
Y
125
0
DSP1_DATA1_0
0
0
0
0
DSP0_DATA1_10
DSP0_CTRL6
0
29
30
0 SCK12
0
-
-
0
0
VSS
VCC3
OCU1_OTD1
0
0
0
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
D
D
D
D
D
C
-
-
E
-
-
E
E
E
E
E
-
E
-
-
E
E
E
E
E
-
-
F
F
F
-
-
-
G
H
J
J
I
I
I
I
J
J
I
I
I
I
I
L
-
VCC3
DSP0_DATA0_9 DSP0_DATA_D9+ CAP0_DATA21 0
DSP0_DATA1_9 DSP0_DATA_D9-
DSP0_DATA1_11 DSP0_DATA_D11- CAP0_CLK
DSP0_CTRL0
VCC12
VSS
M_SCLK0
VSS
VCC3
M_SDATA0_0
M_SDATA0_2
M_SDATA0_1
M_SSEL0
M_SDATA0_3
VSS
0
VSS
VCC3
M_SDATA1_0
M_SDATA1_2
M_SDATA1_1
M_SSEL1
M_SDATA1_3
VSS
VCC3
MLBDAT
MLBSIG
MLBCLK
VCC12
VSS
VCC5
PSC_1
0
AN1
AN2
AN3
AN5
AN6
AN7
AN8
AN9
AN10
AN11
AN12
AN13
AN14
NMIX
VCC5
DSP0_CTRL2
0
0
0
0
0
G_SDATA1_0
G_SDATA1_2
G_SDATA1_1
G_SSEL1
G_SDATA1_3
0
G_SCLK0
0
0
G_SDATA0_0
G_SDATA0_2
G_SDATA0_1
G_SSEL0
G_SDATA0_3
0
0
DSP0_CTRL2
DSP0_CTRL3
DSP0_CTRL4
0
0
0
0
0
SOT0
SCK0
SIN0
SOT1
SCK1
SIN1
SOT16
SCK16
SIN16
SOT8
SCK8
SIN8
0
0
0
CAP0_DATA34 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
SOT17
SCK17
SIN17
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
CAP0_DATA25 0
0
0
CAP0_DATA24 0
0
0
0
0
0
0
0
0
MFS17_SDA
MFS17_SCL
0
0
0
0
MFS16_SDA
MFS16_SCL
0
0
0
0
0
0
0
RXCLK TIN33 I2S0_SCK
DSP0_DATA1_10 DSP0_DATA_D10- CAP0_DATA32 CAP0_DATA35 RXDV TIN34 I2S1_SD
DSP0_DATA0_11 DSP0_DATA_D11+ CAP0_DATA33 0
TXCLK TOT33 I2S0_WS
COL
0
TXER
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
CRS
0
0
0
0
0
0
0
0
0
0
0
0
0
0
RX0
TX0
RX1
TX1
0
0
TOT35 I2S1_WS
TIN35 I2S1_SCK
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TIN1
TIN2
TIN3
TOT0
TOT1
TOT2
TOT3
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
SGA0
SGA1
SGO1
SGO2
SGA3
SGO3
SGO0
SGA0
SGA1
SGO1
TOT16 SGO2
TIN17 0
0
0
TIN16 SGA2
0
0
TIN49 0
0
0
0
0
0
0
0
DSP0_DATA0_10 DSP0_DATA_D10+ CAP0_DATA23 CAP0_DATA32 RXER TOT34 I2S1_ECLK 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
OCU9_OTD0
OCU8_OTD1
OCU5_OTD1
0
0
OCU6_OTD0
OCU7_OTD0
OCU6_OTD1
OCU8_OTD0
OCU7_OTD1
0
0
0
0
0
0
OCU3_OTD0
OCU5_OTD1
OCU8_OTD0
OCU8_OTD1
OCU9_OTD0
OCU9_OTD1
ICU8_IN1
ICU9_IN0
0
0
0
0
ICU9_IN0
ICU9_IN1
ICU8_IN1
0
ICU5_IN1
0
0
ICU6_IN0
ICU7_IN0
ICU6_IN1
ICU8_IN0
ICU7_IN1
0
0
0
0
ICU4_IN1
0
0
0
0
ICU3_IN0
ICU4_IN1
ICU5_IN0
ICU5_IN1
ICU6_IN1
ICU7_IN0
ICU7_IN1
ICU8_IN0
ICU8_IN1
ICU9_IN0
ICU9_IN1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
PPG6_TOUT2
PPG7_TOUT0
PPG7_TOUT2
PPG8_TOUT0
PPG8_TOUT2
PPG9_TOUT0
0
0
0
PPG9_TOUT0
PPG8_TOUT2
PPG5_TOUT2
0
0
PPG6_TOUT0
PPG7_TOUT0
PPG6_TOUT2
PPG8_TOUT0
PPG7_TOUT2
0
0
0
0
PPG4_TOUT2
0
0
0
0
PPG3_TOUT0
PPG4_TOUT2
PPG5_TOUT0
PPG5_TOUT2
PPG6_TOUT2
PPG7_TOUT0
PPG8_TOUT0
PPG8_TOUT2
PPG9_TOUT0
PPG9_TOUT2
EINT1
EINT2
0
0
0
0
0
0
EINT6
EINT8
EINT7
0
0
EINT1
EINT2
EINT3
0
0
0
0
EINT6
EINT9
0
0
0
P0_30 M_RWDS_0
0
0
P1_00 M_DQ5_0
P1_02 M_DQ7_0
P0_28 0
0
0
0
0
0
P2_25 0
P3_00 0
P3_01 0
P3_02 0
P3_03 0
P3_04 0
P3_05 0
P3_06 0
0
0
P2_22 0
0
0
P0_27 0
0
0
P0_26 0
0
0
P1_01 M_DQ4_0
0
0
P0_31 M_CS#2_0
0
0
EINT15 P2_31 0
PPG11_TOUT0 EINT6
0
0
EINT14 P2_30 0
EINT3
0
0
P1_09 M_CK_0
EINT13 P2_29 0
EINT2
0
0
0
0
0
G_DQ4_2
G_DQ5_2
G_DQ6_2
G_DQ7_2
0
0
0
0
0
G_CK_1
0
0
G_DQ3_1
G_DQ2_1
G_DQ1_1
G_DQ0_1
0
0
G_DQ5_1
G_DQ6_1
G_DQ7_1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
DSP0_CTRL2
DSP0_CLK
DSP0_CTRL0
DSP0_CTRL1
0
0
0
0
0
0
0
0
0
0
0
G_CS#2_1 0
G_DQ4_1
0
G_RWDS_1 0
0
0
G_CS#1_1 0
EINT11 P2_27 INDICATOR0_0 0
EINT1
0
EINT10 P2_26 0
EINT0
P5_22 0
EINT10 P1_03 M_DQ6_0
EINT9
P0_17 0
EINT11 P1_04 M_DQ0_0
EINT5
P0_16 0
EINT13 P1_06 M_DQ1_0
0
P0_15 0
EINT12 P1_05 M_DQ3_0
PPG10_TOUT2 EINT5
0
EINT0
PPG10_TOUT0 EINT4
0
EINT15 P0_14 0
PPG10_TOUT2 EINT15 P1_08 M_CS#1_0
0
EINT14 P0_13 0
PPG10_TOUT0 EINT14 P1_07 M_DQ2_0
PPG9_TOUT2
EINT13 P0_12 0
PPG11_TOUT0 EINT0
0
0
PPG10_TOUT0 EINT4
FRT8/9/10/11_TEXT PPG7_TOUT2
OCU11_OTD0 ICU11_IN0 0
0
0
OCU10_OTD1 ICU10_IN1 0
0
ICU8_IN0
OCU10_OTD0 ICU10_IN0 0
0
ICU7_IN1
OCU10_OTD1 ICU10_IN1 0
0
ICU7_IN0
OCU10_OTD0 ICU10_IN0 0
OCU9_OTD1
ICU6_IN1
OCU11_OTD0 ICU11_IN0 0
ZIN9 OCU7_OTD1
0
0
0
OCU10_OTD0 ICU10_IN0 0
BIN9 OCU7_OTD0
0
OCU9_OTD0
AIN9 OCU6_OTD1
0
OCU8_OTD1
ZIN8 OCU5_OTD0
0
OCU8_OTD0
BIN8 OCU4_OTD1
0
OCU7_OTD1
SIN1 OCU4_OTD1
0
OCU7_OTD0
SCK1 0
0
OCU6_OTD1
SOT1 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TRACE0
TRACE1
TRACE2
TRACE3
TRACE_CLK
TRACE_CTL
0
0
0
0
CAP0_DATA22 0
0
0
0
60
D
0
59
-
0
58
0
57
0
56
0
55
0
54
0
53
CONFIDENTIAL
0
0
0
ICU1_IN1
OCU5_OTD0
ICU5_IN0
PPG5_TOUT0
EINT10
P4_10
OCU4_OTD1
ICU4_IN1
PPG4_TOUT2
EINT9
P4_09
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
DAC_L
A
7
150
S
AN45
SIN3
0
PWM2M4
OCU4_OTD0
ICU4_IN0
PPG4_TOUT0
EINT8
P4_08
MFS2_CS1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
VCC12
-
11
146
-
DVCC
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
AVSS_LVDS_PLL
C_L
A
-
12
145
-
DVSS
0
0
0
0
0
PWM1P3
OCU0_OTD1
ICU0_IN1
PPG0_TOUT2
EINT1
P4_01
0
0
0
0
PWM2M2
OCU0_OTD0
ICU0_IN0
PPG0_TOUT0
EINT0
P4_00
0
DSP0_DATA1_11
0
0
0
0
0
P0_19
EINT0
PPG4_TOUT0
ICU4_IN0
OCU4_OTD0
0
DSP0_DATA1_4
0
CAP0_DATA2
DSP0_CLK-
DSP0_CTRL2
D
33
124
-
VSS
0
0
0
0
0
0
0
0
0
0
0
0
0
0
P5_27
EINT11
PPG9_TOUT2
ICU9_IN1
OCU9_OTD1
0
TOT0
0
CAP0_DATA3
DSP0_DATA_D0+
DSP0_DATA0_0
D
34
123
-
VCC12
0
0
0
0
0
0
0
0
DSP0_DATA_D1-
PPG11_TOUT2
ICU11_IN1
OCU11_OTD1
SCK0
TOT2
0
CAP0_DATA7
DSP0_DATA_D2+
DSP0_DATA0_2
D
38
119
-
AVCC5
0
0
0
0
0
0
0
0
EINT0
PPG0_TOUT0
ICU0_IN0
OCU0_OTD0
0
TIN2
0
CAP0_DATA8
DSP0_DATA_D2-
DSP0_DATA1_2
D
39
118
H
ADTRG
0
SGA3
TOT35
OCU5_OTD0
ICU5_IN0
PPG5_TOUT0
EINT2
48
109
O
JTAG_TDO
0
0
0
0
0
0
0
0
D
49
108
N
-
43
114
Q
RSTX
0
0
0
0
0
0
0
0
D
44
113
P
MODE
0
0
0
0
0
0
0
0
OCU3_OTD0
SIN0
JTAG_NTRST
0
0
0
0
0
0
0
0
0
G_RWDS_2
0
0
0
0
P0_10
EINT11
PPG5_TOUT2
ICU5_IN1
OCU5_OTD1S0_ECLK
TOT32
RXD2
CAP0_DATA19
DSP0_DATA_D8+
DSP0_DATA0_8
D
0
G_CS#2_2
0
0
0
0
P0_11
EINT12
PPG6_TOUT0
ICU6_IN0
OCU6_OTD0 I2S0_SD
TIN32
RXD3
CAP0_DATA20
DSP0_DATA_D8-
DSP0_DATA1_8
D
51
106
M
X1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
VSS
-
52
105
-
VSS
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
X0
M
107
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
JTAG_TDI
0
JTAG_TCK
N2
JTAG_TMS
N2
112
N2
110
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
VSS
0
VCC5
0
C
117
116
115
0
0
0
P3_18
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
AVSS
0
AVRH5
0
VCC12
122
121
120
0
P4_04
0
P3_31
EINT15
0
P3_29
EINT13
0
P3_30
EINT14
PPG11_TOUT0
ICU11_IN0
PPG10_TOUT2
ICU10_IN1
PPG11_TOUT2
ICU11_IN1
OCU11_OTD1
PWM2P2
OCU10_OTD1
PWM1P2
OCU11_OTD0
PWM1M2
0
0
0
0
0
0
AN36
S
AN35
S
AN34
S
P4_02
0
P4_03
EINT3
PPG1_TOUT2
EINT2
PPG1_TOUT0
EINT4
PPG2_TOUT0
ICU2_IN0
OCU2_OTD0
ICU1_IN0
OCU1_OTD0
ICU1_IN1
OCU1_OTD1
PWM2P3
0
PWM1M3
0
PWM2M3
0
SIN2
AN41
SOT2
AN39
SCK2
AN40
S
MFS2_CS0
P4_07
0
0
P4_05
0
MFS0_CS0
P4_06
EINT6
PPG3_TOUT0
EINT5
PPG2_TOUT2
EINT7
PPG3_TOUT2
ICU3_IN1
OCU3_OTD1
ICU3_IN0
OCU3_OTD0
ICU2_IN1
OCU2_OTD1
0
0
0
0
0
0
33
June 30, 2015, S6J3200_DS708-00003-0v04-E
0
0
0
0
D
DSP0_DATA1_7
50
DVCC
0
0
PPG1_TOUT2
DSP0_DATA0_7
DSP0_DATA_D7-
0
-
0
0
EINT3
DSP0_DATA_D7+
CAP0_DATA18
0
0
0
126
0
0
SEG1
VCC3
DSP0_DATA0_5
45
P3_22
P3_21
0
0
111
46
EINT6
EINT5
0
0
MFS12_SCL 0 P5_19
CAP0_DATA17
RXD1
47
PPG7_TOUT0
PPG6_TOUT2
0
0
0
0
DSP0_DATA_D5+
D
ICU7_IN0
ICU6_IN1
0
0
0
RXD0
TIN19
D
OCU7_OTD0
OCU6_OTD1
0
0
203
0
CAP0_DATA13
DSP0_DATA1_5
D
DSP0_DATA0_6
AN0(AL PWM1M0
AP0(AH PWM1P0
0
0
204
TOT19
0
DSP0_DATA1_6
0
0
0
0
205
0
TXD0
DSP0_DATA_D5-
AN27
AN26
0
0
206
0
TOT17
CAP0_DATA14
DSP0_DATA_D6+
CAP0_DATA15
S
S
0
0
207
0
0
TXD1
128
127
0
0
208
0
OCU5_OTD0
TXD3
0
VCC12
-
0
OCU2_OTD1
TIN17
TXD2
TOT18
0
OCU3_OTD1
P3_23
0
Y
OCU4_OTD1
ICU5_IN0
OCU4_OTD0
EINT7
0
Y
0
ICU2_IN1
ICU3_IN0
PPG7_TOUT2
0
Y
ICU4_IN1
PPG5_TOUT0
ICU4_IN0
ICU7_IN1
0
Y
0
PPG2_TOUT2
PPG3_TOUT0
ICU3_IN1
PPG3_TOUT2
OCU7_OTD1
0
Y
PPG4_TOUT2
EINT10
PPG4_TOUT0
BP0(BHPWM2P0
0
VCC53
0
EINT5
EINT6
0
0
DSP1_CLK
EINT9
P0_09
EINT8
AN28
0
DSP1_CTRL2
0
P0_04
P0_05
EINT7
P0_06
S
28
0
DSP1_CTRL1
P0_08
0
P0_07
0
129
0
DSP1_CTRL0
0
0
0
0
P3_24
0
DSP1_DATA0_0
0
0
0
0
P3_25
EINT8
0
0
0
0
0
0
0
0
P3_26
EINT9
PPG8_TOUT0
0
0
0
0
0
P3_27
EINT10
PPG8_TOUT2
ICU8_IN0
0
0
0
0
0
EINT11
PPG9_TOUT0
ICU8_IN1
OCU8_OTD0
0
0
DSP0_DATA_D6-
0
0
0
PPG9_TOUT2
ICU9_IN0
OCU8_OTD1
BN0(BLPWM2M0
0
0
0
0
0
0
0
ICU9_IN1
OCU9_OTD0
AP1(AH PWM1P1
0
27
0
23
VCC3_LVDS_Tx
0
CAP0_DATA16
0
G_CS#1_2
0
OCU9_OTD1
AN1(AL PWM1M1
0
AN29
26
0
DSP0_CTRL7
0
G_CK_2
G_DQ3_2
BP1(BHPWM2P1
0
AN30
S
133
25
0
0
DSP0_CTRL8
PWM1M5
PWM1P5
PWM2P4
0
TIN18
G_DQ0_2
0
G_DQ1_2
0
AN31
S
130
24
B
0
0
0
DSP0_CTRL9
B
0
0
0
0
0
0
0
0
0
PWM1M4
0
PWM1P4
0
0
0
CAP0_DATA11
CAP0_DATA12
G_DQ2_2
CAP0_DATA13
AN32
S
131
B
TxDOUT00
0
0
0
0 SIN12
TxDOUT1-
0
0
0
0
0
SOT4
0
SCK3
0
0
CAP0_DATA15
CAP0_DATA14
S
132
TxDOUT0+
VSS_LVDS_Tx
0
0
0
0
0 SOT11
0
0
0
0
0
0 SCK11 DSP0_CTRL10
0
0
0
0
0
0 SIN11 DSP0_CTRL11
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
40
0
0
0
0
0
0
41
P3_28
0
0
0
0
0
0
42
EINT12
0
0
0
0
0
D
PPG10_TOUT0
0
0
0
0
D
ICU10_IN0
0
0
0
VSS
0
DSP0_DATA1_3
DSP0_DATA_D3-
DSP0_DATA0_3
DSP0_DATA_D3+
TXEN
CAP0_DATA9
0
TIN3
CAP0_DATA10
TOT3
0
0
0
0
0
0
OCU1_OTD0
0
OCU0_OTD1
ICU0_IN1
PPG0_TOUT2
ICU1_IN0
PPG1_TOUT0
0
0
0
0
EINT2
P0_01
EINT1
P0_00
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
OCU10_OTD0
0
0
0
0
35
BN1(BLPWM2M1
0
0
36
0
21
22
0
37
AN33
B
B
0
D
S
TxCLK-
TxDOUT1+
0
D
134
0
0
0
CAP0_DATA6
EINT15
DSP0_DATA1_1
0
0
0
0
0
D
DSP0_DATA0_1
DSP0_DATA_D1+
DSP0_DATA1_0
DSP0_DATA_D0CAP0_DATA4
0
0
0
0
0
TIN1
P5_31
P6_00
0
CAP0_DATA5
0
TOT1
0
TIN0
0
OCU10_OTD0
0
OCU10_OTD1
ICU10_IN1
PPG10_TOUT2
ICU10_IN0
PPG10_TOUT0
EINT12
P5_28
EINT13
P5_29
0
0
0
0
0
0
SOT0
0
0
0
0
0
0
0
0
OCU11_OTD0
0
0
0
0
0
0
0
0
0
0
OCU2_OTD0
ICU11_IN0
0
0
0
0
0
0
0
0
0
0
OCU0_OTD1
PPG11_TOUT0
0
0
0
0
0
0
0
OCU1_OTD0 SGA1
EINT14
0
0
0
0
0
0
0
0
0
0
0
0
OCU1_OTD1 SGO1
AN47
AN46
AN44
SOT3
AN43
0
AN42
0
P5_30
0
0
0
0
0
0
0
TOP VIEW
TEQFP-208
DVCC
0
0
139
18
DVSS
0
0
138
19
0
0
OCU2_OTD0
0
AN37
S
142
S
144
13
-
0
0
0
AN38
S
143
14
136
0
0
137
20
B
TxCLK+
B
TxDOUT2+
B
TxDOUT20
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
ICU2_IN0
S
140
15
135
0
0
ICU0_IN1
141
17
-
ICU1_IN0
16
B
-
ICU1_IN1
B
TxDOUT3-
-
ICU2_IN0
TxDOUT3+
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
PPG2_TOUT0
0
0
0
0
PPG0_TOUT2
0
0
0
0
0
0
PPG1_TOUT0
0
0
0
0
PPG1_TOUT2
0
0
0
0
0
0
0
PPG2_TOUT0
0
0
0
0
0
0
VSS_LVDS_Tx
0
0
0
0
0
0
EINT4
0
VCC3_LVDS_Tx
0
0
0
0
SEG0
0
S
S
S
0
AVCC3_LVDS_PLL
0
0
0
0 0 P5_20
152
151
149
0
0
0
0
0
0
0
0 0 P4_25 COM3 EINT9
5
6
8
S
148
9
S
147
10
VSS
AVSS
0 0 P4_26 COM2 EINT10
-
-
0
0 0 P4_27 COM1 EINT11
AVSS
AVCC3_DAC
0
0
0
0
0
0 0 P4_28 COM0 EINT12
0
0
0
0 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
MFS0_CS3
0
MFS0_CS2
P4_12
MFS4_SCL
MFS0_CS1
P4_11
0
0
0
0
0
0
0
0
0
0
0
0
0
EINT11
PPG5_TOUT2
EINT12
PPG6_TOUT0
ICU6_IN0
0
0
0
ICU5_IN1
OCU5_OTD1
0
0
0
OCU6_OTD0
PWM2M5
TX1
PWM2P5
RX1
0
0
0
0
0
DVSS
SIN4
AN49
SCK4
AN48
S
DVCC
156
S
154
155
○
2
153
A
3
A
C_R
4
DAC_R
1
VSS
AVSS
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
MFS4_SDA
0
0
4. Package and Pin Assignment
D a t a S h e e t ( P r e l i m i n a r y )
Figure 4-11: TEQFP-208 (S6J325CLxx)
0
ICU2_IN0
ICU0_IN1
ICU0_IN0
0
0
0
0
0
0
0
0
OCU3_OTD1 SGO1 TIN33 SOT11
OCU3_OTD0 SGA1 TOT33 SIN10
OCU2_OTD1 SGA0 TIN32 SCK10
OCU2_OTD0 SGO0 TOT32 SOT10
0 TIN18
0
OCU4_OTD0 SGA2 TOT34 SCK11
OCU0_OTD0 WOT TOT18
0
OCU4_OTD1 SGO2 TIN34 SIN11
OCU0_OTD1
0
0
SIN9
SCK9
SOT9
BP0(BH0)
AN0(AL0)
AP0(AH0)
0
0
0
0
0
TX6
RX6
TX5
RX5
0
0
TX5
RX5
0
0
0 DSP1_DATA0_11
0 DSP1_DATA1_11
0
0
0
0
0
0
0
0
0
0
0
0
DSP1_DATA1_9
0 DSP1_DATA1_10
0
DSP1_DATA0_9
0 DSP1_DATA0_10
0
DSP1_DATA1_8
VCC53
VSS
VCC5
X0A
X1A
AN25
AN24
AN23
AN22
AN21
AN20
AN17
AN16
AN15
-
Y
Y
Y
Y
Y
Y
Y
Y
-
-
-
X
X
W
W
W
W
W
W
V
V
V
183
182
181
180
179
178
177
176
175
174
173
172
171
170
169
168
167
166
165
164
163
162
161
160
157
0
0
0
ICU2_IN1
0
0
0
0
VCC12
DSP1_DATA0_8
184
-
0 0
0
0
ICU3_IN0
0
0
BN0(BL0)
0
185
VCC5
0 0
0
PPG0_TOUT0 PPG6/7/8/9/10/11_TIN
V2 EINT7 PPG11_TOUT2
V3 EINT3
PPG0_TOUT2
0
ICU4_IN0
FRT4/5/6/7_TEXT ICU3_IN1
OCU0_OTD1
0
0
0
AP1(AH1)
0
-
0
0 0 P2_19
V1 EINT8
PPG2_TOUT0
0
ICU4_IN1
0
OCU0_OTD0
0
0
0
AN1(AL1)
0
VCC12
-
0
0 0 P3_07
V0 EINT9
PPG2_TOUT2
0
ICU0_IN1
0
0
0
SOT8
0
BN1(BL1)
BP1(BH1)
VSS
0
0
0 0 P3_08
PPG3_TOUT0
0
0
ICU0_IN0
0
0
0
SIN8
SCK8
0
VCC53
0
0
0 0 P3_09
PPG3_TOUT2
0
0
OCU3_OTD0 SGA3
0
0
186
0
0
0
MFS8_CS0 0 P3_12 SEG29 EINT12
PPG4_TOUT0
0
0
0
OCU3_OTD1 SGO3
OCU2_OTD1
0
0
0
0
187
0
0
0
MFS9_CS0 0 P3_13 SEG28 EINT13
PPG4_TOUT2
0
ICU2_IN1
0
0
0
Y
0
0
0
MFS9_CS1 0 P3_14 SEG27 EINT14
PPG0_TOUT2
0
ICU3_IN0
OCU4_OTD0
0
0
0
Y
188
0
0
0
EINT0
MFS8_CS3 0 P3_15 SEG26 EINT15
0
PPG0_TOUT0
0
ICU3_IN1
OCU4_OTD1
0
0
DSP1_DATA1_7
189
0
0
0
MFS8_CS1 0 P3_16 SEG25
EINT1
0
0
ICU4_IN0
OCU5_OTD0
0
0
0
DSP1_DATA0_7
Y
190
0
0
0
MFS8_CS2 0 P3_17 SEG24
EINT1
0
0
ICU4_IN1
OCU5_OTD1
0
0
Y
158
0
0
0
0
EINT0
PPG2_TOUT2
0
ICU5_IN0
0
OCU6_OTD0
0
0
0
DSP1_DATA1_6
Y
-
0
0
0
PPG3_TOUT0
0
ICU5_IN1
0
0
DSP1_DATA0_6
VSS
0
0
0 0 P2_17
0
0
PPG3_TOUT2
0
0
ICU6_IN0
0
0
0
0
DSP1_DATA1_5
0
0
0
0
0
PPG4_TOUT0
0
0
0
0
0
0
0
0 0
0
0 INDICATOR0_1 0 P2_16
0
0 0
0
PPG4_TOUT2
0
0
0
SOT9
0
0
0
0
0
0 0 P4_29 SEG23 EINT13
PPG5_TOUT0
0
0
0
0
0
0
0
0 0 P4_30 SEG22 EINT14
0
EINT0
0 0 P4_31 SEG21 EINT15
0 0
EINT1
PPG5_TOUT2
0
0
0
SCK9
0
0
0
0
0 0 P5_00 SEG20
EINT2
0
PPG6_TOUT0
0
0
0
0
SIN9
0
0
0
0 0 P5_01 SEG19
EINT3
0
0
0
0
0
0
0
0 0 P5_02 SEG18
0
EINT4
0
OCU6_OTD1
0
0
0
0
0
0 0 P5_03 SEG17
0
0
OCU7_OTD0
0
0
0
0
0
0 0 P5_04 SEG16
0
ICU6_IN1
OCU7_OTD1
AIN8
0
0
0
0
0
0
ICU7_IN0
OCU8_OTD0
159
0
0
0 0
0
0
ICU7_IN1
OCU8_OTD1
U
0
0
0
0
0
ICU8_IN0
0
0
0
0
PPG6_TOUT2
0
ICU8_IN1
0
0
0
0 0
0
PPG7_TOUT0
0
0
0
0 0
EINT5
PPG7_TOUT2
0
0
0
0
0 0
EINT6
PPG8_TOUT0
0
0
0
0 0 P5_05 SEG15
EINT7
PPG8_TOUT2
0
0
0
0 0 P5_06 SEG14
EINT8
0
0
0
0 0 P5_07 SEG13
EINT9
ICU1_IN1
0
0
0 0 P5_08 SEG12
TIN48
0
0
0 0 P5_09 SEG11
0
0
0
0
0
DSP1_DATA0_5
Y
191
0 TOT17
0
0
0 SOT10
192
FRT0/1/2/3_TEXT ICU11_IN1 OCU11_OTD1
0
OCU9_OTD0 BIN8
Y
0
0
ICU9_IN0
DSP1_DATA1_4
0
0
193
PPG9_TOUT0
0
194
MFS8_CS0 0 P5_10 SEG10 EINT10
0 SCK10
-
Y
0 MFS10_SDA
ZIN8
VCC53
DSP1_DATA0_4
OCU9_OTD1
0
ICU9_IN1
0
0
0
PPG9_TOUT2
0
SEG9 EINT11
0
0 SIN10
MFS9_CS0 0 P5_11
0
AIN9
0 MFS10_SCL
0
0
0
SEG8 EINT12 PPG10_TOUT0
0 ICU10_IN0 OCU10_OTD0
0
0
0 0
MFS9_CS1 0 P5_12
0
0
0
0
0
0
33
0
D
195
DSP0_CTRL2
-
DSP0_CLK-
VSS
CAP0_DATA2
0
0
0
DSP0_DATA1_4
0
0
0
OCU4_OTD0
0
ICU4_IN0
0
PPG4_TOUT0
0
EINT0
0
P0_19
0
0
0
0
0
0
0
0
0 0
0
0
DSP0_DATA1_11
0
32
196
D
Y
DSP0_CLK
DSP1_DATA1_3
DSP0_CLK+
0
CAP0_DATA1
DSP0_CTRL0
MDIO
0
0
0
0
0 ICU10_IN1 OCU10_OTD1 BIN9
OCU3_OTD1
SEG7 EINT13 PPG10_TOUT2
ICU3_IN1
0 0 P5_13
PPG3_TOUT2
0
EINT15
0
P0_18
197
0
Y
0
0
DSP1_DATA0_3
0
0
0
0
0
DSP0_CTRL1
0
0
0 SOT11
0
DSP0_DATA0_11
ZIN9
0
31
0 ICU11_IN0 OCU11_OTD0
0
C
SEG6 EINT14 PPG11_TOUT0
0
DSP0_CTRL1
MFS8_CS3 0 P5_14
VSS
0
0
-
CAP0_DATA0
0
124
MDC
198
0
DSP0_DATA0_4
199
0
0
Y
0
OCU9_OTD1
Y
0
ICU9_IN1
DSP1_DATA1_2
0
PPG9_TOUT2
DSP1_DATA0_2
0
EINT3
DSP1_CLK
0
P5_21
DSP0_CTRL2 DSP1_CTRL2
0
0
DSP0_CTRL3
DVSS
0
0 SCK11
-
0
0 SIN11
125
0
0
0
0
0
0
DSP0_DATA1_10
OCU0_OTD0
0
29
30
ICU0_IN0
0
-
-
0 ICU11_IN1 OCU11_OTD1
0
VSS
VCC3
0
0
0
0
PPG0_TOUT0
0
0
0
EINT0
0
0
0
SEG5 EINT15 PPG11_TOUT2
DVCC
0
0
SEG4
-
0
0
MFS8_CS1 0 P5_15
0
0
126
0
0
MFS8_CS2 0 P5_16
P3_22
P3_21
0
0
0
EINT6
EINT5
0
0
0
PPG7_TOUT0
PPG6_TOUT2
0
0
0
ICU7_IN0
ICU6_IN1
0
0
0
OCU7_OTD0
OCU6_OTD1
0
0
200
AN0(AL PWM1M0
AP0(AH PWM1P0
0
0
Y
0
0
0
0
DSP1_DATA1_1
AN27
AN26
0
0
DSP0_CTRL4 DSP1_CTRL0
S
S
0
0
0
128
127
0
0
0
28
0
-
OCU0_OTD1
VCC12
ICU0_IN1
0
0
0
PPG0_TOUT2
0
EINT1
0
SEG3
0
0 0 P5_17
0
0
0
0
0
201
0
Y
0
DSP1_DATA0_1
0
DSP0_CTRL5 DSP1_CTRL1
0
0 SOT12
0
0
0
OCU1_OTD0
0
ICU1_IN0
0
0
27
PPG1_TOUT0
26
-
EINT2
-
VCC3_LVDS_Tx
SEG2
VSS_LVDS_Tx
0
MFS12_SDA 0 P5_18
0
0
0
0
0
0
0
0
202
0
0
Y
0
0
0
DSP1_DATA1_0
P3_23
0
0
0
EINT7
0
0
DSP0_CTRL6
PPG7_TOUT2
0
0
0 SCK12
ICU7_IN1
0
0
0
OCU7_OTD1
0
0
OCU1_OTD1
BP0(BHPWM2P0
0
0
ICU1_IN1
0
0
0
0
AN28
0
0
PPG1_TOUT2
S
0
0
EINT3
0
129
0
0
SEG1
0
P3_24
0
MFS12_SCL 0 P5_19
P3_25
EINT8
25
0
EINT9
PPG8_TOUT0
24
B
0
PPG8_TOUT2
ICU8_IN0
B
TxDOUT0-
203
ICU8_IN1
OCU8_OTD0
TxDOUT0+
204
OCU8_OTD1
BN0(BLPWM2M0
0
0
205
AP1(AH PWM1P1
0
0
0
206
0
AN29
0
0
207
AN30
S
0
0
208
S
130
0
0
-
0
0
131
0
0
Y
P3_27
P3_26
0
0
Y
EINT11
EINT10
0
0
Y
PPG9_TOUT2
PPG9_TOUT0
0
0
Y
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
D
D
D
D
D
C
-
-
E
-
-
E
E
E
E
E
-
E
-
-
E
E
E
E
E
-
-
F
F
F
-
-
-
G
H
J
J
I
I
I
I
J
J
I
I
I
I
I
L
-
VCC3
DSP0_DATA0_9 DSP0_DATA_D9+ CAP0_DATA21 0
DSP0_DATA1_9 DSP0_DATA_D9-
DSP0_DATA1_11 DSP0_DATA_D11- CAP0_CLK
DSP0_CTRL0
VCC12
VSS
M_SCLK0
VSS
VCC3
M_SDATA0_0
M_SDATA0_2
M_SDATA0_1
M_SSEL0
M_SDATA0_3
VSS
0
VSS
VCC3
M_SDATA1_0
M_SDATA1_2
M_SDATA1_1
M_SSEL1
M_SDATA1_3
VSS
VCC3
MLBDAT
MLBSIG
MLBCLK
VCC12
VSS
VCC5
PSC_1
0
AN1
AN2
AN3
AN5
AN6
AN7
AN8
AN9
AN10
AN11
AN12
AN13
AN14
NMIX
VCC5
DSP0_CTRL2
0
0
0
0
0
G_SDATA1_0
G_SDATA1_2
G_SDATA1_1
G_SSEL1
G_SDATA1_3
0
G_SCLK0
0
0
G_SDATA0_0
G_SDATA0_2
G_SDATA0_1
G_SSEL0
G_SDATA0_3
0
0
DSP0_CTRL2
DSP0_CTRL3
DSP0_CTRL4
0
0
0
0
0
SOT0
SCK0
SIN0
SOT1
SCK1
SIN1
SOT16
SCK16
SIN16
SOT8
SCK8
SIN8
0
0
0
CAP0_DATA34 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
SOT17
SCK17
SIN17
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
CAP0_DATA25 0
0
0
CAP0_DATA24 0
0
0
0
0
0
0
0
0
MFS17_SDA
MFS17_SCL
0
0
0
0
MFS16_SDA
MFS16_SCL
0
0
0
0
0
0
0
RXCLK TIN33 I2S0_SCK
DSP0_DATA1_10 DSP0_DATA_D10- CAP0_DATA32 CAP0_DATA35 RXDV TIN34 I2S1_SD
DSP0_DATA0_11 DSP0_DATA_D11+ CAP0_DATA33 0
TXCLK TOT33 I2S0_WS
COL
0
TXER
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
CRS
0
0
0
0
0
0
0
0
0
0
0
0
0
0
RX0
TX0
RX1
TX1
0
0
TOT35 I2S1_WS
TIN35 I2S1_SCK
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TIN1
TIN2
TIN3
TOT0
TOT1
TOT2
TOT3
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
SGA0
SGA1
SGO1
SGO2
SGA3
SGO3
SGO0
SGA0
SGA1
SGO1
TOT16 SGO2
TIN17 0
0
0
TIN16 SGA2
0
0
TIN49 0
0
0
0
0
0
0
0
DSP0_DATA0_10 DSP0_DATA_D10+ CAP0_DATA23 CAP0_DATA32 RXER TOT34 I2S1_ECLK 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
OCU9_OTD0
OCU8_OTD1
OCU5_OTD1
0
0
OCU6_OTD0
OCU7_OTD0
OCU6_OTD1
OCU8_OTD0
OCU7_OTD1
0
0
0
0
0
0
OCU3_OTD0
OCU5_OTD1
OCU8_OTD0
OCU8_OTD1
OCU9_OTD0
OCU9_OTD1
ICU8_IN1
ICU9_IN0
0
0
0
0
ICU9_IN0
ICU9_IN1
ICU8_IN1
0
ICU5_IN1
0
0
ICU6_IN0
ICU7_IN0
ICU6_IN1
ICU8_IN0
ICU7_IN1
0
0
0
0
ICU4_IN1
0
0
0
0
ICU3_IN0
ICU4_IN1
ICU5_IN0
ICU5_IN1
ICU6_IN1
ICU7_IN0
ICU7_IN1
ICU8_IN0
ICU8_IN1
ICU9_IN0
ICU9_IN1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
PPG6_TOUT2
PPG7_TOUT0
PPG7_TOUT2
PPG8_TOUT0
PPG8_TOUT2
PPG9_TOUT0
0
0
0
PPG9_TOUT0
PPG8_TOUT2
PPG5_TOUT2
0
0
PPG6_TOUT0
PPG7_TOUT0
PPG6_TOUT2
PPG8_TOUT0
PPG7_TOUT2
0
0
0
0
PPG4_TOUT2
0
0
0
0
PPG3_TOUT0
PPG4_TOUT2
PPG5_TOUT0
PPG5_TOUT2
PPG6_TOUT2
PPG7_TOUT0
PPG8_TOUT0
PPG8_TOUT2
PPG9_TOUT0
PPG9_TOUT2
EINT1
EINT2
0
0
0
0
0
0
EINT6
EINT8
EINT7
0
0
EINT1
EINT2
EINT3
0
0
0
0
EINT6
EINT9
0
0
0
P0_30 M_RWDS_0
0
0
P1_00 M_DQ5_0
P1_02 M_DQ7_0
P0_28 0
0
0
0
0
0
P2_25 0
P3_00 0
P3_01 0
P3_02 0
P3_03 0
P3_04 0
P3_05 0
P3_06 0
0
0
P2_22 0
0
0
P0_27 0
0
0
P0_26 0
0
0
P1_01 M_DQ4_0
0
0
P0_31 M_CS#2_0
0
0
EINT15 P2_31 0
PPG11_TOUT0 EINT6
0
0
EINT14 P2_30 0
EINT3
0
0
P1_09 M_CK_0
EINT13 P2_29 0
EINT2
0
0
0
0
0
G_DQ4_2
G_DQ5_2
G_DQ6_2
G_DQ7_2
0
0
0
0
0
G_CK_1
0
0
G_DQ3_1
G_DQ2_1
G_DQ1_1
G_DQ0_1
0
0
G_DQ5_1
G_DQ6_1
G_DQ7_1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
DSP0_CTRL2
DSP0_CLK
DSP0_CTRL0
DSP0_CTRL1
0
0
0
0
0
0
0
0
0
0
0
G_CS#2_1 0
G_DQ4_1
0
G_RWDS_1 0
0
0
G_CS#1_1 0
EINT11 P2_27 INDICATOR0_0 0
EINT1
0
EINT10 P2_26 0
EINT0
P5_22 0
EINT10 P1_03 M_DQ6_0
EINT9
P0_17 0
EINT11 P1_04 M_DQ0_0
EINT5
P0_16 0
EINT13 P1_06 M_DQ1_0
0
P0_15 0
EINT12 P1_05 M_DQ3_0
PPG10_TOUT2 EINT5
0
EINT0
PPG10_TOUT0 EINT4
0
EINT15 P0_14 0
PPG10_TOUT2 EINT15 P1_08 M_CS#1_0
0
EINT14 P0_13 0
PPG10_TOUT0 EINT14 P1_07 M_DQ2_0
PPG9_TOUT2
EINT13 P0_12 0
PPG11_TOUT0 EINT0
0
0
PPG10_TOUT0 EINT4
FRT8/9/10/11_TEXT PPG7_TOUT2
OCU11_OTD0 ICU11_IN0 0
0
0
OCU10_OTD1 ICU10_IN1 0
0
ICU8_IN0
OCU10_OTD0 ICU10_IN0 0
0
ICU7_IN1
OCU10_OTD1 ICU10_IN1 0
0
ICU7_IN0
OCU10_OTD0 ICU10_IN0 0
OCU9_OTD1
ICU6_IN1
OCU11_OTD0 ICU11_IN0 0
ZIN9 OCU7_OTD1
0
0
0
OCU10_OTD0 ICU10_IN0 0
BIN9 OCU7_OTD0
0
OCU9_OTD0
AIN9 OCU6_OTD1
0
OCU8_OTD1
ZIN8 OCU5_OTD0
0
OCU8_OTD0
BIN8 OCU4_OTD1
0
OCU7_OTD1
SIN1 OCU4_OTD1
0
OCU7_OTD0
SCK1 0
0
OCU6_OTD1
SOT1 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TRACE0
TRACE1
TRACE2
TRACE3
TRACE_CLK
TRACE_CTL
0
0
0
0
CAP0_DATA22 0
0
0
0
60
D
0
59
-
0
58
0
57
0
56
0
55
0
54
0
53
CONFIDENTIAL
ICU9_IN1
ICU9_IN0
0
0
S6J3200_DS708-00003-0v04-E, June 30, 2015
34
OCU9_OTD1
OCU9_OTD0
0
0
Y
Notes:
Any function at the following pins is not supported.
−
BP1(BHPWM2P1
AN1(AL PWM1M1
0
0
VCC53
0
0
0
P0_07
EINT8
PPG4_TOUT0
ICU4_IN0
OCU4_OTD0
0
TIN18
TXD3
CAP0_DATA16
DSP0_DATA_D6-
DSP0_DATA1_6
D
47
110
N2
JTAG_TDI
0
0
0
0
0
0
0
0
0
0
0
0
P0_08
EINT9
PPG4_TOUT2
ICU4_IN1
OCU4_OTD1
0
TOT19
RXD0
CAP0_DATA17
DSP0_DATA_D7+
DSP0_DATA0_7
D
48
109
O
JTAG_TDO
0
0
0
0
0
0
0
0
G_CS#1_2
0
0
0
0
P0_09
EINT10
PPG5_TOUT0
ICU5_IN0
OCU5_OTD0
0
TIN19
RXD1
CAP0_DATA18
DSP0_DATA_D7-
DSP0_DATA1_7
D
49
108
N
JTAG_NTRST
0
0
0
0
0
0
0
0
0
G_RWDS_2
0
0
0
0
P0_10
EINT11
PPG5_TOUT2
ICU5_IN1
OCU5_OTD1S0_ECLK
TOT32
RXD2
CAP0_DATA19
DSP0_DATA_D8+
DSP0_DATA0_8
D
50
107
M
X0
0
0
0
0
0
0
0
0
0
G_CS#2_2
0
0
0
0
P0_11
EINT12
PPG6_TOUT0
ICU6_IN0
OCU6_OTD0 I2S0_SD
TIN32
RXD3
CAP0_DATA20
DSP0_DATA_D8-
DSP0_DATA1_8
D
51
106
M
X1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
VSS
-
52
105
-
VSS
0
0
0
0
0
0
0
0
0
0
0
0
0
DSP1_CLK
0
G_DQ0_2
0
0
AN32
AN31
0
0
DSP1_CTRL2
G_DQ1_2
CAP0_DATA15
CAP0_DATA14
S
S
0
0
DSP1_CTRL1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
VCC3
-
43
114
Q
RSTX
0
0
0
0
0
0
0
0
G_CK_2
0
0
0
0
P0_04
EINT5
PPG2_TOUT2
ICU2_IN1
OCU2_OTD1
0
TOT17
TXD0
CAP0_DATA13
DSP0_DATA_D5+
DSP0_DATA0_5
D
44
113
P
MODE
0
0
0
0
0
0
0
0
G_DQ3_2
0
0
0
0
P0_05
EINT6
PPG3_TOUT0
ICU3_IN0
OCU3_OTD0
SIN0
TIN17
G_DQ2_2
0
0
0
0
P0_06
EINT7
PPG3_TOUT2
ICU3_IN1
OCU3_OTD1
0
TOT18
TXD1
CAP0_DATA14
DSP0_DATA_D5-
DSP0_DATA1_5
D
45
112
N2
JTAG_TMS
0
0
0
0
0
0
0
0
TXD2
CAP0_DATA15
DSP0_DATA_D6+
DSP0_DATA0_6
D
46
111
N2
JTAG_TCK
0
0
0
0
0
0
0
0
CAP0_DATA13
133
132
0
0
DSP1_CTRL0
0
CAP0_DATA11
CAP0_DATA12
0
23
PPG0_TOUT2
EINT1
P4_01
0
0
ICU0_IN0
PPG0_TOUT0
EINT0
OCU4_OTD1
ICU4_IN1
PPG4_TOUT2
EINT9
P4_09
0
0
PWM2M4
OCU4_OTD0
ICU4_IN0
PPG4_TOUT0
EINT8
P4_08
MFS2_CS1
0
C_L
A
0
0
0
0
-
10
147
S
0
0
ICU2_IN1
PPG2_TOUT2
0
0
0
0
0
0
0
0
0
0
VCC12
-
11
146
-
DVCC
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
AVSS_LVDS_PLL
-
12
145
-
DVSS
0
0
0
0
0
0
0
0
0
0
P4_00
0
OCU11_OTD1
SCK0
TOT2
0
CAP0_DATA7
DSP0_DATA_D2+
DSP0_DATA0_2
D
38
119
-
AVCC5
0
0
0
0
0
0
0
0
ICU0_IN0
OCU0_OTD0
0
TIN2
0
CAP0_DATA8
DSP0_DATA_D2-
DSP0_DATA1_2
D
39
118
H
ADTRG
0
SGA3
TOT35
OCU5_OTD0
ICU5_IN0
PPG5_TOUT0
EINT2
P3_18
Package Pin Number
Condition on PCB
2, 5, 6, 9, and 12 to 27
Set to ground
3, 4, 7, 8
Open
0
0
0
0
0
0
0
0
0
0
0
0
0
0
VCC5
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
AVRH5
0
VCC12
-
VCC12
-
AVSS
121
120
0
P4_04
0
P3_30
EINT14
0
P3_31
EINT15
PPG11_TOUT2
ICU11_IN1
PPG11_TOUT0
ICU11_IN0
OCU11_OTD0
PWM1M2
OCU11_OTD1
PWM2P2
0
0
0
0
AN35
S
AN36
S
P4_02
MFS2_CS0
0
MFS0_CS0
P4_06
0
P4_03
EINT3
PPG1_TOUT2
EINT2
PPG1_TOUT0
P4_05
EINT5
P4_07
EINT7
PPG3_TOUT2
EINT6
PPG3_TOUT0
EINT4
PPG2_TOUT0
ICU2_IN0
OCU2_OTD0
ICU1_IN1
OCU1_OTD1
PWM2P3
0
0
VSS
-
117
0
P3_28
B
DSP1_DATA0_0
ICU0_IN1
OCU0_OTD0
PWM2M3
0
PWM1M3
0
0
C
115
0
0
EINT12
TxDOUT1-
0
OCU0_OTD1
PWM2M2
0
SCK2
0
116
42
0
0
PPG10_TOUT0
0
0
PWM1P3
0
SIN2
AN41
SOT2
AN39
0
40
41
DSP0_DATA1_3
0
0
0
0
ICU10_IN0
0
0
0
0
AN40
S
0
D
VSS
D
DSP0_DATA0_3
DSP0_DATA_D3CAP0_DATA9
CAP0_DATA10
DSP0_DATA_D3+
0
TXEN
0
0
0
0
0
TIN3
0
0
0
TOT3
OCU0_OTD1
ICU0_IN1
OCU1_OTD0
0
0
0
ICU1_IN0
EINT2
0
0
0
0
PPG0_TOUT2
EINT1
P0_01
PPG1_TOUT0
P0_00
0
0
0
0
0
0
OCU10_OTD0
0
123
34
BN1(BLPWM2M1
0
0
ICU11_IN1
PPG0_TOUT0
37
0
0
122
35
D
AN33
0
0
DSP0_DATA_D1-
PPG11_TOUT2
EINT0
D
36
D
DSP0_DATA0_1
S
0
0
CAP0_DATA6
EINT15
DSP0_DATA1_1
D
DSP0_DATA0_0
DSP0_DATA_D0+
DSP0_DATA1_0
DSP0_DATA_D0CAP0_DATA4
DSP0_DATA_D1+
CAP0_DATA5
0
134
0
0
TIN1
P5_31
P6_00
0
CAP0_DATA3
0
TOT0
0
TIN0
0
TOT1
0
OCU10_OTD1
0
OCU9_OTD1
ICU9_IN1
OCU10_OTD0
ICU10_IN0
PPG10_TOUT0
ICU10_IN1
PPG10_TOUT2
EINT13
PPG9_TOUT2
EINT11
P5_27
EINT12
P5_28
0
0
0
0
DSP0_CTRL7
PWM1P5
0
ICU3_IN1
P3_29
0
DSP0_CTRL8
SOT0
0
0
0
P5_29
0
0
0
0
0
DSP0_CTRL9
0
SIN3
OCU3_OTD1
ICU3_IN0
OCU3_OTD0
EINT13
0
0
0
OCU11_OTD0
0
0
0
0
0
0
0
0
0
0 SIN12
0
0
0
OCU2_OTD1
PPG10_TOUT2
0
0
ICU11_IN0
0
0
0
0
0
0
0
0
0
0
0
0 SOT11
0
AN45
PWM2P4
ICU10_IN1
0
0 SCK11 DSP0_CTRL10
PPG11_TOUT0
0
0
0
0
0
22
0 SIN11 DSP0_CTRL11
0
0
0
PWM1P4
OCU10_OTD1
21
B
0
EINT14
0
0
0
0
0
0
0
0
0
0
0
0
B
TxDOUT1+
0
AN46
S
0
PWM1M4
0
PWM1P2
TxCLK-
0
0
S
150
SCK3
0
P5_30
0
0
0
0
0
0
0
0
151
7
AN44
SOT3
AN43
0
0
0
TOP VIEW
TEQFP-208
0
0
0
0
0
0
0
0
AN42
0
0
0
0
6
A
S
0
0
0
0
139
18
0
0
0
138
19
B
TxDOUT2-
B
TxDOUT2+
0
0
0
0
0
AN34
0
0
0
0
0
0
DVSS
B
0
0
0
0
0
0
0
DVCC
TxCLK+
0
0
0
0
0
0
S
0
0
0
0
0
0
0
0
0
-
0
0
0
0
0
0
-
0
0
0
0
0
0
137
0
0
0
0
0
0
OCU2_OTD0
0
AN37
S
144
S
142
15
136
0
0
0
0
0
0
0
OCU0_OTD1
AN38
S
143
14
135
0
0
0
0
0
0
20
0
0
0
OCU1_OTD0 SGA1
S
140
13
-
OCU1_OTD1 SGO1
141
17
-
OCU2_OTD0
16
B
-
0
B
TxDOUT30
ICU2_IN0
TxDOUT3+
0
ICU0_IN1
0
0
0
0
ICU1_IN0
0
0
0
0
0
0
ICU1_IN1
0
0
0
0
ICU2_IN0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
ICU1_IN0
0
0
0
0
0
0
PPG2_TOUT0
OCU1_OTD0
0
0
0
0
PPG0_TOUT2
VSS_LVDS_Tx
0
0
0
0
0
0
PPG1_TOUT0
VCC3_LVDS_Tx
0
0
0
0
PPG1_TOUT2
-
DAC_L
149
0
AVCC3_LVDS_PLL
0
0
0
PPG2_TOUT0
AVCC3_DAC
8
S
148
9
0
0
0
0
0
0
0
0
0
0
0
VSS
AVSS
EINT4
0
0
0
0
SEG0
0
0
0
0
0
0 0 P5_20
0
0
0
0
0
0 0 P4_25 COM3 EINT9
0
0
0
0
0 0 P4_26 COM2 EINT10
0
0
0
0 0 P4_27 COM1 EINT11
0
0
0
0
0
0 0 P4_28 COM0 EINT12
0
0
0
0 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
EINT12
PPG6_TOUT0
0
0
0
0
0
0
0
ICU6_IN0
OCU6_OTD0
PWM2M5
TX1
0
0
0
0
0
0
DVSS
SIN4
AN49
S
154
3
155
○
2
-
0
0
0
0
0
0
0
P4_10
0
0
0
0
0
0
P4_11
EINT10
0
0
0
0
0
0
0
0
EINT11
PPG5_TOUT0
0
0
0
0
0
0
PPG5_TOUT2
ICU5_IN0
0
0
0
0
0
0
0
0
0
ICU5_IN1
OCU5_OTD0
0
0
0
0
0
0
OCU5_OTD1
PWM1M5
0
0
0
0
0
0
PWM2P5
0
0
0
0
0
0
0
0
0
0
RX1
SOT4
0
0
0
0
0
0
SCK4
AN47
0
0
DVCC
0
AN48
S
0
0
-
MFS4_SCL
S
152
0
0
1
MFS4_SDA
153
5
0
0
-
MFS0_CS2
4
-
MFS0_CS1
A
0
0
VSS
0
MFS0_CS3
A
C_R
AVSS
0
0
156
0
AVSS
DAC_R
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
P4_12
0
0
0
0
4. Package and Pin Assignment
D a t a S h e e t ( P r e l i m i n a r y )
Figure 4-12: TEQFP-208 (S6J324CLxx)
OCU3_OTD0 SGA1 TOT33 SIN10
OCU2_OTD1 SGA0 TIN32 SCK10
OCU2_OTD0 SGO0 TOT32 SOT10
SIN9
SCK9
SOT9
0
0
0
0
TX6
RX6
TX5
RX5
0
0
TX5
RX5
0
0 DSP1_DATA0_11
0 DSP1_DATA1_11
0
0
0
0
0
0
0
0
0
0
0
0
0
0
VCC53
VSS
VCC5
X0A
X1A
AN25
AN24
AN23
AN22
AN21
AN20
AN17
AN16
AN15
Y
Y
Y
Y
-
-
-
X
X
W
W
W
W
W
W
V
V
V
180
179
178
177
176
175
174
173
172
171
170
169
168
167
166
165
164
163
162
161
160
157
OCU3_OTD1 SGO1 TIN33 SOT11
0 TIN18
0
OCU4_OTD0 SGA2 TOT34 SCK11
OCU0_OTD0 WOT TOT18
0
0
0 DSP1_DATA1_10
Y
181
-
0
0
OCU4_OTD1 SGO2 TIN34 SIN11
OCU0_OTD1
0
0
AP0(AH0)
0 DSP1_DATA0_10
Y
182
VCC5
ICU0_IN0
0
0
AN0(AL0)
DSP1_DATA1_9
Y
0
ICU0_IN1
0
0
BP0(BH0)
DSP1_DATA0_9
-
Y
0
0
ICU2_IN0
0
0
0
DSP1_DATA1_8
183
0
0
0
0
ICU2_IN1
0
0
0
0
VCC12
DSP1_DATA0_8
184
0
0 0
0
0
ICU3_IN0
0
0
BN0(BL0)
0
185
0
0 0
0
PPG0_TOUT0 PPG6/7/8/9/10/11_TIN
V2 EINT7 PPG11_TOUT2
V3 EINT3
PPG0_TOUT2
0
ICU4_IN0
FRT4/5/6/7_TEXT ICU3_IN1
OCU0_OTD1
0
0
0
AP1(AH1)
0
-
0
0 0 P2_19
V1 EINT8
PPG2_TOUT0
0
ICU4_IN1
0
OCU0_OTD0
0
0
0
AN1(AL1)
0
VCC12
-
0
0 0 P3_07
V0 EINT9
PPG2_TOUT2
0
ICU0_IN1
0
0
0
SOT8
0
BN1(BL1)
BP1(BH1)
VSS
0
0
0 0 P3_08
PPG3_TOUT0
0
0
ICU0_IN0
0
0
0
SIN8
SCK8
0
VCC53
0
0
0 0 P3_09
PPG3_TOUT2
0
0
OCU3_OTD0 SGA3
0
0
0
0
0
MFS8_CS0 0 P3_12 SEG29 EINT12
PPG4_TOUT0
0
0
0
OCU3_OTD1 SGO3
OCU2_OTD1
0
0
0
0
158
0
0
MFS9_CS0 0 P3_13 SEG28 EINT13
PPG4_TOUT2
0
ICU2_IN1
0
0
0
-
0
0
MFS9_CS1 0 P3_14 SEG27 EINT14
PPG0_TOUT2
0
ICU3_IN0
OCU4_OTD0
0
0
0
VSS
0
0
EINT0
MFS8_CS3 0 P3_15 SEG26 EINT15
0
PPG0_TOUT0
0
ICU3_IN1
OCU4_OTD1
0
0
186
0
0
0
MFS8_CS1 0 P3_16 SEG25
EINT1
0
0
ICU4_IN0
OCU5_OTD0
0
0
0
187
0
0
0
MFS8_CS2 0 P3_17 SEG24
EINT1
0
0
ICU4_IN1
OCU5_OTD1
0
Y
0
0
0
0
0
EINT0
PPG2_TOUT2
0
ICU5_IN0
0
OCU6_OTD0
0
0
Y
0
0
0
0
PPG3_TOUT0
0
ICU5_IN1
0
DSP1_DATA1_7
0
0
0
0 0 P2_17
0
0
PPG3_TOUT2
0
0
ICU6_IN0
0
0
DSP1_DATA0_7
0
0
0
0
0
PPG4_TOUT0
0
0
0
0
0
0
0 0
0
0 INDICATOR0_1 0 P2_16
0
0 0
0
PPG4_TOUT2
0
0
0
0
0
0
0
0 0 P4_29 SEG23 EINT13
PPG5_TOUT0
0
0
0
0
0
0
0 0 P4_30 SEG22 EINT14
0
EINT0
0 0 P4_31 SEG21 EINT15
0 0
EINT1
PPG5_TOUT2
0
0
0
0
0
0
0 0 P5_00 SEG20
EINT2
0
PPG6_TOUT0
0
0
159
0
0
0 0 P5_01 SEG19
EINT3
0
0
SOT9
U
0
0
0 0 P5_02 SEG18
0
EINT4
0
0
0
0
0
0 0 P5_03 SEG17
0
0
0
0
0
0
0
0 0 P5_04 SEG16
0
0
0
0
0
0
0
0
0
0
0
0
0 0
0
OCU6_OTD1
0
0
0
0
0
OCU7_OTD0
0
0
0
0
ICU6_IN1
0
0
0
0 0
0
ICU7_IN0
ICU1_IN1
0
0 0
0
TIN48
0
0
0 0
0
0
0
0
PPG6_TOUT2
0 TOT17
0
0
PPG7_TOUT0
FRT0/1/2/3_TEXT ICU11_IN1 OCU11_OTD1
0
EINT5
0
0
EINT6
0
0
0
0 0 P5_05 SEG15
0
0
0 0 P5_06 SEG14
0
0
0
0
0
0
0
0
0
0
0
0
VCC5
0
188
0
Y
115
0
DSP1_DATA1_6
42
0
0
0
0
VSS
OCU1_OTD0
SCK9
0
ICU1_IN0
0
0
PPG1_TOUT0
0
0
EINT2
OCU7_OTD1
0
P0_01
ICU7_IN1
0
0
0
0
0
PPG7_TOUT2
0
0
EINT7
0
0
0 0 P5_07 SEG13
0
0
0
0
0
0
0
0
189
0
OCU0_OTD1
190
VSS
ICU0_IN1
Y
-
PPG0_TOUT2
Y
116
EINT1
DSP1_DATA0_6
41
P0_00
DSP1_DATA1_5
D
0
0
DSP0_DATA1_3
0
0
DSP0_DATA_D30
0
CAP0_DATA10
0
0
TXEN
0
0
TIN3
0
SIN9
0
TIN2
0
0
0
0
0
SCK0
OCU0_OTD0
0
0
SOT0
OCU11_OTD1
ICU0_IN0
AIN8
0
OCU11_OTD0
ICU11_IN1
PPG0_TOUT0
OCU8_OTD0
0
OCU10_OTD1
ICU11_IN0
PPG11_TOUT2
EINT0
OCU8_OTD1
0
0
OCU10_OTD0
ICU10_IN1
PPG11_TOUT0
EINT15
P6_00
ICU8_IN0
0
OCU9_OTD1
ICU10_IN0
PPG10_TOUT2
EINT14
P5_31
0
ICU8_IN1
C
ICU9_IN1
PPG10_TOUT0
EINT13
P5_30
0
0
0
-
PPG9_TOUT2
EINT12
P5_29
0
0
0
0
117
EINT11
P5_28
0
0
0
0
PPG8_TOUT0
40
P5_27
0
0
0
0
0
PPG8_TOUT2
D
0
0
0
0
0
0
EINT8
DSP0_DATA0_3
0
0
0
0
0
EINT9
DSP0_DATA_D3+
0
0
0
0
0 0 P5_08 SEG12
CAP0_DATA9
0
0
0
0 0 P5_09 SEG11
0
0
0
0
P3_18
TOT3
0
0
0
EINT2
D
0
0
0
PPG5_TOUT0
DSP0_CTRL2
0
0
0
0
ICU5_IN0
DSP0_CLK-
191
0
0
0
0
OCU5_OTD0
CAP0_DATA2
Y
0
0
0
0
0
TOT35
0
DSP1_DATA0_5
0
0
0
0
0
SGA3
DSP0_DATA1_4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
ADTRG
OCU4_OTD0
0 SOT10
0
0
0
0
AVCC5
H
ICU4_IN0
OCU9_OTD0 BIN8
0
0
0
AVRH5
118
PPG4_TOUT0
ICU9_IN0
0
0
AVSS
119
39
EINT0
0
0
VCC12
120
38
D
P0_19
PPG9_TOUT0
VCC12
121
37
D
DSP0_DATA1_2
0
MFS8_CS0 0 P5_10 SEG10 EINT10
122
36
D
DSP0_DATA0_2
DSP0_DATA_D20
0 MFS10_SDA
123
35
D
DSP0_DATA1_1
DSP0_DATA_D2+
CAP0_DATA8
0
192
34
D
DSP0_DATA0_1
DSP0_DATA_D1-
CAP0_DATA7
0
0
Y
D
DSP0_DATA1_0
DSP0_DATA_D1+
CAP0_DATA6
0
0
DSP1_DATA1_4
DSP0_DATA0_0
DSP0_DATA_D0-
CAP0_DATA5
0
DSP0_DATA1_11
0
DSP0_DATA_D0+
CAP0_DATA4
0
TIN1
TOT2
32
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
D
D
D
D
D
C
-
-
E
-
-
E
E
E
E
E
-
E
-
-
E
E
E
E
E
-
-
F
F
F
-
-
-
G
H
J
J
I
I
I
I
J
J
I
I
I
I
I
L
-
VCC3
DSP0_DATA0_9 DSP0_DATA_D9+ CAP0_DATA21 0
DSP0_DATA1_9 DSP0_DATA_D9-
DSP0_DATA1_11 DSP0_DATA_D11- CAP0_CLK
DSP0_CTRL0
VCC12
VSS
M_SCLK0
VSS
VCC3
M_SDATA0_0
M_SDATA0_2
M_SDATA0_1
M_SSEL0
M_SDATA0_3
VSS
0
VSS
VCC3
M_SDATA1_0
M_SDATA1_2
M_SDATA1_1
M_SSEL1
M_SDATA1_3
VSS
VCC3
MLBDAT
MLBSIG
MLBCLK
VCC12
VSS
VCC5
PSC_1
0
AN1
AN2
AN3
AN5
AN6
AN7
AN8
AN9
AN10
AN11
AN12
AN13
AN14
NMIX
VCC5
DSP0_CTRL2
0
0
0
0
0
G_SDATA1_0
G_SDATA1_2
G_SDATA1_1
G_SSEL1
G_SDATA1_3
0
G_SCLK0
0
0
G_SDATA0_0
G_SDATA0_2
G_SDATA0_1
G_SSEL0
G_SDATA0_3
0
0
DSP0_CTRL2
DSP0_CTRL3
DSP0_CTRL4
0
0
0
0
0
SOT0
SCK0
SIN0
SOT1
SCK1
SIN1
SOT16
SCK16
SIN16
SOT8
SCK8
SIN8
0
0
0
CAP0_DATA34 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
SOT17
SCK17
SIN17
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
CAP0_DATA25 0
0
0
CAP0_DATA24 0
0
0
0
0
0
0
0
0
MFS17_SDA
MFS17_SCL
0
0
0
0
MFS16_SDA
MFS16_SCL
0
0
0
0
0
0
0
RXCLK TIN33 I2S0_SCK
DSP0_DATA1_10 DSP0_DATA_D10- CAP0_DATA32 CAP0_DATA35 RXDV TIN34 I2S1_SD
DSP0_DATA0_11 DSP0_DATA_D11+ CAP0_DATA33 0
TXCLK TOT33 I2S0_WS
COL
0
TXER
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
CRS
0
0
0
0
0
0
0
0
0
0
0
0
0
0
RX0
TX0
RX1
TX1
0
0
TOT35 I2S1_WS
TIN35 I2S1_SCK
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TIN1
TIN2
TIN3
TOT0
TOT1
TOT2
TOT3
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
SGA0
SGA1
SGO1
SGO2
SGA3
SGO3
SGO0
SGA0
SGA1
SGO1
TOT16 SGO2
TIN17 0
0
0
TIN16 SGA2
0
0
TIN49 0
0
0
0
0
0
0
0
DSP0_DATA0_10 DSP0_DATA_D10+ CAP0_DATA23 CAP0_DATA32 RXER TOT34 I2S1_ECLK 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
OCU9_OTD0
OCU8_OTD1
OCU5_OTD1
0
0
OCU6_OTD0
OCU7_OTD0
OCU6_OTD1
OCU8_OTD0
OCU7_OTD1
0
0
0
0
0
0
OCU3_OTD0
OCU5_OTD1
OCU8_OTD0
OCU8_OTD1
OCU9_OTD0
OCU9_OTD1
ICU8_IN1
ICU9_IN0
0
0
0
0
ICU9_IN0
ICU9_IN1
ICU8_IN1
0
ICU5_IN1
0
0
ICU6_IN0
ICU7_IN0
ICU6_IN1
ICU8_IN0
ICU7_IN1
0
0
0
0
ICU4_IN1
0
0
0
0
ICU3_IN0
ICU4_IN1
ICU5_IN0
ICU5_IN1
ICU6_IN1
ICU7_IN0
ICU7_IN1
ICU8_IN0
ICU8_IN1
ICU9_IN0
ICU9_IN1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
PPG6_TOUT2
PPG7_TOUT0
PPG7_TOUT2
PPG8_TOUT0
PPG8_TOUT2
PPG9_TOUT0
0
0
0
PPG9_TOUT0
PPG8_TOUT2
PPG5_TOUT2
0
0
PPG6_TOUT0
PPG7_TOUT0
PPG6_TOUT2
PPG8_TOUT0
PPG7_TOUT2
0
0
0
0
PPG4_TOUT2
0
0
0
0
PPG3_TOUT0
PPG4_TOUT2
PPG5_TOUT0
PPG5_TOUT2
PPG6_TOUT2
PPG7_TOUT0
PPG8_TOUT0
PPG8_TOUT2
PPG9_TOUT0
PPG9_TOUT2
EINT1
EINT2
0
0
0
0
0
0
EINT6
EINT8
EINT7
0
0
EINT1
EINT2
EINT3
0
0
0
0
EINT6
EINT9
0
0
0
P0_30 M_RWDS_0
0
0
P1_00 M_DQ5_0
P1_02 M_DQ7_0
P0_28 0
0
0
0
0
0
P2_25 0
P3_00 0
P3_01 0
P3_02 0
P3_03 0
P3_04 0
P3_05 0
P3_06 0
0
0
P2_22 0
0
0
P0_27 0
0
0
P0_26 0
0
0
P1_01 M_DQ4_0
0
0
P0_31 M_CS#2_0
0
0
EINT15 P2_31 0
PPG11_TOUT0 EINT6
0
0
EINT14 P2_30 0
EINT3
0
0
P1_09 M_CK_0
EINT13 P2_29 0
EINT2
0
0
0
0
0
G_DQ4_2
G_DQ5_2
G_DQ6_2
G_DQ7_2
0
0
0
0
0
G_CK_1
0
0
G_DQ3_1
G_DQ2_1
G_DQ1_1
G_DQ0_1
0
0
G_DQ5_1
G_DQ6_1
G_DQ7_1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
DSP0_CTRL2
DSP0_CLK
DSP0_CTRL0
DSP0_CTRL1
0
0
0
0
0
0
0
0
0
0
0
G_CS#2_1 0
G_DQ4_1
0
G_RWDS_1 0
0
0
G_CS#1_1 0
EINT11 P2_27 INDICATOR0_0 0
EINT1
0
EINT10 P2_26 0
EINT0
P5_22 0
EINT10 P1_03 M_DQ6_0
EINT9
P0_17 0
EINT11 P1_04 M_DQ0_0
EINT5
P0_16 0
EINT13 P1_06 M_DQ1_0
0
P0_15 0
EINT12 P1_05 M_DQ3_0
PPG10_TOUT2 EINT5
0
EINT0
PPG10_TOUT0 EINT4
0
EINT15 P0_14 0
PPG10_TOUT2 EINT15 P1_08 M_CS#1_0
0
EINT14 P0_13 0
PPG10_TOUT0 EINT14 P1_07 M_DQ2_0
PPG9_TOUT2
EINT13 P0_12 0
PPG11_TOUT0 EINT0
0
0
PPG10_TOUT0 EINT4
FRT8/9/10/11_TEXT PPG7_TOUT2
OCU11_OTD0 ICU11_IN0 0
0
0
OCU10_OTD1 ICU10_IN1 0
0
ICU8_IN0
OCU10_OTD0 ICU10_IN0 0
0
ICU7_IN1
OCU10_OTD1 ICU10_IN1 0
0
ICU7_IN0
OCU10_OTD0 ICU10_IN0 0
OCU9_OTD1
ICU6_IN1
OCU11_OTD0 ICU11_IN0 0
ZIN9 OCU7_OTD1
0
0
0
OCU10_OTD0 ICU10_IN0 0
BIN9 OCU7_OTD0
0
OCU9_OTD0
AIN9 OCU6_OTD1
0
OCU8_OTD1
ZIN8 OCU5_OTD0
0
OCU8_OTD0
BIN8 OCU4_OTD1
0
OCU7_OTD1
SIN1 OCU4_OTD1
0
OCU7_OTD0
SCK1 0
0
OCU6_OTD1
SOT1 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TRACE0
TRACE1
TRACE2
TRACE3
TRACE_CLK
TRACE_CTL
0
0
0
0
CAP0_DATA22 0
0
0
0
60
D
0
59
-
0
58
0
57
0
56
0
55
0
54
0
53
Package Pin Number
Condition on PCB
12 to 27
Set to ground
0
0
0
0
0
0
0
0
JTAG_TDO
0
CAP0_DATA3
0
TOT1
D
O
0
0
TIN0
0
DSP0_CLK
109
0
TOT0
0
DSP0_CLK+
0
0
CAP0_DATA1
0 SCK10
0
MDIO
ZIN8
0
0
OCU9_OTD1
0
0
ICU9_IN1
0
OCU3_OTD1
0
0
ICU3_IN1
PPG9_TOUT2
0
PPG3_TOUT2
SEG9 EINT11
0
EINT15
MFS9_CS0 0 P5_11
VSS
P0_18
0 MFS10_SCL
-
0
193
124
0
194
33
0
-
0
0
Y
0
0
VCC53
0
DSP0_DATA0_11
DSP1_DATA0_4
0
31
0
27
-
0
-
0
0
30
C
VSS
0
0
-
DSP0_CTRL1
0
VCC12
0
0
0
VCC3
0
0
0 SIN10
VCC3_LVDS_Tx
0
0
0
0
CAP0_DATA0
0
DVSS
0
MDC
0
0
0
0
0
0
AIN9
-
0
DSP0_DATA0_4
0
125
0
0
0
0
0
OCU9_OTD1
0 ICU10_IN0 OCU10_OTD0
0
0
0
0
ICU9_IN1
0
P3_22
P3_21
0
0
PPG9_TOUT2
0
EINT6
EINT5
0
0
EINT3
0
PPG7_TOUT0
PPG6_TOUT2
0
29
0
P5_21
0
ICU7_IN0
ICU6_IN1
0
-
0
0
SEG8 EINT12 PPG10_TOUT0
0
0
0
0
0
0 0
0
0
MFS9_CS1 0 P5_12
0
0
0
0
0
0
0
0
0
0
0
26
195
-
-
VSS_LVDS_Tx
VSS
0
0
0
0
0
0
P3_23
0
0
P3_24
EINT7
0
0
EINT8
PPG7_TOUT2
0
0
PPG8_TOUT0
ICU7_IN1
0
0
ICU8_IN0
OCU7_OTD1
0
0
OCU8_OTD0
BP0(BHPWM2P0
0
0
BN0(BLPWM2M0
0
0
0
0
AN28
0
0
AN29
S
0
0
S
0
0
130
0
0 0
OCU7_OTD0
OCU6_OTD1
0
0
0
0
0
28
0
0
0
0
0
P3_25
0
196
EINT9
25
Y
PPG8_TOUT2
24
B
DSP1_DATA1_3
0
0
TxDOUT1+
B
22
135
-
DVSS
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TxDOUT1-
B
23
134
S
AN33
0
BN1(BLPWM2M1
OCU10_OTD0
ICU10_IN0
PPG10_TOUT0
EINT12
P3_28
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
VCC3
-
43
114
Q
RSTX
0
0
0
0
0
0
0
0
CAP0_DATA11
G_CK_2
0
0
0
0
P0_04
EINT5
PPG2_TOUT2
ICU2_IN1
OCU2_OTD1
0
TOT17
TXD0
CAP0_DATA13
DSP0_DATA_D5+
DSP0_DATA0_5
D
44
113
P
MODE
0
0
0
0
0
0
0
0
CAP0_DATA12
G_DQ3_2
0
0
0
0
P0_05
EINT6
PPG3_TOUT0
ICU3_IN0
OCU3_OTD0
SIN0
TIN17
TXD1
CAP0_DATA14
DSP0_DATA_D5-
DSP0_DATA1_5
D
45
112
N2
JTAG_TMS
0
0
0
0
0
0
0
0
CAP0_DATA13
G_DQ2_2
0
0
0
0
P0_06
EINT7
PPG3_TOUT2
ICU3_IN1
OCU3_OTD1
0
TOT18
TXD2
CAP0_DATA15
DSP0_DATA_D6+
DSP0_DATA0_6
D
46
111
N2
JTAG_TCK
0
0
0
0
0
0
0
0
CAP0_DATA14
G_DQ1_2
0
0
0
0
P0_07
EINT8
PPG4_TOUT0
ICU4_IN0
OCU4_OTD0
0
TIN18
TXD3
CAP0_DATA16
DSP0_DATA_D6-
DSP0_DATA1_6
D
47
110
N2
JTAG_TDI
0
0
0
0
0
0
0
0
DSP0_DATA_D7-
DSP0_DATA1_7
D
49
108
N
JTAG_NTRST
0
0
0
0
0
0
0
0
0
P0_10
EINT11
PPG5_TOUT2
ICU5_IN1
OCU5_OTD1S0_ECLK
TOT32
RXD2
CAP0_DATA19
DSP0_DATA_D8+
DSP0_DATA0_8
D
50
107
M
X0
0
0
0
0
0
0
0
0
0
0
P0_11
EINT12
PPG6_TOUT0
ICU6_IN0
OCU6_OTD0 I2S0_SD
TIN32
RXD3
CAP0_DATA20
DSP0_DATA_D8-
DSP0_DATA1_8
D
51
106
M
X1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
VSS
-
52
105
-
VSS
0
0
0
0
0
0
0
0
35
June 30, 2015, S6J3200_DS708-00003-0v04-E
ICU8_IN1
B
TxDOUT0-
0
0
0
DSP0_CTRL0
0
0
0
0
0
0
0
0
0 ICU10_IN1 OCU10_OTD1 BIN9
0
0
SEG7 EINT13 PPG10_TOUT2
0
0
0 0 P5_13
P3_29
0
0
0
0
P3_30
EINT13
0
0
0
0
P3_31
EINT14
PPG10_TOUT2
0
0
197
P4_00
EINT15
PPG11_TOUT0
ICU10_IN1
0
0
Y
EINT0
PPG11_TOUT2
ICU11_IN0
OCU10_OTD1
0
0
DSP1_DATA0_3
PPG0_TOUT0
ICU11_IN1
OCU11_OTD0
PWM1P2
0
0
0
ICU0_IN0
OCU11_OTD1
PWM1M2
0
0
0
DSP0_CTRL1
OCU0_OTD0
PWM2P2
0
0
DVCC
0
0 SOT11
PWM2M2
0
0
AN34
0
ZIN9
0
0
AN35
S
136
0
0 ICU11_IN0 OCU11_OTD0
0
AN36
S
137
21
0
SEG6 EINT14 PPG11_TOUT0
AN37
S
138
20
B
0
MFS8_CS3 0 P5_14
S
139
19
B
TxCLK0
0
140
18
B
TxCLK+
0
0
0
0
17
B
TxDOUT2-
0
0
0
0
0
198
B
TxDOUT2+
0
0
0
0
0
0
0
199
TxDOUT3-
0
0
0
0
0
0
0
0
0
Y
0
0
0
0
0
0
0
0
0
0
Y
0
0
0
0
0
0
0
0
0
0
DSP1_DATA1_2
0
0
0
0
0
0
0
0
0
DSP1_DATA0_2
0
0
0
0
0
0
0
DSP1_CLK
0
0
0
0
0
DSP0_CTRL2 DSP1_CTRL2
0
0
0
DSP0_CTRL3
0
0
0 SCK11
0
0
0
0 SIN11
0
P4_01
0
0
P4_02
EINT1
0
0
EINT2
PPG0_TOUT2
0
OCU0_OTD0
PPG1_TOUT0
ICU0_IN1
0
ICU0_IN0
ICU1_IN0
OCU0_OTD1
0
0 ICU11_IN1 OCU11_OTD1
OCU1_OTD0
PWM1P3
0
0
PWM1M3
0
0
PPG0_TOUT0
0
0
0
EINT0
SOT2
AN38
0
SEG5 EINT15 PPG11_TOUT2
AN39
S
0
SEG4
S
141
0
0
MFS8_CS1 0 P5_15
142
16
0
0
MFS8_CS2 0 P5_16
15
B
0
0
0
-
TxDOUT3+
0
0
0
VSS_LVDS_Tx
0
0
0
0
0
0
0
0
0
0
0
0
0
200
0
0
0
0
Y
0
0
0
0
DSP1_DATA1_1
0
0
0
DSP0_CTRL4 DSP1_CTRL0
0
0
0
0
0
0
P4_03
0
0
EINT3
0
OCU0_OTD1
PPG1_TOUT2
0
ICU0_IN1
ICU1_IN1
0
0
OCU1_OTD1
0
PPG0_TOUT2
PWM2P3
0
EINT1
0
0
SEG3
SCK2
0
0 0 P5_17
AN40
0
0
S
0
0
143
0
201
14
0
Y
0
DSP1_DATA0_1
VCC3_LVDS_Tx
0
DSP0_CTRL5 DSP1_CTRL1
0
0
0 SOT12
0
0
0
0
0
OCU1_OTD0
0
0
ICU1_IN0
0
0
0
0
0
PPG1_TOUT0
P4_04
0
EINT2
EINT4
0
SEG2
PPG2_TOUT0
0
MFS12_SDA 0 P5_18
ICU2_IN0
0
0
OCU2_OTD0
0
0
PWM2M3
0
202
0
0
Y
SIN2
0
DSP1_DATA1_0
AN41
0
0
S
0
DSP0_CTRL6
144
0
0 SCK12
13
0
0
0
OCU1_OTD1
AVCC3_LVDS_PLL
0
ICU1_IN1
0
0
0
0
0
PPG1_TOUT2
0
0
0
EINT3
0
0
SEG1
0
0
MFS12_SCL 0 P5_19
0
0
0
0
0
0
0
0
0
0
0
203
0
0
0
204
0
0
0
205
0
0
0
206
0
0
0
207
DVSS
0
0
208
-
0
0
-
145
0
0
Y
12
0
0
Y
0
0
Y
AVSS_LVDS_PLL
0
0
Y
0
0
0
Y
0
0
VCC53
0
0
DSP1_CLK
0
0
0
DSP1_CTRL2
P4_05
0
0
DSP1_CTRL1
EINT5
0
0
DSP1_CTRL0
PPG2_TOUT2
0
0
DSP1_DATA0_0
ICU2_IN1
0
0
0
OCU2_OTD1
0
0
0
PWM1P4
0
0
0
0
0
0
0
0
DVCC
0
0
AN42
-
0
0
S
146
0
0
147
11
0
DSP0_CTRL7
10
0
DSP0_CTRL8
-
VCC12
0
DSP0_CTRL9
VSS
0
0
0
0
0
C_L
0 SIN12
MFS0_CS0
0
0
P4_06
0
0 SOT11
EINT6
0
0 SCK11 DSP0_CTRL10
PPG3_TOUT0
0
0 SIN11 DSP0_CTRL11
ICU3_IN0
0
0
OCU3_OTD0
0
0
PWM1M4
0
0
0
0
0
SOT3
0
0
AN43
0
0
S
0
OCU2_OTD0
148
0
OCU0_OTD1
9
0
OCU1_OTD0 SGA1
0
OCU1_OTD1 SGO1
0
AVSS
0
OCU2_OTD0
MFS2_CS0
0
0
P4_07
A
ICU2_IN0
EINT7
-
DAC_L
ICU0_IN1
PPG3_TOUT2
AVCC3_DAC
0
ICU1_IN0
ICU3_IN1
0
0
ICU1_IN1
OCU3_OTD1
0
0
ICU2_IN0
PWM2P4
0
0
0
0
0
0
0
SCK3
0
0
0
AN44
0
0
0
S
0
0
0
149
0
0
0
8
0
0
0
0
A
0
0
PPG2_TOUT0
0
MFS2_CS1
0
0
PPG0_TOUT2
0
P4_08
0
0
PPG1_TOUT0
P4_09
EINT8
0
0
PPG1_TOUT2
EINT9
PPG4_TOUT0
0
0
PPG2_TOUT0
PPG4_TOUT2
ICU4_IN0
0
0
0
ICU4_IN1
OCU4_OTD0
0
EINT4
0
OCU4_OTD1
PWM2M4
5
SEG0
0
PWM1P5
0
4
-
0 0 P5_20
0
SIN3
3
A
AVSS
0 0 P4_25 COM3 EINT9
0
AN45
2
A
C_R
0
0 0 P4_26 COM2 EINT10
AN46
S
-
DAC_R
0
0
0 0 P4_27 COM1 EINT11
MFS4_SDA
S
150
1
AVSS
0
0
0
0 0 P4_28 COM0 EINT12
MFS4_SCL
MFS0_CS3
151
7
-
0
0
0
0
0 0
0
MFS0_CS1
P4_10
6
0
0
0
0
0
0
MFS0_CS2
P4_11
EINT10
0
0
0
0
0
0
P4_12
EINT11
PPG5_TOUT0
0
0
0
0
0
0
0
EINT12
PPG5_TOUT2
ICU5_IN0
0
0
0
0
0
0
0
0
PPG6_TOUT0
ICU5_IN1
OCU5_OTD0
0
0
0
0
0
0
CONFIDENTIAL
0
0
ICU6_IN0
OCU5_OTD1
PWM1M5
0
0
0
0
0
0
Notes:
Any function at the following pins is not supported.
−
AN0(AL PWM1M0
AP0(AH PWM1P0
0
0
0
0
0
48
OCU8_OTD1
TxDOUT0+
0
D
AP1(AH PWM1P1
0
0
0
DSP0_DATA0_7
0
0
DVCC
0
0
0
0
DSP0_DATA_D7+
0
0
0
0
CAP0_DATA17
AN30
0
0
0
RXD0
AN27
AN26
-
0
0
0
0
TOT19
S
0
0
0
0
131
0
0
0
0
S
S
126
0
0
0
0
0
0
0
0
0
OCU5_OTD0
P3_27
P3_26
0
0
0
OCU4_OTD1
128
127
0
0
DSP0_DATA1_10
0
ICU5_IN0
EINT11
EINT10
0
0
0
ICU4_IN1
PPG9_TOUT2
PPG9_TOUT0
0
0
0
PPG5_TOUT0
0
0
OCU6_OTD0
PWM2P5
0
0
0
0
0
0
TOP VIEW
TEQFP-208
0
PPG4_TOUT2
ICU9_IN1
ICU9_IN0
0
0
0
EINT10
0
0
PWM2M5
RX1
SOT4
0
0
0
0
0
0
CAP0_DATA18
0
0
0
P0_09
OCU9_OTD1
OCU9_OTD0
0
0
0
EINT9
P0_08
0
0
TX1
SCK4
AN47
0
0
0
0
0
0
RXD1
0
0
0
0
BP1(BHPWM2P1
AN1(AL PWM1M1
129
0
0
0
SIN4
AN48
S
0
0
0
0
0
0
TIN19
0
G_CS#2_2
0
0
0
0
0
0
0
0
0
0
AN49
S
152
0
0
0
0
0
0
0
G_RWDS_2
0
AN32
AN31
0
0
0
0
DVSS
S
153
0
0
0
0
0
0
G_CS#1_2
0
0
0
0
S
S
0
0
0
DVCC
154
0
0
0
0
0
0
0
0
G_DQ0_2
CAP0_DATA15
133
0
0
0
155
0
0
0
VSS
132
0
0
0
156
0
0
○
0
4. Package and Pin Assignment
D a t a S h e e t ( P r e l i m i n a r y )
Figure 4-13: TEQFP-208 (S6J323CLxx)
0
ICU2_IN0
ICU0_IN1
ICU0_IN0
0
0
0
0
0
0
0
0
OCU3_OTD1 SGO1 TIN33 SOT11
OCU3_OTD0 SGA1 TOT33 SIN10
OCU2_OTD1 SGA0 TIN32 SCK10
OCU2_OTD0 SGO0 TOT32 SOT10
0 TIN18
0
OCU4_OTD0 SGA2 TOT34 SCK11
OCU0_OTD0 WOT TOT18
0
OCU4_OTD1 SGO2 TIN34 SIN11
OCU0_OTD1
0
0
SIN9
SCK9
SOT9
BP0(BH0)
AN0(AL0)
AP0(AH0)
0
0
0
0
0
TX6
RX6
TX5
RX5
0
0
TX5
RX5
0
0
0 DSP1_DATA0_11
0 DSP1_DATA1_11
0
0
0
0
0
0
0
0
0
0
0
0
DSP1_DATA1_9
0 DSP1_DATA1_10
0
DSP1_DATA0_9
0 DSP1_DATA0_10
0
DSP1_DATA1_8
VCC53
VSS
VCC5
X0A
X1A
AN25
AN24
AN23
AN22
AN21
AN20
AN17
AN16
AN15
-
Y
Y
Y
Y
Y
Y
Y
Y
-
-
-
X
X
W
W
W
W
W
W
V
V
V
183
182
181
180
179
178
177
176
175
174
173
172
171
170
169
168
167
166
165
164
163
162
161
160
157
0
0
0
ICU2_IN1
0
0
0
0
VCC12
DSP1_DATA0_8
184
-
0 0
0
0
ICU3_IN0
0
0
BN0(BL0)
0
185
VCC5
0 0
0
PPG0_TOUT0 PPG6/7/8/9/10/11_TIN
V2 EINT7 PPG11_TOUT2
V3 EINT3
PPG0_TOUT2
0
ICU4_IN0
FRT4/5/6/7_TEXT ICU3_IN1
OCU0_OTD1
0
0
0
AP1(AH1)
0
-
0
0 0 P2_19
V1 EINT8
PPG2_TOUT0
0
ICU4_IN1
0
OCU0_OTD0
0
0
0
AN1(AL1)
0
VCC12
-
0
0 0 P3_07
V0 EINT9
PPG2_TOUT2
0
ICU0_IN1
0
0
0
SOT8
0
BN1(BL1)
BP1(BH1)
VSS
0
0
0 0 P3_08
PPG3_TOUT0
0
0
ICU0_IN0
0
0
0
SIN8
SCK8
0
VCC53
0
0
0 0 P3_09
PPG3_TOUT2
0
0
OCU3_OTD0 SGA3
0
0
186
0
0
0
MFS8_CS0 0 P3_12 SEG29 EINT12
PPG4_TOUT0
0
0
0
OCU3_OTD1 SGO3
OCU2_OTD1
0
0
0
0
187
0
0
0
MFS9_CS0 0 P3_13 SEG28 EINT13
PPG4_TOUT2
0
ICU2_IN1
0
0
0
Y
0
0
0
MFS9_CS1 0 P3_14 SEG27 EINT14
PPG0_TOUT2
0
ICU3_IN0
OCU4_OTD0
0
0
0
Y
188
0
0
0
EINT0
MFS8_CS3 0 P3_15 SEG26 EINT15
0
PPG0_TOUT0
0
ICU3_IN1
OCU4_OTD1
0
0
DSP1_DATA1_7
189
0
0
0
MFS8_CS1 0 P3_16 SEG25
EINT1
0
0
ICU4_IN0
OCU5_OTD0
0
0
0
DSP1_DATA0_7
Y
190
0
0
0
MFS8_CS2 0 P3_17 SEG24
EINT1
0
0
ICU4_IN1
OCU5_OTD1
0
0
Y
158
0
0
0
0
EINT0
PPG2_TOUT2
0
ICU5_IN0
0
OCU6_OTD0
0
0
0
DSP1_DATA1_6
Y
-
0
0
0
PPG3_TOUT0
0
ICU5_IN1
0
0
DSP1_DATA0_6
VSS
0
0
0 0 P2_17
0
0
PPG3_TOUT2
0
0
ICU6_IN0
0
0
0
0
DSP1_DATA1_5
0
0
0
0
0
PPG4_TOUT0
0
0
0
0
0
0
0
0 0
0
0 INDICATOR0_1 0 P2_16
0
0 0
0
PPG4_TOUT2
0
0
0
SOT9
0
0
0
0
0
0 0 P4_29 SEG23 EINT13
PPG5_TOUT0
0
0
0
0
0
0
0
0 0 P4_30 SEG22 EINT14
0
EINT0
0 0 P4_31 SEG21 EINT15
0 0
EINT1
PPG5_TOUT2
0
0
0
SCK9
0
0
0
0
0 0 P5_00 SEG20
EINT2
0
PPG6_TOUT0
0
0
0
0
SIN9
0
0
0
0 0 P5_01 SEG19
EINT3
0
0
0
0
0
0
0
0 0 P5_02 SEG18
0
EINT4
0
OCU6_OTD1
0
0
0
0
0
0 0 P5_03 SEG17
0
0
OCU7_OTD0
0
0
0
0
0
0 0 P5_04 SEG16
0
ICU6_IN1
OCU7_OTD1
AIN8
0
0
0
0
0
0
ICU7_IN0
OCU8_OTD0
159
0
0
0 0
0
0
ICU7_IN1
OCU8_OTD1
U
0
0
0
0
0
ICU8_IN0
0
0
0
0
PPG6_TOUT2
0
ICU8_IN1
0
0
0
0 0
0
PPG7_TOUT0
0
0
0
0 0
EINT5
PPG7_TOUT2
0
0
0
0
0 0
EINT6
PPG8_TOUT0
0
0
0
0 0 P5_05 SEG15
EINT7
PPG8_TOUT2
0
0
0
0 0 P5_06 SEG14
EINT8
0
0
0
0 0 P5_07 SEG13
EINT9
ICU1_IN1
0
0
0 0 P5_08 SEG12
TIN48
0
0
0 0 P5_09 SEG11
0
0
0
0
0
DSP1_DATA0_5
Y
191
0 TOT17
0
0
0 SOT10
192
FRT0/1/2/3_TEXT ICU11_IN1 OCU11_OTD1
0
OCU9_OTD0 BIN8
Y
0
0
ICU9_IN0
DSP1_DATA1_4
0
0
193
PPG9_TOUT0
0
194
MFS8_CS0 0 P5_10 SEG10 EINT10
0 SCK10
-
Y
0 MFS10_SDA
ZIN8
VCC53
DSP1_DATA0_4
OCU9_OTD1
0
ICU9_IN1
0
0
0
PPG9_TOUT2
0
SEG9 EINT11
0
0 SIN10
MFS9_CS0 0 P5_11
0
AIN9
0 MFS10_SCL
0
0
0
SEG8 EINT12 PPG10_TOUT0
0 ICU10_IN0 OCU10_OTD0
0
0
0 0
MFS9_CS1 0 P5_12
0
0
0
0
0
0
33
0
D
195
DSP0_CTRL2
-
DSP0_CLK-
VSS
CAP0_DATA2
0
0
0
DSP0_DATA1_4
0
0
0
OCU4_OTD0
0
ICU4_IN0
0
PPG4_TOUT0
0
EINT0
0
P0_19
0
0
0
0
0
0
0
0
0 0
0
0
DSP0_DATA1_11
0
32
196
D
Y
DSP0_CLK
DSP1_DATA1_3
DSP0_CLK+
0
CAP0_DATA1
DSP0_CTRL0
MDIO
0
0
0
0
0 ICU10_IN1 OCU10_OTD1 BIN9
OCU3_OTD1
SEG7 EINT13 PPG10_TOUT2
ICU3_IN1
0 0 P5_13
PPG3_TOUT2
0
EINT15
0
P0_18
197
0
Y
0
0
DSP1_DATA0_3
0
0
0
0
0
DSP0_CTRL1
0
0
0 SOT11
0
DSP0_DATA0_11
ZIN9
0
31
0 ICU11_IN0 OCU11_OTD0
0
C
SEG6 EINT14 PPG11_TOUT0
0
DSP0_CTRL1
MFS8_CS3 0 P5_14
VSS
0
0
-
CAP0_DATA0
0
124
MDC
198
0
DSP0_DATA0_4
199
0
0
Y
0
OCU9_OTD1
Y
0
ICU9_IN1
DSP1_DATA1_2
0
PPG9_TOUT2
DSP1_DATA0_2
0
EINT3
DSP1_CLK
0
P5_21
DSP0_CTRL2 DSP1_CTRL2
0
0
DSP0_CTRL3
DVSS
0
0 SCK11
-
0
0 SIN11
125
0
0
0
0
0
0
DSP0_DATA1_10
OCU0_OTD0
0
29
30
ICU0_IN0
0
-
-
0 ICU11_IN1 OCU11_OTD1
0
VSS
VCC3
0
0
0
0
PPG0_TOUT0
0
0
0
EINT0
0
0
0
SEG5 EINT15 PPG11_TOUT2
DVCC
0
0
SEG4
-
0
0
MFS8_CS1 0 P5_15
0
0
126
0
0
MFS8_CS2 0 P5_16
P3_22
P3_21
0
0
0
EINT6
EINT5
0
0
0
PPG7_TOUT0
PPG6_TOUT2
0
0
0
ICU7_IN0
ICU6_IN1
0
0
0
OCU7_OTD0
OCU6_OTD1
0
0
200
AN0(AL PWM1M0
AP0(AH PWM1P0
0
0
Y
0
0
0
0
DSP1_DATA1_1
AN27
AN26
0
0
DSP0_CTRL4 DSP1_CTRL0
S
S
0
0
0
128
127
0
0
0
28
0
-
OCU0_OTD1
VCC12
ICU0_IN1
0
0
0
PPG0_TOUT2
0
EINT1
0
SEG3
0
0 0 P5_17
0
0
0
0
0
201
0
Y
0
DSP1_DATA0_1
0
DSP0_CTRL5 DSP1_CTRL1
0
0 SOT12
0
0
0
OCU1_OTD0
0
ICU1_IN0
0
0
27
PPG1_TOUT0
26
-
EINT2
-
VCC3_LVDS_Tx
SEG2
VSS_LVDS_Tx
0
MFS12_SDA 0 P5_18
0
0
0
0
0
0
0
0
202
0
0
Y
0
0
0
DSP1_DATA1_0
P3_23
0
0
0
EINT7
0
0
DSP0_CTRL6
PPG7_TOUT2
0
0
0 SCK12
ICU7_IN1
0
0
0
OCU7_OTD1
0
0
OCU1_OTD1
BP0(BHPWM2P0
0
0
ICU1_IN1
0
0
0
0
AN28
0
0
PPG1_TOUT2
S
0
0
EINT3
0
129
0
0
SEG1
0
P3_24
0
MFS12_SCL 0 P5_19
P3_25
EINT8
25
0
EINT9
PPG8_TOUT0
24
B
0
PPG8_TOUT2
ICU8_IN0
B
TxDOUT0-
203
ICU8_IN1
OCU8_OTD0
TxDOUT0+
204
OCU8_OTD1
BN0(BLPWM2M0
0
0
205
AP1(AH PWM1P1
0
0
0
206
0
AN29
0
0
207
AN30
S
0
0
208
S
130
0
0
-
0
0
131
0
0
Y
P3_27
P3_26
0
0
Y
EINT11
EINT10
0
0
Y
PPG9_TOUT2
PPG9_TOUT0
0
0
Y
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
D
D
D
D
D
C
-
-
E
-
-
E
E
E
E
E
-
E
-
-
E
E
E
E
E
-
-
F
F
F
-
-
-
G
H
J
J
I
I
I
I
J
J
I
I
I
I
I
L
-
VCC3
DSP0_DATA0_9 DSP0_DATA_D9+ CAP0_DATA21 0
DSP0_DATA1_9 DSP0_DATA_D9-
DSP0_DATA1_11 DSP0_DATA_D11- CAP0_CLK
DSP0_CTRL0
VCC12
VSS
M_SCLK0
VSS
VCC3
M_SDATA0_0
M_SDATA0_2
M_SDATA0_1
M_SSEL0
M_SDATA0_3
VSS
0
VSS
VCC3
M_SDATA1_0
M_SDATA1_2
M_SDATA1_1
M_SSEL1
M_SDATA1_3
VSS
VCC3
MLBDAT
MLBSIG
MLBCLK
VCC12
VSS
VCC5
PSC_1
0
AN1
AN2
AN3
AN5
AN6
AN7
AN8
AN9
AN10
AN11
AN12
AN13
AN14
NMIX
VCC5
DSP0_CTRL2
0
0
0
0
0
G_SDATA1_0
G_SDATA1_2
G_SDATA1_1
G_SSEL1
G_SDATA1_3
0
G_SCLK0
0
0
G_SDATA0_0
G_SDATA0_2
G_SDATA0_1
G_SSEL0
G_SDATA0_3
0
0
DSP0_CTRL2
DSP0_CTRL3
DSP0_CTRL4
0
0
0
0
0
SOT0
SCK0
SIN0
SOT1
SCK1
SIN1
SOT16
SCK16
SIN16
SOT8
SCK8
SIN8
0
0
0
CAP0_DATA34 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
SOT17
SCK17
SIN17
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
CAP0_DATA25 0
0
0
CAP0_DATA24 0
0
0
0
0
0
0
0
0
MFS17_SDA
MFS17_SCL
0
0
0
0
MFS16_SDA
MFS16_SCL
0
0
0
0
0
0
0
RXCLK TIN33 I2S0_SCK
DSP0_DATA1_10 DSP0_DATA_D10- CAP0_DATA32 CAP0_DATA35 RXDV TIN34 I2S1_SD
DSP0_DATA0_11 DSP0_DATA_D11+ CAP0_DATA33 0
TXCLK TOT33 I2S0_WS
COL
0
TXER
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
CRS
0
0
0
0
0
0
0
0
0
0
0
0
0
0
RX0
TX0
RX1
TX1
0
0
TOT35 I2S1_WS
TIN35 I2S1_SCK
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TIN1
TIN2
TIN3
TOT0
TOT1
TOT2
TOT3
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
SGA0
SGA1
SGO1
SGO2
SGA3
SGO3
SGO0
SGA0
SGA1
SGO1
TOT16 SGO2
TIN17 0
0
0
TIN16 SGA2
0
0
TIN49 0
0
0
0
0
0
0
0
DSP0_DATA0_10 DSP0_DATA_D10+ CAP0_DATA23 CAP0_DATA32 RXER TOT34 I2S1_ECLK 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
OCU9_OTD0
OCU8_OTD1
OCU5_OTD1
0
0
OCU6_OTD0
OCU7_OTD0
OCU6_OTD1
OCU8_OTD0
OCU7_OTD1
0
0
0
0
0
0
OCU3_OTD0
OCU5_OTD1
OCU8_OTD0
OCU8_OTD1
OCU9_OTD0
OCU9_OTD1
ICU8_IN1
ICU9_IN0
0
0
0
0
ICU9_IN0
ICU9_IN1
ICU8_IN1
0
ICU5_IN1
0
0
ICU6_IN0
ICU7_IN0
ICU6_IN1
ICU8_IN0
ICU7_IN1
0
0
0
0
ICU4_IN1
0
0
0
0
ICU3_IN0
ICU4_IN1
ICU5_IN0
ICU5_IN1
ICU6_IN1
ICU7_IN0
ICU7_IN1
ICU8_IN0
ICU8_IN1
ICU9_IN0
ICU9_IN1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
PPG6_TOUT2
PPG7_TOUT0
PPG7_TOUT2
PPG8_TOUT0
PPG8_TOUT2
PPG9_TOUT0
0
0
0
PPG9_TOUT0
PPG8_TOUT2
PPG5_TOUT2
0
0
PPG6_TOUT0
PPG7_TOUT0
PPG6_TOUT2
PPG8_TOUT0
PPG7_TOUT2
0
0
0
0
PPG4_TOUT2
0
0
0
0
PPG3_TOUT0
PPG4_TOUT2
PPG5_TOUT0
PPG5_TOUT2
PPG6_TOUT2
PPG7_TOUT0
PPG8_TOUT0
PPG8_TOUT2
PPG9_TOUT0
PPG9_TOUT2
EINT1
EINT2
0
0
0
0
0
0
EINT6
EINT8
EINT7
0
0
EINT1
EINT2
EINT3
0
0
0
0
EINT6
EINT9
0
0
0
P0_30 M_RWDS_0
0
0
P1_00 M_DQ5_0
P1_02 M_DQ7_0
P0_28 0
0
0
0
0
0
P2_25 0
P3_00 0
P3_01 0
P3_02 0
P3_03 0
P3_04 0
P3_05 0
P3_06 0
0
0
P2_22 0
0
0
P0_27 0
0
0
P0_26 0
0
0
P1_01 M_DQ4_0
0
0
P0_31 M_CS#2_0
0
0
EINT15 P2_31 0
PPG11_TOUT0 EINT6
0
0
EINT14 P2_30 0
EINT3
0
0
P1_09 M_CK_0
EINT13 P2_29 0
EINT2
0
0
0
0
0
G_DQ4_2
G_DQ5_2
G_DQ6_2
G_DQ7_2
0
0
0
0
0
G_CK_1
0
0
G_DQ3_1
G_DQ2_1
G_DQ1_1
G_DQ0_1
0
0
G_DQ5_1
G_DQ6_1
G_DQ7_1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
DSP0_CTRL2
DSP0_CLK
DSP0_CTRL0
DSP0_CTRL1
0
0
0
0
0
0
0
0
0
0
0
G_CS#2_1 0
G_DQ4_1
0
G_RWDS_1 0
0
0
G_CS#1_1 0
EINT11 P2_27 INDICATOR0_0 0
EINT1
0
EINT10 P2_26 0
EINT0
P5_22 0
EINT10 P1_03 M_DQ6_0
EINT9
P0_17 0
EINT11 P1_04 M_DQ0_0
EINT5
P0_16 0
EINT13 P1_06 M_DQ1_0
0
P0_15 0
EINT12 P1_05 M_DQ3_0
PPG10_TOUT2 EINT5
0
EINT0
PPG10_TOUT0 EINT4
0
EINT15 P0_14 0
PPG10_TOUT2 EINT15 P1_08 M_CS#1_0
0
EINT14 P0_13 0
PPG10_TOUT0 EINT14 P1_07 M_DQ2_0
PPG9_TOUT2
EINT13 P0_12 0
PPG11_TOUT0 EINT0
0
0
PPG10_TOUT0 EINT4
FRT8/9/10/11_TEXT PPG7_TOUT2
OCU11_OTD0 ICU11_IN0 0
0
0
OCU10_OTD1 ICU10_IN1 0
0
ICU8_IN0
OCU10_OTD0 ICU10_IN0 0
0
ICU7_IN1
OCU10_OTD1 ICU10_IN1 0
0
ICU7_IN0
OCU10_OTD0 ICU10_IN0 0
OCU9_OTD1
ICU6_IN1
OCU11_OTD0 ICU11_IN0 0
ZIN9 OCU7_OTD1
0
0
0
OCU10_OTD0 ICU10_IN0 0
BIN9 OCU7_OTD0
0
OCU9_OTD0
AIN9 OCU6_OTD1
0
OCU8_OTD1
ZIN8 OCU5_OTD0
0
OCU8_OTD0
BIN8 OCU4_OTD1
0
OCU7_OTD1
SIN1 OCU4_OTD1
0
OCU7_OTD0
SCK1 0
0
OCU6_OTD1
SOT1 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TRACE0
TRACE1
TRACE2
TRACE3
TRACE_CLK
TRACE_CTL
0
0
0
0
CAP0_DATA22 0
0
0
0
60
D
0
59
-
0
58
0
57
0
56
0
55
0
54
0
53
CONFIDENTIAL
ICU9_IN1
ICU9_IN0
0
0
S6J3200_DS708-00003-0v04-E, June 30, 2015
36
OCU9_OTD1
OCU9_OTD0
0
0
Y
Notes:
Any function at the following pins is not supported.
−
BP1(BHPWM2P1
AN1(AL PWM1M1
0
0
VCC53
0
0
0
P0_07
EINT8
PPG4_TOUT0
ICU4_IN0
OCU4_OTD0
0
TIN18
TXD3
CAP0_DATA16
DSP0_DATA_D6-
DSP0_DATA1_6
D
47
110
N2
JTAG_TDI
0
0
0
0
0
0
0
0
0
0
0
0
P0_08
EINT9
PPG4_TOUT2
ICU4_IN1
OCU4_OTD1
0
TOT19
RXD0
CAP0_DATA17
DSP0_DATA_D7+
DSP0_DATA0_7
D
48
109
O
JTAG_TDO
0
0
0
0
0
0
0
0
G_CS#1_2
0
0
0
0
P0_09
EINT10
PPG5_TOUT0
ICU5_IN0
OCU5_OTD0
0
TIN19
RXD1
CAP0_DATA18
DSP0_DATA_D7-
DSP0_DATA1_7
D
49
108
N
JTAG_NTRST
0
0
0
0
0
0
0
0
0
G_RWDS_2
0
0
0
0
P0_10
EINT11
PPG5_TOUT2
ICU5_IN1
OCU5_OTD1S0_ECLK
TOT32
RXD2
CAP0_DATA19
DSP0_DATA_D8+
DSP0_DATA0_8
D
50
107
M
X0
0
0
0
0
0
0
0
0
0
G_CS#2_2
0
0
0
0
P0_11
EINT12
PPG6_TOUT0
ICU6_IN0
OCU6_OTD0 I2S0_SD
TIN32
RXD3
CAP0_DATA20
DSP0_DATA_D8-
DSP0_DATA1_8
D
51
106
M
X1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
VSS
-
52
105
-
VSS
0
0
0
0
0
0
0
0
0
0
0
0
0
DSP1_CLK
0
G_DQ0_2
0
0
AN32
AN31
0
0
DSP1_CTRL2
G_DQ1_2
CAP0_DATA15
CAP0_DATA14
S
S
0
0
DSP1_CTRL1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
VCC3
-
43
114
Q
RSTX
0
0
0
0
0
0
0
0
G_CK_2
0
0
0
0
P0_04
EINT5
PPG2_TOUT2
ICU2_IN1
OCU2_OTD1
0
TOT17
TXD0
CAP0_DATA13
DSP0_DATA_D5+
DSP0_DATA0_5
D
44
113
P
MODE
0
0
0
0
0
0
0
0
G_DQ3_2
0
0
0
0
P0_05
EINT6
PPG3_TOUT0
ICU3_IN0
OCU3_OTD0
SIN0
TIN17
G_DQ2_2
0
0
0
0
P0_06
EINT7
PPG3_TOUT2
ICU3_IN1
OCU3_OTD1
0
TOT18
TXD1
CAP0_DATA14
DSP0_DATA_D5-
DSP0_DATA1_5
D
45
112
N2
JTAG_TMS
0
0
0
0
0
0
0
0
TXD2
CAP0_DATA15
DSP0_DATA_D6+
DSP0_DATA0_6
D
46
111
N2
JTAG_TCK
0
0
0
0
0
0
0
0
CAP0_DATA13
133
132
0
0
DSP1_CTRL0
0
CAP0_DATA11
CAP0_DATA12
0
23
PPG0_TOUT2
EINT1
P4_01
0
0
ICU0_IN0
PPG0_TOUT0
EINT0
OCU4_OTD1
ICU4_IN1
PPG4_TOUT2
EINT9
P4_09
0
0
PWM2M4
OCU4_OTD0
ICU4_IN0
PPG4_TOUT0
EINT8
P4_08
MFS2_CS1
0
C_L
A
0
0
0
0
-
10
147
S
0
0
ICU2_IN1
PPG2_TOUT2
0
0
0
0
0
0
0
0
0
0
VCC12
-
11
146
-
DVCC
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
AVSS_LVDS_PLL
-
12
145
-
DVSS
0
0
0
0
0
0
0
0
0
0
P4_00
0
OCU11_OTD1
SCK0
TOT2
0
CAP0_DATA7
DSP0_DATA_D2+
DSP0_DATA0_2
D
38
119
-
AVCC5
0
0
0
0
0
0
0
0
ICU0_IN0
OCU0_OTD0
0
TIN2
0
CAP0_DATA8
DSP0_DATA_D2-
DSP0_DATA1_2
D
39
118
H
ADTRG
0
SGA3
TOT35
OCU5_OTD0
ICU5_IN0
PPG5_TOUT0
EINT2
P3_18
Package Pin Number
Condition on PCB
2, 5, 6, 9, and 12 to 27
Set to ground
3, 4, 7, 8
Open
0
0
0
0
0
0
0
0
0
0
0
0
0
0
VCC5
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
AVRH5
0
VCC12
-
VCC12
-
AVSS
121
120
0
P4_04
0
P3_30
EINT14
0
P3_31
EINT15
PPG11_TOUT2
ICU11_IN1
PPG11_TOUT0
ICU11_IN0
OCU11_OTD0
PWM1M2
OCU11_OTD1
PWM2P2
0
0
0
0
AN35
S
AN36
S
P4_02
MFS2_CS0
0
MFS0_CS0
P4_06
0
P4_03
EINT3
PPG1_TOUT2
EINT2
PPG1_TOUT0
P4_05
EINT5
P4_07
EINT7
PPG3_TOUT2
EINT6
PPG3_TOUT0
EINT4
PPG2_TOUT0
ICU2_IN0
OCU2_OTD0
ICU1_IN1
OCU1_OTD1
PWM2P3
0
0
VSS
-
117
0
P3_28
B
DSP1_DATA0_0
ICU0_IN1
OCU0_OTD0
PWM2M3
0
PWM1M3
0
0
C
115
0
0
EINT12
TxDOUT1-
0
OCU0_OTD1
PWM2M2
0
SCK2
0
116
42
0
0
PPG10_TOUT0
0
0
PWM1P3
0
SIN2
AN41
SOT2
AN39
0
40
41
DSP0_DATA1_3
0
0
0
0
ICU10_IN0
0
0
0
0
AN40
S
0
D
VSS
D
DSP0_DATA0_3
DSP0_DATA_D3CAP0_DATA9
CAP0_DATA10
DSP0_DATA_D3+
0
TXEN
0
0
0
0
0
TIN3
0
0
0
TOT3
OCU0_OTD1
ICU0_IN1
OCU1_OTD0
0
0
0
ICU1_IN0
EINT2
0
0
0
0
PPG0_TOUT2
EINT1
P0_01
PPG1_TOUT0
P0_00
0
0
0
0
0
0
OCU10_OTD0
0
123
34
BN1(BLPWM2M1
0
0
ICU11_IN1
PPG0_TOUT0
37
0
0
122
35
D
AN33
0
0
DSP0_DATA_D1-
PPG11_TOUT2
EINT0
D
36
D
DSP0_DATA0_1
S
0
0
CAP0_DATA6
EINT15
DSP0_DATA1_1
D
DSP0_DATA0_0
DSP0_DATA_D0+
DSP0_DATA1_0
DSP0_DATA_D0CAP0_DATA4
DSP0_DATA_D1+
CAP0_DATA5
0
134
0
0
TIN1
P5_31
P6_00
0
CAP0_DATA3
0
TOT0
0
TIN0
0
TOT1
0
OCU10_OTD1
0
OCU9_OTD1
ICU9_IN1
OCU10_OTD0
ICU10_IN0
PPG10_TOUT0
ICU10_IN1
PPG10_TOUT2
EINT13
PPG9_TOUT2
EINT11
P5_27
EINT12
P5_28
0
0
0
0
DSP0_CTRL7
PWM1P5
0
ICU3_IN1
P3_29
0
DSP0_CTRL8
SOT0
0
0
0
P5_29
0
0
0
0
0
DSP0_CTRL9
0
SIN3
OCU3_OTD1
ICU3_IN0
OCU3_OTD0
EINT13
0
0
0
OCU11_OTD0
0
0
0
0
0
0
0
0
0
0 SIN12
0
0
0
OCU2_OTD1
PPG10_TOUT2
0
0
ICU11_IN0
0
0
0
0
0
0
0
0
0
0
0
0 SOT11
0
AN45
PWM2P4
ICU10_IN1
0
0 SCK11 DSP0_CTRL10
PPG11_TOUT0
0
0
0
0
0
22
0 SIN11 DSP0_CTRL11
0
0
0
PWM1P4
OCU10_OTD1
21
B
0
EINT14
0
0
0
0
0
0
0
0
0
0
0
0
B
TxDOUT1+
0
AN46
S
0
PWM1M4
0
PWM1P2
TxCLK-
0
0
S
150
SCK3
0
P5_30
0
0
0
0
0
0
0
0
151
7
AN44
SOT3
AN43
0
0
0
TOP VIEW
TEQFP-208
0
0
0
0
0
0
0
0
AN42
0
0
0
0
6
A
S
0
0
0
0
139
18
0
0
0
138
19
B
TxDOUT2-
B
TxDOUT2+
0
0
0
0
0
AN34
0
0
0
0
0
0
DVSS
B
0
0
0
0
0
0
0
DVCC
TxCLK+
0
0
0
0
0
0
S
0
0
0
0
0
0
0
0
0
-
0
0
0
0
0
0
-
0
0
0
0
0
0
137
0
0
0
0
0
0
OCU2_OTD0
0
AN37
S
144
S
142
15
136
0
0
0
0
0
0
0
OCU0_OTD1
AN38
S
143
14
135
0
0
0
0
0
0
20
0
0
0
OCU1_OTD0 SGA1
S
140
13
-
OCU1_OTD1 SGO1
141
17
-
OCU2_OTD0
16
B
-
0
B
TxDOUT30
ICU2_IN0
TxDOUT3+
0
ICU0_IN1
0
0
0
0
ICU1_IN0
0
0
0
0
0
0
ICU1_IN1
0
0
0
0
ICU2_IN0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
ICU1_IN0
0
0
0
0
0
0
PPG2_TOUT0
OCU1_OTD0
0
0
0
0
PPG0_TOUT2
VSS_LVDS_Tx
0
0
0
0
0
0
PPG1_TOUT0
VCC3_LVDS_Tx
0
0
0
0
PPG1_TOUT2
-
DAC_L
149
0
AVCC3_LVDS_PLL
0
0
0
PPG2_TOUT0
AVCC3_DAC
8
S
148
9
0
0
0
0
0
0
0
0
0
0
0
VSS
AVSS
EINT4
0
0
0
0
SEG0
0
0
0
0
0
0 0 P5_20
0
0
0
0
0
0 0 P4_25 COM3 EINT9
0
0
0
0
0 0 P4_26 COM2 EINT10
0
0
0
0 0 P4_27 COM1 EINT11
0
0
0
0
0
0 0 P4_28 COM0 EINT12
0
0
0
0 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
EINT12
PPG6_TOUT0
0
0
0
0
0
0
0
ICU6_IN0
OCU6_OTD0
PWM2M5
TX1
0
0
0
0
0
0
DVSS
SIN4
AN49
S
154
3
155
○
2
-
0
0
0
0
0
0
0
P4_10
0
0
0
0
0
0
P4_11
EINT10
0
0
0
0
0
0
0
0
EINT11
PPG5_TOUT0
0
0
0
0
0
0
PPG5_TOUT2
ICU5_IN0
0
0
0
0
0
0
0
0
0
ICU5_IN1
OCU5_OTD0
0
0
0
0
0
0
OCU5_OTD1
PWM1M5
0
0
0
0
0
0
PWM2P5
0
0
0
0
0
0
0
0
0
0
RX1
SOT4
0
0
0
0
0
0
SCK4
AN47
0
0
DVCC
0
AN48
S
0
0
-
MFS4_SCL
S
152
0
0
1
MFS4_SDA
153
5
0
0
-
MFS0_CS2
4
-
MFS0_CS1
A
0
0
VSS
0
MFS0_CS3
A
C_R
AVSS
0
0
156
0
AVSS
DAC_R
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
P4_12
0
0
0
0
4. Package and Pin Assignment
D a t a S h e e t ( P r e l i m i n a r y )
Figure 4-14: TEQFP-208
0
0
0
0
0
0
0
0
0
0
0
0
P3_16
P3_15
P3_14
P3_13
P3_12
P3_09
P3_08
P3_07
P2_19
0
0
SEG25
SEG26
SEG27
SEG28
SEG29
V0
V1
V2
V3
0
0
EINT0
EINT15
EINT14
EINT13
EINT12
EINT9
EINT8
EINT7
EINT3
0
0
PPG4_TOUT0
PPG3_TOUT2
PPG3_TOUT0
PPG2_TOUT2
PPG2_TOUT0
PPG0_TOUT2
PPG0_TOUT0
PPG11_TOUT2
0
0
0
0
FRT4/5/6/7_TEXT
0
0
0
0
PPG6/7/8/9/10/11_TIN
0
0
ICU3_IN1
ICU3_IN0
ICU2_IN1
ICU2_IN0
ICU0_IN1
ICU0_IN0
ICU1_IN1
0
0
OCU4_OTD0
OCU3_OTD1
OCU3_OTD0
OCU2_OTD1
OCU2_OTD0
OCU0_OTD1
OCU0_OTD0
FRT0/1/2/3_TEXT ICU11_IN1 OCU11_OTD1
TIN48
ICU4_IN0
0
0
0
SGA2
SGO1
SGA1
SGA0
SGO0
0
WOT
0
0
0
0
TOT34
TIN33
TOT33
TIN32
TOT32
TIN18
TOT18
TOT17
0
0
0
SCK11
SOT11
SIN10
SCK10
SOT10
SIN9
SCK9
SOT9
0
0
0
TX6
RX6
TX5
RX5
0
0
TX5
RX5
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
AN25
AN24
AN23
AN22
AN21
AN20
AN17
AN16
AN15
0
VSS
VCC5
W
W
W
W
W
W
V
V
V
U
-
-
168
167
166
165
164
163
162
161
160
159
158
157
172
SIN11
173
TIN34
VSS
175
174
SGO2
0
VCC53
Y
176
OCU4_OTD1
0
Y
177
ICU4_IN1
0 DSP1_DATA1_11
Y
178
0
0 DSP1_DATA0_11
Y
179
PPG4_TOUT2
0 DSP1_DATA1_10
Y
180
EINT1
0
0 DSP1_DATA0_10
Y
181
SEG24
0
0
DSP1_DATA1_9
Y
182
P3_17
0
AN0(AL0)
AP0(AH0)
DSP1_DATA0_9
Y
183
0
0
0
0
DSP1_DATA1_8
184
169
0
0
BP0(BH0)
0
DSP1_DATA0_8
185
X
0
0
0
BN0(BL0)
0
VCC12
186
X1A
0
0
0
AN1(AL1)
AP1(AH1)
0
VCC12
187
0
0
0
0
0
BP1(BH1)
0
VSS
Y
188
0
0
SGA3
0
SOT8
BN1(BL1)
0
VCC53
Y
189
0
0
OCU2_OTD1
SGO3
0
SCK8
0
0
DSP1_DATA1_7
Y
190
0
0
OCU3_OTD0
0
0
SIN8
0
0
DSP1_DATA0_7
Y
191
0
0
ICU2_IN1
OCU3_OTD1
0
0
0
0
0
DSP1_DATA1_6
Y
OCU0_OTD1
0
ICU3_IN0
OCU4_OTD0
0
0
0
0
0
DSP1_DATA0_6
Y
ICU0_IN1
0
0
ICU3_IN1
OCU4_OTD1
0
0
0
0
0
DSP1_DATA1_5
192
0
0
0
ICU4_IN0
OCU5_OTD0
0
0
0
0
0
DSP1_DATA0_5
193
PPG0_TOUT2
0
PPG2_TOUT2
0
ICU4_IN1
OCU5_OTD1
0
0
0
0
0
Y
194
EINT1
0
PPG3_TOUT0
0
ICU5_IN0
OCU6_OTD0
0
0
SOT9
0
0
Y
195
0
0
EINT13
PPG3_TOUT2
0
ICU5_IN1
0
0
0
SCK9
0
DSP1_DATA1_4
-
P2_17
0
EINT14
PPG4_TOUT0
0
ICU6_IN0
0
0
0
SIN9
0
0
DSP1_DATA0_4
-
0 0
0
SEG23
EINT15
PPG4_TOUT2
0
0
0
0
0
0
0
VSS
VCC53
170
0
SEG22
EINT0
PPG5_TOUT0
0
0
0
0
0
SOT10
0
0
171
0 0
P4_29
SEG21
EINT1
PPG5_TOUT2
0
0
OCU6_OTD1
0
0
0
0
-
0 0
P4_30
SEG20
EINT2
PPG6_TOUT0
0
0
OCU7_OTD0
0
0
SCK10
0
X
0 0
P4_31
SEG19
EINT3
0
0
ICU6_IN1
OCU7_OTD1
AIN8
SIN10
0
X0A
0 0
P5_00
SEG18
EINT4
0
0
ICU7_IN0
OCU8_OTD0
BIN8
0
0
196
VCC5
0 0
P5_01
SEG17
0
0
0
ICU7_IN1
OCU8_OTD1
0
0
Y
197
0
0 0
P5_02
SEG16
0
0
0
ICU8_IN0
OCU9_OTD0
ZIN8
0
DSP1_DATA1_3
Y
198
0
0 0
P5_03
0
0
PPG6_TOUT2
0
ICU8_IN1
AIN9
0
0
DSP1_DATA0_3
199
0
0 0
P5_04
0
0
PPG7_TOUT0
0
ICU9_IN0
0
DSP0_CTRL0
0
Y
0
0 0
0
0
EINT5
PPG7_TOUT2
0
OCU9_OTD1
0
DSP0_CTRL1
Y
0
0
0
0
EINT6
PPG8_TOUT0
0
0
ICU10_IN0 OCU10_OTD0
ICU9_IN1
0
0
DSP0_CTRL2 DSP DSP1_DATA1_2
0
0
0
SEG15
EINT7
PPG8_TOUT2
0
0
0
SOT11
DSP0_CTRL3 DSP DSP1_DATA0_2
0
0
0
SEG14
EINT8
PPG9_TOUT0
0
0
0
SIN11
SCK11
0
0
P5_05
SEG13
EINT9
PPG9_TOUT2
0
BIN9
0
0
0
P5_06
SEG12
EINT10
PPG10_TOUT0
0
ZIN9
0
0
0
P5_07
SEG11
EINT11
0
ICU10_IN1 OCU10_OTD1
0
0
0
P5_08
SEG10
EINT12
0
ICU11_IN0 OCU11_OTD0
0
OCU0_OTD0
0
P5_09
SEG9
0
0
OCU0_OTD0
200
0
0
P5_10
SEG8
0
0
ICU0_IN0
ICU11_IN1 OCU11_OTD1
Y
ICU0_IN0
0
P5_11
0
PPG10_TOUT2
0
DSP0_CTRL4 DSP DSP1_DATA1_1
0
0
P5_12
0
EINT13
PPG11_TOUT0
0
0
0
0
0
SEG7
EINT14
PPG0_TOUT0
PPG11_TOUT2
0
0
0
0
SEG6
EINT0
EINT15
0
PPG0_TOUT0
0
P5_13
SEG5
OCU0_OTD1
0
0
P5_14
SEG4
ICU0_IN1
EINT0
0
P5_15
0
0
0
0
P5_16
PPG0_TOUT2
0
0
0
EINT1
0
0
0
SEG3
201
P2_16
0
P5_17
Y
0 0
0
0
DSP0_CTRL5 DSP DSP1_DATA0_1
INDICATOR0_1 0
0
SOT12
D
0
0
DSP0_DATA0_0
0
0
DSP0_DATA_D0+
OCU1_OTD0
0
0AP0_DATA3
ICU1_IN0
0
TOT0
0
0
0
PPG1_TOUT0
0
OCU9_OTD1
EINT2
0
ICU9_IN1
SEG2
0
PPG9_TOUT2
P5_18
VCC12
EINT11
0
P5_27
0
123
0 0 0 0 0 0
202
34
D
203
0
DSP0_CTRL2
Y
0
DSP0_CLK-
Y
0
0AP0_DATA2
DSP1_DATA1_0
0
DSP0_DATA1_4
DSP1_DATA0_0
0
0
0
0
OCU4_OTD0
0
0
ICU4_IN0
DSP0_CTRL6
0
PPG4_TOUT0
DSP0_CTRL7
VSS
EINT0
SIN12
P0_19
SCK12
124
DSP0_DATA1_11 0 0 0 0 0
0
33
32
0
0
31
D
0
0
0
C
DSP0_CLK
0
0
0
DSP0_CTRL1
DSP0_CLK+
OCU1_OTD1
0
0
0
0 MDIOAP0_DATA1
OCU2_OTD0
0
0
DSP0_DATA0_4 MDCAP0_DATA0
ICU1_IN1
0
0
0
0
ICU2_IN0
0
OCU9_OTD1
OCU3_OTD1
0
0
0
ICU9_IN1
ICU3_IN1
0
0
0
PPG9_TOUT2
PPG3_TOUT2
PPG1_TOUT2
DVCC
DVSS
EINT3
EINT15
PPG2_TOUT0
-
-
P5_21
P0_18
EINT3
126
125
DSP0_DATA1_10 0 0 0 0 0
DSP0_DATA0_11 0 0 0 0 0
EINT4
30
SEG1
-
SEG0
VCC3
P5_19
0
P5_20
0
0
0
0
0
0
0
0
0
204
0
205
0
206
0
207
0
208
0 0 0 0 0 0
-
29
Y
-
Y
VSS
Y
EINT5
0
Y
PPG6_TOUT2
0
VCC53
ICU6_IN1
0
DSP1_CLK
OCU6_OTD1
0
DSP1_CTRL2
AP0(AH PWM1P0
0
DSP1_CTRL1
0
0
DSP1_CTRL0
AN26
0
0
S
0
0
127
0
0
EINT6
0
0
PPG7_TOUT0
0 0 0 0 0 0
0
ICU7_IN0
28
0
OCU7_OTD0
27
-
DSP0_CTRL8
AN0(AL PWM1M0
-
VCC12
DSP0_CTRL9
0
NC
0
DSP0_CTRL10
AN27
0
0
DSP0_CTRL11
S
0
0
0
128
0
0
0
EINT8
EINT7
0
SIN11
0 0 0 0 0 0
0
0
0
0
0
0
0
0
0
0
NC
-
15
142
S
AN39
SOT2
0
PWM1M3
OCU1_OTD0
ICU1_IN0
PPG1_TOUT0
EINT2
P4_02
0 0 0 0 0 0
0
0
0
0
0
0
0
0
0
0
NC
-
16
141
S
AN38
0
0
PWM1P3
OCU0_OTD1
ICU0_IN1
PPG0_TOUT2
EINT1
P4_01
0
0
0
0
0
0
0
0
0
0
0
0
AVRH5
0
0
0
0
0
0
0
0
-
AVCC5
0
0
0
0
0
0
0
118
H
ADTRG
0
SGA3
TOT35
OCU5_OTD0
ICU5_IN0
PPG5_TOUT0
EINT2
40
117
-
C
0
0
0
0
0
0
0
0 0 0 0 0 0
P0_01
EINT2
PPG1_TOUT0
ICU1_IN0
OCU1_OTD0
0
TIN3 TXENP0_DATA10
DSP0_DATA_D3-
DSP0_DATA1_3
D
41
116
-
VSS
0
0
0
0
0
0
0
0
0 0 0 0 0 0
0
0
0
0
0
0
0
VSS
-
42
115
-
VCC5
0
0
0
0
0
0
0
0
0
0
PPG4_TOUT0
ICU4_IN0
OCU4_OTD0
0
TIN18 TXD3P0_DATA16
DSP0_DATA_D6-
DSP0_DATA1_6
D
47
110
N2
JTAG_TDI
0
0
0
0
0
0
0
PPG4_TOUT2
ICU4_IN1
OCU4_OTD1
0
TOT19RXD0P0_DATA17
DSP0_DATA_D7+
DSP0_DATA0_7
D
48
109
O
JTAG_TDO
0
0
0
0
0
0
0
EINT10
PPG5_TOUT0
ICU5_IN0
OCU5_OTD0
0
TIN19RXD1P0_DATA18
DSP0_DATA_D7-
DSP0_DATA1_7
D
49
108
N
JTAG_NTRST
0
0
0
0
0
0
0
P0_10
EINT11
PPG5_TOUT2
ICU5_IN1
OCU5_OTD1 I2S0_ECLK
TOT32RXD2P0_DATA19
DSP0_DATA_D8+
DSP0_DATA0_8
D
50
107
M
X0
0
0
0
0
0
0
0
0
0 0 0 0
P0_11
EINT12
PPG6_TOUT0
ICU6_IN0
OCU6_OTD0
I2S0_SD
TIN32RXD3P0_DATA20
DSP0_DATA_D8-
DSP0_DATA1_8
D
51
106
M
X1
0
0
0
0
0
0
0
0
0 0 0 0 0 0
0
0
0
0
0
0
0
VSS
-
52
105
-
VSS
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
VCC3
-
43
114
Q
RSTX
0
0
0
0
0
0
0
0
0 0 0 0
P0_04
EINT5
PPG2_TOUT2
ICU2_IN1
OCU2_OTD1
0
TOT17 TXD0P0_DATA13
DSP0_DATA_D5+
DSP0_DATA0_5
D
44
113
P
MODE
0
0
0
0
0
0
0
0
CAP0_DATA12
0 0 0 0
P0_05
EINT6
PPG3_TOUT0
ICU3_IN0
OCU3_OTD0
SIN0
TIN17 TXD1P0_DATA14
DSP0_DATA_D5-
DSP0_DATA1_5
D
45
112
N2
JTAG_TMS
0
0
0
0
0
0
0
0
CAP0_DATA13
0 0 0 0
P0_06
EINT7
PPG3_TOUT2
ICU3_IN1
OCU3_OTD1
0
TOT18 TXD2P0_DATA15
DSP0_DATA_D6+
DSP0_DATA0_6
D
46
111
N2
JTAG_TCK
0
0
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
D
D
D
D
D
C
-
-
E
-
-
E
E
E
E
E
-
E
-
-
E
E
E
E
E
-
-
F
F
F
-
-
-
G
H
J
J
I
I
I
I
J
J
I
I
I
I
I
L
-
VCC3
DSP0_DATA0_9
DSP0_DATA1_9
M_SCLK0
VSS
VCC3
M_SDATA0_0
M_SDATA0_2
M_SDATA0_1
M_SSEL0
M_SDATA0_3
VSS
0
VSS
VCC3
M_SDATA1_0
M_SDATA1_2
M_SDATA1_1
M_SSEL1
M_SDATA1_3
VSS
VCC3
MLBDAT
MLBSIG
MLBCLK
VCC12
VSS
VCC5
PSC_1
0
AN1
AN2
AN3
AN5
AN6
AN7
AN8
AN9
AN10
AN11
AN12
AN13
AN14
NMIX
VCC5
DSP0_CTRL2
0
0
0
0
0
G_SDATA1_0
G_SDATA1_2
G_SDATA1_1
G_SSEL1
G_SDATA1_3
0
G_SCLK0
0
0
G_SDATA0_0
G_SDATA0_2
G_SDATA0_1
G_SSEL0
G_SDATA0_3
0
0
DSP0_CTRL2
DSP0_CTRL3
DSP0_CTRL4
0
0
0
0
0
SOT0
SCK0
SIN0
SOT1
SCK1
SIN1
SOT16
SCK16
SIN16
SOT8
SCK8
SIN8
0
0
0
0
CAP0_DATA21 0
CAP0_DATA22 0
DSP0_DATA1_11 DSP0_DATA_D11- CAP0_CLK
VSS
DSP0_DATA_D9-
DSP0_DATA0_11 DSP0_DATA_D11+ CAP0_DATA33 0
VCC12
DSP0_DATA_D9+
CAP0_DATA34 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
SOT17
SCK17
SIN17
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
CAP0_DATA25 0
0
0
CAP0_DATA24 0
0
0
0
0
0
0
0
0
MFS17_SDA
MFS17_SCL
0
0
0
0
MFS16_SDA
MFS16_SCL
0
0
0
0
0
0
0
TXCLK TOT33
RXCLK TIN33
DSP0_DATA1_10 DSP0_DATA_D10- CAP0_DATA32 CAP0_DATA35 RXDV TIN34
DSP0_CTRL0
0
DSP0_DATA0_10 DSP0_DATA_D10+ CAP0_DATA23 CAP0_DATA32 RXER TOT34
COL
0
TXER
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
CRS
0
0
0
0
0
0
0
0
0
0
0
0
0
0
RX0
TX0
RX1
TX1
0
0
TOT35
TIN35
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TIN49
0
0
0
TIN1
TIN2
TIN3
TOT0
TOT1
TOT2
TOT3
TIN16
TOT16
TIN17
0
0
0
I2S0_WS
I2S0_SCK
I2S1_SD
I2S1_WS
I2S1_SCK
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
SGA0
SGA1
SGO1
SGO2
SGA3
SGO3
SGO0
SGA0
SGA1
SGO1
SGA2
SGO2
0
0
0
0
0
0
I2S1_ECLK 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
OCU11_OTD0
0
0
OCU9_OTD0
OCU10_OTD0
OCU9_OTD1
OCU8_OTD1
OCU10_OTD1
0
OCU5_OTD1
0
0
OCU6_OTD0
OCU7_OTD0
OCU6_OTD1
OCU8_OTD0
OCU7_OTD1
0
0
0
0
0
0
OCU3_OTD0
OCU5_OTD1
ZIN9 OCU7_OTD1
0
OCU10_OTD0
BIN9 OCU7_OTD0
0
OCU9_OTD0
AIN9 OCU6_OTD1
0
OCU8_OTD1
ZIN8 OCU5_OTD0
0
OCU8_OTD0
BIN8 OCU4_OTD1
0
OCU7_OTD1
SIN1 OCU4_OTD1
0
OCU7_OTD0
SCK1 0
0
OCU6_OTD1
SOT1 0
0
0
OCU8_OTD0
OCU8_OTD1
OCU9_OTD0
OCU9_OTD1
OCU10_OTD0
OCU10_OTD1
OCU11_OTD0
0
0
0
ICU6_IN1
ICU7_IN0
ICU7_IN1
ICU8_IN0
ICU8_IN1
ICU9_IN0
0
0
ICU9_IN0
ICU8_IN1
ICU5_IN1
0
0
ICU6_IN0
ICU7_IN0
ICU6_IN1
ICU8_IN0
ICU7_IN1
0
0
0
0
ICU4_IN1
0
0
0
0
ICU3_IN0
ICU4_IN1
ICU5_IN0
ICU5_IN1
ICU6_IN1
ICU7_IN0
ICU7_IN1
ICU8_IN0
ICU8_IN1
ICU9_IN0
ICU9_IN1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
ICU11_IN0 0
0
0
0
PPG6_TOUT2
PPG7_TOUT0
PPG7_TOUT2
PPG8_TOUT0
PPG8_TOUT2
PPG9_TOUT0
PPG10_TOUT0
0
0
PPG11_TOUT0
0
0
PPG9_TOUT0
PPG10_TOUT0
PPG9_TOUT2
PPG8_TOUT2
PPG10_TOUT2
0
PPG5_TOUT2
0
0
PPG6_TOUT0
PPG7_TOUT0
PPG6_TOUT2
PPG8_TOUT0
PPG7_TOUT2
0
0
0
0
PPG4_TOUT2
0
0
0
0
PPG3_TOUT0
PPG4_TOUT2
PPG5_TOUT0
PPG5_TOUT2
PPG6_TOUT2
PPG7_TOUT0
FRT8/9/10/11_TEXT PPG7_TOUT2
ICU10_IN1 0
0
0
ICU10_IN0 0
0
0
ICU10_IN1 0
0
0
ICU10_IN0 0
ICU9_IN1
0
ICU11_IN0 0
0
0
ICU10_IN0 0
0
0
PPG8_TOUT0
PPG8_TOUT2
PPG9_TOUT0
PPG9_TOUT2
PPG10_TOUT0
PPG10_TOUT2
PPG11_TOUT0
0
0
0
EINT13 P0_12 0
EINT14 P0_13 0
EINT15 P0_14 0
EINT0
EINT1
EINT2
EINT4
0
0
EINT0
0
0
EINT8
EINT7
0
0
EINT1
EINT2
EINT3
0
0
0
0
EINT6
EINT9
EINT5
EINT6
0
0
0
P1_01 M_DQ4_0
P1_00 M_DQ5_0
P1_02 M_DQ7_0
0
P0_28 0
0
0
0
0
0
P2_25 0
P3_00 0
P3_01 0
P3_02 0
P3_03 0
P3_04 0
P3_05 0
P3_06 0
0
0
P2_22 0
0
0
P0_27 0
0
0
P0_26 0
0
0
P0_31 M_CS#2_0
0
0
EINT15 P2_31 0
EINT4
0
EINT14 P2_30 0
EINT3
P0_30 M_RWDS_0
EINT13 P2_29 0
EINT2
0
0
EINT11 P2_27 INDICATOR0_0
EINT1
0
0
EINT10 P2_26 0
EINT0
0
0
P1_09 M_CK_0
EINT10 P1_03 M_DQ6_0
EINT9
0
0
EINT15 P1_08 M_CS#1_0
EINT6
0
EINT11 P1_04 M_DQ0_0
0
P5_22 0
EINT13 P1_06 M_DQ1_0
0
P0_17 0
EINT14 P1_07 M_DQ2_0
EINT5
P0_16 0
EINT12 P1_05 M_DQ3_0
0
P0_15 0
0
0
0
0
0
0
0
G_CK_1
0
0
G_DQ3_1
G_DQ2_1
G_DQ1_1
G_DQ0_1
0
G_DQ5_1
G_DQ6_1
G_DQ7_1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
G_CS#2_1 0
G_DQ4_1
DSP0_CTRL1
G_RWDS_1 0
0
DSP0_CTRL0
G_CS#1_1 0
0
DSP0_CLK
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TRACE0
TRACE1
TRACE2
TRACE3
TRACE_CLK
TRACE_CTL
0
0
0
0
0
0
0
0
0
DSP0_CTRL2
0
59
D
0
58
-
0
57
0
56
0
55
0
54
0
53
37
June 30, 2015, S6J3200_DS708-00003-0v04-E
PPG8_TOUT0
PPG7_TOUT2
0
0
0
0
EINT8
EINT9
P0_09
0 0 0 0
0
ICU8_IN0
ICU7_IN1
0
0
0
0
P0_07
P0_08
0 0 0 0
0
0
OCU8_OTD0
OCU7_OTD1
0
0
0
0
0 0 0 0
0 0 0 0
0
0
BN0(BLPWM2M0
BP0(BHPWM2P0
P3_21
0
0
0
0
P3_31
EINT15
PPG11_TOUT2
P3_30
EINT14
PPG11_TOUT0
P4_00
EINT0
PPG0_TOUT0
ICU0_IN0
OCU0_OTD0
ICU11_IN0
OCU11_OTD0
ICU11_IN1
OCU11_OTD1
PWM2P2
0
PWM1M2
0
PWM2M2
0
0
AN37
0
AN35
0
AN36
S
139
S
138
0
0
P4_04
EINT4
PPG2_TOUT0
P4_03
EINT3
PPG1_TOUT2
0
0
0
0
0
ICU2_IN0
OCU2_OTD0
ICU1_IN1
OCU1_OTD1
0
0
0
0
PWM2M3
0
PWM2P3
0
0
0
0
DVSS
SIN2
AN41
SCK2
AN40
0
DVCC
-
P3_22
AN29
AN28
0
0
SOT11
VCC12
146
145
S
144
S
143
P3_24
S
S
0
0
SCK11
0
EINT8
P3_23
130
129
0 0 0 0 0 0
0 0 0 0 0 0
0
26
0
25
-
0
24
-
NC
0
22
23
-
NC
0
0
-
-
NC
0
0
0
NC
NC
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
SGA1
0
0
0
0
0
0
SGO1
0
0
0
0
0
0
0
0
0
0
TOP VIEW
TEQFP-208
0
0
OCU0_OTD1
P3_29
0
0
OCU1_OTD0
EINT13
0
0
OCU1_OTD1
PPG10_TOUT2
0
0
OCU2_OTD0
ICU10_IN1
0
0
0
OCU10_OTD1
0
0
ICU0_IN1
PWM1P2
0
0
ICU1_IN0
0
0
0
ICU1_IN1
0
0
0
ICU2_IN0
AN34
DVCC
0
0
S
0
0
137
136
0
0
0
0
119
39
D
0
P3_25
20
21
0
0
0
AVSS
120
38
D
DSP0_DATA0_3
0
P3_26
EINT9
-
-
0
0
P4_05
EINT7
0
0
CAP0_DATA14
CAP0_DATA15
0
CAP0_DATA11
0 0 0 0 0 0
P3_27
EINT10
PPG8_TOUT2
NC
NC
0
0
0
37
D
DSP0_DATA1_2
DSP0_DATA_D3+
0
P3_28
EINT11
PPG9_TOUT0
ICU8_IN1
0
0
0
PPG0_TOUT2
VCC12
121
D
DSP0_DATA0_2
DSP0_DATA_D2-
0AP0_DATA9
0
EINT12
PPG9_TOUT2
ICU9_IN0
OCU8_OTD1
0
0
0
PPG1_TOUT0
36
DSP0_DATA1_1
DSP0_DATA_D2+
0AP0_DATA8
TOT3
0
PPG10_TOUT0
ICU9_IN1
OCU9_OTD0
AP1(AH PWM1P1
0
0
0
PPG1_TOUT2
122
D
DSP0_DATA_D1-
0AP0_DATA7
TIN2
0
TIN0
ICU10_IN0
OCU9_OTD1
AN1(AL PWM1M1
0
0
0
0
PPG2_TOUT0
35
DSP0_DATA0_1
0AP0_DATA6
TOT2
0
OCU0_OTD1
0
0
OCU10_OTD0
BP1(BHPWM2P1
0
AN30
0
0
0
0
D
DSP0_DATA_D1+
TIN1
SCK0
OCU0_OTD0
ICU0_IN1
0
0
BN1(BLPWM2M1
0
AN31
S
0
0
0
EINT9
DSP0_DATA1_0
0AP0_DATA5
SOT0
OCU11_OTD1
ICU0_IN0
PPG0_TOUT2
OCU10_OTD0
0
0
AN32
S
131
0
0
0 0 0 0 0 0
EINT10
DSP0_DATA_D0-
TOT1
OCU11_OTD0
ICU11_IN1
PPG0_TOUT0
EINT1
EINT12
EINT13
DVSS
AN33
S
132
0
0
0 0 0 0 0 0
EINT11
P4_06
EINT5
PPG4_TOUT0
P3_18
0AP0_DATA4
OCU10_OTD1
ICU11_IN0
PPG11_TOUT2
EINT0
P5_28
P5_30
-
S
133
0
0
0 0 0 0 0 0
EINT12
EINT6
PPG2_TOUT2
PPG3_TOUT2
P4_09
EINT9
PPG4_TOUT2
ICU4_IN1
OCU4_OTD1
ICU4_IN0
OCU4_OTD0
ICU3_IN1
OCU3_OTD1
0
ICU10_IN0
ICU10_IN1
PPG11_TOUT0
EINT15
P6_00
P0_00
P5_29
0 0 0 0 0 0
P4_10
0
0
EINT12
PPG6_TOUT0
0
0
0
0
0
0
0
ICU6_IN0
OCU6_OTD0
0
PPG10_TOUT0
PPG10_TOUT2
EINT14
P5_31
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
135
0
0
0 0 0 0 0 0
0
PPG3_TOUT0
ICU2_IN1
11
134
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
COM3
ICU3_IN0
OCU2_OTD1
PWM2M4
0
PWM2P4
0
PWM1P5
0
0
AN46
SIN3
AN45
SCK3
AN44
S
149
S
150
7
S
140
17
-
19
-
18
NC
0
NC
0
NC
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0 0 0 0 0 0
0
0 0 0 0 0 0
0
0 0 0 0 0 0
COM2
OCU3_OTD0
PWM1P4
-
13
-
14
-
12
NC
0
NC
0
NC
0
COM1
PWM1M4
0
0
COM0
0
0
0
0
0
0
0
0
0
0
SOT3
AN42
0
P4_25
AN43
S
0
0
0
0
0
0
0
P4_26
S
147
0
P4_27
148
10
0
0
0
0
0
0
0
P4_28
9
-
8
S
151
6
-
0
-
VSS
0
P4_11
EINT10
AVCC3_DAC
0
AVSS
0
0
0
0
0
0
0
EINT11
PPG5_TOUT0
0
0
0
0
0
PPG5_TOUT2
ICU5_IN0
0
0
0
0
0
0 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0 0 0 0 0 0
0
0 0 0 0 0 0
0
0 0 0 0 0 0
0
0 0 0 0 0 0
ICU5_IN1
OCU5_OTD0
0
0
PWM2M5
TX1
0
0
0
DVCC
SIN4
AN49
0
DVSS
155
S
154
1
○
2
0
CONFIDENTIAL
0
0
0
OCU5_OTD1
PWM1M5
0
0
0
0
PWM2P5
0
0
0
0
0
RX1
SOT4
0
0
3
0
A
0
0
0
SCK4
AN47
0
0
0
0
AN48
S
0
0
0
0
S
152
0
0
-
P4_08
A
C_L
0
0
0
153
5
0
0
0 0 0 0 0 0
0
4
0
0
0 0 0 0 0 0
0
A
0
0
VSS
0
P4_07
DAC_L
0
0 0 0 0 0 0
0 0 0 0 0 0
0 0 0 0 0 0
A
C_R
AVSS
0
0
156
0
AVSS
DAC_R
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0 0 0 0 0 0
0
0 0 0 0 0 0
0
0 0 0 0 0 0
P4_12
0
0
0 0 0 0 0 0
0 0 0 0 0 0
4. Package and Pin Assignment
D a t a S h e e t ( P r e l i m i n a r y )
0
0
0
193
0
-
0
VCC5
0
0
0
0
0
0
0
0
0
194
0
195
0
Y
0
Y
0
0
0
VSS
0
0
ICU1_IN1
0
0
0
TIN48
0
0
0
0
0
0
0
0
0
V3 EINT3
196
0
197
0
Y
198
0 P2_19
AN15
Y
199
0
0
Y
0
0
TRACE14
Y
0
SOT9
0
AN16
0
0 TOT17
0
AN17
204
0
Y
0
AN21
0
FRT0/1/2/3_TEXT ICU11_IN1 OCU11_OTD1
0
0
V2 EINT7 PPG11_TOUT2
0
0
OCU2_OTD0 SGO0 TOT32 SOT10
0
0
0
TX5
RX5
0
SIN9
SCK9
0 P3_07
0
0 TIN18
OCU0_OTD0 WOT TOT18
0
0
OCU0_OTD1
0
0
ICU0_IN0
0 P6_17
ICU0_IN1
0
0
PPG0_TOUT0 PPG6/7/8/9/10/11_TIN
PPG0_TOUT2
200
V1 EINT8
Y
V0 EINT9
AN18
0 P3_08
0
0 P3_09
RX6
0
0
0
0 TOT19
201
0
OCU1_OTD0
Y
0
ICU1_IN0
AN19
0
0
PPG1_TOUT0
TX6
0 P3_10 SEG31 EINT10
0
0
0 TIN19
0
OCU1_OTD1
ICU1_IN1
202
0
203
PPG1_TOUT2
-
0 P3_11 SEG30 EINT11
-
0
0
AN20
0
TRACE15
0
0
ICU2_IN0
0
0
0
0
0
0
0
PPG2_TOUT0
0
0
0
0
0
0 P3_12 SEG29 EINT12
0 P6_18
OCU2_OTD1 SGA0 TIN32 SCK10
205
MFS8_CS0
0
ICU2_IN1
Y
0
0
AN22
PPG2_TOUT2
0
206
0 P3_13 SEG28 EINT13
RX5
207
MFS9_CS0
OCU3_OTD0 SGA1 TOT33 SIN10
Y
0
ICU3_IN0
Y
0
AN23
PPG3_TOUT0
TRACE_CLK
0 P3_14 SEG27 EINT14
0
MFS9_CS1
0
0
0
TX5
0
0
0
0
217
0
218
0
OCU3_OTD1 SGO1 TIN33 SOT11
0
PPG3_TOUT2
FRT4/5/6/7_TEXT ICU3_IN1
0
219
0
0 P3_15 SEG26 EINT15
220
0
MFS8_CS3
221
0 P6_19
0
0 DSP1_DATA0_11 #N/A
222
0
0 DSP1_DATA1_10 #N/A
223
208
0
0 DSP1_DATA0_10 #N/A
0
DSP1_DATA1_9 #N/A
224
Y
0
AP0(AH0)
0
DSP1_DATA0_9 #N/A
225
AN24
0
0
0
0 #N/A
DSP1_DATA1_8 #N/A
226
0
PPG4_TOUT0
0
0
0
0
227
RX6
EINT0
0
0
AN0(AL0)
0
VCC12 #N/A
DSP1_DATA0_8 #N/A
228
OCU4_OTD0 SGA2 TOT34 SCK11
0 P3_16 SEG25
0
0
BN0(BL0)
BP0(BH0)
0
VSS #N/A
VCC12 #N/A
ICU4_IN0
MFS8_CS1
0
0
0
AP1(AH1)
0
VCC53 #N/A
0
0
0
0
0
AN1(AL1)
0
209
OCU0_OTD1
0
0
0
BP1(BH1)
0
Y
0
OCU0_OTD0
0
0
0
0
BN1(BL1)
0
AN25
PPG4_TOUT2
ICU0_IN1
0
0
0
SOT8
0
0
EINT1
ICU0_IN0
0
0
0
0
SCK8
0
TX6
0 P3_17 SEG24
0
0
0
0
0
0
SIN8
0
OCU4_OTD1 SGO2 TIN34 SIN11
MFS8_CS2
0
0
OCU3_OTD0 SGA3
OCU2_OTD1
0
0
0
ICU4_IN1
0
0
0
0
0
0
210
0
ICU2_IN1
0
OCU3_OTD1 SGO3
0
0
0
0
211
0
0
0
0
Y
PPG0_TOUT2
0
ICU3_IN0
OCU4_OTD0
0
0
Y
PPG0_TOUT0
0
ICU3_IN1
OCU4_OTD1
0
0
X1A
0
0
ICU4_IN0
OCU5_OTD0
0
X0A
EINT1
0
0
0
OCU5_OTD1
0
0
EINT0
0
0
ICU4_IN1
0
OCU6_OTD0
0
0
0
PPG2_TOUT2
0
ICU5_IN0
0
0
0
0
0
0
ICU5_IN1
0
0
0 P2_17
PPG3_TOUT0
0
0
ICU6_IN0
0
0
0 P2_16
PPG3_TOUT2
0
0
0
0
PPG4_TOUT0
0
0
229
0
0
PPG4_TOUT2
0
0
230
0
0 INDICATOR0_1
0
PPG5_TOUT0
0
DSP1_DATA1_7 #N/A
231
212
0
0
0
PPG5_TOUT2
0
0 #N/A
Y
0
0
0
0
PPG6_TOUT0
0
0
DSP1_DATA0_7 #N/A
VCC5
0
0
0
0
0
0
0
EINT0
0 P4_29 SEG23 EINT13
0
EINT1
0 P4_30 SEG22 EINT14
0
EINT2
0 P4_31 SEG21 EINT15
0
0
EINT3
0
0
0
0
0
0 P5_00 SEG20
0
EINT4
0
0
0
0
0
0 P5_01 SEG19
0
0
0
213
0
0 P5_02 SEG18
0
0
Y
0
0
0
0 P5_03 SEG17
0
0
SOT9
VSS
0
0
0 P5_04 SEG16
0 P6_20
0
0
0
0
0
0
0
0
0
0
0
0
0
0
214
0
0
0
OCU6_OTD1
0
215
0
0
0
Y
0
0
0
ICU6_IN1
OCU7_OTD0
Y
0
0
0
0 P6_21
0
0
0
VCC53
0
0
0
0
ICU7_IN0
0
0
0
0
0
0 DSP1_DATA1_11
0
0
PPG6_TOUT2
0
216
0
0
0
-
0
0
EINT5
PPG7_TOUT0
TRACE_CTL
0
0
0
0
0
0
0
0
0
0
0 P5_10 SEG10 EINT10
0 P5_09 SEG11
0 P5_08 SEG12
0 P5_07 SEG13
0 P5_06 SEG14
0 P6_22
EINT9
EINT8
EINT7
PPG9_TOUT0
PPG8_TOUT2
PPG8_TOUT0
PPG7_TOUT2
0
0
0
0
ICU9_IN0
ICU8_IN1
ICU8_IN0
ICU7_IN1
OCU9_OTD0 BIN8
OCU8_OTD1
OCU8_OTD0
OCU7_OTD1
AIN8
0
0
0 SOT10
0
0
0
0
SIN9
SCK9
0
0
0
0
0
0
0
0
DSP1_DATA1_4 #N/A
DSP1_DATA0_5 #N/A
DSP1_DATA1_5 #N/A
DSP1_DATA0_6 #N/A
DSP1_DATA1_6 #N/A
236
235
234
233
232
0
0
MFS8_CS0
0
0
0
0 P5_05 SEG15
EINT6
0
0
0
0
0
0
0
MFS10_SDA
0 SCK10
0
0
0
0
0
0
0
0
0
0
141
-
VCC5
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
VCC3
-
53
140
Q
RSTX
0
0
0
0
0
0
0
0
0
0
0
PPG3_TOUT2
ICU3_IN1
OCU3_OTD1
0
TOT18
TXD2
CAP0_DATA15
DSP0_DATA_D6+
DSP0_DATA0_6
D
54
139
P
MODE
0
0
0
0
0
0
0
0
0
0
0
EINT8
PPG4_TOUT0
ICU4_IN0
OCU4_OTD0
0
TIN18
TXD3
CAP0_DATA16
DSP0_DATA_D6-
DSP0_DATA1_6
D
55
138
I
TRACE5
0
0
0
0
0
0
0
0
P6_08
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
VSS
-
56
137
N2
JTAG_TMS
0
0
0
0
0
0
0
0
0
0
0
VSS
ZIN8
0
52
0
EINT7
P0_07
0
OCU9_OTD1
VSS
-
0
P0_06
0
0
ICU9_IN1
COL
0
TOT16
PPG9_TOUT2
0
SEG9 EINT11
OCU1_OTD1
0 P5_11
ICU1_IN1
MFS9_CS0
PPG1_TOUT2
MFS10_SCL
EINT3
237
P0_02
0 #N/A
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0 P6_23
0
0
0
238
0
239
0
VCC53 #N/A
0
DSP1_DATA0_4 #N/A
0
0
0
0
0
0
CAP0_DATA10
0
0
TXEN
0
0
TIN3
0
0 SIN10
0
0
0
OCU1_OTD0
0
0
ICU1_IN0
0
AIN9
PPG1_TOUT0
0
0
EINT2
0
0
P0_01
0
0 ICU10_IN0 OCU10_OTD0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
SEG8 EINT12 PPG10_TOUT0
0
0
DSP0_DATA_D3+
0 P5_12
CAP0_DATA9
0
0
0
0
TOT3
MFS9_CS1
0
0
0
0
OCU0_OTD1
0
P3_19
ICU0_IN1
240
PPG5_TOEINT3
PPG0_TOUT2
VSS #N/A
OCU5_OTD1 ICU5_IN1
EINT1
0
TIN35
P0_00
0
SGO3
0
0
0
0
0
0
0
0
H
0
0
145
0
0
48
0
0
D
VCC3
0
DSP0_DATA0_4
0
0
DSP0_DATA_D4+
0
0
CAP0_DATA11
0
0
0
0
0
0
0
0
0
0
0
P3_20
0
241
PPG6_TOEINT4
0
DSP1_DATA1_3 #N/A
OCU6_OTD0 ICU6_IN0
0
0
0
0
DSP0_CTRL0
0
0
0
0
0
0
0
0
0 ICU10_IN1 OCU10_OTD1 BIN9
H
0
SEG7 EINT13 PPG10_TOUT2
146
0
0 P5_13
47
0
0
-
0
VCC3
D
VSS
242
0
D
DSP0_DATA1_2
243
0
0
D
DSP0_DATA0_2
0
0 #N/A
0
DSP0_DATA1_1
DSP0_DATA_D2-
DSP1_DATA0_3 #N/A
0
0
DSP0_DATA_D1-
DSP0_DATA_D2+
0
0
0
0
0
0
0
0
0
0
0
CAP0_DATA8
0
0
0
0
CAP0_DATA7
DSP0_CTRL1
0
0
0
CAP0_DATA6
0
0
0
P3_25
0
0
0
0
0
0
PPG8_TOEINT9
0
0
0 SOT11
0
0
OCU8_OTD1 ICU8_IN1
0
0
0
0
PWM1P1
0
0
ZIN9
0
AVCC5
AP1(AH1)
0
0
0
AVRH5
-
0
TRACE7
TIN2
0
-
147
AN30
T
TIN1
0
148
46
S
160
TOT2
0 ICU11_IN0 OCU11_OTD0
45
-
161
33
0
0
D
VSS
32
D
0
0
DSP0_DATA1_3
0
D
SOT0
0
DSP0_DATA_D3-
DSP0_CLK
DSP0_CTRL2
SCK0
SEG6 EINT14 PPG11_TOUT0
0
0
OCU4_OTD0
0
0
0
OCU3_OTD1
OCU0_OTD0
0 P5_14
0
EINT15
P0_19
OCU11_OTD1
0 P6_24
0
P0_18
0
OCU11_OTD0
MFS8_CS3
0
0
0
0
0
0
0
0
ICU0_IN0
0
0
0
0
ICU11_IN1
244
0
0
0
ICU11_IN0
DSP1_DATA1_2 #N/A
0
0
DSP0_DATA1_11
0
DSP0_CTRL2 DSP1_CTRL2
0
DSP0_DATA0_11
PPG0_TOUT0
0 SCK11
AVSS
0
PPG11_TOUT2
0
-
0
PPG11_TOUT0
0 ICU11_IN1 OCU11_OTD1
149
0
0
SEG5 EINT15 PPG11_TOUT2
44
P3_26
EINT0
0 P5_15
D
PPG9_TOEINT10
EINT15
MFS8_CS1
DSP0_DATA0_3
OCU9_OTD0 ICU9_IN0
EINT14
0
0
PWM1M1
0
245
0
AN1(AL1)
P6_00
DSP1_DATA0_2 #N/A
0
0
P5_31
DSP1_CLK
0
AN31
P5_30
DSP0_CTRL3
0
S
0
0 SIN11
0
162
0
0
0
PPG10_T EINT12
0
0
0
0
0
0
0
0
0
0
0
0
0
TxDOUT3-
B
17
176
S
AN40
SCK2
0
PWM2P3
OCU1_OTD1 ICU1_IN1
PPG1_TOEINT3
P4_03
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TxDOUT2+
B
18
175
S
AN39
SOT2
0
PWM1M3
OCU1_OTD0 ICU1_IN0
PPG1_TOEINT2
P4_02
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TxDOUT2-
B
19
174
S
AN38
0
0
PWM1P3
OCU0_OTD1 ICU0_IN1
PPG0_TOEINT1
P4_01
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TxCLK+
B
20
173
T
TRACE10
0
0
0
0
0
0
0
0
P3_29
PPG10_T EINT13
0
P6_13
0
0
0
0
TOP VIEW
TEQFP-256
0
0
0
31
0
OCU0_OTD0
0
C
0
ICU0_IN0
0
DSP0_CTRL1
0
0
0
0
0
PPG0_TOUT0
VCC12
CAP0_DATA0
0
EINT0
-
MDC
0
SEG4
150
DSP0_DATA0_4
0
0 P5_16
43
0
0
MFS8_CS2
0
-
OCU9_OTD1
0
0
0
0
ICU9_IN1
0
246
0
0
0
PPG9_TOUT2
0
247
0
0
0
0
EINT3
0
0 #N/A
0
0
0
0
P5_21
0
DSP1_DATA1_1 #N/A
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
DSP0_CTRL4 DSP1_CTRL0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
DSP0_DATA1_10
0
0
0
0
0
VCC12
0
0
0
0
0
VSS
-
0
0
0
0
DVSS
-
151
0
0
0
0
DVCC
-
152
42
0
P3_27
38
0
-
153
41
P6_11
PPG9_TOEINT11
37
OCU0_OTD1
154
40
0
OCU9_OTD1 ICU9_IN1
-
0
39
0
PWM2P1
D
ICU0_IN1
0
0
BP1(BH1)
VCC3
0
0
0
0
DSP0_DATA0_1
0
0
0
0
AN32
0
0
0
P3_21
TRACE8
S
DSP0_DATA_D1+
PPG0_TOUT2
P6_09
PPG6_TOEINT5
T
163
0
0
0
OCU6_OTD1 ICU6_IN1
164
30
CAP0_DATA5
EINT1
0
PWM1P0
29
-
0
0
0
AP0(AH0)
-
VCC3
0
SEG3
0
0
VSS
0
0
0
0
AN26
0
0
TOT1
0 P5_17
TRACE6
S
0
0
0
0 P6_25
T
155
0
0
0
0
0
156
0
0
0
0
0
0
0
0
OCU10_OTD1
0
0
0
0
0
0
0
248
0
0
P3_22
0
0
ICU10_IN1
L
-
AN14
NMIX
VCC5
0
0
0
0
0
0
0
0
0
0
RX1
TX1
0
0
TOT16 SGO2
TIN17 0
0
0
TIN16 SGA2
0
SGO1
0
0
0
0
0
0
0
0
0
OCU9_OTD1
0
0
0
OCU11_OTD0 ICU11_IN0 0
0
0
OCU10_OTD1 ICU10_IN1 0
0
0
OCU10_OTD0 ICU10_IN0 0
0
ICU9_IN1
0
0
PPG9_TOUT2
0
PPG10_TOUT2 EINT5
PPG11_TOUT0 EINT6
0
0
PPG10_TOUT0 EINT4
0
EINT3
0
0
P3_03 0
P6_06 0
P3_04 0
P3_05 0
P3_06 0
0
0
0
0
0
0
0
0
0
0
0
TRACE0
TRACE1
0
TRACE2
TRACE3
0
TRACE_CLK
TRACE_CTL
0
0
0
128
I
0
0
127
SIN8
TX0
TOT3
126
AN13
0
0
I
0
RX0
0
125
SCK8
0
0
AN12
0
P3_02 0
I
0
EINT2
124
0
PPG9_TOUT0
0
0
SOT8
ICU9_IN0
0
TRACE3
OCU9_OTD0
0
AN11
0
P6_05 0
H
SGA1
0
I
TOT2
0
123
0
0
122
0
0
0
0
SIN16
0
AN10
0
0
I
0
0
121
0
0
0
0
0
P3_01 0
0
P3_00 0
TRACE2
EINT1
H
EINT0
120
PPG8_TOUT2
0
PPG8_TOUT0
0
0
MFS16_SCL
0
MFS16_SDA
ICU8_IN1
0
ICU8_IN0
0
OCU8_OTD1
SCK16
0
OCU8_OTD0
SOT16
0
0
AN9
0
0
AN8
0
SGA0
J
0
SGO0
J
0
TOT1
119
EINT11 P2_27 INDICATOR0_0 0
0
TOT0
118
0
0
0
0
0
0
0
0
P6_04 0
0
0
0
0
0
P2_25 0
0
0
0
0
P2_24 0
EINT10 P2_26 0
0
P2_22 0
0
0
0
0
0
0
0
0
0
PPG5_TOUT2
EINT9
0
0
0
0
TRACE1
SGO3
PPG5_TOUT0
EINT8
0
0
0
0
H
TIN3
BIN9 OCU7_OTD0
0
PPG4_TOUT2
EINT6
0
0
0
0
0
117
0
0
ICU6_IN0
0
PPG4_TOUT0
0
0
0
0
0
0
AIN9 OCU6_OTD1
0
0
PPG3_TOUT0
0
0
0
0
0
SGA3
OCU6_OTD0
ICU5_IN1
0
0
0
P0_28 0
0
0
EINT15 P2_31 0
SIN1
0
0
0
0
0
P0_27 0
0
0
FRT8/9/10/11_TEXT PPG7_TOUT2
AN7
TIN2
0
OCU5_OTD1
ICU5_IN0
0
0
EINT3
0
P0_26 0
G_DQ7_1
0
ICU7_IN1
I
0
SGO2
0
ICU4_IN1
0
0
EINT2
0
0
G_DQ6_1
ZIN9 OCU7_OTD1
116
0
SGA2
0
ICU4_IN0
0
PPG4_TOUT2
EINT1
0
G_DQ5_1
0
0
TIN1
0
ZIN8 OCU5_OTD0
ICU3_IN0
0
0
0
P1_02 M_DQ7_0
G_DQ4_1
0
0
TIN0
SGO1
BIN8 OCU4_OTD1
0
0
0
0
P1_00 M_DQ5_0
0
0
0
0
OCU3_OTD0
AIN8 OCU4_OTD0
0
0
0
EINT9
P1_01 M_DQ4_0
EINT10 P1_03 M_DQ6_0
P6_03 0
0
0
0
0
0
0
0
EINT7
EINT14 P2_30 0
0
0
0
SGA1
0
0
0
0
PPG7_TOUT2
EINT8
0
SCK1
0
0
0
SGA0
0
0
ICU4_IN1
0
PPG8_TOUT0
PPG7_TOUT0
0
0
0
0
0
SGO0
0
0
0
0
PPG6_TOUT2
G_CS#2_1 0
0
AN6
0
0
0
TIN49 0
0
0
0
0
0
PPG7_TOUT0
0
0
TRACE0
SOT1
0
MFS17_SCL
0
0
0
0
0
P0_31 M_CS#2_0
0
0
I
0
SIN17
MFS17_SDA
0
0
0
SIN1 OCU4_OTD1
0
0
0
ICU7_IN0
H
AN5
0
SCK17
0
0
0
SCK1 0
ICU7_IN1
0
0
0
115
AN4
SIN0
SOT17
0
0
0
0
SOT1 0
ICU8_IN0
0
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
D
D
-
-
D
D
C
C
-
-
E
-
-
E
E
E
E
E
-
E
-
-
E
E
E
E
E
-
-
F
F
F
-
-
VCC3
DSP0_DATA0_9 DSP0_DATA_D9+ CAP0_DATA21 0
DSP0_DATA1_9 DSP0_DATA_D9-
VSS
VCC3
VCC12
VSS
M_SCLK0
VSS
VCC3
M_SDATA0_0
M_SDATA0_2
M_SDATA0_1
M_SSEL0
M_SDATA0_3
VSS
0
VSS
VCC3
M_SDATA1_0
M_SDATA1_2
M_SDATA1_1
M_SSEL1
M_SDATA1_3
VSS
VCC3
MLBDAT
MLBSIG
MLBCLK
0
DSP0_CTRL2
0
0
0
0
0
G_SDATA1_0
G_SDATA1_2
G_SDATA1_1
G_SSEL1
G_SDATA1_3
0
G_SCLK0
0
0
G_SDATA0_0
G_SDATA0_2
G_SDATA0_1
G_SSEL0
G_SDATA0_3
0
0
DSP0_CTRL2
DSP0_CTRL3
0
0
0
DSP0_DATA1_11 DSP0_DATA_D11- CAP0_CLK
DSP0_CTRL0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
CAP0_DATA34 0
0
0
DSP0_DATA0_11 DSP0_DATA_D11+ CAP0_DATA33 0
0
0
CAP0_DATA22 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
CAP0_DATA24 0
TXCLK TOT33 I2S0_WS
RXCLK TIN33 I2S0_SCK
0
0
0
0
COL
0
0
TXER
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TIN35 I2S1_SCK
0
0
TOT35 I2S1_WS
0
0
DSP0_DATA1_10 DSP0_DATA_D10- CAP0_DATA32 CAP0_DATA35 RXDV TIN34 I2S1_SD
VCC3
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
DSP0_DATA0_10 DSP0_DATA_D10+ CAP0_DATA23 CAP0_DATA32 RXER TOT34 I2S1_ECLK 0
VSS
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
OCU6_OTD1
OCU7_OTD0
0
0
OCU7_OTD1
OCU8_OTD0
0
0
OCU8_OTD1
OCU9_OTD0
0
0
0
OCU9_OTD0
OCU8_OTD1
OCU5_OTD1
0
ICU7_IN1
ICU8_IN0
0
0
ICU8_IN1
ICU9_IN0
0
0
0
0
0
ICU9_IN0
ICU9_IN1
ICU8_IN1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
OCU10_OTD1 ICU10_IN1 0
0
0
OCU10_OTD0 ICU10_IN0 0
OCU9_OTD1
ICU7_IN0
OCU11_OTD0 ICU11_IN0 0
0
ICU6_IN1
OCU10_OTD0 ICU10_IN0 0
0
0
0
PPG6_TOUT2
PPG7_TOUT0
0
0
PPG7_TOUT2
PPG8_TOUT0
0
0
PPG8_TOUT2
PPG9_TOUT0
0
0
0
PPG9_TOUT0
PPG8_TOUT2
0
0
0
0
EINT1
EINT2
0
0
0
0
0
0
0
P6_01 0
P5_22 0
0
0
0
P1_09 M_CK_0
0
0
P0_17 0
0
0
P0_16 0
0
0
P0_15 0
0
0
EINT15 P0_14 0
EINT0
0
0
0
EINT12 P1_05 M_DQ3_0
PPG10_TOUT0 EINT14 P1_07 M_DQ2_0
PPG9_TOUT2
EINT14 P0_13 0
PPG11_TOUT0 EINT0
0
EINT13 P0_12 0
PPG10_TOUT0 EINT4
0
0
EINT13 P1_06 M_DQ1_0
EINT11 P1_04 M_DQ0_0
0
G_DQ4_2
G_DQ5_2
0
0
G_DQ6_2
G_DQ7_2
0
0
0
0
0
0
0
0
G_CK_1
0
0
G_DQ3_1
G_DQ2_1
G_DQ1_1
G_DQ0_1
0
0
0
0
0
0
DSP0_CTRL2
0
0
DSP0_CLK
DSP0_CTRL0
0
DSP0_CTRL1
0
0
0
0
0
0
0
0
0
0
0
72
-
0
71
-
0
114
I
0
SCK0
0
0
0
0
ICU6_IN1
EINT6
0
0
I
AN3
SOT0
0
0
0
OCU7_OTD1
ICU7_IN0
0
EINT13 P2_29 0
113
H
AN2
0
0
0
0
0
OCU8_OTD0
PPG6_TOUT0
0
PPG6_TOUT2
112
I
AN1
0
0
0
0
0
OCU6_OTD1
0
0
111
J
AN0
0
0
0
0
OCU7_OTD0
0
0
ICU6_IN1
110
J
0
0
0
0
0
0
0
G_RWDS_1 0
0
109
I
0
0
0
0
0
ICU6_IN0
0
P0_30 M_RWDS_0
0
EINT12 P2_28 0
108
H
PSC_1
0
CRS
0
0
0
0
EINT5
0
PPG0/1/2/3/4/5_TIN1 PPG6_TOUT0
107
VCC5
0
0
0
0
0
OCU6_OTD0
0
PPG5_TOUT2
0
0
106
G
VSS
0
0
0
0
0
0
0
G_CS#1_1 0
P6_02 0
105
-
VCC12
DSP0_CTRL4
CAP0_DATA25 0
0
0
0
0
0
ICU5_IN1
0
PPG10_TOUT2 EINT15 P1_08 M_CS#1_0
70
D
0
D
0
-
0
69
0
68
0
67
0
66
0
65
CONFIDENTIAL
0
P3_23
PPG7_TOEINT6
0
0
0
S6J3200_DS708-00003-0v04-E, June 30, 2015
38
P3_24
PPG7_TOEINT7
OCU7_OTD0 ICU7_IN0
0
0
PPG10_TOUT2
DSP1_DATA0_1 #N/A
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
VCC3
-
57
136
N2
JTAG_TCK
0
0
0
0
0
0
0
0
0
0
G_DQ0_2
0
0
0
0
P0_08
EINT9
PPG4_TOUT2
ICU4_IN1
OCU4_OTD1
0
TOT19
RXD0
CAP0_DATA17
DSP0_DATA_D7+
DSP0_DATA0_7
D
58
135
N2
JTAG_TDI
0
0
0
0
0
0
0
0
0
0
0
G_CS#1_2
0
0
0
0
P0_09
EINT10
PPG5_TOUT0
ICU5_IN0
OCU5_OTD0
0
TIN19
RXD1
CAP0_DATA18
DSP0_DATA_D7-
DSP0_DATA1_7
D
59
134
O
JTAG_TDO
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
VSS
-
60
133
H
TRACE4
0
0
0
0
0
0
0
0
P6_07
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
VCC3
-
61
132
N
JTAG_NTRST
0
0
0
0
0
0
0
0
0
0
0
0
G_RWDS_2
0
0
0
0
P0_10
EINT11
PPG5_TOUT2
ICU5_IN1
OCU5_OTD1S0_ECLK
TOT32
RXD2
CAP0_DATA19
DSP0_DATA_D8+
DSP0_DATA0_8
D
62
131
M
X0
0
0
0
0
0
0
0
0
0
0
0
0
G_CS#2_2
0
0
0
0
P0_11
EINT12
PPG6_TOUT0
ICU6_IN0
OCU6_OTD0 I2S0_SD
TIN32
RXD3
CAP0_DATA20
DSP0_DATA_D8-
DSP0_DATA1_8
D
63
130
M
X1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
VSS
-
64
129
-
VSS
0
0
0
0
0
0
0
0
0
0
0
0
PPG8_TOEINT8
OCU7_OTD1 ICU7_IN1
0
0
0
DSP0_CTRL5 DSP1_CTRL1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
CAP0_DATA15
0
OCU8_OTD0 ICU8_IN0
PWM1M0
0
0
EINT13
0 SOT12
-
0
0
0
0
0
0
PWM2M0
PWM2P0
AN0(AL0)
0
0
0
0
142
0
0
0
0
0
0
BN0(BL0)
BP0(BH0)
0
0
0
P5_29
OCU1_OTD0
51
0
0
0
0
0
P6_10
0
0
AN27
0
0
0
ICU1_IN0
0
0
0
VSS_LVDS_Tx
-
15
178
S
AN41
SIN2
0
PWM2M3
OCU2_OTD0 ICU2_IN0
PPG2_TOEINT4
P4_04
0
0
0
0
0
0
TxDOUT3+
B
16
177
T
TRACE11
0
0
0
0
0
0
P6_14
0
0
0
0
AN29
AN28
S
0
0
0
0
0
0
0
0
0
S
S
157
0
0
PPG1_TOUT0
0
0
0
0
0
159
158
0
OCU10_OTD ICU10_IN0
0
EINT2
0
0
0
0
0
0
PWM2M1
0
SEG2
0
0
0
0
0
0
0
PWM1P4
0
0
0
0
BN1(BL1)
0
0 P5_18
0
0
0
0
0
0
0
0
MFS12_SDA
0
PWM1P2
0
0
AN33
0
0
P4_05
0
0
0
0
0
DVSS
S
0
249
0
0
0
0
0
0
0
0
0
DVCC
165
0
DSP1_DATA1_0 #N/A
0
AN34
166
28
0
0
0
0
0
DVSS
0
AN42
DVCC
0
S
167
27
-
0
DSP0_CTRL6
0
168
26
-
34
0 SCK12
0
0
0
-
PPG2_TOEINT5
S
-
0
25
-
36
0
0
0
0
179
0
181
180
0
B
VCC12
35
OCU1_OTD1
0
0
0
14
0
12
13
0
0
P6_16
0
0
MFS2_CS1 0
0
P3_28
TxDOUT0-
VSS_LVDS_Tx
VCC3_LVDS_Tx
0
-
ICU1_IN1
0
OCU10_OTD ICU10_IN1
0
0
D
0
0
0
D
PPG1_TOUT2
P6_12
0
VSS
EINT3
0
0
DSP0_DATA0_0
SEG1
0
0
DSP0_DATA1_0
0 P5_19
0
0
0
MFS12_SCL
0
0
DSP0_CLK-
0
0
0
DSP0_DATA_D0-
250
0
0
DSP0_DATA_D0+
251
TRACE9
0
0
DSP1_CLK #N/A
T
0
CAP0_DATA3
DSP1_DATA0_0 #N/A
169
0
CAP0_DATA4
0
24
0
CAP0_DATA2
0
B
0
CAP0_DATA1
DSP0_CTRL7
TxDOUT0+
0
0
DSP0_CTRL8
0
0
0
0
0
0
0
0 SIN12
0
0
0
0
0
0
MDIO
0
0
0
0
0
0
0
0
OCU2_OTD0
0
0
TIN0
OCU0_OTD1
0
0
TOT0
ICU2_IN0
0
0
DSP0_DATA1_4
ICU0_IN1
0
0
0
0
0
0
0
0
0
0
0
PPG2_TOUT0
0
0
0
PPG0_TOUT2
0
0
0
EINT4
0
0
OCU9_OTD1
SEG0
0
0
0
OCU10_OTD0
0 P5_20
0
0
0
0
0
0 P4_25 COM3 EINT9
0
0
0
0
ICU9_IN1
0
0
0
P3_30
0
ICU10_IN0
0
P4_00
P3_31
PPG11_T EINT14
0
0
0
PPG0_TOEINT0
PPG11_T EINT15
OCU11_OTD ICU11_IN0
0
PPG9_TOUT2
0
OCU0_OTD0 ICU0_IN0
OCU11_OTD ICU11_IN1
PWM1M2
0
PPG10_TOUT0
252
PWM2M2
PWM2P2
0
0
0
253
0
0
0
0
EINT11
254
0
0
AN35
0
EINT12
255
AN37
AN36
S
0
0
256
S
S
170
0
P5_27
0 #N/A
172
171
23
0
P5_28
VCC53 #N/A
21
22
B
0
0
DSP1_CTRL2 #N/A
B
B
TxDOUT1-
0
0
DSP1_CTRL1 #N/A
TxCLK-
TxDOUT1+
0
0
0
DSP1_CTRL0 #N/A
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
DSP0_CTRL9
0
0
0
0
0
0
0
0
0
0
0
0
0 SOT11
0
0
0
0
0
0 SCK11 DSP0_CTRL10
0
0
0
0
0
0
0
0
0
0
0
0 SIN11 DSP0_CTRL11
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
-
0
OCU2_OTD1 ICU2_IN1
AVSS_LVDS_PLL
AVCC3_LVDS_PLL
0
0
0
0
0
0
0
0
MFS0_CS0 0
P6_15
0
OCU1_OTD0 SGA1
MFS2_CS0 0
0
0
0
OCU1_OTD1 SGO1
0
P4_06
0
0
OCU2_OTD0
P4_07
PPG3_TOEINT6
0
0
0
PPG3_TOEINT7
OCU3_OTD0 ICU3_IN0
0
0
0
OCU3_OTD1 ICU3_IN1
PWM1M4
0
0
ICU1_IN0
PWM2P4
0
0
0
ICU1_IN1
0
SOT3
TRACE12
0
ICU2_IN0
SCK3
AN43
T
0
0
AN44
S
182
0
0
S
183
11
0
0
184
10
-
0
0
9
-
0
0
-
VSS
VCC12
0
0
AVSS
0
0
0
0
0
0
0
PPG1_TOUT0
0
0
0
0
PPG1_TOUT2
0
0
0
0
PPG2_TOUT0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0 P4_26 COM2 EINT10
0
0
0
0
0 P4_27 COM1 EINT11
0
0
0
0
0 P4_28 COM0 EINT12
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0 P6_26
0
0
0
0
0
0
P4_08
PPG4_TOEINT8
A
0
0
0
0
0
0
A
C_L
0
0
0
0
0
0
OCU4_OTD0 ICU4_IN0
DAC_L
0
0
0
0
0
G_DQ1_2
0
0
PWM2M4
0
0
0
0
0
0
0
0
0
0
0
G_DQ2_2
CAP0_DATA14
0
0
0
0
0
0
0
0
0
0
0
0
CAP0_DATA13
0
0
SIN3
0
0
DSP0_CLK+
0
AN45
0
0
ICU4_IN0
TRACE13
S
0
0
ICU3_IN1
T
185
0
0
PPG4_TOUT0
186
0
8
0
0
0
0
0
0
0
0
0
0
0
0
0
DVCC
0
DVSS
191
192
○
2
-
7
AVCC3_DAC
0
AVSS
0
0
PPG3_TOUT2
0
0
0
0
0
0
0
EINT0
MFS0_CS3 MFS4_SDA
0
0
0
0
0
0
0
MFS0_CS1 MFS4_SCL
0
P4_09
0
0
0
0
1
VSS
0
AVSS
0
0
0
0
0
0
0
0
0
0
0
0
0
0
MFS0_CS2 0
0
P4_10
PPG4_TOEINT9
0
0
0
0
0
0
0
0
0
0
0
P4_11
PPG5_TOEINT10
OCU4_OTD1 ICU4_IN1
0
0
0
0
0
0
0
P4_12
PPG5_TOEINT11
OCU5_OTD0 ICU5_IN0
PWM1P5
0
0
0
0
0
0
0
PPG6_TOEINT12
OCU5_OTD1 ICU5_IN1
PWM1M5
0
0
0
0
0
0
0
0
OCU6_OTD0 ICU6_IN0
PWM2P5
0
0
0
0
0
0
0
0
PWM2M5
RX1
SOT4
AN46
0
0
0
0
0
0
0
VCC3_LVDS_Tx
0
0
0
TX1
SCK4
AN47
S
0
0
0
0
SIN4
AN48
S
187
0
0
0
0
0
AN49
S
188
6
0
0
0
0
0
S
189
5
0
0
0
0
0
190
4
-
0
0
0
0
0
3
A
0
0
0
0
0
0
A
C_R
0
0
0
0
0
0
0
0
0
0
DAC_R
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
TEQPF-256 Pin Assignment
4.1.3
Figure 4-15: TEQFP-256
0
0
0
0
0
0
P0_03
EINT4
PPG2_TOUT0
ICU2_IN0
OCU2_OTD0
0
TIN16
CRS
CAP0_DATA12
DSP0_DATA_D4-
DSP0_DATA1_4
D
49
144
H
ADTRG
0
SGA3
TOT35
OCU5_OTD0 ICU5_IN0
PPG5_TOEINT2
P3_18
0
0
0
CAP0_DATA11
G_CK_2
0
0
0
0
P0_04
EINT5
PPG2_TOUT2
ICU2_IN1
OCU2_OTD1
0
TOT17
TXD0
CAP0_DATA13
DSP0_DATA_D5+
DSP0_DATA0_5
D
50
143
-
C
0
0
0
0
0
0
0
0
0
0
0
CAP0_DATA12
G_DQ3_2
P0_05
EINT6
PPG3_TOUT0
ICU3_IN0
OCU3_OTD0
SIN0
TIN17
TXD1
CAP0_DATA14
DSP0_DATA_D5-
DSP0_DATA1_5
D
4. Package and Pin Assignment
D a t a S h e e t ( P r e l i m i n a r y )
4.2 Package Dimensions
Function Digit
3,4,5,6,7,8
A, B, C, D
TEQFP-216
Figure 4-16
TEQFP-208
Figure 4-17
Figure 4-18
Note:
−
Same size is specified for MIN, NOM, MAX, then it should be regarded as maximum size.
June 30, 2015, S6J3200_DS708-00003-0v04-E
CONFIDENTIAL
39
4. Package and Pin Assignment
D a t a S h e e t ( P r e l i m i n a r y )
4.2.1
TEQFP216
Figure 4-16 LEQ216
40
CONFIDENTIAL
S6J3200_DS708-00003-0v04-E, June 30, 2015
4. Package and Pin Assignment
D a t a S h e e t ( P r e l i m i n a r y )
4.2.2
TEQFP208
Figure 4-17: LET208
June 30, 2015, S6J3200_DS708-00003-0v04-E
CONFIDENTIAL
41
4. Package and Pin Assignment
D a t a S h e e t ( P r e l i m i n a r y )
Figure 4-18:LER208
42
CONFIDENTIAL
S6J3200_DS708-00003-0v04-E, June 30, 2015
5. I/O Circuit Type
D a t a S h e e t ( P r e l i m i n a r y )
5. I/O Circuit Type
5.1 I/O Circuit Type
This section explains I/O circuit types.
Type
A
B
Circuit
Remark
Analog output
− Analog output(3V)
Analog output
− Analog output(3V)
C
− Audio DAC output
− LVDS output
− General-purpose I/O port
Pull-up control
Digital output
Digital output
− Output 2mA, 5mA, 10mA or 20mA selectable
− 33kΩ with pull-up resistor control
− 33kΩ with pull-down resistor control
− CMOS hysteresis input
− TTL input
Pull-down control
CMOS-hys input
PSS control
TTL input
PSS control
June 30, 2015, S6J3200_DS708-00003-0v04-E
CONFIDENTIAL
43
5. I/O Circuit Type
D a t a S h e e t ( P r e l i m i n a r y )
Type
Circuit
D
Remark
Pull-up control
− General-purpose I/O port
− Output 2mA, 5mA, 10mA or 20mA selectable
Digital output
− 33kΩ with pull-up resistor control
Digital output
− CMOS hysteresis input
− 33kΩ with pull-down resistor control
− TTL input
Pull-down control
− RSDS differential output data
CMOS-hys input
PSS control
TTL input
PSS control
Pull-up control
Digital output
Digital output
Pull-down control
CMOS-hys input
Control Logic
PSS control
TTL input
PSS control
RSDS mode
control
RSDS output
data
RSDS output
enable
E
− General-purpose I/O port
Pull-up control
Digital output
Digital output
− Output 2mA, 5mA or 10mA selectable
− 50kΩ with pull-up resistor control
− 50kΩ with pull-down resistor control
− CMOS hysteresis input
− TTL input
Pull-down control
CMOS-hys input
PSS control
TTL input
PSS control
44
CONFIDENTIAL
S6J3200_DS708-00003-0v04-E, June 30, 2015
5. I/O Circuit Type
D a t a S h e e t ( P r e l i m i n a r y )
Type
Circuit
F
Remark
− General-purpose I/O port
Pull-up control
Digital output
Digital output
− Output 2mA, 5mA, 6mA or 10mA selectable
− 33kΩ with pull-up resistor control
− 33kΩ with pull-down resistor control
− CMOS hysteresis input
− MediaLB level hysteresis input
Pull-down control
CMOS-hys input
PSS control
MediaLB-hys input
PSS control
G
− External 1.2V regulator control
Digital output
− Output 2mA
Digital output
H
− General-purpose I/O port
Pull-up control
Digital output
Digital output
− Output 1mA, 2mA or 5mA selectable
− 50kΩ with pull-up resistor control
− 50kΩ with pull-down resistor control
− CMOS hysteresis input
− Automotive hysteresis input
Pull-down control
CMOS-hys input
PSS control
Automotive input
PSS control
I
− General-purpose I/O port with analog input
Pull-up control
Digital output
Digital output
− Output 1mA, 2mA or 5mA selectable
− 50kΩ with pull-up resistor control
− 50kΩ with pull-down resistor control
− CMOS hysteresis input
− Automotive hysteresis input
Pull-down control
CMOS-hys input
PSS control
Automotive input
PSS control
Analog input
June 30, 2015, S6J3200_DS708-00003-0v04-E
CONFIDENTIAL
45
5. I/O Circuit Type
D a t a S h e e t ( P r e l i m i n a r y )
Type
Circuit
J
Remark
Pull-up control
− General-purpose I/O port with analog input
− Output 1mA, 2mA, 3mA(I2C) or 5mA selectable
Digital output
− 50kΩ with pull-up resistor control
Digital output
− CMOS hysteresis input
− 50kΩ with pull-down resistor control
− Automotive hysteresis input
Pull-down control
− TTL input
CMOS-hys input
PSS control
Automotive input
PSS control
TTL input
PSS control
Analog input
L
− 50kΩ with pull-up
− CMOS hysteresis input
CMOS-hys input
M
X1
X0
OSC input
− Main oscillation I/O
PSS control
N
− JTAG_NTRST
− 50kΩ with pull-down
− TTL input
TTL input
N2
− JTAG_TDI/TMS/TCK
− 50kΩ with pull-up
− TTL input
TTL input
O
− JTAG_TDO
Digital output
− Output 5mA
Digital output
46
CONFIDENTIAL
S6J3200_DS708-00003-0v04-E, June 30, 2015
5. I/O Circuit Type
D a t a S h e e t ( P r e l i m i n a r y )
Type
Circuit
Remark
P
− Mode input
− CMOS hysteresis input
Mode
input
Control
Q
− CMOS hysteresis input
− 50kΩ with pull-up
CMOS-hys input
S
− General-purpose I/O port with analog input
Pull-up control
Digital output
Digital output
− Output 1mA, 2mA, 5mA or 30mA selectable
− 50kΩ with pull-up resistor control
− 50kΩ with pull-down resistor control
− CMOS hysteresis input
− Automotive hysteresis input
Pull-down control
CMOS-hys input
PSS control
Automotive input
PSS control
Analog input
T
− General-purpose I/O port
Pull-up control
Digital output
Digital output
− Output 1mA, 2mA, 5mA or 30mA selectable
− 50kΩ with pull-up resistor control
− 50kΩ with pull-down resistor control
− CMOS hysteresis input
− Automotive hysteresis input
Pull-down control
CMOS-hys input
PSS control
Automotive input
PSS control
June 30, 2015, S6J3200_DS708-00003-0v04-E
CONFIDENTIAL
47
5. I/O Circuit Type
D a t a S h e e t ( P r e l i m i n a r y )
Type
U
Circuit
Pull-up control
Remark
− General-purpose input port with LCDC reference voltage input
− 50kΩ with pull-up resistor control
− 50kΩ with pull-down resistor control
− CMOS hysteresis input
− Automotive hysteresis input
Pull-down control
CMOS-hys input
PSS control
Automotive input
PSS control
LCDC reference
voltage input
V
Pull-up control
Digital output
Digital output
Pull-down control
− General-purpose I/O port with analog input and LCDC reference
voltage input
− Output 1mA, 2mA or 5mA selectable
− 50kΩ with pull-up resistor control
− 50kΩ with pull-down resistor control
− CMOS hysteresis input
− Automotive hysteresis input
CMOS-hys input
PSS control
Automotive input
PSS control
Analog input
LCDC reference
voltage input
W
Pull-up control
Digital output
Digital output
Pull-down control
− General-purpose I/O port with analog input and LCDC
COM/SEG output
− Output 1mA, 2mA or 5mA selectable
− 50kΩ with pull-up resistor control
− 50kΩ with pull-down resistor control
− CMOS hysteresis input
− Automotive hysteresis input
CMOS-hys input
PSS control
Automotive input
PSS control
Analog input
LCDC COM/SEG
output
48
CONFIDENTIAL
S6J3200_DS708-00003-0v04-E, June 30, 2015
5. I/O Circuit Type
D a t a S h e e t ( P r e l i m i n a r y )
Type
Circuit
Remark
X
− Sub oscillation I/O shared General-purpose I/O port
Pull-up control
Digital output
Digital output
− Output 1mA, 2mA or 5mA selectable
− 50kΩ with pull-up resistor control
− 50kΩ with pull-down resistor control
− CMOS hysteresis input
− Automotive hysteresis input
Pull-down control
CMOS-hys input
PSS/OSC control
Automotive input
PSS/OSC control
OSC input
PSS/OSC control
Pull-up control
Digital output
Digital output
Pull-down control
CMOS-hys input
PSS/OSC control
Automotive input
PSS/OSC control
Y
Pull-up control
Digital output
− General-purpose I/O port with LCDC COM/SEG output
− Output 1mA, 2mA or 5mA selectable
− 50kΩ with pull-up resistor control
− 50kΩ with pull-down resistor control
Digital output
− CMOS hysteresis input
Pull-down control
− TTL input
− Automotive hysteresis input
CMOS-hys input
PSS control
Automotive input
PSS control
TTL input
PSS control
LCDC COM/SEG
output
June 30, 2015, S6J3200_DS708-00003-0v04-E
CONFIDENTIAL
49
5. I/O Circuit Type
D a t a S h e e t ( P r e l i m i n a r y )
Type
Circuit
Z
Remark
− General-purpose I/O port
Pull-up control
Digital output
Digital output
Pull-down control
− Output 1mA, 2mA or 5mA selectable
− 50kΩ with pull-up resistor control
− 50kΩ with pull-down resistor control
− CMOS hysteresis input
− Automotive hysteresis input
− TTL input
CMOS-hys input
PSS control
Automotive input
PSS control
TTL input
PSS control
5.2 Note
Alphabet which shows I/O circuit type is described with corresponding pin number in pin assignment figure.
50
CONFIDENTIAL
S6J3200_DS708-00003-0v04-E, June 30, 2015
6. Port Description
D a t a S h e e t ( P r e l i m i n a r y )
6. Port Description
6.1 Port Description List
The table shows the port function of description which is supported. The port function which is not described
in the table is not supported for the product.
Port Name
VCC12
Description
+1.2V power supply pin
VCC5
+5.0V power supply pin
VCC3
+3.3V power supply pin
VCC53
+3.3V/+5.0V selection power supply pin
VCC3_LVDS_Tx
LVDS Tx power supply pin
VSS
GND
Package Pin Number
TEQFP208
TEQFP216
11, 28, 61, 85,
11, 28, 63, 87,
122, 123, 182,
128, 129, 190,
183
191
87, 104, 115,
89, 108, 119,
157, 171
163, 179
30, 43, 53, 65,
30, 43, 55, 67,
74, 81
76, 83
173, 185, 194,
181, 193, 202,
208
216
14, 27
14, 27
1, 10, 29, 42,
1, 10, 29, 42,
52, 62, 64, 71,
54, 64, 66, 73,
73, 80, 86,
75, 82, 88,
105, 116, 124,
109, 120, 130,
158, 172, 184,
164, 180, 192,
195
203
VSS_LVDS_Tx
LVDS Tx GND
15, 26
15, 26
AVCC3_DAC
Audio DAC power supply pin
6
6
AVCC3_LVDS_PLL
LVDS PLL power supply pin
13
13
AVSS_LVDS_PLL
LVDS PLL GND
12
12
AVCC5
A/D converter analog power supply pin
119
125
AVRH5
A/D converter upper limit reference voltage pin
120
126
AVSS
A/D converter GND
2, 5, 9, 121
2, 5, 9, 127
DVCC
SMC large current port power supply pin
126, 136,
132, 142,
146,156
152,162
125, 135,
131, 141, 151,
145,155
161
DVSS
SMC large current port GND
X1
Main clock oscillator output pin
106
110
X0
Main clock oscillator input pin
107
111
X1A
Sub-clock oscillator output
169
177
X0A
Sub-clock oscillator input
170
178
NMIX
Non-maskable interrupt input pin
103
107
118
RSTX
External reset input pin
114
PSC_1
External Power Supply Control pin
88
90
MODE
Mode Pin
113
117
C
External capacity connection output pin
117
121
JTAG_NTRST
JTAG test reset input pin
108
112
JTAG_TDO
JTAG test data output pin
109
113
JTAG_TDI
JTAG test data input pin
110
114
June 30, 2015, S6J3200_DS708-00003-0v04-E
CONFIDENTIAL
Remark
51
6. Port Description
D a t a S h e e t ( P r e l i m i n a r y )
Port Name
Description
Package Pin Number
TEQFP208
TEQFP216
115
JTAG_TCK
JTAG test clock input pin
111
JTAG_TMS
JTAG test mode state input pin
112
116
TRACE0
Trace data 0 output pin
96
100
TRACE1
Trace data 1 output pin
97
101
TRACE2
Trace data 2 output pin
98
102
103
TRACE3
Trace data 3 output pin
99
TRACE_CLK
Trace clock
100
104
TRACE_CTL
Trace control
101
105
ADTRG
A/D converter external trigger input pin
118
122
AN0
ADC Analog 0 input pin
-
92
AN1
ADC Analog 1 input pin
90
93
AN2
ADC Analog 2 input pin
91
94
AN3
ADC Analog 3 input pin
92
95
AN4
ADC Analog 4 input pin
-
96
AN5
ADC Analog 5 input pin
93
97
AN6
ADC Analog 6 input pin
94
98
AN7
ADC Analog 7 input pin
95
99
AN8
ADC Analog 8 input pin
96
100
AN9
ADC Analog 9 input pin
97
101
AN10
ADC Analog 10 input pin
98
102
AN11
ADC Analog 11 input pin
99
103
AN12
ADC Analog 12 input pin
100
104
AN13
ADC Analog 13 input pin
101
105
AN14
ADC Analog 14 input pin
102
106
AN15
ADC Analog 15 input pin
160
166
AN16
ADC Analog 16 input pin
161
167
AN17
ADC Analog 17 input pin
162
168
AN18
ADC Analog 18 input pin
-
169
AN19
ADC Analog 19 input pin
-
170
AN20
ADC Analog 20 input pin
163
171
AN21
ADC Analog 21 input pin
164
172
AN22
ADC Analog 22 input pin
165
173
AN23
ADC Analog 23 input pin
166
174
AN24
ADC Analog 24 input pin
167
175
AN25
ADC Analog 25 input pin
168
176
AN26
ADC Analog 26 input pin
127
133
AN27
ADC Analog 27 input pin
128
134
AN28
ADC Analog 28 input pin
129
135
AN29
ADC Analog 29 input pin
130
136
AN30
ADC Analog 30 input pin
131
137
AN31
ADC Analog 31 input pin
132
138
AN32
ADC Analog 32 input pin
133
139
AN33
ADC Analog 33 input pin
134
140
AN34
ADC Analog 34 input pin
137
143
AN35
ADC Analog 35 input pin
138
144
AN36
ADC Analog 36 input pin
139
145
AN37
ADC Analog 37 input pin
140
146
AN38
ADC Analog 38 input pin
141
147
AN39
ADC Analog 39 input pin
142
148
52
CONFIDENTIAL
Remark
S6J3200_DS708-00003-0v04-E, June 30, 2015
6. Port Description
D a t a S h e e t ( P r e l i m i n a r y )
Port Name
Description
AN40
AN41
Package Pin Number
TEQFP208
TEQFP216
ADC Analog 40 input pin
143
149
ADC Analog 41 input pin
144
150
AN42
ADC Analog 42 input pin
147
153
AN43
ADC Analog 43 input pin
148
154
AN44
ADC Analog 44 input pin
149
155
AN45
ADC Analog 45 input pin
150
156
AN46
ADC Analog 46 input pin
151
157
AN47
ADC Analog 47 input pin
152
158
AN48
ADC Analog 48 input pin
153
159
AN49
ADC Analog 49 input pin
154
160
TX0
CAN transmission data 0 output pin
100
104
TX1
CAN transmission data 1 output pin
102, 154
106, 160
TX5
CAN transmission data 5 output pin
162, 166
168, 174
170, 176
TX6
CAN transmission data 6 output pin
168
RX0
CAN reception data 0 input pin
99
103
RX1
CAN reception data 1 input pin
101, 153
105, 159
RX5
CAN reception data 5 input pin
161, 165
167, 173
RX6
CAN reception data 6 input pin
167
169. 175
33, 39, 57, 63,
33, 39, 59, 65,
96, 140, 167,
100, 146, 175,
170, 177,199
178, 185, 207
40, 58, 82, 97,
40, 60, 84,
141, 168, 169,
101, 147, 176,
178, 200
177, 186,208,
EINT0
EINT1
EINT2
EINT3
EINT4
EINT5
EINT6
External interrupt input pin
External interrupt input pin
External interrupt input pin
External interrupt input pin
External interrupt input pin
External interrupt input pin
External interrupt input pin
EINT7
External interrupt input pin
EINT8
External interrupt input pin
EINT9
EINT10
External interrupt input pin
External interrupt input pin
June 30, 2015, S6J3200_DS708-00003-0v04-E
CONFIDENTIAL
41, 59, 83, 98,
41, 61, 85,
118, 142, 179,
102, 122, 148,
201,
187, 209
31, 84, 99,
31, 44, 86,
143, 159, 180,
103, 123, 149,
202
165, 188, 210
60, 100, 144,
181, 203
45, 62, 104,
124, 150, 189,
211
44, 72, 101,
46, 74, 105,
127, 147, 186
133, 153, 194,
45, 75, 89,
47, 77, 91,
102, 128, 148,
106, 134, 154,
187,
195
46, 77, 129,
48, 79, 135,
149, 160, 188
155, 166, 196
47, 76, 130,
150, 161, 189
Remark
49, 78, 92,
136, 156, 167,
197
48, 79, 90,
50, 81, 93,
131, 151, 162,
137, 157, 168,
190 204
198, 212,
49, 78, 91,
51, 80, 94,
132, 152,
138, 158, 169,
191,205
199, 213
53
6. Port Description
D a t a S h e e t ( P r e l i m i n a r y )
Port Name
Description
EINT11
External interrupt input pin
EINT12
EINT13
EINT14
External interrupt input pin
External interrupt input pin
External interrupt input pin
Package Pin Number
TEQFP208
34, 50, 69, 92,
34,52,71,
133, 153, 192,
95,139,159,
206
170, 200, 214
35, 51, 66,
35, 53, 68, 96,
134, 154, 163,
140, 160, 171,
193, 207
201, 215
36, 54, 68, 93,
36, 56, 70, 97,
137, 164, 174,
143, 172, 182,
196
204
37, 55, 67, 94,
37, 57, 69, 98,
138, 165, 175,
144, 173, 183,
197
205
32, 38, 56, 70,
32, 38, 58, 72,
95, 139, 166,
99, 145, 174,
EINT15
External interrupt input pin
176, 198
184, 206
MFS0_CS0
Multi-function serial ch.0 chip select 0 pin
148
154
MFS0_CS1
Multi-function serial ch.0 chip select 1 pin
153
159
MFS0_CS2
Multi-function serial ch.0 chip select 2 pin
154
160
MFS0_CS3
Multi-function serial ch.0 chip select 3 pin
152
158
MFS2_CS0
Multi-function serial ch.2 chip select 0 pin
149
155
MFS2_CS1
Multi-function serial ch.2 chip select 1 pin
150
156
MFS8_CS0
Multi-function serial ch.8 chip select 0 pin
163, 191
171, 199
MFS8_CS1
Multi-function serial ch.8 chip select 1 pin
167, 198
175, 206
MFS8_CS2
Multi-function serial ch.8 chip select 2 pin
168, 199
176, 207
MFS8_CS3
Multi-function serial ch.8 chip select 3 pin
166, 197
174, 205
MFS9_CS0
Multi-function serial ch.9 chip select 0 pin
164, 192
172, 200
MFS9_CS1
Multi-function serial ch.9 chip select 1 pin
165, 193
173, 201
SCK0
Multi-function serial ch.0 clock I/O pin
38, 91
38, 94
SCK1
Multi-function serial ch.1 clock I/O pin
83, 94
85, 98
SCK2
Multi-function serial ch.2 clock I/O pin
143
149
SCK3
Multi-function serial ch.3 clock I/O pin
149
155
SCK4
Multi-function serial ch.4 clock I/O pin
153
159
SCK8
Multi-function serial ch.8 clock I/O pin
100, 180
104, 188
SCK9
Multi-function serial ch.9 clock I/O pin
161, 188
167, 196
SCK10
Multi-function serial ch.10 clock I/O pin
164, 192
172, 200
SCK11
Multi-function serial ch.11 clock I/O pin
167, 198, 206
175, 206, 214
SCK12
Multi-function serial ch.12 clock I/O pin
202
210
SCK16
Multi-function serial ch.16 clock I/O pin
97
101
SCK17
Multi-function serial ch.17 clock I/O pin
91
94
SIN0
Multi-function serial ch.0 serial data input pin
45, 92
47, 95
SIN1
Multi-function serial ch.1 serial data input pin
84, 95
86, 99
SIN2
Multi-function serial ch.2 serial data input pin
144
150
SIN3
Multi-function serial ch.3 serial data input pin
150
156
SIN4
Multi-function serial ch.4 serial data input pin
154
160
SIN8
Multi-function serial ch.8 serial data input pin
101, 181
105, 189
SIN9
Multi-function serial ch.9 serial data input pin
162, 189
168, 197
SIN10
Multi-function serial ch.10 serial data input pin
165, 193
173, 201
SIN11
Multi-function serial ch.11 serial data input pin
168, 199, 207
176, 207, 215
SIN12
Multi-function serial ch.12 serial data input pin
203
211
54
CONFIDENTIAL
Remark
TEQFP216
S6J3200_DS708-00003-0v04-E, June 30, 2015
6. Port Description
D a t a S h e e t ( P r e l i m i n a r y )
Port Name
Description
SIN16
SIN17
Package Pin Number
TEQFP208
TEQFP216
Multi-function serial ch.16 serial data input pin
98
102
Multi-function serial ch.17 serial data input pin
92
95
SOT0
Multi-function serial ch.0 serial data output pin
37, 90
37, 93
SOT1
Multi-function serial ch.1 serial data output pin
82, 93
84, 97
SOT2
Multi-function serial ch.2 serial data output pin
142
148
SOT3
Multi-function serial ch.3 serial data output pin
148
154
SOT4
Multi-function serial ch.4 serial data output pin
152
158
SOT8
Multi-function serial ch.8 serial data output pin
99, 179
103, 187
SOT9
Multi-function serial ch.9 serial data output pin
160, 187
166, 195
SOT10
Multi-function serial ch.10 serial data output pin
163, 191
171, 199
SOT11
Multi-function serial ch.11 serial data output pin
166, 197, 205
174, 205, 213
SOT12
Multi-function serial ch.12 serial data output pin
201
209
SOT16
Multi-function serial ch.16 serial data output pin
96
100
SOT17
Multi-function serial ch.17 serial data output pin
90
93
SCL4
I2C ch.4 clock I/O pin
153
159
SCL10
I2C ch.10 clock I/O pin
192
200
2
SCL12
I C ch.12 clock I/O pin
202
210
SCL16
I2C ch.16 clock I/O pin
97
101
SCL17
I2C ch.17 clock I/O pin
91
94
SDA4
I C ch.4 serial data I/O pin
152
158
SDA10
I2C ch.10 serial data I/O pin
191
199
2
2
SDA12
I C ch.12 serial data I/O pin
201
209
SDA16
I2C ch.16 serial data I/O pin
96
100
SDA17
I2C ch.17 serial data I/O pin
90
93
PPG0_TOUT0
Base timer 0 output pin
39, 140, 161,
39, 146, 167,
PPG0_TOUT2
Base timer 1 output pin
PPG1_TOUT0
Base timer 2 output pin
PPG1_TOUT2
Base timer 3 output pin
PPG2_TOUT0
Base timer 4 output pin
PPG2_TOUT2
Base timer 5 output pin
PPG3_TOUT0
Base timer 6 output pin
PPG3_TOUT2
Base timer 7 output pin
PPG4_TOUT0
Base timer 8 output pin
PPG4_TOUT2
Base timer 9 output pin
PPG5_TOUT0
Base timer 10 output pin
PPG5_TOUT2
Base timer 11 output pin
June 30, 2015, S6J3200_DS708-00003-0v04-E
CONFIDENTIAL
170, 199
178, 207
40, 141, 162,
40, 147, 168,
169, 200, 204
177, 208, 212
41,142,201,
41,148,169,
205
209,213
143, 202, 206
Remark
44, 149, 170,
210, 214
144, 163, 203,
45, 150, 171,
207
211, 215
44, 147, 164,
46, 153, 172,
174
182
45, 89, 148,
47, 91, 154,
165, 175
173, 183
32, 46, 149,
32, 48, 155,
166, 176
174, 184
33, 47, 150,
33, 49, 92,
167, 177
156, 175, 185
48, 84, 90,
50, 86, 93,
151, 168, 178
157, 176, 186
49, 91, 118,
51, 94, 122,
152, 179
158, 187
50, 72, 92,
52, 74, 95,
153, 180
123, 159, 188
55
6. Port Description
D a t a S h e e t ( P r e l i m i n a r y )
Port Name
Description
PPG6_TOUT0
Base timer 12 output pin
PPG6_TOUT2
Base timer 13 output pin
PPG7_TOUT0
Base timer 14 output pin
PPG7_TOUT2
Base timer 15 output pin
PPG8_TOUT0
Base timer 16 output pin
PPG8_TOUT2
Base timer 17 output pin
PPG9_TOUT0
Base timer 18 output pin
PPG9_TOUT2
Base timer 19 output pin
PPG10_TOUT0
Base timer 20 output pin
PPG10_TOUT2
Base timer 21 output pin
Package Pin Number
TEQFP208
51, 75, 154,
53, 77, 96,
181
124, 160,189
54, 77, 93,
56, 79, 97,
127, 186
133, 194
55, 76, 94,
57, 78, 98,
128, 187
134, 195
56, 79, 95,
58, 81, 99,
129, 188
135, 196
57, 78, 96,
59, 80, 100,
130, 189
136, 197
58, 69, 97,
60, 71, 101,
131, 190
137, 198
59, 66, 98,
61, 68, 102,
132, 191
138, 199
31, 34, 68, 99,
31, 34, 70,
133, 192
103, 139, 200
35, 60, 67,
35, 62, 69,
100, 134, 193
104, 140, 201
36, 70, 101,
36, 72, 105,
137, 196
143, 204
37, 63, 102,
37, 65, 106,
138, 197
144, 205
38, 139, 160,
38, 145, 166,
198
206
PPG11_TOUT0
Base timer 22 output pin
PPG11_TOUT2
Base timer 23 output pin
PPG0/1/2/3/4/5_TIN1
Base timer 0/2/4/6/8/10 input pin
-
96
Base timer 12/14/16/18/20/22 input pin
161
167
WOT
RTC overflow output pin
161
167
PWM1M0
SMC ch.0 output pin
128
134
PWM1M1
SMC ch.1 output pin
132
138
PWM1M2
SMC ch.2 output pin
138
144
PWM1M3
SMC ch.3 output pin
142
148
PWM1M4
SMC ch.4 output pin
148
154
PWM1M5
SMC ch.5 output pin
152
158
PWM1P0
SMC ch.0 output pin
127
133
PWM1P1
SMC ch.1 output pin
131
137
PWM1P2
SMC ch.2 output pin
137
143
PWM1P3
SMC ch.3 output pin
141
147
PWM1P4
SMC ch.4 output pin
147
153
PPG6/7/8/9/10/11_TIN
1
PWM1P5
SMC ch.5 output pin
151
157
PWM2M0
SMC ch.0 output pin
130
136
PWM2M1
SMC ch.1 output pin
134
140
PWM2M2
SMC ch.2 output pin
140
146
PWM2M3
SMC ch.3 output pin
144
150
PWM2M4
SMC ch.4 output pin
150
156
PWM2M5
SMC ch.5 output pin
154
160
PWM2P0
SMC ch.0 output pin
129
135
PWM2P1
SMC ch.1 output pin
133
139
PWM2P2
SMC ch.2 output pin
139
145
56
CONFIDENTIAL
Remark
TEQFP216
S6J3200_DS708-00003-0v04-E, June 30, 2015
6. Port Description
D a t a S h e e t ( P r e l i m i n a r y )
Port Name
Description
PWM2P3
PWM2P4
Package Pin Number
TEQFP208
TEQFP216
SMC ch.3 output pin
143
149
SMC ch.4 output pin
149
155
PWM2P5
SMC ch.5 output pin
153
159
OCU0_OTD0
Output compare 0 ch.0 output pin
39, 140, 161,
39, 146, 167,
OCU0_OTD1
Output compare 0 ch.1 output pin
OCU1_OTD0
Output compare 1 ch.0 output pin
OCU1_OTD1
Output compare 1 ch.1 output pin
OCU2_OTD0
Output compare 2 ch.0 output pin
OCU2_OTD1
Output compare 2 ch.1 output pin
OCU3_OTD0
Output compare 3 ch.0 output pin
OCU3_OTD1
Output compare 3 ch.1 output pin
OCU4_OTD0
Output compare 4 ch.0 output pin
OCU4_OTD1
Output compare 4 ch.1 output pin
OCU5_OTD0
Output compare 5 ch.0 output pin
OCU5_OTD1
Output compare 5 ch.1 output pin
OCU6_OTD0
Output compare 6 ch.0 output pin
OCU6_OTD1
Output compare 6 ch.1 output pin
OCU7_OTD0
Output compare 7 ch.0 output pin
OCU7_OTD1
Output compare 7 ch.1 output pin
OCU8_OTD0
Output compare 8 ch.0 output pin
OCU8_OTD1
Output compare 8 ch.1 output pin
OCU9_OTD0
Output compare 9 ch.0 output pin
OCU9_OTD1
Output compare 9 ch.1 output pin
OCU10_OTD0
Output compare 10 ch.0 output pin
OCU10_OTD1
Output compare 10 ch.1 output pin
OCU11_OTD0
Output compare 11 ch.0 output pin
June 30, 2015, S6J3200_DS708-00003-0v04-E
CONFIDENTIAL
170, 199
178, 207
40, 141, 162,
40, 147, 168,
169, 200, 204
177, 208, 212
41, 142, 201,
41, 148, 169,
205
209, 213
143, 202, 206
144, 163, 203,
Remark
44, 149, 170,
210, 214
45, 150, 171,
207
211, 215
44, 147, 164,
46, 153, 172,
174
182
45, 89, 148,
47, 91, 154,
165, 175
173, 183
32, 46, 149,
32, 48, 155,
166, 176
174, 184
33, 47, 150,
33, 49, 92,
167, 177
156, 175, 185
48, 84, 90,
50, 86, 93,
151, 168, 178
157, 176, 186
49, 91, 118,
51, 94, 122,
152, 179
158, 187
50, 72, 92,
52, 74, 95,
153, 180
123, 159, 188
51, 75, 154,
53, 77, 96,
181
124, 160, 189
54, 77, 93,
56, 79, 97,
127, 186
133, 194
55, 76, 94,
57, 78, 98,
128, 187
134, 195
56, 79, 95,
58, 81, 99,
129, 188
135, 196
57, 78, 96,
59, 80, 100,
130, 189
136, 197
58, 69, 97,
60, 71, 101,
131, 190
137, 198
59, 66, 98,
61, 68, 102,
132, 191
138, 199
31, 34, 68, 99,
31, 34, 70,
133, 192
103, 139, 200
35, 60, 67,
35, 62, 69,
100, 134, 193
104, 140, 201
36, 70, 101,
36, 72, 105,
137, 196
143, 204
37, 63, 102,
37, 65, 106,
138, 197
144, 205
57
6. Port Description
D a t a S h e e t ( P r e l i m i n a r y )
Port Name
Description
OCU11_OTD1
Output compare 11 ch.1 output pin
ICU0_IN0
Input Capture 0 ch.0 input pin
ICU0_IN1
Input Capture 0 ch.1 input pin
ICU1_IN0
Input Capture 1 ch.0 input pin
ICU1_IN1
Input Capture 1 ch.1 input pin
ICU2_IN0
Input Capture 2 ch.0 input pin
ICU2_IN1
Input Capture 2 ch.1 input pin
ICU3_IN0
Input Capture 3 ch.0 input pin
ICU3_IN1
Input Capture 3 ch.1 input pin
ICU4_IN0
Input Capture 4 ch.0 input pin
ICU4_IN1
Input Capture 4 ch.1 input pin
ICU5_IN0
Input Capture 5 ch.0 input pin
ICU5_IN1
Input Capture 5 ch.1 input pin
ICU6_IN0
Input Capture 6 ch.0 input pin
ICU6_IN1
Input Capture 6 ch.1 input pin
ICU7_IN0
Input Capture 7 ch.0 input pin
ICU7_IN1
Input Capture 7 ch.1 input pin
ICU8_IN0
Input Capture 8 ch.0 input pin
ICU8_IN1
Input Capture 8 ch.1 input pin
ICU9_IN0
Input Capture 9 ch.0 input pin
ICU9_IN1
Input Capture 9 ch.1 input pin
ICU10_IN0
Input Capture 10 ch.0 input pin
ICU10_IN1
Input Capture 10 ch.1 input pin
ICU11_IN0
Input Capture 11 ch.0 input pin
ICU11_IN1
Input Capture 11 ch.1 input pin
58
CONFIDENTIAL
Package Pin Number
TEQFP208
TEQFP216
38, 139, 160,
38, 145, 166,
198
206
39, 140, 161,
39, 146, 167,
170, 199
178, 207
40, 141, 162,
40, 147, 168,
169, 200, 204
177, 208, 212
41, 142, 201,
41, 148, 169,
205
209, 213
143, 159, 202,
44, 149, 165,
206
170, 210, 214
144, 163, 203,
45, 150, 171,
207
211, 215
44, 147, 164,
46, 153, 172,
174
182
45, 89, 148,
47, 91, 154,
165, 175
173, 183
32, 46, 149,
32, 48, 155,
166, 176
174, 184
33, 47, 150,
33, 49, 92,
167, 177
156, 175, 185
48, 84, 90,
50, 86, 93,
151, 168, 178
157, 176, 186
49, 91, 118,
51, 94, 122,
152, 179
158, 187
50, 72, 92,
52, 74, 95,
153, 180
123, 159, 188
51, 75, 154,
53, 77, 96,
181
124, 160, 189
54, 77, 93,
56, 79, 97,
127, 186
133, 194
55, 76, 94,
57, 78, 98,
128, 187
134, 195
56, 79, 95,
58, 81, 99,
129, 188
135, 196
57, 78, 96,
59, 80, 100,
130, 189
136, 197
58, 69, 97,
60, 71, 101,
131, 190
137, 198
59, 66, 98,
61, 68, 102,
132, 191
138, 199
31, 34, 68, 99,
31, 34, 70,
133, 192
103, 139, 200
35, 60, 67,
35, 62, 69,
100, 134, 193
104, 140, 201
36, 70, 101,
36, 72, 105,
137, 196
143, 204
37, 63, 102,
37, 65, 106,
138, 197
144, 205
38, 139, 160,
38, 145, 166,
198
206
Remark
S6J3200_DS708-00003-0v04-E, June 30, 2015
6. Port Description
D a t a S h e e t ( P r e l i m i n a r y )
Port Name
Description
SGA0
Sound generator ch.0 SGA output pin
Package Pin Number
TEQFP208
90, 97, 164
93, 101, 172
91, 98, 165,
94, 102, 173,
205
213
SGA1
Sound generator ch.1 SGA output pin
SGA2
Sound generator ch.2 SGA output pin
100, 167
96, 104, 175
SGA3
Sound generator ch.3 SGA output pin
94, 118, 175
98, 122, 183
SGO0
Sound generator ch.0 SGO output pin
96, 163
92, 100, 171
SGO1
Sound generator ch.1 SGO output pin
92,99,166,206
SGO2
Sound generator ch.2 SGO output pin
93, 101, 168
97, 105, 176
95,103,174,21
4
SGO3
Sound generator ch.3 SGO output pin
95, 176
99, 123, 184
AN0(AL0)
PCM PWM ch.0 output pin
128, 175
134, 183
AN1(AL1)
PCM PWM ch.1 output pin
132, 179
138, 187
AP0(AH0)
PCM PWM ch.0 output pin
127, 174
133, 182
AP1(AH1)
PCM PWM ch.1 output pin
131, 178
137, 186
BN0(BL0)
PCM PWM ch.0 output pin
130, 177
136, 185
BN1(BL1)
PCM PWM ch.1 output pin
134, 181
140, 189
BP0(BH0)
PCM PWM ch.0 output pin
129, 176
135, 184
BP1(BH1)
PCM PWM ch.1 output pin
133, 180
139, 188
I2S0_ECLK
I2S external clock ch.0 input pin
50
52
I2S1_ECLK
I2S external clock ch.1 input pin
56
58
I2S0_SCK
I2S continuous serial clock ch.0 pin
55
57
I2S1_SCK
I2S continuous serial clock ch.1 pin
59
61
I2S0_SD
I2S serial data ch.0 pin
51
53
I2S1_SD
I2S serial data ch.1 pin
57
59
I2S0_WS
I2S word select ch.0 pin
54
56
I2S word select ch.1 pin
58
60
8
8
4
4
7
7
I2S1_WS
C_L
C_R
DAC_L
Audio DAC external capacity connection output
pin (L)
Audio DAC external capacity connection output
pin (R)
Audio DAC output pin (L)
DAC_R
Audio DAC output pin (R)
3
3
FRT0/1/2/3_TEXT
Free-run timer ch.0/1/2/3 clock input pin
160
166
174
FRT4/5/6/7_TEXT
Free-run timer ch.4/5/6/7 clock input pin
166
FRT8/9/10/11_TEXT
Free-run timer ch.4/5/6/7 clock input pin
95
99
TIN0
Reload timer ch.0 event input pin
35
35, 96
TIN1
Reload timer ch.1 event input pin
37, 93
37, 97
TIN2
Reload timer ch.2 event input pin
39, 94
39, 98
TIN3
Reload timer ch.3 event input pin
41, 95
41, 99
TIN16
Reload timer ch.16 event input pin
100
45, 104
TIN17
Reload timer ch.17 event input pin
45, 102
47, 106
TIN18
Reload timer ch.18 event input pin
47, 162
49, 168
TIN19
Reload timer ch.19 event input pin
49
51, 170
TIN32
Reload timer ch.32 event input pin
51, 164
53, 172
TIN33
Reload timer ch.33 event input pin
55, 166
57, 174
TIN34
Reload timer ch.34 event input pin
57, 168
59, 176
TIN35
Reload timer ch.35 event input pin
59
61, 123
TIN48
Reload timer ch.48 event input pin
159
165
TIN49
Reload timer ch.49 event input pin
89
91
June 30, 2015, S6J3200_DS708-00003-0v04-E
CONFIDENTIAL
Remark
TEQFP216
59
6. Port Description
D a t a S h e e t ( P r e l i m i n a r y )
Port Name
Description
TOT0
TOT1
TOT2
Package Pin Number
TEQFP208
TEQFP216
Reload timer ch.0 output pin
34, 96
34, 100
Reload timer ch.1 output pin
36, 97
36, 101
Reload timer ch.2 output pin
38, 98
38, 102
TOT3
Reload timer ch.3 output pin
40, 99
40, 103
TOT16
Reload timer ch.16 output pin
101
44, 105
TOT17
Reload timer ch.17 output pin
44, 160
46, 166
TOT18
Reload timer ch.18 output pin
46, 161
48, 167
TOT19
Reload timer ch.19 output pin
48
50, 169
TOT32
Reload timer ch.32 output pin
50, 163
52, 171
TOT33
Reload timer ch.33 output pin
54, 165
56, 173
TOT34
Reload timer ch.34 output pin
56,167
58, 175
TOT35
Reload timer ch.35 output pin
58, 118
60, 122
AIN8
Up/Down counter AIN input pin ch.8
190
92, 198
AIN9
Up/Down counter AIN input pin ch.9
93, 193
97, 201
BIN8
Up/Down counter BIN input pin ch.8
90, 191
93, 199
BIN9
Up/Down counter BIN input pin ch.9
94, 196
98, 204
ZIN8
Up/Down counter ZIN input pin ch.8
91, 192
94, 200
ZIN9
Up/Down counter ZIN input pin ch.9
95, 197
99, 205
RXD0
Ethernet pin
48
50
RXD1
Ethernet pin
49
51
RXD2
Ethernet pin
50
52
RXD3
Ethernet pin
51
53
TXD0
Ethernet pin
44
46
TXD1
Ethernet pin
45
47
TXD2
Ethernet pin
46
48
TXD3
Ethernet pin
47
49
COL
Ethernet pin
58
44, 60
CRS
Ethernet pin
84
45, 86
RXER
Ethernet pin
56
58
RXDV
Ethernet pin
57
59
RXCLK
Ethernet pin
55
57
TXER
Ethernet pin
60
62
TXEN
Ethernet pin
41
41
TXCLK
Ethernet pin
54
56
MDC
Ethernet pin
31
31
MDIO
Ethernet pin
32
32
MLBCLK
MediaLB pin
84
86
MLBDAT
MediaLB pin
82
84
MLBSIG
MediaLB pin
83
85
TxCLK-
LVDS clock output pin
21
21
TxCLK+
LVDS clock output pin
20
20
TxDOUT0-
LVDS data output pin
25
25
TxDOUT0+
LVDS data output pin
24
24
TxDOUT1-
LVDS data output pin
23
23
60
CONFIDENTIAL
Remark
Described as TXOUT4M in
FPD-Link Converter
Described as TXOUT4P in
FPD-Link Converter
Described as TXOUT0M in
FPD-Link Converter
Described as TXOUT0P in
FPD-Link Converter
Described as TXOUT1M in
FPD-Link Converter
S6J3200_DS708-00003-0v04-E, June 30, 2015
6. Port Description
D a t a S h e e t ( P r e l i m i n a r y )
Port Name
Description
TxDOUT1+
LVDS data output pin
TxDOUT2-
LVDS data output pin
Package Pin Number
TEQFP208
TEQFP216
22
22
19
19
TxDOUT2+
LVDS data output pin
18
18
TxDOUT3-
LVDS data output pin
17
17
TxDOUT3+
LVDS data output pin
16
16
G_SCLK0
Graphic HS-SPI clock output pin
72
74
G_SDATA0_0
Graphic HS-SPI0 data 0 pin
75
77
G_SDATA0_1
Graphic HS-SPI0 data 1 pin
77
79
G_SDATA0_2
Graphic HS-SPI0 data 2 pin
76
78
G_SDATA0_3
Graphic HS-SPI0 data 3 pin
79
81
G_SDATA1_0
Graphic HS-SPI1 data 0 pin
66
68
G_SDATA1_1
Graphic HS-SPI1 data 1 pin
68
70
G_SDATA1_2
Graphic HS-SPI1 data 2 pin
67
69
G_SDATA1_3
Graphic HS-SPI1 data 3 pin
70
72
G_SSEL0
Graphic HS-SPI0 select output pin
78
80
G_SSEL1
Graphic HS-SPI1 select output pin
69
71
G_CK_1
Hyper Bus 1 clock output pin
63
65
G_CS#1_1
Hyper Bus 1 select 1 output pin
70
72
G_CS#2_1
Hyper Bus 1 select 2 output pin
75
77
G_DQ0_1
Hyper Bus 1 Data 0 pin
69
71
G_DQ1_1
Hyper Bus 1 Data 1 pin
68
70
G_DQ2_1
Hyper Bus 1 Data 2 pin
67
69
G_DQ3_1
Hyper Bus 1 Data 3 pin
66
68
G_DQ4_1
Hyper Bus 1 Data 4 pin
76
78
G_DQ5_1
Hyper Bus 1 Data 5 pin
77
79
G_DQ6_1
Hyper Bus 1 Data 6 pin
78
80
81
G_DQ7_1
Hyper Bus 1 Data 7 pin
79
G_RWDS_1
Hyper Bus 1 RWDS pin #699
72
74
G_CK_2
Hyper Bus 2 clock output pin
44
46
G_CS#1_2
Hyper Bus 2 select 1 output pin
49
51
G_CS#2_2
Hyper Bus 2 select 2 output pin
51
53
G_DQ0_2
Hyper Bus 2 Data 0 pin
48
50
G_DQ1_2
Hyper Bus 2 Data 1 pin
47
49
G_DQ2_2
Hyper Bus 2 Data 2 pin
46
48
G_DQ3_2
Hyper Bus 2 Data 3 pin
45
47
G_DQ4_2
Hyper Bus 2 Data 4 pin
54
56
G_DQ5_2
Hyper Bus 2 Data 5 pin
55
57
G_DQ6_2
Hyper Bus 2 Data 6 pin
56
58
G_DQ7_2
Hyper Bus 2 Data 7 pin
57
59
G_RWDS_2
Hyper Bus 2 RWDS pin
50
52
M_SCLK0
MCU HS-SPI clock output pin
63
65
M_SDATA0_0
MCU HS-SPI0 data 0 pin
66
68
M_SDATA0_1
MCU HS-SPI0 data 1 pin
68
70
M_SDATA0_2
MCU HS-SPI0 data 2 pin
67
69
June 30, 2015, S6J3200_DS708-00003-0v04-E
CONFIDENTIAL
Remark
Described as TXOUT1P in
FPD-Link Converter
Described as TXOUT2M in
FPD-Link Converter
Described as TXOUT2P in
FPD-Link Converter
Described as TXOUT3M in
FPD-Link Converter
Described as TXOUT3P in
FPD-Link Converter
61
6. Port Description
D a t a S h e e t ( P r e l i m i n a r y )
Port Name
Description
M_SDATA0_3
M_SDATA1_0
Package Pin Number
TEQFP208
TEQFP216
MCU HS-SPI0 data 3 pin
70
72
MCU HS-SPI1 data 0 pin
75
77
M_SDATA1_1
MCU HS-SPI1 data 1 pin
77
79
M_SDATA1_2
MCU HS-SPI1 data 2 pin
76
78
M_SDATA1_3
MCU HS-SPI1 data 3 pin
79
81
M_SSEL0
MCU HS-SPI0 select output pin
69
71
M_SSEL1
MCU HS-SPI1 select output pin
78
80
M_CK_0
MCU Hyper Bus clock output pin
63
65
M_CS#1_0
MCU Hyper Bus select 1 output pin
70
72
M_CS#2_0
MCU Hyper Bus select 2 output pin
75
77
M_DQ0_0
MCU Hyper Bus Data 0 pin
69
71
M_DQ1_0
MCU Hyper Bus Data 1 pin
68
70
M_DQ2_0
MCU Hyper Bus Data 2 pin
67
69
M_DQ3_0
MCU Hyper Bus Data 3 pin
66
68
M_DQ4_0
MCU Hyper Bus Data 4 pin
76
78
M_DQ5_0
MCU Hyper Bus Data 5 pin
77
79
M_DQ6_0
MCU Hyper Bus Data 6 pin
78
80
M_DQ7_0
MCU Hyper Bus Data 7 pin
79
81
M_RWDS_0
MCU Hyper Bus RWDS pin #699
72
74
COM0
LCDC Segment(Duty) Common Output Pin
207
215
COM1
LCDC Segment(Duty) Common Output Pin
206
214
COM2
LCDC Segment(Duty) Common Output Pin
205
213
COM3
LCDC Segment(Duty) Common Output Pin
204
212
SEG0
LCDC Segment(Duty) Output Pin
203
211
SEG1
LCDC Segment(Duty) Output Pin
202
210
SEG2
LCDC Segment(Duty) Output Pin
201
209
SEG3
LCDC Segment(Duty) Output Pin
200
208
SEG4
LCDC Segment(Duty) Output Pin
199
207
SEG5
LCDC Segment(Duty) Output Pin
198
206
SEG6
LCDC Segment(Duty) Output Pin
197
205
SEG7
LCDC Segment(Duty) Output Pin
196
204
SEG8
LCDC Segment(Duty) Output Pin
193
201
200
SEG9
LCDC Segment(Duty) Output Pin
192
SEG10
LCDC Segment(Duty) Output Pin
191
199
SEG11
LCDC Segment(Duty) Output Pin
190
198
SEG12
LCDC Segment(Duty) Output Pin
189
197
SEG13
LCDC Segment(Duty) Output Pin
188
196
SEG14
LCDC Segment(Duty) Output Pin
187
195
SEG15
LCDC Segment(Duty) Output Pin
186
194
SEG16
LCDC Segment(Duty) Output Pin
181
189
SEG17
LCDC Segment(Duty) Output Pin
180
188
SEG18
LCDC Segment(Duty) Output Pin
179
187
SEG19
LCDC Segment(Duty) Output Pin
178
186
SEG20
LCDC Segment(Duty) Output Pin
177
185
SEG21
LCDC Segment(Duty) Output Pin
176
184
SEG22
LCDC Segment(Duty) Output Pin
175
183
SEG23
LCDC Segment(Duty/Static) Output Pin
174
182
SEG24
LCDC Segment(Duty/Static) Output Pin
168
176
SEG25
LCDC Segment(Duty/Static) Output Pin
167
175
62
CONFIDENTIAL
Remark
S6J3200_DS708-00003-0v04-E, June 30, 2015
6. Port Description
D a t a S h e e t ( P r e l i m i n a r y )
Port Name
Description
SEG26
SEG27
Package Pin Number
TEQFP208
TEQFP216
LCDC Segment(Duty/Static) Output Pin
166
174
LCDC Segment(Duty/Static) Output Pin
165
173
SEG28
LCDC Segment(Duty/Static) Output Pin
164
172
SEG29
LCDC Segment(Duty/Static) Output Pin
163
171
SEG30
LCDC Segment(Duty/Static) Output Pin
-
170
SEG31
LCDC Segment(Duty/Static) Output Pin
-
169
V0
LCDC Reference Voltage V0 Input Pin
162
168
V1
LCDC Reference Voltage V1 Input Pin
161
167
V2
LCDC Reference Voltage V2 Input Pin
160
166
V3
LCDC Reference Voltage V3 Input Pin
159
165
DSP0_CLK
Display 0 Clock output pin
32, 58
32, 60
DSP0_CLK-
Display 0 RSDS Clock output pin
33
33
DSP0_CLK+
Display 0 RSDS Clock output pin
32
32
DSP0_CTRL0
Display 0 Control output pin
59, 60, 196
61, 62, 204
DSP0_CTRL1
Display 0 Control output pin
31, 60, 197
31, 62, 205
33, 57, 60, 82,
33, 59, 62, 84,
DSP0_CTRL2
Display 0 Control output pin
198
206
DSP0_CTRL3
Display 0 Control output pin
83, 199
85, 207
DSP0_CTRL4
Display 0 Control output pin
84, 200
86, 208
DSP0_CTRL5
Display 0 Control output pin
201
209
DSP0_CTRL6
Display 0 Control output pin
202
210
DSP0_CTRL7
Display 0 Control output pin
203
211
DSP0_CTRL8
Display 0 Control output pin
204
212
DSP0_CTRL9
Display 0 Control output pin
205
213
DSP0_CTRL10
Display 0 Control output pin
206
214
DSP0_CTRL11
Display 0 Control output pin
207
215
DSP0_DATA0_0
Display 0 Data output pin
34
34
DSP0_DATA0_1
Display 0 Data output pin
36
36
DSP0_DATA0_2
Display 0 Data output pin
38
38
DSP0_DATA0_3
Display 0 Data output pin
40
40
DSP0_DATA0_4
Display 0 Data output pin
31
31, 44
DSP0_DATA0_5
Display 0 Data output pin
44
46
DSP0_DATA0_6
Display 0 Data output pin
46
48
DSP0_DATA0_7
Display 0 Data output pin
48
50
DSP0_DATA0_8
Display 0 Data output pin
50
52
56
DSP0_DATA0_9
Display 0 Data output pin
54
DSP0_DATA0_10
Display 0 Data output pin
56
58
DSP0_DATA0_11
Display 0 Data output pin
32, 58
32, 60
DSP0_DATA1_0
Display 0 Data output pin
35
35
DSP0_DATA1_1
Display 0 Data output pin
37
37
DSP0_DATA1_2
Display 0 Data output pin
39
39
DSP0_DATA1_3
Display 0 Data output pin
41
41
DSP0_DATA1_4
Display 0 Data output pin
33
33, 45
DSP0_DATA1_5
Display 0 Data output pin
45
47
DSP0_DATA1_6
Display 0 Data output pin
47
49
DSP0_DATA1_7
Display 0 Data output pin
49
51
DSP0_DATA1_8
Display 0 Data output pin
51
53
DSP0_DATA1_9
Display 0 Data output pin
55
57
DSP0_DATA1_10
Display 0 Data output pin
31, 57
31, 59
June 30, 2015, S6J3200_DS708-00003-0v04-E
CONFIDENTIAL
Remark
63
6. Port Description
D a t a S h e e t ( P r e l i m i n a r y )
Port Name
Description
Package Pin Number
TEQFP208
TEQFP216
DSP0_DATA1_11
Display 0 Data output pin
33, 59
33, 61
DSP0_DATA_D0-
Display 0 RSDS Data output pin
35
35
DSP0_DATA_D0+
Display 0 RSDS Data output pin
34
34
DSP0_DATA_D1-
Display 0 RSDS Data output pin
37
37
DSP0_DATA_D1+
Display 0 RSDS Data output pin
36
36
39
DSP0_DATA_D2-
Display 0 RSDS Data output pin
39
DSP0_DATA_D2+
Display 0 RSDS Data output pin
38
38
DSP0_DATA_D3-
Display 0 RSDS Data output pin
41
41
DSP0_DATA_D3+
Display 0 RSDS Data output pin
40
40
DSP0_DATA_D4-
Display 0 RSDS Data output pin
-
45
DSP0_DATA_D4+
Display 0 RSDS Data output pin
-
44
DSP0_DATA_D5-
Display 0 RSDS Data output pin
45
47
DSP0_DATA_D5+
Display 0 RSDS Data output pin
44
46
49
DSP0_DATA_D6-
Display 0 RSDS Data output pin
47
DSP0_DATA_D6+
Display 0 RSDS Data output pin
46
48
DSP0_DATA_D7-
Display 0 RSDS Data output pin
49
51
DSP0_DATA_D7+
Display 0 RSDS Data output pin
48
50
DSP0_DATA_D8-
Display 0 RSDS Data output pin
51
53
DSP0_DATA_D8+
Display 0 RSDS Data output pin
50
52
DSP0_DATA_D9-
Display 0 RSDS Data output pin
55
57
DSP0_DATA_D9+
Display 0 RSDS Data output pin
54
56
59
DSP0_DATA_D10-
Display 0 RSDS Data output pin
57
DSP0_DATA_D10+
Display 0 RSDS Data output pin
56
58
DSP0_DATA_D11-
Display 0 RSDS Data output pin
59
61
DSP0_DATA_D11+
Display 0 RSDS Data output pin
58
60
DSP1_CLK
Display 1 Clock output pin
199, 204
207, 212
DSP1_CTRL0
Display 1 Control output pin
200, 207
208, 215
DSP1_CTRL1
Display 1 Control output pin
201, 206
209, 214
DSP1_CTRL2
Display 1 Control output pin
198, 205
206, 213
DSP1_DATA0_0
Display 1 Data output pin
203
211
DSP1_DATA0_1
Display 1 Data output pin
201
209
DSP1_DATA0_2
Display 1 Data output pin
199
207
DSP1_DATA0_3
Display 1 Data output pin
197
205
DSP1_DATA0_4
Display 1 Data output pin
193
201
DSP1_DATA0_5
Display 1 Data output pin
191
199
DSP1_DATA0_6
Display 1 Data output pin
189
197
DSP1_DATA0_7
Display 1 Data output pin
187
195
DSP1_DATA0_8
Display 1 Data output pin
181
189
DSP1_DATA0_9
Display 1 Data output pin
179
187
DSP1_DATA0_10
Display 1 Data output pin
177
185
DSP1_DATA0_11
Display 1 Data output pin
175
183
DSP1_DATA1_0
Display 1 Data output pin
202
210
DSP1_DATA1_1
Display 1 Data output pin
200
208
DSP1_DATA1_2
Display 1 Data output pin
198
206
DSP1_DATA1_3
Display 1 Data output pin
196
204
DSP1_DATA1_4
Display 1 Data output pin
192
200
DSP1_DATA1_5
Display 1 Data output pin
190
198
DSP1_DATA1_6
Display 1 Data output pin
188
196
DSP1_DATA1_7
Display 1 Data output pin
186
194
64
CONFIDENTIAL
Remark
S6J3200_DS708-00003-0v04-E, June 30, 2015
6. Port Description
D a t a S h e e t ( P r e l i m i n a r y )
Port Name
Description
DSP1_DATA1_8
DSP1_DATA1_9
DSP1_DATA1_10
Package Pin Number
TEQFP208
TEQFP216
Display 1 Data output pin
180
188
Display 1 Data output pin
178
186
Display 1 Data output pin
176
184
DSP1_DATA1_11
Display 1 Data output pin
174
182
CAP0_CLK
Video Capture 0 Clock input pin
59
61
CAP0_DATA0
Video Capture 0 Data input pin
31
31
CAP0_DATA1
Video Capture 0 Data input pin
32
32
CAP0_DATA2
Video Capture 0 Data input pin
33
33
CAP0_DATA3
Video Capture 0 Data input pin
34
34
CAP0_DATA4
Video Capture 0 Data input pin
35
35
CAP0_DATA5
Video Capture 0 Data input pin
36
36
CAP0_DATA6
Video Capture 0 Data input pin
37
37
CAP0_DATA7
Video Capture 0 Data input pin
38
38
CAP0_DATA8
Video Capture 0 Data input pin
39
39
CAP0_DATA9
Video Capture 0 Data input pin
40
40
CAP0_DATA10
Video Capture 0 Data input pin
41
41
CAP0_DATA11
Video Capture 0 Data input pin
44
44, 46
CAP0_DATA12
Video Capture 0 Data input pin
45
45, 47
CAP0_DATA13
Video Capture 0 Data input pin
44, 46
46, 48
CAP0_DATA14
Video Capture 0 Data input pin
45, 47
47, 49
CAP0_DATA15
Video Capture 0 Data input pin
46, 48
48, 50
CAP0_DATA16
Video Capture 0 Data input pin
47
49
CAP0_DATA17
Video Capture 0 Data input pin
48
50
CAP0_DATA18
Video Capture 0 Data input pin
49
51
CAP0_DATA19
Video Capture 0 Data input pin
50
52
CAP0_DATA20
Video Capture 0 Data input pin
51
53
CAP0_DATA21
Video Capture 0 Data input pin
54
56
CAP0_DATA22
Video Capture 0 Data input pin
55
57
CAP0_DATA23
Video Capture 0 Data input pin
56
58
CAP0_DATA24
Video Capture 0 Data input pin
82
84
CAP0_DATA25
Video Capture 0 Data input pin
83
85
CAP0_DATA32
Video Capture 0 Data input pin
56, 57
58, 59
CAP0_DATA33
Video Capture 0 Data input pin
58
60
CAP0_DATA34
Video Capture 0 Data input pin
60
62
CAP0_DATA35
Video Capture 0 Data input pin
57
59
92
95
170
178
INDICATOR0_0
INDICATOR0_1
Indicator PWM output pin 0
It can also obtained from INDICATOR0_1)
Indicator PWM output pin
(It can also obtained from INDICATOR0_0)
P0_00
General-Purpose I/O port
40
40
P0_01
General-Purpose I/O port
41
41
P0_02
General-Purpose I/O port
-
44
P0_03
General-Purpose I/O port
-
45
P0_04
General-Purpose I/O port
44
46
P0_05
General-Purpose I/O port
45
47
P0_06
General-Purpose I/O port
46
48
P0_07
General-Purpose I/O port
47
49
P0_08
General-Purpose I/O port
48
50
P0_09
General-Purpose I/O port
49
51
June 30, 2015, S6J3200_DS708-00003-0v04-E
CONFIDENTIAL
Remark
65
6. Port Description
D a t a S h e e t ( P r e l i m i n a r y )
Port Name
Description
Package Pin Number
TEQFP208
P0_10
General-Purpose I/O port
50
52
P0_11
General-Purpose I/O port
51
53
P0_12
General-Purpose I/O port
54
56
P0_13
General-Purpose I/O port
55
57
P0_14
General-Purpose I/O port
56
58
P0_15
General-Purpose I/O port
57
59
P0_16
General-Purpose I/O port
58
60
P0_17
General-Purpose I/O port
59
61
P0_18
General-Purpose I/O port
32
32
P0_19
General-Purpose I/O port
33
33
P0_26
General-Purpose I/O port
82
84
P0_27
General-Purpose I/O port
83
85
P0_28
General-Purpose I/O port
84
86
P0_30
General-Purpose I/O port
72
74
P0_31
General-Purpose I/O port
75
77
P1_00
General-Purpose I/O port
77
79
P1_01
General-Purpose I/O port
76
78
P1_02
General-Purpose I/O port
79
81
P1_03
General-Purpose I/O port
78
80
P1_04
General-Purpose I/O port
69
71
P1_05
General-Purpose I/O port
66
68
P1_06
General-Purpose I/O port
68
70
P1_07
General-Purpose I/O port
67
69
P1_08
General-Purpose I/O port
70
72
P1_09
General-Purpose I/O port
63
65
P2_16
General-Purpose I/O port
170
178
P2_17
General-Purpose I/O port
169
177
P2_19
General-Purpose I/O port
159
165
P2_22
General-Purpose I/O port
89
91
P2_24
General-Purpose I/O port
-
92
P2_25
General-Purpose I/O port
90
93
P2_26
General-Purpose I/O port
91
94
P2_27
General-Purpose I/O port
92
95
P2_28
General-Purpose I/O port
-
96
P2_29
General-Purpose I/O port
93
97
P2_30
General-Purpose I/O port
94
98
P2_31
General-Purpose I/O port
95
99
P3_00
General-Purpose I/O port
96
100
P3_01
General-Purpose I/O port
97
101
P3_02
General-Purpose I/O port
98
102
P3_03
General-Purpose I/O port
99
103
P3_04
General-Purpose I/O port
100
104
P3_05
General-Purpose I/O port
101
105
P3_06
General-Purpose I/O port
102
106
P3_07
General-Purpose I/O port
160
166
P3_08
General-Purpose I/O port
161
167
P3_09
General-Purpose I/O port
162
168
P3_10
General-Purpose I/O port
-
169
P3_11
General-Purpose I/O port
-
170
66
CONFIDENTIAL
Remark
TEQFP216
S6J3200_DS708-00003-0v04-E, June 30, 2015
6. Port Description
D a t a S h e e t ( P r e l i m i n a r y )
Port Name
Description
P3_12
P3_13
Package Pin Number
TEQFP208
TEQFP216
General-Purpose I/O port
163
171
General-Purpose I/O port
164
172
P3_14
General-Purpose I/O port
165
173
P3_15
General-Purpose I/O port
166
174
P3_16
General-Purpose I/O port
167
175
P3_17
General-Purpose I/O port
168
176
P3_18
General-Purpose I/O port
118
122
P3_19
General-Purpose I/O port
-
123
P3_20
General-Purpose I/O port
-
124
P3_21
General-Purpose I/O port
127
133
P3_22
General-Purpose I/O port
128
134
P3_23
General-Purpose I/O port
129
135
P3_24
General-Purpose I/O port
130
136
P3_25
General-Purpose I/O port
131
137
P3_26
General-Purpose I/O port
132
138
P3_27
General-Purpose I/O port
133
139
P3_28
General-Purpose I/O port
134
140
P3_29
General-Purpose I/O port
137
143
P3_30
General-Purpose I/O port
138
144
P3_31
General-Purpose I/O port
139
145
P4_00
General-Purpose I/O port
140
146
P4_01
General-Purpose I/O port
141
147
P4_02
General-Purpose I/O port
142
148
P4_03
General-Purpose I/O port
143
149
P4_04
General-Purpose I/O port
144
150
P4_05
General-Purpose I/O port
147
153
P4_06
General-Purpose I/O port
148
154
P4_07
General-Purpose I/O port
149
155
P4_08
General-Purpose I/O port
150
156
P4_09
General-Purpose I/O port
151
157
P4_10
General-Purpose I/O port
152
158
P4_11
General-Purpose I/O port
153
159
P4_12
General-Purpose I/O port
154
160
P4_25
General-Purpose I/O port
204
212
P4_26
General-Purpose I/O port
205
213
P4_27
General-Purpose I/O port
206
214
P4_28
General-Purpose I/O port
207
215
P4_29
General-Purpose I/O port
174
182
P4_30
General-Purpose I/O port
175
183
P4_31
General-Purpose I/O port
176
184
P5_00
General-Purpose I/O port
177
185
P5_01
General-Purpose I/O port
178
186
P5_02
General-Purpose I/O port
179
187
P5_03
General-Purpose I/O port
180
188
P5_04
General-Purpose I/O port
181
189
P5_05
General-Purpose I/O port
186
194
P5_06
General-Purpose I/O port
187
195
P5_07
General-Purpose I/O port
188
196
P5_08
General-Purpose I/O port
189
197
June 30, 2015, S6J3200_DS708-00003-0v04-E
CONFIDENTIAL
Remark
67
6. Port Description
D a t a S h e e t ( P r e l i m i n a r y )
Port Name
Description
P5_09
P5_10
Package Pin Number
TEQFP208
TEQFP216
General-Purpose I/O port
190
198
General-Purpose I/O port
191
199
P5_11
General-Purpose I/O port
192
200
P5_12
General-Purpose I/O port
193
201
P5_13
General-Purpose I/O port
196
204
P5_14
General-Purpose I/O port
197
205
P5_15
General-Purpose I/O port
198
206
P5_16
General-Purpose I/O port
199
207
P5_17
General-Purpose I/O port
200
208
P5_18
General-Purpose I/O port
201
209
P5_19
General-Purpose I/O port
202
210
P5_20
General-Purpose I/O port
203
211
P5_21
General-Purpose I/O port
31
31
P5_22
General-Purpose I/O port
60
62
P5_27
General-Purpose I/O port
34
34
P5_28
General-Purpose I/O port
35
35
P5_29
General-Purpose I/O port
36
36
P5_30
General-Purpose I/O port
37
37
P5_31
General-Purpose I/O port
38
38
P6_00
General-Purpose I/O port
39
39
Remark
6.2 Remark
Notes:
−
−
68
CONFIDENTIAL
The port description list shows the port function of description which is mounted and supported on
the product. The function which is not described in this table is not supported and assured.
See the function list of the product as well.
S6J3200_DS708-00003-0v04-E, June 30, 2015
7. Precautions and Handling Devices
D a t a S h e e t ( P r e l i m i n a r y )
7. Precautions and Handling Devices
7.1 Handling Precautions
Any semiconductor devices have inherently a certain rate of failure. The possibility of failure is greatly
affected by the conditions in which they are used (circuit conditions, environmental conditions, etc.). This
page describes precautions that must be observed to minimize the chance of failure and to obtain higher
reliability from your Cypress semiconductor devices.
7.1.1
Precautions for Product Design
This section describes precautions when designing electronic equipment using semiconductor devices.
Absolute Maximum Ratings
Semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature,
etc.) in excess of certain established limits, called absolute maximum ratings. Do not exceed these ratings.
Recommended Operating Conditions
Recommended operating conditions are normal operating ranges for the semiconductor device. All the
device's electrical characteristics are warranted when operated within these ranges.
Always use semiconductor devices within the recommended operating conditions. Operation outside these
ranges may adversely affect reliability and could result in device failure.
No warranty is made with respect to uses, operating conditions, or combinations not represented on the data
sheet. Users considering application outside the listed conditions are advised to contact their sales
representative beforehand.
Processing and Protection of Pins
These precautions must be followed when handling the pins which connect semiconductor devices to power
supply and input/output functions.
(1) Preventing Over-Voltage and Over-Current Conditions
Exposure to voltage or current levels in excess of maximum ratings at any pin is likely to cause
deterioration within the device, and in extreme cases leads to permanent damage of the device. Try to
prevent such overvoltage or over-current conditions at the design stage.
(2) Protection of Output Pins
Shorting of output pins to supply pins or other output pins, or connection to large capacitance can cause
large current flows. Such conditions if present for extended periods of time can damage the device.
Therefore, avoid this type of connection.
(3) Handling of Unused Input Pins
Unconnected input pins with very high impedance levels can adversely affect stability of operation. Such
pins should be connected through an appropriate resistance to a power supply pin or ground pin.
June 30, 2015, S6J3200_DS708-00003-0v04-E
CONFIDENTIAL
69
7. Precautions and Handling Devices
D a t a S h e e t ( P r e l i m i n a r y )
7.1.2
Precautions for Package Mounting
Package mounting may be either lead insertion type or surface mount type. In either case, for heat
resistance during soldering, you should only mount under Cypress’s recommended conditions. For detailed
information about mount conditions, contact your sales representative.
Lead Insertion Type
Mounting of lead insertion type packages onto printed circuit boards may be done by two methods: direct
soldering on the board, or mounting by using a socket.
Direct mounting onto boards normally involves processes for inserting leads into through-holes on the board
and using the flow soldering (wave soldering) method of applying liquid solder. In this case, the soldering
process usually causes leads to be subjected to thermal stress in excess of the absolute ratings for storage
temperature. Mounting processes should conform to Cypress recommended mounting conditions.
If socket mounting is used, differences in surface treatment of the socket contacts and IC lead surfaces can
lead to contact deterioration after long periods. For this reason it is recommended that the surface treatment
of socket contacts and IC leads be verified before mounting.
Surface Mount Type
Surface mount packaging has longer and thinner leads than lead-insertion packaging, and therefore leads
are more easily deformed or bent. The use of packages with higher pin counts and narrower pin pitch results
in increased susceptibility to open connections caused by deformed pins, or shorting due to solder bridges.
You must use appropriate mounting techniques. Cypress recommends the solder reflow method, and has
established a ranking of mounting conditions for each product. Users are advised to mount packages in
accordance with Cypress ranking of recommended conditions.
Lead-Free Packaging
CAUTION: When ball grid array (BGA) packages with Sn-Ag-Cu balls are mounted using Sn-Pb eutectic
soldering, junction strength may be reduced under some conditions of use.
Storage of Semiconductor Devices
Because plastic chip packages are formed from plastic resins, exposure to natural environmental conditions
will cause absorption of moisture. During mounting, the application of heat to a package that has absorbed
moisture can cause surfaces to peel, reducing moisture resistance and causing packages to crack. To
prevent, do the following:
(1) Avoid exposure to rapid temperature changes, which cause moisture to condense inside the product.
Store products in locations where temperature changes are slight.
(2) Use dry boxes for product storage. Products should be stored below 70% relative humidity, and at
temperatures between 5 ˚C and 30 ˚C. When you open Dry Package that recommends humidity 40% to 70%
relative humidity.
(3) When necessary, Cypress packages semiconductor devices in highly moisture-resistant aluminum
laminate bags, with a silica gel desiccant. Devices should be sealed in their aluminum laminate bags for
storage.
(4) Avoid storing packages where they are exposed to corrosive gases or high levels of dust.
Baking
Packages that have absorbed moisture may be de-moisturized by baking (heat drying). Follow the Cypress
recommended conditions for baking.
Condition: 125 ˚C/24 h
Static Electricity
Because semiconductor devices are particularly susceptible to damage by static electricity, you must take
the following precautions:
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CONFIDENTIAL
S6J3200_DS708-00003-0v04-E, June 30, 2015
7. Precautions and Handling Devices
D a t a S h e e t ( P r e l i m i n a r y )
(1) Maintain relative humidity in the working environment between 40% and 70%.
Use of an apparatus for ion generation may be needed to remove electricity.
(2) Electrically ground all conveyors, solder vessels, soldering irons and peripheral equipment.
(3) Eliminate static body electricity by the use of rings or bracelets connected to ground through high
resistance (on the level of 1 MΩ).
Wearing of conductive clothing and shoes, use of conductive floor mats and other measures to minimize
shock loads is recommended.
(4) Ground all fixtures and instruments, or protect with anti-static measures.
(5) Avoid the use of styrofoam or other highly static-prone materials for storage of completed board
assemblies.
June 30, 2015, S6J3200_DS708-00003-0v04-E
CONFIDENTIAL
71
7. Precautions and Handling Devices
D a t a S h e e t ( P r e l i m i n a r y )
7.1.3
Precautions for Use Environment
Reliability of semiconductor devices depends on ambient temperature and other conditions as described
above.
For reliable performance, do the following:
(1) Humidity
Prolonged use in high humidity can lead to leakage in devices as well as printed circuit boards. If high
humidity levels are anticipated, consider anti-humidity processing.
(2) Discharge of Static Electricity
When high-voltage charges exist close to semiconductor devices, discharges can cause abnormal
operation. In such cases, use anti-static measures or processing to prevent discharges.
(3) Corrosive Gases, Dust, or Oil
Exposure to corrosive gases or contact with dust or oil may lead to chemical reactions that will adversely
affect the device. If you use devices in such conditions, consider ways to prevent such exposure or to protect
the devices.
(4) Radiation, Including Cosmic Radiation
Most devices are not designed for environments involving exposure to radiation or cosmic radiation. Users
should provide shielding as appropriate.
(5) Smoke, Flame
CAUTION: Plastic molded devices are flammable, and therefore should not be used near combustible
substances. If devices begin to smoke or burn, there is danger of the release of toxic gases.
Customers considering the use of Cypress products in other special environmental conditions should
consult with sales representatives.
Please check the latest handling precautions at the following URL.
http://www.spansion.com/fjdocuments/fj/datasheet/e-ds/DS00-00004.pdf
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CONFIDENTIAL
S6J3200_DS708-00003-0v04-E, June 30, 2015
7. Precautions and Handling Devices
D a t a S h e e t ( P r e l i m i n a r y )
7.2 Handling Devices
For Latch-Up Prevention
The latch-up phenomenon may occur on a CMOS IC in the following cases: the voltage applied to an input
or output pin is higher than VCC or lower than VSS; or the voltage applied between a VCC pin and a VSS
pin exceeds the rating. A latch-up causes a rapid increase in the power supply current, possibly resulting
in thermal damage to an element. When using the device, take sufficient care not to exceed the maximum
rating.
Also be careful that analog power supplies (AVCC, AVRH) and analog inputs do not exceed the digital
power supply (VCC) at the analog system power-on and power-off times.
The power-on sequence is as follows. Simultaneously turn on the digital supply voltage (VCC) and analog
supply voltages (AVCC, AVRH), or turn on the digital supply voltage (VCC) and then the analog supply
voltages (AVCC, AVRH).
About Handling Unused Pins
Leaving unused input pins open may cause permanent damage from a malfunction or latch-up. Take
measures for unused pins, such as pulling up or pulling down the voltage with resistors of 2 kilo ohms or
higher.
If there are any unused input/output pins, set them to the output state and then open them, or set them to
the input state and handle them in the same way as input pins.
About Power Supply Pins
If the device has multiple VCC and VSS pins, the device is designed in such a way that the pins that
should be at the same potential are connected to each other inside the device to prevent malfunctions
such as latch-up. However, to reduce unwanted emissions, prevent malfunctions of strobe signals caused
by an increase of the ground level, and observe standards on total output current, be sure to connect all
the VCC and VSS pins to the power source and ground externally. Also handle all the VSS power supply
pins in this way as shown in the following diagram. If there are multiple VCC or VSS systems, the device
does not operate normally even within the guaranteed operating range.
Figure 7-1 Pin Assignment
In addition, consider connecting with low impedance from the power supply source to the VCC and VSS of
this device.
June 30, 2015, S6J3200_DS708-00003-0v04-E
CONFIDENTIAL
73
7. Precautions and Handling Devices
D a t a S h e e t ( P r e l i m i n a r y )
We recommend connecting a ceramic capacitor as a bypass capacitor between VCC and VSS, near this
device.
About the Crystal Oscillation Circuit
Noise entering the X0 or X1 pin may cause a malfunction. Design the printed circuit board in such a way
that the X0 and X1 pins, the crystal oscillator (or ceramic resonator), and a bypass capacitor to ground are
located very close to the device.
We recommend that the printed circuit board artwork have the X0 and X1 pins enclosed by ground.
About the Mode Pin (MD)
Use mode pin MD by directly connecting it to a VCC or VSS pin. To prevent noise from causing the device
to accidentally enter test mode, reduce the pattern length between each mode pin and a VCC or VSS pin
on the printed circuit board, and connect them with low impedance.
About the Power-on Time
To prevent the internal built-in voltage step-down circuit from malfunctioning, secure a voltage rising time
of 50 µs (between 0.2 V and 2.7 V) or longer at the power-on time.
Point to Note during PLL Clock Operation
While a PLL clock is selected, if the oscillator breaks off or input stops, the PLL clock may continue
operating with the free running frequency of the internal self-oscillator circuit. This operation is outside of
the guaranteed range.
Power Supply Pin Processing of an A/D Converter
Even when no A/D converter is used, establish a connection such that AVCC=AVRH=VCC and
AVSS/AVRL=VSS.
Points to Note About Using External Clocks
External clocks are not supported.
External direct clock input cannot be used.
Power-on Sequence of the Power Supply Analog Inputs of an A/D Converter
Be sure to turn on the digital power supply (VCC) before the application of the power supplies (AVCC,
AVRH, and AVRL) and analog inputs (AN0 to AN63) of an A/D converter.
At the power-off time, turn off the power supplies and analog inputs of the A/D converter, and then turn off
the digital power supply (VCC). Perform these power-on and power-off operations without AVRH
exceeding AVCC. Even when using a pin shared with an analog input as an input port, do not allow the
input voltage to exceed AVCC. (Turning on or off the analog supply voltage and digital supply voltage
simultaneously is not a problem.)
About C Pin Processing
This device has a built-in voltage step-down circuit. Be sure to connect a capacitor to the C pin (pin 154 in
S6J311EJAA specifications and pin 126 in S6J311AHAA specifications) for internal stabilization of the
device. For the standard values, see "Recommended operating conditions" in the latest data sheet.
Precautions on Designing a Mounting Substrate
Measures against heat generation from the package must be taken for the mounting substrate to observe
the absolute maximum rating (operating temperature). Design a mounting substrate with 4 or more layers.
Connect the back of the package stage and the substrate pad with solder paste. Arrange thermal via holes
on the substrate pad.
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S6J3200_DS708-00003-0v04-E, June 30, 2015
7. Precautions and Handling Devices
D a t a S h e e t ( P r e l i m i n a r y )
Notes on Writing to a Register Containing a Status Flag
In writing to a register containing a status flag (particularly an interrupt request flag, etc.) to control a
function, it is important to take care not to accidentally clear the status flag.
Therefore, before the write operation, configure the status bit such that the flag is not cleared, and then set
the control bit to the desired value.
Especially for control bits configured as a set of multiple bits, bit instructions cannot be used (bit
instructions have only 1-bit access). In such cases, byte, half-word, or word access is used to write to the
control bits and a status flag simultaneously. However, at this time, be careful not to accidentally clear bits
other than the intended ones (the status flag bit in this case).
Note: Bit instructions take this point into account for registers that support bit-band units, so it does not
need to be a concern. You need to take care when using bit instructions for registers that do not support
bit-band units.
June 30, 2015, S6J3200_DS708-00003-0v04-E
CONFIDENTIAL
75
8. Electric Characteristics
D a t a S h e e t ( P r e l i m i n a r y )
8. Electric Characteristics
8.1 Absolute Maximum Rating
Parameter
Symbol
Unit
Remarks
Min
Max
VSS-0.3
VSS+6.0
V
VCC53
VSS-0.3
VSS+6.0
V
VCC53≤VCC5
VCC3
VSS-0.3
VSS+4.0
V
VCC3≤VCC5
DVCC
VSS-0.3
VSS+6.0
V
DVCC≤VCC5
VCC5
Power supply voltage*1, *2
Rating
VCC12≤ VCC53
VCC12≤ VCC3
VCC12
VSS-0.3
VSS+1.8
V
AVCC5
VSS-0.3
VSS+6.0
V
AVCC5≤VCC5
AVCC3_DAC
VSS-0.3
VSS+4.0
V
for DAC
VCC12≤ DVCC
VCC12≤ AVCC5
Analog supply voltage*1, *2
Analog reference voltage*1
Input voltage*1
Analog pin input voltage*1
Output voltage*1
VCC3_LVDS_Tx
VSS-0.3
VSS+4.0
V
for LVDS
AVCC3_LVDS_PLL
VSS-0.3
VSS+4.0
V
for LVDS PLL
AVRH5
VSS-0.3
VSS+6.0
V
AVRH5≤AVCC5
VI1
VSS-0.3
VCC5+0.3
V
5V pins not shared SMC
VI2
VSS-0.3
VCC5+0.3
V
5V pins shared SMC
VI3
VSS-0.3
VCC3+0.3
V
3V pins
VIE
VSS-0.3
VCC5+0.3
V
5V/3V pins
VIA
VSS-0.3
VCC5+0.3
V
VO1
VSS-0.3
VCC5+0.3
V
5V pins not shared SMC
VO2
VSS-0.3
DVCC+0.3
V
5V pins shared SMC
VO3
VSS-0.3
VCC3+0.3
V
3V pins
VO4
VSS-0.3
VCC53+0.3
V
|ICLAMP|
-
4
mA
*A
Total maximum clamp current
Σ|ICLAMP |
-
20
mA
*A
Total maximum clamp current
Σ|ICLAMP |
-
50
mA
SPECIAL SPEC*A
IOL1
-
3.5
mA
When setting is 1 mA*6, *7, *8
IOL2
-
7
mA
When setting is 2 mA*6, *7, *8, *9
IOL3
-
10
mA
When setting is 5 mA*6, *7, *8, *9
IOL4
-
16
mA
When setting is 10 mA*9
IOL5
-
30
mA
When setting is 20 mA*9
IOL6
-
40
mA
When setting is 30mA*7
IOL7
-
8
mA
When setting is 3mA *10
IOL8
-
11
mA
When setting is 6mA *11
Maximum clamp current
"L"-level maximum output
current
76
CONFIDENTIAL
*3
5V/3V pins
S6J3200_DS708-00003-0v04-E, June 30, 2015
8. Electric Characteristics
D a t a S h e e t ( P r e l i m i n a r y )
Parameter
"L"-level average output current
Symbol
*4
"L"-level total output current*5
"H"-level maximum output
current*3
"H"-level average output
current*4
"H"-level total output current*5
Power dissipation and Operation
temperature Case 1
Power dissipation and Operation
temperature Case 2
Power dissipation and Operation
temperature Case 3
Power dissipation and Operation
temperature Case 4
Power dissipation and Operation
temperature Case 5
June 30, 2015, S6J3200_DS708-00003-0v04-E
CONFIDENTIAL
Rating
Unit
Remarks
Min
Max
IOLAV1
-
1
mA
When setting is 1 mA*6, *7, *8
IOLAV2
-
2
mA
When setting is 2 mA*6, *7, *8, *9
IOLAV3
-
5
mA
When setting is 5 mA*6, *7, *8, *9
IOLAV4
-
10
mA
When setting is 10 mA*9
IOLAV5
-
20
mA
When setting is 20 mA*9
IOLAV6
-
30
mA
When setting is 30mA*7
IOLAV7
-
3
mA
When setting is 3mA *10
IOLAV8
-
6
mA
When setting is 6mA *11
ΣIOL1
-
50
mA
*6, *10
ΣIOL2
-
250
mA
*7
ΣIOL3
-
50
mA
*8
ΣIOL4
-
50
mA
*9, *11
IOH1
-
-3.5
mA
When setting is 1 mA*6, *7, *8
IOH2
-
-7
mA
When setting is 2 mA*6, *7, *8, *9
IOH3
-
-10
mA
When setting is 5 mA*6, *7, *8, *9
IOH4
-
-16
mA
When setting is 10 mA*9
IOH5
-
-30
mA
When setting is 20 mA*9
IOH6
-
-40
mA
When setting is 30mA*7
IOH8
-
-11
mA
When setting is 6mA *11
IOHAV1
-
-1
mA
When setting is 1 mA*6, *7, *8
IOHAV2
-
-2
mA
When setting is 2 mA*6, *7, *8, *9
IOHAV3
-
-5
mA
When setting is 5 mA*6, *7, *8, *9
IOHAV4
-
-10
mA
When setting is 10 mA*9
IOHAV5
-
-20
mA
When setting is 20 mA*9
IOHAV6
-
-30
mA
When setting is 30mA*7
IOHAV8
-
-6
mA
When setting is 6mA *11
ΣIOH1
-
-50
mA
*6, *10
ΣIOH2
-
-250
mA
*7
ΣIOH3
-
-50
mA
*8
ΣIOH4
-
-50
mA
*9, *11
PD
-
3300
mW
-
TA
-40
+97
o
TC
-40
+144
o
C
C
PD
-
3150
TA
-40
+100
o
TC
-40
+144
o
mW
C
C
PD
-
3000
TA
-40
+102
o
TC
-40
+144
o
mW
C
C
PD
-
2900
TA
-40
+105
o
TC
-40
+144
o
PD
-
2800
mW
C
C
mW
TA
-40
+105
o
TC
-40
+144
o
C
C
Both should be satisfied.
Both should be satisfied.
Both should be satisfied.
Both should be satisfied.
Both should be satisfied.
77
8. Electric Characteristics
D a t a S h e e t ( P r e l i m i n a r y )
Parameter
Symbol
Rating
Min
Max
Unit
Remarks
The minimum value depends
on the system specification of
heat radiation. The described
System Thermal Resistance
Theta j-a
-
16
o
C/W
value is estimated under the
condition which is specified at
Operation Assurance
Condition.
Package Thermal Resistance
Storage temperature
Theta j-c
-
7.5
Tstg
-55
+150
o
C/W
o
C
-
-
*1: These parameters are based on the condition that VSS=AVSS=DVSS=0.0 V.
*2: Take care that DVCC, AVCC5 do not exceed VCC5 at, for example, the power-on time.
*3: The maximum output current is defined as the value of the peak current flowing through any
one of the corresponding pins.
*4: The average output current is defined as the value of the average current flowing through any
one of the corresponding pins for a 10 ms period. The average value is the operation current ×
the operation ratio.
*5: The total output current is defined as the maximum current value flowing through all of
corresponding pins.
*6: Output of 5V pins.
*7: Output of SMC pins.
*8: Output of 5V/3V pins.
*9: Output of 3V pins.
2
*10: Output of I C.
*11: Output of Media LB pins
*A: Relevant pins: All general-purpose ports and analog input pins
−
−
−
−
Corresponding pins : all general-purpose ports
−
The value of the limiting resistor should be set so that the current input to the microcontroller
pin does not exceed rated values at any time regardless of instantaneously or constantly when
the +B signal is input.
−
Note that when the microcontroller drive current is low, such as in the low power consumption
modes, the + B input potential can increase the potential at the VCC pin via a protective diode,
possibly affecting other devices.
−
Note that if the + B signal is input when the microcontroller is off (not fixed at 0 V), since the
power is supplied through the pin, the microcontroller may operate incompletely.
−
Note that if the +B signal is input at power-on, since the power is supplied through the pin, the
power-on reset may not function in the power supply voltage.
−
Do not leave + B input pins open.
Use within the operation assurance condition (See 8.2. Operation Assurance ).
Use at DC voltage (current).
The +B signal should always be applied by connecting a limiting resistor between the +B signal
and the microcontroller.
Example of a recommended circuit
78
CONFIDENTIAL
S6J3200_DS708-00003-0v04-E, June 30, 2015
8. Electric Characteristics
D a t a S h e e t ( P r e l i m i n a r y )
S6J3200 series
WARNING:
−
Semiconductor devices may be permanently damaged by application of stress (including, without
limitation, voltage, current or temperature) in excess of absolute maximum ratings. Do not exceed
any of these ratings.
June 30, 2015, S6J3200_DS708-00003-0v04-E
CONFIDENTIAL
79
8. Electric Characteristics
D a t a S h e e t ( P r e l i m i n a r y )
8.2 Operation Assurance Condition
Symbol
Parameter
Power Supply
Value
Corresponding
Ground
VCC5
VSS
VCC53
VSS
Unit
Min
Max
4.5
5.5
Smoothing capacitor*2
Operating temperature
V
4.5
5.5
V
3.0
3.6
V
DVCC
DVSS
4.5
5.5
V
AVCC5
AVSS5
4.5
5.5
V
Specified electric
VCC3
VSS
3.0
3.6
V
characteristics are assured
in this range.
*1
Supply voltage
Remarks
VCC12
VSS
AVCC3_DAC
AVSS3_DAC
1.15
1.3
V
1.1
1.3
V
3.0
3.6
V
VCC3_LVDS_Tx
VSS3_LVDS_Tx
3.0
3.6
V
AVCC3_LVDS_PLL
AVSS3_LVDS_PLL
3.0
3.6
V
VCC5
VSS
3.5
5.5
V
VCC53
VSS
2.7
5.5
V
DVCC
DVSS
3.5
5.5
V
AVCC5
AVSS
3.5
5.5
V
VCC3
VSS
2.7
3.6
V
AVCC3_DAC
AVSS3_DAC
2.7
3.6
V
VCC3_LVDS_Tx
VSS3_LVDS_Tx
2.7
3.6
V
AVCC3_LVDS_PLL
AVSS3_LVDS_PLL
2.7
3.6
V
CS
-
TA
-
-40
+105
o
TC
-
-40
+144
o
4.7
µF
C
C
Specified electric
characteristics are NOT
assured in this range.
Tolerance of up to ±40%
See the notes below.
Notes:
−
−
−
*1. The value is only applied to the product series with revision digit A.
*2. For the connections of smoothing capacitor CS, see the following diagram.
Power supply sequence is recommended as VCC5  [DVCC or AVCC5 or VCC3 or AVCC3] 
VCC12  [AVCC3_LVDS_PLL or VCC3_LVDS_TX]
C Pin Connection Diagram
C
CS
80
CONFIDENTIAL
VSS
DVSS
AVSS
S6J3200_DS708-00003-0v04-E, June 30, 2015
8. Electric Characteristics
D a t a S h e e t ( P r e l i m i n a r y )
WARNING:
1. The recommended operating conditions are required in order to ensure the normal operation of the
semiconductor device. All of the device's electrical characteristics are warranted when the device is
operated under these conditions.
2. Any use of semiconductor devices will be under their recommended operating condition.
3. Operation under any conditions other than these conditions may adversely affect reliability of device and
could result in device failure.
4. No warranty is made with respect to any use, operating conditions or combinations not represented on
this data sheet. If you are considering application under any conditions other than listed herein, please
contact sales representatives beforehand.
Notes:
−
−
−
−
TA: Ambient temperature (JEDEC)
TC: Case temperature (JEDEC), the maximum measured temperature of package case top.
Both rating of TA and TC should simultaneously be satisfied as maximum operation temperature.
The following condition should be satisfied in order to facilitate heat dissipation.
1. 4 or more layers PCB should be used.
2. The area of PCB should be 114.3 mm x 76.2 mm or more, and the thickness should be 1.6 mm or
more. (JEDEC standard)
3. 1 layer of middle layers at least should be used for dedicated layer to radiate heat with residual
copper rate 90% or more. The layer can be used for system ground.
4. 35~50% of the die stage area which is exposed at back surface of package should be soldered to a
st
part of 1 layer.
st
5. The part of 1 layer should be connected to the dedicated heat radiation layer with more than 10
thermal via holes.
Figure 8-1: Example thermal via holes on PCB.
Notes:
−
−
−
−
Figure 8-1 is a schematic diagram showing PCB in section.
Figure 8-2, Figure 8-3, and Figure 8-4 in the following pages are recommended land patterns for
each package series. Thermal via holes should closely be placed and aligned with lands.
When thermal via holes cannot be with lands, the followings are recommended as represented by
Figure 8-5 which is an example for LEQ216.
(1). Increase pattern area size as much as possible inside the package outline.
(2). Place thermal via holes to be with lands as close as possible.
0.25mm ≤ a ≤ 0.30mm in Figure 8-1, Figure 8-2, Figure 8-3, and Figure 8-4
June 30, 2015, S6J3200_DS708-00003-0v04-E
CONFIDENTIAL
81
8. Electric Characteristics
D a t a S h e e t ( P r e l i m i n a r y )
Figure 8-2: Land Pattern and Thermal Via LEQ216
0.25mm ≤ a ≤ 0.30mm
Figure 8-3: Land Pattern and Thermal Via LET208
0.25mm ≤ a ≤ 0.30mm
82
CONFIDENTIAL
S6J3200_DS708-00003-0v04-E, June 30, 2015
8. Electric Characteristics
D a t a S h e e t ( P r e l i m i n a r y )
Figure 8-4: Land Pattern and Thermal Via LER208
0.25mm ≤ a ≤ 0.30mm
June 30, 2015, S6J3200_DS708-00003-0v04-E
CONFIDENTIAL
83
8. Electric Characteristics
D a t a S h e e t ( P r e l i m i n a r y )
Figure 8-5: Optional Land Pattern
0.25mm ≤ a ≤ 0.30mm
84
CONFIDENTIAL
S6J3200_DS708-00003-0v04-E, June 30, 2015
8. Electric Characteristics
D a t a S h e e t ( P r e l i m i n a r y )
8.3 DC Characteristics
8.3.1
Port Function Characteristics
(Condition: See 8.2. Operation Assurance )
Parameter
Symbol
Pin Name
P4_25 to 31,
P5_00 to 20,
P6_20 to 26
VIH3
VIH4
to 31,
P3_00 to 31,
VIH5
P4_00 to 12,
P6_02 to 19
VIH6
"H" level
Input
voltage
VIH7
VIH8
Max
0.7×VCC53
-
VCC53+0.3
V
0.8×VCC53
-
VCC53+0.3
V
2.0
-
VCC53+0.3
V
0.7×VCC5
-
VCC5+0.3
V
0.8×VCC5
-
VCC5+0.3
V
2.0
-
VCC5+0.3
V
-
0.7×VCC5
-
VCC5+0.3
V
-
0.7×VCC5
-
VCC5+0.3
V
-
2.3
-
VCC5+0.3
V
0.7×VCC3
-
VCC3+0.3
V
2.0
-
VCC3+0.3
V
1.8
-
VCC3+0.3
V
level is selected
Automotive input level
is selected
TTL
CMOS hysteresis input
level is selected
Automotive input level
is selected
P2_25, 26,
TTL input level is
P3_00, 01
selected
RSTX
NMIX
MD
Unit
Typ
input level is selected
P2_16, 17, 19, 22, 24
Value
Min
CMOS hysteresis input
VIH1
VIH2
Conditions
Remarks
JTAG_NTRST
VIH9
JTAG_TCK
JTAG_TDI
JTAG_TMS
P0_00 to 19, 26 to 28,
30, 31,
VIH10
P1_00 to 09,
P5_21, 22, 27 to 31,
CMOS hysteresis input
level is selected
P6_00, 01
P0_00 to 19, 30, 31,
VIH11
P1_00 to 09,
P5_21, 22, 27 to 31,
TTL input level is
selected
P6_00, 01
VIH12
P0_26 to 28
June 30, 2015, S6J3200_DS708-00003-0v04-E
CONFIDENTIAL
-
MediaLB
85
8. Electric Characteristics
D a t a S h e e t ( P r e l i m i n a r y )
Parameter
Symbol
Pin Name
P4_25 to 31,
P5_00 to 20,
P6_20 to 26
VIL3
VIL4
to 31,
P3_00 to 31,
VIL5
P4_00 to 12,
P6_02 to 19
VIL6
"L" level
Input
VIL7
VIL8
voltage
Max
VSS-0.3
-
0.3×VCC53
V
VSS-0.3
-
0.5×VCC53
V
VSS-0.3
-
0.8
V
VSS-0.3
-
0.3×VCC5
V
VSS-0.3
-
0.5×VCC5
V
VSS-0.3
-
0.8
V
-
VSS-0.3
-
0.3×VCC5
V
-
VSS-0.3
-
0.3×VCC5
V
-
VSS-0.3
-
0.8
V
VSS-0.3
-
0.3×VCC5
V
VSS-0.3
-
0.8
V
VSS-0.3
-
0.7
V
level is selected
Automotive input level
is selected
TTL input level is
CMOS hysteresis input
level is selected
Automotive input level
is selected
P2_25, 26,
TTL input level is
P3_00, 01
selected
RSTX
NMIX
MD
Unit
Typ
selected
P2_16, 17, 19, 22, 24
Value
Min
CMOS hysteresis input
VIL1
VIL2
Conditions
Remarks
JTAG_NTRST
VIL9
JTAG_TCK
JTAG_TDI
JTAG_TMS
P0_00 to 19, 26 to 28,
30, 31,
VIL10
P1_00 to 09,
P5_21, 22, 27 to 31,
CMOS hysteresis input
level is selected
P6_00, 01
P0_00 to 19, 30, 31,
VIL11
P1_00 to 09,
P5_21, 22, 27 to 31,
TTL input level is
selected
P6_00, 01
VIL12
86
CONFIDENTIAL
P0_26 to 28
-
MediaLB
S6J3200_DS708-00003-0v04-E, June 30, 2015
8. Electric Characteristics
D a t a S h e e t ( P r e l i m i n a r y )
(Condition: See 8.2. Operation Assurance )
Parameter
Symbol
Pin
Name
VCC53=3.0 V
VOH1
P4_25 to 31,
VOH2
P5_00 to 20,
P6_20 to 26
VOH3
VOH4
VOH5
VOH6
"H" level
IOH=-1.0 mA
VCC5=4.5 V
IOH=-2.0 mA
P6_02 to 19
VCC5=4.5 V
IOH=-5.0 mA
VOH10
P3_21 to 31,
output voltage
P4_00 to 12,
VOH11
P6_09 to 16
VOH12
P0_00 to 19, 26 to 28, 30,
31,
P1_00 to 09,
P5_21, 22, 27 to 31,
P6_00, 01
P0_00 to 19,
P5_21, 22, 27 to 31,
P6_00, 01
P0_26 to 28
June 30, 2015, S6J3200_DS708-00003-0v04-E
CONFIDENTIAL
VCC53=3.0 V
P4_00 to 12,
JTAG_TDO
VOH16
IOH=-2.0 mA
P3_00 to 31,
VOH8
VOH15
VCC53=3.0 V
VCC5=4.5 V
P2_16, 17, 22, 24 to 31,
PSC_1
VOH14
IOH=-1.0 mA
IOH=-5.0 mA
VOH7
VOH13
Conditions
VCC5=4.5 V
IOH=-2.0 mA
VCC5=4.5 V
IOH=-5.0 mA
DVCC=4.5 V
IOH=-30.0 mA
DVCC=4.5 V
IOH=-40.0 mA
VCC3=3.0 V
IOH=-2.0 mA
VCC3=3.0 V
IOH=-5.0 mA
VCC3=3.0 V
IOH=-10.0 mA
VCC3=3.0 V
IOH=-20.0 mA
VCC3=3.0 V
IOH=-6.0 mA
Value
Unit
Min
Typ
Max
VCC53 - 0.5
-
VCC53
V
VCC53 - 0.5
-
VCC53
V
VCC53 - 0.5
-
VCC53
V
VCC5 - 0.5
-
VCC5
V
VCC5 - 0.5
-
VCC5
V
VCC5 - 0.5
-
VCC5
V
VCC5 - 0.5
-
VCC5
V
VCC5 - 0.5
-
VCC5
V
DVCC - 0.5
-
DVCC
V
DVCC - 0.5
-
DVCC
V
VCC3 - 0.5
-
VCC3
V
VCC3 - 0.5
-
VCC3
V
VCC3 - 0.5
-
VCC3
V
VCC3 - 0.5
-
VCC3
V
VCC3 - 0.5
-
VCC3
V
Remarks
SMC
SMC
Tj=-40oC
SMC
SMC
Tj=-40oC
MediaLB
87
8. Electric Characteristics
D a t a S h e e t ( P r e l i m i n a r y )
(Condition: See 8.2. Operation Assurance )
Parameter
Symbol
Pin
Name
VCC53=3.0 V
VOL1
P4_25 to 31,
VOL2
P5_00 to 20,
P6_20 to 26
VOL3
VOL4
VOL5
VOL6
output voltage
P3_00 to 31,
VCC5=4.5 V
P4_00 to 12,
IOL=2.0 mA
P6_02 to 19
VCC5=4.5 V
IOL=5.0 mA
VCC5=4.5 V
IOL=5.0 mA
VCC5=4.5 V
IOL=3.0 mA
P3_21 to 31,
P6_09 to 16
VOL12
P0_00 to 19, 26 to 28, 30,
31,
P1_00 to 09,
P5_21, 22, 27 to 31,
VOL14
P6_00, 01
VOL15
P5_21, 22, 27 to 31,
P0_00 to 19,
P6_00, 01
CONFIDENTIAL
IOL=2.0 mA
P3_00, 01
P4_00 to 12,
88
VCC5=4.5 V
P2_25, 26,
VOL11
VOL16
VCC53=3.0 V
IOL=1.0 mA
JTAG_TDO
VOL13
IOL=2.0 mA
VCC5=4.5 V
VOL8
VOL10
VCC53=3.0 V
P2_16, 17, 22, 24 to 31,
PSC_1
VOL9
IOL=1.0 mA
IOL=5.0 mA
VOL7
"L" level
Conditions
P0_26 to 28
DVCC=4.5 V
IOL=30.0 mA
DVCC=4.5 V
IOL=40.0 mA
VCC3=3.0 V
IOL=2.0 mA
VCC3=3.0 V
IOL=5.0 mA
VCC3=3.0 V
IOL=10.0 mA
VCC3=3.0 V
IOL=20.0 mA
VCC3=3.0 V
IOL=6.0 mA
Value
Unit
Remarks
Min
Typ
Max
0
-
0.4
V
0
-
0.4
V
0
-
0.4
V
0
-
0.55
V
0
-
0.55
V
0
-
0.4
V
0
-
0.4
V
0
-
0.4
V
0
-
0.4
V
I2C
0
-
0.55
V
SMC
0
-
0.55
V
0
-
0.4
V
0
-
0.4
V
0
-
0.4
V
0
-
0.4
V
0
-
0.4
V
SMC
Tj=-40oC
MediaLB
S6J3200_DS708-00003-0v04-E, June 30, 2015
8. Electric Characteristics
D a t a S h e e t ( P r e l i m i n a r y )
(Condition: See 8.2. Operation Assurance )
Parameter
Symbol
Pin Name
Conditions
Value
Unit
Min
Typ
Max
-5
-
+5
µA
-10
-
+10
µA
25
50
100
kΩ
25
50
100
kΩ
17
33
66
kΩ
25
50
100
kΩ
25
50
100
kΩ
17
33
66
kΩ
-
25
50
100
kΩ
-
-
5
15
pF
Remarks
P2_16, 17, 19, 22, 24 to 31,
Input leakage
current
IIL
P3_00 to 31,
VCC5=VCC53=DVCC=
P4_00 to 12, P4_25 to 31,
AVCC=5.5 V
P5_00 to 20,
VSS < VI < VCC
5V pins
5V/3V pins
P6_02 to 31
P0_00 to 31,
P1_00 to 09,
VCC3=3.3 V
P5_21, 22, 27 to 31,
VSS < VI < VCC3
3V pins
P6_00, 01
RUP1
RSTX, NMIX
-
P2_16, 17, 19, 22, 24 to 31,
RUP2
P3_00 to 31,
Pull-up resistor
P4_00 to 12,
selected
5V pins
5V/3V pins
P6_02 to 31
Pull-up
P0_00 to 31,
resistor
RUP3
P1_00 to 09,
Pull-up resistor
P5_21, 22, 27 to 31,
selected
3V pins
P6_00, 01
RUP4
JTAG_TDI, JTAG_TMS,
JTAG_TCK
-
P2_16, 17, 19, 22, 24 to 31,
Rdown1
P3_00 to 31,
Pull-down resistor
P4_00 to 12,
selected
5V pins
5V/3V pins
P6_02 to 31
Pull-down
P0_00 to 31,
resistor
Rdown2
P1_00 to 09,
Pull-down resistor
P5_21, 22, 27 to 31,
selected
3V pins
P6_00, 01
Rdown3
JTAG_NTRST
P0_00 to 31,
P1_00 to 09,
P2_16, 17, 19, 22, 24 to 31,
CIN1
P3_00 to 20, P4_25 to 31,
P5_00 to 20,
Input
P5_21 22, 27 to 31,
capacitance
P6_00 to 08, 17 to 26
P3_21 to 31,
CIN1
P4_00 to 12,
P6_09 to 16
When
-
-
15
45
pF
using
SMC
(Condition: See 8.2. Operation Assurance )
June 30, 2015, S6J3200_DS708-00003-0v04-E
CONFIDENTIAL
89
8. Electric Characteristics
D a t a S h e e t ( P r e l i m i n a r y )
Parameter
Symbol
Pin Name
High current output
drive capacity
Phase-to-phase
Delta-VOH8
P3_21 to
31,
12,
Delta-VOL8
P6_09 to 16
resistor
COM0 to COM3
output impedance
COM0 to COM3
output impedance
Remarks
Max
-
-
90
mV
*
-
-
90
mV
*
-
6.25
12.5
25
kΩ
-
-
-
4.5
kΩ
-
-
-
17
kΩ
-0.5
-
+0.5
µA
IOH=-30.0mA
Maximum deviation of VOH8
DVCC=4.5V
IOL=30.0mA
Maximum deviation of VOL84
deviation2
LCD divider
Unit
Typ
P4_00 to
High current output
Phase-to-phase
Value
Min
DVCC=4.5V
deviation1
drive capacity
Conditions
V0 to V1,
RLCD
V1 to V2,
V2 to V3
RVCOM
RVSEG
COMm
(m=0 to 3)
SEGn
(n=00 to 31)
V0 to V3,
LCDC leak
current
COMm
ILCDC
(m=0 to 3),
TA=+25°C
SEGn
(n=00 to 31)
*:
90
CONFIDENTIAL
If PWM1P0/PWM1M0/PWM2P0/PWM2M0 of ch.0 is turned on simultaneously, the maximum
deviation of VOH4 / VOL4 for each pin is defined. Same for other channels.
S6J3200_DS708-00003-0v04-E, June 30, 2015
8. Electric Characteristics
D a t a S h e e t ( P r e l i m i n a r y )
(Condition: See 8.2. Operation Assurance )
Parameter
Symbol
Pin Name
Value
Conditions
Unit
Min
Typ
Max
100
200
600
| mV |
0.5
1.2
1.5
V
Remarks
BOOST=0 ( Drivability 2mA)
Output Differential
Voltage
RL = 100 Ω
| VOD |
DSP0_DATAn+,
DSP0_DATAn-
Output Offset
Voltage
n=0 to 11
VOS
BOOST=1 ( Drivability 4mA)
RL = 50 Ω
BOOST=0 ( Drivability 2mA)
RL = 100 Ω
BOOST=1 ( Drivability 4mA)
RL = 50 Ω
Single Ended
VRSDS N
VRSDS P
VOH
VOS
VOL
Ground Level / 0V
Differential
(VRSDSN) - (VRSDSP)
June 30, 2015, S6J3200_DS708-00003-0v04-E
CONFIDENTIAL
+VOD
-VOD
0V Differential
91
8. Electric Characteristics
D a t a S h e e t ( P r e l i m i n a r y )
8.3.2
Power Supply Current
8.3.2.1
Run Mode
 This characteristics is specified for the series with the function digit 3, 4, 5, 6, 7, and 8.
(Condition: See 8.2. Operation Assurance )
Symbol
Pin Name
ICC5
VCC5
Conditions
Normal Operation
Value
Typ
Max
Unit
TA
Remark
(oC)
45
-
mA
25
-
70
mA
105
Adder for Work Flash Programming or Erasing.
-
20
mA
105
-
CPU:240MHz, HPM:120MHz,
820
-
mA
25
GDC 2D and 3D engine:200MHz
-
1600
mA
105
CPU:240MHz, HPM:120MHz,
700
-
mA
25
GDC 2D engine only:200MHz
-
1480
mA
105
-
1120
mA
105
-
-
1040
mA
105
-
-
CPU:120MHz, HPM:60MHz,
ICC12
VCC12
GDC:0MHz
For TC FLASH Programming or Erasing
CPU:80MHz, HPM:40MHz,
GDC:0MHz
For TC FLASH Programming or Erasing
ILVDS
Adder for Work Flash Programming or Erasing.
-
20
mA
105
-
VCC3_LVDS_Tx
50MHz
-
56
mA
105
*1
AVCC3_LVDS_PLL
-
-
7
mA
105
-
Note:
−
The output port current is not included in the specified value *1. A few mA which depends on usage
for FPD-Link data transfer should be estimated for each port in an actual application, and then it
should be added to the current consumption at Vcc3_LVDS_Tx.
−
92
CONFIDENTIAL
S6J3200_DS708-00003-0v04-E, June 30, 2015
8. Electric Characteristics
D a t a S h e e t ( P r e l i m i n a r y )
 This characteristics is specified for the series with the function digit A, B, C, and D.
(Condition: See 8.2. Operation Assurance )
Symbol
Pin
Name
Conditions
VCC5
Unit
TA
Remark
(oC)
Max
45
-
mA
25
-
70
mA
105
Adder for Work Flash Programming or Erasing.
-
20
mA
105
CPU:160MHz, HPM:160MHz,
880
-
mA
25
GDC 2D and 3D engine:160MHz
-
1410
mA
105
-
1120
mA
105
-
-
1040
mA
105
-
-
20
mA
105
-
Normal Operation
ICC5
Value
Typ
-
CPU:120MHz, HPM:60MHz,
GDC:0MHz
For TC FLASH Programming or Erasing
CPU:80MHz, HPM:40MHz,
GDC:0MHz
For TC FLASH Programming or Erasing
Adder for Work Flash Programming or Erasing.
June 30, 2015, S6J3200_DS708-00003-0v04-E
CONFIDENTIAL
93
8. Electric Characteristics
D a t a S h e e t ( P r e l i m i n a r y )
8.3.2.2
PSS Timer Mode Shutdown (PD6=OFF)
 This characteristics is specified for the series with the function digit 3, 4, 5, 6, 7, and 8.
(Condition: See 8.2. Operation Assurance )
Symbol
Pin
Conditions
Name
4MHz Crystal for Main Oscillator
PD1=ON, PD4_0=ON, PD4_1=ON
4MHz Crystal for Main Oscillator
PD1=ON, PD4_0 or PD4_1=ON
4MHz Crystal for Main Oscillator
PD1=ON
8MHz Crystal for Main Oscillator
PD1=ON, PD4_0=ON, PD4_1=ON
ICCT5
8MHz Crystal for Main Oscillator
VCC5
PD1=ON, PD4_0 or PD4_1=ON
8MHz Crystal for Main Oscillator
PD1=ON
32kHz Crystal for Sub Oscillator
PD1=ON, PD4_0=ON, PD4_1=ON
32kHz Crystal for Sub Oscillator
PD1=ON, PD4_0 or PD4_1=ON
32kHz Crystal for Sub Oscillator
PD1=ON
Value
Unit
TA (oC)
600
µA
25
-
345
575
µA
25
*1
340
550
µA
25
*1
450
730
µA
25
-
445
705
µA
25
*1
440
680
µA
25
*1
85
300
µA
25
-
80
275
µA
25
*1
75
250
µA
25
*1
Typ
Max
350
Remark
Notes:
−
−
94
CONFIDENTIAL
The values will be evaluated after engineering samples release.
As for *1 the operation of shutting down PD4_0, or PD4_1, or both is now not supported.
S6J3200_DS708-00003-0v04-E, June 30, 2015
8. Electric Characteristics
D a t a S h e e t ( P r e l i m i n a r y )
 This characteristics is specified for the series with the function digit A, B, C, and D.
(Condition: See 8.2. Operation Assurance )
Symbol
Pin
Conditions
Name
4MHz Crystal for Main Oscillator
PD1=ON, PD4_0=ON, PD4_1=ON
4MHz Crystal for Main Oscillator
PD1=ON, PD4_0 or PD4_1=ON
4MHz Crystal for Main Oscillator
PD1=ON
8MHz Crystal for Main Oscillator
PD1=ON, PD4_0=ON, PD4_1=ON
ICCT5
8MHz Crystal for Main Oscillator
VCC5
PD1=ON, PD4_0 or PD4_1=ON
8MHz Crystal for Main Oscillator
PD1=ON
32kHz Crystal for Sub Oscillator
PD1=ON, PD4_0=ON, PD4_1=ON
32kHz Crystal for Sub Oscillator
PD1=ON, PD4_0 or PD4_1=ON
32kHz Crystal for Sub Oscillator
PD1=ON
Value
Unit
TA (oC)
650
µA
25
-
345
615
µA
25
*1
340
590
µA
25
*1
450
775
µA
25
-
445
750
µA
25
*1
440
725
µA
25
*1
85
345
µA
25
-
80
320
µA
25
*1
75
295
µA
25
*1
Typ
Max
350
Remark
Notes:
−
−
The values will be evaluated after engineering samples release.
As for *1 the operation of shutting down PD4_0, or PD4_1, or both is now not supported.
June 30, 2015, S6J3200_DS708-00003-0v04-E
CONFIDENTIAL
95
8. Electric Characteristics
D a t a S h e e t ( P r e l i m i n a r y )
8.3.2.3
PSS Stop Mode Shutdown
 This characteristics is specified for the series with the function digit 3, 4, 5, 6, 7, and 8.
(Condition: See 8.2. Operation Assurance )
Symbol
ICCH5
Pin
Conditions
Name
VCC5
Value
Unit
TA (oC)
270
µA
25
-
245
µA
25
*1
220
µA
25
*1
Typ
Max
PD1=ON, PD4_0=ON, PD4_1=ON
65
PD1=ON, PD4_0 or PD4_1=ON
60
PD1=ON
55
Remark
 This characteristics is specified for the series with the function digit A, B, C, and D.
(Condition: See 8.2. Operation Assurance )
Symbol
ICCH5
Pin
Conditions
Name
VCC5
Value
Unit
TA (oC)
315
µA
25
-
60
290
µA
25
*1
55
265
µA
25
*1
Typ
Max
PD1=ON, PD4_0=ON, PD4_1=ON
65
PD1=ON, PD4_0 or PD4_1=ON
PD1=ON
Remark
Notes:
−
−
96
CONFIDENTIAL
The values will be evaluated after engineering samples release.
As for *1 the operation of shutting down PD4_0, or PD4_1, or both is now not supported.
S6J3200_DS708-00003-0v04-E, June 30, 2015
8. Electric Characteristics
D a t a S h e e t ( P r e l i m i n a r y )
8.4 AC Characteristics
8.4.1
Source Clock Timing
(Condition: See 8.2. Operation Assurance )
Parameter
Symbol
Pin Name
Conditions
FC
X0, X1
tCYL
Source oscillation
clock frequency
Source oscillation
clock cycle time
CAN PLL jitter
(when locked)
Internal Slow CR
oscillation frequency
Internal Fast CR
oscillation frequency
Value
Unit
Remarks
Min
Typ
Max
-
3.6
-
16
MHz
X0, X1
-
250.0
-
277.8
ns
tPJ
-
-
-10
-
10
ns
FCRS
-
-
50
100
150
kHz
FCRF
-
-
2.40
4.00
5.61-
MHz
Before trim
3.20
4.00
4.81
MHz
After trim
Notes:
−
−
−
The maximum/minimum values have been standardized with the main clock and PLL clock in use.
The error of source oscillator frequency must be smaller than 3000ppm.
Enough evaluation and adjustment are recommended using oscillator on your system board.
− X0 and X1 clock timing
tCYL
X0
CAN PLL jitter
A time difference from the ideal clock is guaranteed for each cycle period within 20,000 cycles.
t1
t2
t3
tn-1
tn
Ideal clock
Slow
t1
PLL output
t2
t3
tn-1
tn
Fast
June 30, 2015, S6J3200_DS708-00003-0v04-E
CONFIDENTIAL
97
8. Electric Characteristics
D a t a S h e e t ( P r e l i m i n a r y )
8.4.2
Sub Clock Timing
(Condition: See 8.2. Operation Assurance )
Parameter
Source oscillation
clock frequency
Source oscillation
clock cycle time
Symbol
Pin Name
Conditions
FCL
X0A, X1A
tLCYL
X0A, X1A
Value
Unit
Min
Typ
Max
-
-
32.768
-
kHz
-
-
30.52
-
µs
Remarks
− X0A and X1A clock timing
tLCYL
X0A
98
CONFIDENTIAL
S6J3200_DS708-00003-0v04-E, June 30, 2015
8. Electric Characteristics
D a t a S h e e t ( P r e l i m i n a r y )
8.4.3
Internal Clock Timing
− This chapter shows the TARGET characteristics for internal clock timing at the current stage.
− In the column symbol, same clock names as described in CHAPTER 5: CLOCK SYSTEM of Platform
hardware manual are used.
− Corresponding functions for these clocks are described in CHAPTER 5: CLOCK CONFIGURATION of
S6J3200 series hardware manual.
(Condition: See 8.2. Operation Assurance )
Table 8-1: Assured Combination of Clock Frequency
Symbol
FSSCG0
FSSCG1
FSSCG2
FSSCG3
FPLL0
FPLL1
FPLL2
FPLL3
Max Value Combination
Max *1
Max *2
Max *3
Max *4
232
200
160
160
(480)
(800)
(640)
(640)
200
200
200
200
(800)
(800)
(800)
(800)
200
200
200
160
(800)
(800)
(800)
(640)
200
200
200
200
(800)
(800)
(800)
(800)
240
200
200
160
(720)
(800)
(800)
(640)
400
400
400
320
(800)
(800)
(800)
(640)
200
200
200
200
(800)
(800)
(800)
(800)
240
240
240
240
(480)
(480)
(480)
(480)
Unit
Remarks
MHz
SSCG0 output clock
MHz
SSCG1 output clock
MHz
SSCG2 output clock
MHz
SSCG3 output clock
MHz
PLL0 output clock
MHz
PLL1 output clock
MHz
PLL2 output clock
MHz
PLL3 output clock
FCLK_CPU0
240
200
160
160
MHz
FCLK_SHE
240
200
160
160
MHz
FCLK_FCLK
80
66.7
80
80
MHz
FCLK_ATB
120
100
80
80
MHz
FCLK_DBG
120
100
80
80
MHz
FCLK_HPM
120
200
160
160
MHz
FCLK_HPM2
60
100
80
80
MHz
FCLK_DMA
120
200
160
160
MHz
FCLK_MEMC
120
200
160
160
MHz
FCLK_EXTBUS
40
40
40
40
MHz
Unused
FCLK_SYSC1
40
40
40
40
MHz
FCLK_HAPP0A0
40
40
40
40
MHz
Unused
FCLK_HAPP0A1
40
40
40
40
MHz
Unused
FCLK_HAPP1B0
60
50
80
80
MHz
FCLK_HAPP1B1
40
40
40
40
MHz
MHz
FCLK_LLPBM
240
200
160
160
FCLK_LLPBM2
120
100
80
80
MHz
FCLK_LCP
60
50
80
80
MHz
FCLK_LCP0
40
40
40
40
MHz
FCLK_LCP0A
60
66.7
80
80
MHz
FCLK_LCP1
40
40
40
40
MHz
FCLK_LCP1A
60
66.7
80
80
MHz
FCLK_LAPP0
40
40
40
40
MHz
June 30, 2015, S6J3200_DS708-00003-0v04-E
CONFIDENTIAL
Unused
Unused
Unused
99
8. Electric Characteristics
D a t a S h e e t ( P r e l i m i n a r y )
Symbol
Max Value Combination
Max *1
Max *2
Max *3
Max *4
Unit
Remarks
FCLK_LAPP0A
40
40
40
40
MHz
Unused
FCLK_LAPP1
40
40
40
40
MHz
Unused
FCLK_LAPP1A
40
40
40
40
MHz
Unused
FCLK_TRC
100
100
100
100
MHz
FCLK_CD1
400
400
400
400
MHz
FCLK_CD1A0
100
100
100
100
MHz
Unused
FCLK_CD1A1
100
100
100
100
MHz
Unused
FCLK_CD1B0
100
100
100
100
MHz
Unused
FCLK_CD1B1
100
100
100
100
MHz
Unused
FCLK_CD2
400
400
400
320
MHz
Unused
FCLK_CD2A0
400
400
400
320
MHz
FCLK_CD2A1
400
400
400
320
MHz
Unused
FCLK_CD2B0
400
400
400
320
MHz
Unused
FCLK_CD2B1
400
400
400
320
MHz
Unused
FCLK_CD3
200
200
200
160
MHz
Unused
FCLK_CD3A0
200
200
200
160
MHz
FCLK_CD3A1
200
200
200
160
MHz
Unused
FCLK_CD3B0
200
200
200
160
MHz
Unused
FCLK_CD3B1
200
200
200
160
MHz
Unused
FCLK_CD4
200
200
200
200
MHz
FCLK_CD4A0
200
200
200
200
MHz
Unused
FCLK_CD4A1
200
200
200
200
MHz
Unused
FCLK_CD4B0
200
200
200
200
MHz
Unused
FCLK_CD4B1
200
200
200
200
MHz
Unused
FCLK_CD5
240
240
240
240
MHz
FCLK_CD5A0
120
120
120
120
MHz
FCLK_CD5A1
120
120
120
120
MHz
FCLK_CD5B0
60
60
60
60
MHz
FCLK_CD5B1
60
60
60
60
MHz
FCLK_HSSPI
200
200
200
200
MHz
FCLK_SYSC0H
60
66.7
80
80
MHz
FCLK_COMH
60
66.7
80
80
MHz
FCLK_RAM0H
60
66.7
80
80
MHz
FCLK_RAM1H
60
66.7
80
80
MHz
FCLK_SYSC0P
60
66.7
80
80
MHz
FCLK_COMP
60
66.7
80
80
MHz
FCLK_CAN
40
40
40
40
MHz
Unused
Unused
Notes:
−


−
−
−
−
100
CONFIDENTIAL
*1: Target maximum clock frequencies when CPU clock = 240MHz
232MHz or less is available for SSCG Down Spread.
240MHz or less is available for PLL.
*2: Target maximum clock frequencies when CPU clock = 200MHz
*3: Target maximum clock frequencies when CPU clock = 160MHz
From *1 to *3, they are not applied to the product series with function digit A, B, C, and D.
*4: Target maximum clock frequencies when CPU clock = 160MHz for the product series with the
function digit A, B, C, and D.
S6J3200_DS708-00003-0v04-E, June 30, 2015
8. Electric Characteristics
D a t a S h e e t ( P r e l i m i n a r y )
−
−
−
−
−
Even if a combination of clock frequency is able to be configured by software, the frequency should
be configured under maximum frequency described in Table 8-1. For example, 80MHz of
CLK_LCP0A seems to be configurable from both divided 240MHz and 160MHz of CLK_CPU. But
each duty ratio of configured 80MHz as an internal signal is different from one another. In this series,
the 80MHz from the 160MHz divided by 2 can only be assured, but the 240MHz divided by 3 cannot
be assured from the internal timing design point of view.
FCLK_TRC/2 (half frequency of FCLK_TRC) comes out of the trace clock port of package external pin.
The frequency described in () is maximum output frequency of SSCG PLL / PLL multiplier circuit.
The configurable minimum frequency of PLLn and SSCGn output is 400MHz.
"Unused" means a clock source which doesn’t have any supply destinations. Configure it as disable
with performing at the lower clock frequency than the described maximum.
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8. Electric Characteristics
D a t a S h e e t ( P r e l i m i n a r y )
− Operation assurance range
Relationship between the internal clock frequency and supply voltage
Power supply VCC5 [V]
5.5
Recommended guaranteed
4.5
operation range
3.5
Guaranteed
operation range
2
4
Frequency [MHz]
Maximum frequency
of each clock
PLL guaranteed
operation range
Power supply VCC12 [V]
1.3
1.2
1.15
2
4
Frequency [MHz]
Maximum frequency
of each clock
Note: CPU will be reset, when the power supply voltage is equal to or less than LVD setting voltage.
102
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8. Electric Characteristics
D a t a S h e e t ( P r e l i m i n a r y )
− Relationship between the oscillation clock frequency and internal clock frequency
Internal Operation Clock Frequency
Main
Clock
PLL Clock
Multiplied
Multiplied
Multiplied
Multiplied
Multiplied
Multiplied
by 1
by 2
by 3
by 4
by 40
by 60
4
8
12
16
160
240
Oscillation
clock
frequency
4
2
…
[MHz]
− Oscillation circuit example
X0
X1
R
C1
C2
Note:
For the configuration of an oscillation circuit, request the oscillator manufacturer to perform a circuit matching evaluation
before starting design.
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8. Electric Characteristics
D a t a S h e e t ( P r e l i m i n a r y )
AC characteristics are specified by the following measurement reference voltage values.
− Input signal waveform
− Output signal waveform
Hysteresis input pin (Automotive)
Output pin
0.8VCC5
2.4V
0.5VCC5
0.8V
Hysteresis input pin (CMOS Schmitt)
0.7VCC5
0.3VCC5
0.7VCC3
0.3VCC3
Hysteresis input pin (TTL)
2.0V
0.8V
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8. Electric Characteristics
D a t a S h e e t ( P r e l i m i n a r y )
8.4.4
Reset Input
(Condition: See 8.2. Operation Assurance )
Parameter
Symbol
Pin Name
Value
Conditions
Reset
input time
RSTX
tRSTL
Width for reset
Unit
Min
Max
10
-
µs
1
-
µs
Remarks
-
input removal
tRSTL
RSTX
0.2VCC
8.4.5
0.2VCC
Power-On Conditions
(Condition: See 8.2. Operation Assurance )
Parameter
Symbol
Level detection
voltage
Reset release
voltage
Level detection
hysteresis width
Level detection time
Conditions
Value
Min
Typ
Max
Unit
Remarks
-
VCC5
-
2.15
2.35
2.55
V
-
VCC5
-
2.25
2.45
2.65
V
-
VCC5
-
-
100
-
mV
-
-
-
-
-
30
μs
*1
-
VCC5
detection release
-
-
4
mV/µs
*2
50
-
-
ms
*3
VCC5 = at level
Slope detection
undetected standard
Power off time
Pin
Name
level time
-
VCC5
-
*1: If a power fluctuation precedes the low-voltage detection time, the detection may occur or be canceled
after the supply voltage passes the detection voltage range.
*2: This time is a period that begins when the power supply is turned off and ends when an internal charge is
released and tilt detection becomes possible for the next power-on.
*3: This time is to start the slope detection at next power on after power down and internal charge loss.
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8. Electric Characteristics
D a t a S h e e t ( P r e l i m i n a r y )
8.4.6
Multi-Function Serial
8.4.6.1
UART (Asynchronous Serial Interface) Timing (SMR:MD2-0=0b000,
0b001)
(1) External Clock Selected (BGR:EXT=1)
Parameter
Symbol
Pin Name
Value
Conditions
SCK0 to SCK4,
Serial clock
"L" pulse width
tSLSH
SCK8 to SCK12
Serial clock
"H" pulse width
SCK falling time
tSHSL
tF
Max
tCLK_LCPnA*1 +10
-
ns
tCLK_COMP +10
-
ns
tCLK_LCPnA*1 +10
-
ns
tCLK_COMP +10
-
ns
-
5
ns
-
5
ns
(CL = 50pF,
SCK0 to SCK4,
IOL=-2mA,
SCK8 to SCK12
IOH=2mA),
SCK16 to
(CL=20pF,
SCK17
IOL=-1mA,
SCK0 to SCK4,
IOH=1mA)
Unit
Min
SCK16 to
SCK17
(Condition: See 8.2. Operation Assurance )
Remarks
SCK8 to SCK12,
SCK rising time
SCK16 to
tR
SCK17
*1: n=0:ch.0 to ch.4, n=1:ch.8 to ch.12
tR
SCK
VIL
tF
tSHSL
VIH
VIH
tSLSH
VIL
VIL
VIH
External clock selected
External clock selected
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8. Electric Characteristics
D a t a S h e e t ( P r e l i m i n a r y )
8.4.6.2
CSIO Timing (SMR:MD2-0=0b010)
(1) Normal Synchronous Transfer (SCR:SPI=0) and Mark Level "H" of Serial Clock Output
(SMR:SCINV=0)
(Condition: See 8.2. Operation Assurance )
Parameter
Serial clock
cycle time
Symbol
Pin Name
SCK0 to SCK4,
tSCYC
SCK8 to SCK12
SCK16 to SCK17
SCK0 to SCK4,
SCK8 to SCK12,
SCK ↓ → SOT
delay time
tSLOVI
SCK16 to SCK17
SOT0 to SOT4,
SOT8 to SOT12,
SOT16 to SOT17
Valid SIN → SCK ↑
setup time
tIVSHI
SCK0 to SCK4,
SCK8 to SCK12,
SCK16 to SCK17
SCK ↑→ Valid SIN
hold time
Conditions
tSHIXI
Value
Unit
Min
Max
6tCLK_LCPnA*1
-
ns
3tCLK_COMP
-
ns
-15
+15
ns
20
-
ns
0
-
ns
tCLK_LCPnA*1 -5
-
ns
tCLK_COMP -5
-
ns
2tCLK_LCPnA*1 -5
-
ns
2tCLK_COMP -5
-
ns
-
20
ns
10
-
ns
10
-
ns
Remarks
Master
Mode
(CL = 50pF,
IOL=-2mA,
IOH=2mA),
(CL=20pF,
IOL=-1mA,
IOH=1mA)
SIN0 to SIN4,
SIN8 to SIN12,
SIN16 to SIN17
Serial clock
"H" pulse width
Serial clock
"L" pulse width
SCK ↓→ SOT
delay time
Valid SIN → SCK ↑
setup time
SCK0 to SCK4,
tSHSL
SCK8 to SCK12
SCK16 to SCK17
SCK0 to SCK4,
tSLSH
SCK8 to SCK12
SCK16 to SCK17
tSLOVE
tIVSHE
Slave
SCK0 to SCK4,
Mode
SCK8 to SCK12,
(CL=50pF,
SCK16 to SCK17
IOL=-2mA,
SOT0 to SOT4,
IOH=2mA),
SOT8 to SOT12,
(CL=20pF,
SOT16 to SOT17
IOL=-1mA,
SCK0 to SCK4,
IOH=1mA)
SCK8 to SCK12,
SCK16 to SCK17
SCK ↑ → Valid SIN
hold time
tSHIXE
SIN0 to SIN4,
SIN8 to SIN12,
SIN16 to SIN17
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8. Electric Characteristics
D a t a S h e e t ( P r e l i m i n a r y )
Parameter
Symbol
Pin Name
Conditions
SCK0 to SCK4,
Slave
tF
SCK8 to SCK12,
Mode
SCK16 to SCK17
(CL=50pF,
SCK falling time
Value
Unit
Min
Max
-
5
ns
-
5
ns
Remarks
IOL=-2mA,
SCK rising time
tR
SCK0 to SCK4,
IOH=2mA),
SCK8 to SCK12,
(CL=20pF,
SCK16 to SCK17
IOL=-1mA,
IOH=1mA)
*1: n=0:ch.0 to ch.4, n=1:ch.8 to ch.12
Notes:
−
−
−
This table provides the alternate current standard for CLK synchronous mode.
CL is the load capability value connected to the pin at the test time.
The maximum baud rate is limited by the internal operating clock used and other parameters.
For details, see the hardware manual.
tSCYC
SCK
VOH
VOL
tSLOVI
SOT
VOH
VOL
tIVSHI
SIN
VIH
VIL
tSHIXI
VIH
VIL
Master mode
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8. Electric Characteristics
D a t a S h e e t ( P r e l i m i n a r y )
tSLSH
SCK
VIH
tF
VIL
tSHSL
VIL
VIH
VIH
tR
tSLOVE
SOT
VOH
VOL
tIVSHE
SIN
VIH
VIL
tSHIXE
VIH
VIL
Slave mode
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8. Electric Characteristics
D a t a S h e e t ( P r e l i m i n a r y )
(2) Normal Synchronous Transfer (SCR:SPI=0) and Mark Level "L" of Serial Clock Output
(SMR:SCINV=1)
(Condition: See 8.2. Operation Assurance )
Parameter
Symbol
Pin Name
Conditions
SCK0 to SCK4,
Serial clock
tSCYC
cycle time
SCK8 to SCK12
SCK16 to SCK17
SCK0 to SCK4,
tSHOVI
delay time
SCK16 to SCK17
SOT0 to SOT4,
SOT8 to SOT12,
SOT16 to SOT17
Valid SIN → SCK ↓
tIVSLI
setup time
SCK0 to SCK4,
SCK8 to SCK12,
SCK16 to SCK17
SCK ↓ → Valid SIN
tSLIXI
hold time
Unit
Max
6tCLK_LCPnA*1
-
ns
3tCLK_COMP
-
ns
-15
+15
ns
20
-
ns
0
-
ns
tCLK_LCPnA*1 -5
-
ns
tCLK_COMP -5
-
ns
2tCLK_LCPnA*1 -5
-
ns
2tCLK_COMP -5
-
ns
-
20
ns
10
-
ns
10
-
ns
-
5
ns
-
5
ns
Remarks
Master
SCK8 to SCK12,
SCK ↑ → SOT
Value
Min
Mode
(CL = 50pF,
IOL=-2mA,
IOH=2mA),
(CL=20pF,
IOL=-1mA,
IOH=1mA)
SIN0 to SIN4,
SIN8 to SIN12,
SIN16 to SIN17
SCK0 to SCK4,
Serial clock
tSHSL
"H" pulse width
SCK8 to SCK12
SCK16 to SCK17
SCK0 to SCK4,
Serial clock
tSLSH
"L" pulse width
SCK8 to SCK12
SCK16 to SCK17
SCK0 to SCK4,
SCK8 to SCK12,
SCK ↑ → SOT
tSHOVE
delay time
Valid SIN → SCK ↓
tIVSLE
setup time
SCK ↓ → Valid SIN
tSLIXE
hold time
SCK16 to SCK17
Slave
SOT0 to SOT4,
Mode
SOT8 to SOT12,
(CL=50pF,
SOT16 to SOT17
IOL=-2mA,
SCK0 to SCK4,
IOH=2mA),
SCK8 to SCK12,
(CL=20pF,
SCK16 to SCK17
IOL=-1mA,
SIN0 to SIN4,
IOH=1mA)
SIN8 to SIN12,
SIN16 to SIN17
SCK0 to SCK4,
SCK falling time
tF
SCK8 to SCK12,
SCK16 to SCK17
SCK0 to SCK4,
SCK rising time
tR
SCK8 to SCK12,
SCK16 to SCK17
*1: n=0:ch.0 to ch.4, n=1:ch.8 to ch.12
Notes:
−
−
−
110
CONFIDENTIAL
This table provides the alternate current standard for CLK synchronous mode.
CL is the load capability value connected to the pin at the test time.
The maximum baud rate is limited by the internal operating clock used and other parameters.
For details, see the hardware manual.
S6J3200_DS708-00003-0v04-E, June 30, 2015
8. Electric Characteristics
D a t a S h e e t ( P r e l i m i n a r y )
tSCYC
VOH
SCK
VOL
tSHOVI
VOH
VOL
SOT
tIVSLI
tSLIXI
VIH
VIL
SIN
VIH
VIL
Master mode
tSHSL
SCK
VIL
tR
VIH
VIH
VIL
VOH
VOL
tIVSLE
SIN
VIL
tF
tSHOVE
SOT
tSLSH
VIH
VIL
tSLIXE
VIH
VIL
Slave mode
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8. Electric Characteristics
D a t a S h e e t ( P r e l i m i n a r y )
(3) SPI Supported (SCR:SPI=1), and Mark Level "H" of Serial Clock Output (SMR:SCINV=0)
(Condition: See 8.2. Operation Assurance )
Parameter
Symbol
Pin Name
Conditions
cycle time
tSCYC
Unit
Min
Max
6tCLK_LCPnA*1
-
ns
3tCLK_COMP
-
ns
-15
+15
ns
20
-
ns
0
-
ns
tCLK_LCPnA*1 -15
-
ns
SCK16 to SCK17
tCLK_COMP*1 -15
-
ns
SCK0 to SCK4,
tCLK_LCPnA*1 -5
-
ns
tCLK_COMP -5
-
ns
2tCLK_LCPnA*1 -5
-
ns
2tCLK_COMP -5
-
ns
-
20
ns
SCK0 to SCK4,
Serial clock
Value
SCK8 to SCK12
SCK16 to SCK17
Remarks
SCK0 to SCK4,
SCK8 to SCK12,
SCK ↑ → SOT
delay time
Valid SIN → SCK ↓
setup time
SCK ↓ → Valid SIN
hold time
tSHOVI
tIVSLI
tSLIXI
SCK16 to SCK17
SOT0 to SOT4,
Master
SOT8 to SOT12,
Mode
SOT16 to SOT17
(CL = 50pF,
SCK0 to SCK4,
IOL=-2mA,
SCK8 to SCK12,
IOH=2mA),
SCK16 to SCK17
(CL=20pF,
SIN0 to SIN4,
SIN8 to SIN12,
IOL=-1mA,
IOH=1mA)
SIN16 to SIN17
SCK0 to SCK4,
SCK8 to SCK12
SOT → SCK ↓
delay time
Serial clock
"H" pulse width
tSOVLI
tSHSL
SOT0 to SOT4,
SOT8 to SOT12
SCK8 to SCK12
SCK16 to SCK17
Slave
Mode
Serial clock
"L" pulse width
SCK0 to SCK4,
tSLSH
SCK8 to SCK12
SCK16 to SCK17
SCK0 to SCK4,
SCK8 to SCK12,
SCK ↑ → SOT
delay time
tSHOVE
SCK16 to SCK17
SOT0 to SOT4,
(CL=50pF,
IOL=-2mA,
IOH=2mA),
(CL=20pF,
IOL=-1mA,
IOH=1mA)
SOT8 to SOT12,
SOT16 to SOT17
112
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8. Electric Characteristics
D a t a S h e e t ( P r e l i m i n a r y )
Parameter
Symbol
Valid SIN → SCK ↓
tIVSLE
setup time
SCK ↓ → Valid SIN
tSLIXE
hold time
SCK falling time
tF
SCK rising time
tR
Pin Name
Value
Conditions
Max
10
-
ns
10
-
ns
-
5
ns
-
5
ns
SCK0 to SCK4,
SCK8 to SCK12,
SCK16 to SCK17
Slave
SIN0 to SIN4,
Mode
SIN8 to SIN12,
(CL=50pF,
SIN16 to SIN17
IOL=-2mA,
SCK0 to SCK4,
IOH=2mA),
SCK8 to SCK12
(CL=20pF,
SCK16 to SCK17
IOL=-1mA,
SCK0 to SCK4,
IOH=1mA)
Unit
Min
SCK8 to SCK12
Remarks
SCK16 to SCK17
*1: n=0:ch.0 to ch.4, n=1:ch.8 to ch.12
Notes:
−
−
−
This table provides the alternate current standard for CLK synchronous mode.
CL is the load capability value connected to the pin at the test time.
The maximum baud rate is limited by the internal operating clock used and other parameters.
For details, see the hardware manual.
tSCYC
SCK
VOH
VOL
tSOVLI
SOT
VOH
VOL
VOH
VOL
tIVSLI
SIN
VOL
tSHOVI
tSLIXI
VIH
VIL
VIH
VIL
Master mode
June 30, 2015, S6J3200_DS708-00003-0v04-E
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8. Electric Characteristics
D a t a S h e e t ( P r e l i m i n a r y )
tSHSL
tSLSH
VIH
SCK
CONFIDENTIAL
VIL
tSHOVE
VOH
VOL
tSLIXE
VIH
VIL
VIH
VIL
* Changes when writing to the TDR register
114
tR
VIH
VIH
VOH
VOL
tIVSLE
SIN
VIL
tF
*
SOT
VIL
Slave mode
S6J3200_DS708-00003-0v04-E, June 30, 2015
8. Electric Characteristics
D a t a S h e e t ( P r e l i m i n a r y )
(4) SPI Supported (SCR:SPI=1), and Mark Level "L" of Serial Clock Output (SMR:SCINV=1)
(Condition: See 8.2. Operation Assurance )
Parameter
Symbol
Pin Name
Conditions
SCK0 to SCK4,
Serial clock
cycle time
tSCYC
SCK8 to SCK12
SCK16 to SCK17
Value
Unit
Min
Max
6tCLK_LCPnA*1
-
ns
3tCLK_COMP
-
ns
-15
+15
ns
20
-
ns
0
-
ns
tCLK_LCPnA*1 -15
-
ns
tCLK_COMP -15
-
ns
tCLK_LCPnA*1 -5
-
ns
tCLK_COMP -5
-
ns
2tCLK_LCPnA*1 -5
-
ns
2tCLK_COMP -5
-
ns
-
20
ns
Remarks
SCK0 to SCK4,
SCK8 to SCK12,
SCK ↓ -> SOT
delay time
Valid SIN -> SCK ↑
setup time
SCK ↑ -> Valid SIN
hold time
tSLOVI
tIVSHI
tSHIXI
SCK16 to SCK17
SOT0 to SOT4,
Master
SOT8 to SOT12,
Mode
SOT16 to SOT17
(CL = 50pF,
SCK0 to SCK4,
IOL=-2mA,
SCK8 to SCK12,
IOH=2mA),
SCK16 to SCK17
(CL=20pF,
SIN0 to SIN4,
IOL=-1mA,
SIN8 to SIN12,
IOH=1mA)
SIN16 to SIN17
SCK0 to SCK4,
SCK8 to SCK12
SOT -> SCK ↑
delay time
tSOVHI
SOT0 to SOT4,
SOT8 to SOT12
SCK16 to SCK17
SOT16 to SOT17
SCK0 to SCK4,
Serial clock
"H" pulse width
Serial clock
"L" pulse width
tSHSL
SCK8 to SCK12
SCK16 to SCK17
tSLSH
SCK0 to SCK4,
Mode
SCK8 to SCK12
(CL=50pF,
SCK16 to SCK17
IOH=2mA),
IOL=-2mA,
SCK0 to SCK4,
SCK8 to SCK12,
SCK ↓ -> SOT
delay time
tSLOVE
Slave
SCK16 to SCK17
SOT0 to SOT4,
(CL=20pF,
IOL=-1mA,
IOH=1mA)
SOT8 to SOT12,
SOT16 to SOT17
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8. Electric Characteristics
D a t a S h e e t ( P r e l i m i n a r y )
Parameter
Symbol
Valid SIN -> SCK ↑
tIVSHE
setup time
SCK ↑ -> Valid SIN
tSHIXE
hold time
SCK falling time
tF
SCK rising time
tR
Pin Name
Value
Conditions
SCK0 to SCK4,
SCK8 to SCK12,
SCK16 to SCK17
Slave
SIN0 to SIN4,
Mode
SIN8 to SIN12,
(CL=50pF,
SIN16 to SIN17
IOL=-2mA,
SCK0 to SCK4,
IOH=2mA),
SCK8 to SCK12
(CL=20pF,
SCK16 to SCK17
IOL=-1mA,
SCK0 to SCK4,
IOH=1mA)
Unit
Min
Max
10
-
ns
10
-
ns
-
5
ns
-
5
ns
SCK8 to SCK12
Remarks
SCK16 to SCK17
*1: n=0:ch.0 to ch.4, n=1:ch.8 to ch.12
Notes:
−
−
−
This table provides the alternate current standard for CLK synchronous mode.
CL is the load capability value connected to the pin at the test time.
The maximum baud rate is limited by the internal operating clock used and other parameters.
For details, see the hardware manual.
tSCYC
VOH
VOH
SCK
VOL
tSOVHI
SOT
VOH
VOL
VOH
VOL
tIVSHI
SIN
tSLOVI
tSHIXI
VIH
VIL
VIH
VIL
Master mode
116
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8. Electric Characteristics
D a t a S h e e t ( P r e l i m i n a r y )
tSLSH
tSHSL
SCK
VIL
VOH
VOL
CONFIDENTIAL
VIL
VIH
tSLOV
tSHIXE
VIH
VIL
* Changes when writing to the TDR register
June 30, 2015, S6J3200_DS708-00003-0v04-E
VIL
VOH
VOL
tIVSHE
SIN
VIH
tF
tR
*
SOT
VIH
VIH
VIL
Slave mode
117
8. Electric Characteristics
D a t a S h e e t ( P r e l i m i n a r y )
8.4.6.3
LIN Interface (v2.1) (LIN Communication Control Interface (v2.1))
Timing (SMR:MD2-0=0b011)
(1) External Clock Selected (BGR:EXT=1)
Parameter
Symbol
Pin Name
Conditions
SCK0 to SCK4,
Serial clock
tSLSH
"L" pulse width
SCK8 to SCK12
SCK16 to
SCK17
tSHSL
"H" pulse width
IOL=-2mA,
SCK8 to SCK12
IOH=2mA),
SCK16 to
(CL=20pF,
IOL=-1mA,
SCK17
SCK falling time
tF
SCK rising time
tR
Value
Unit
Min
Max
tCLK_LCPnA*1+10
-
ns
tCLK_COMP +10
-
ns
tCLK_LCPnA*1+10
-
ns
tCLK_COMP +10
-
ns
-
5
ns
-
5
ns
Remarks
(CL = 50pF,
SCK0 to SCK4,
Serial clock
(Condition: See 8.2. Operation Assurance )
IOH=1mA)
SCK0 to SCK4,
SCK8 to SCK12,
SCK16 to
SCK17
*1: n=0:ch.0 to ch.4, n=1:ch.8 to ch.12
tR
SCK
VIL
tF
tSHSL
VIH
VIH
VIL
tSLSH
VIL
VIH
External clock selected
118
CONFIDENTIAL
S6J3200_DS708-00003-0v04-E, June 30, 2015
8. Electric Characteristics
D a t a S h e e t ( P r e l i m i n a r y )
I2C Timing (SMR:MD2-0=0b100)
8.4.6.4
(Condition: See 8.2. Operation Assurance )
Standard
Parameter
Symbol
SCL clock frequency
fSCL
Pin Name
SCL4, 10, 12, 16,
and 17
High-Speed
Mode
Conditions
Mode
Unit
Min
Max
Min
Max
0
100
0
400
kHz
4.0
-
0.6
-
µs
4.7
-
1.3
-
µs
4.0
-
0.6
-
µs
4.7
-
0.6
-
µs
0
3.45*1
0
0.9*2
µs
250
-
100
-
ns
4.0
-
0.6
-
µs
4.7
-
1.3
-
µs
-
ns
Remarks
SDA4, 10, 12, 16,
Repeat "start"
condition hold time
tHDSTA
SDA ↓ → SCL ↓
and 17
SCL4, 10, 12, 16,
and 17
Period of "L" for
tLOW
SCL clock
Period of "H" for
tHIGH
SCL clock
SCL4, 10, 12, 16,
and 17
SCL4, 10, 12, 16,
and 17
SDA4, 10, 12, 16,
Repeat "start"
condition setup time
tSUSTA
SCL ↑ → SDA ↓
and 17
SCL4, 10, 12, 16,
and 17
SDA4, 10, 12, 16,
Data hold time
SCL ↓ → SDA ↓ ↑
tHDDAT
and 17
SCL4, 10, 12, 16,
and 17
SDA4, 10, 12, 16,
Data setup time
SDA ↓ ↑ → SCL ↑
tSUDAT
and 17
SCL4, 10, 12, 16,
(CL = 50pF,
IOL=-2mA,
IOH=2mA),
(CL=20pF,
IOL=-1mA,
IOH=1mA)
and 17
SDA4, 10, 12, 16,
"Stop" condition setup time
SCL ↑ → SDA ↑
tSUSTO
and 17
SCL4, 10, 12, 16
and 17
Bus-free time between
"stop" condition and "start"
tBUF
-
tSP
-
condition
Noise filter
2tCLK_
COMP
-
2tCLK_C
OMP
Notes:
−
−
−
*1: The maximum tHDDAT only has to be met if the device does not extend the "L" width (tLOW) of the
SCL signal.
2
2
*2: A high-speed mode I C bus device can be used on a standard mode I C bus system as long as
the device satisfies the requirement of "tSUDAT ≥ 250 ns".
SCL4, 10, 12 and SDA4, 10, 12 only support the standard mode.
June 30, 2015, S6J3200_DS708-00003-0v04-E
CONFIDENTIAL
119
8. Electric Characteristics
D a t a S h e e t ( P r e l i m i n a r y )
SDA
tSUDAT
tSUSTA
tBUF
tLOW
SCL
tHDSTA
120
CONFIDENTIAL
tHDDAT
tHIGH
tHDSTA
tSP
tSUSTO
S6J3200_DS708-00003-0v04-E, June 30, 2015
8. Electric Characteristics
D a t a S h e e t ( P r e l i m i n a r y )
8.4.7
Timer Input
(Condition: See 8.2. Operation Assurance )
Parameter
Symbol
Pin Name
Conditions
PPG0_TIN1 to
ICU0_IN0 to ICU11_IN0,
ICU0_IN1 to ICU11_IN1
FRT0_TEXT to
Input pulse width
tTWH,
FRT11_TEXT
tTWL
TIN0 to TIN3,
4tCLK_LCPnA*1
-
PPG11_TIN1
100
4tCLK_LCPnA*2
-
100
4tCLK_LCPnA*2
-
100
4tCLK_LCPnA*3
-
TIN16 to TIN19
TIN32 to TIN35
-
TIN48 to TIN49
-
Value
Min
100
4tCLK_LLPBM2
100
4tCLK_COMP
100
Max
Unit
-
ns
-
ns
-
ns
-
ns
-
ns
-
ns
Remarks
4tCLK_LCPnA*1 ≥100 ns
4tCLK_LCPnA*1 <100 ns
4tCLK_LCPnA*2 ≥100 ns
*2
− 4tCLK_LCPnA <100 ns
4tCLK_LCPnA*2
−
*2
4tCLK_LCPnA
≥100 ns
<100 ns
4tCLK_LCPnA*3 ≥100 ns
4tCLK_LCPnA*2 <100 ns
4tCLK_LLPBM2 ≥100 ns
4tCLK_LCPnA*2 <100 ns
4tCLK_COMP ≥100 ns
4tCLK_LCPnA*2 <100 ns
*1: n=0:ch.0 to ch.5, n=1:ch.6 to ch.11
*2: n=0:ch.0 to ch.7, n=1:ch.8 to ch.11
*3: n=0:ch.0 to ch.3, n=1:ch.16 to ch.19
− Timer input timing
PPGx_TIN1
ICUx_IN0/1
FRTx_TEXT
TINx
tTIWH
VIH
June 30, 2015, S6J3200_DS708-00003-0v04-E
CONFIDENTIAL
tTIWL
VIH
VIL
VIL
121
8. Electric Characteristics
D a t a S h e e t ( P r e l i m i n a r y )
8.4.8
Trigger Input
(Condition: See 8.2. Operation Assurance )
Parameter
Input pulse width
Symbol
tTRGH,
tTRGL
Pin Name
Conditions
EINT0 to EINT15
RX0 to RX1,
RX5 to RX6
Value
Unit
Min
Max
-
100
-
ns
-
5tCLK_LLPBM2
-
ns
-
1
-
µs
Remarks
EINT0 to EINT15
RX0 to R1,
Stop mode
RX5 to RX6
− Trigger input timing
tTRGL
tTRGH
EINTx
RXx
122
CONFIDENTIAL
VIH
VIH
VIL
VIL
S6J3200_DS708-00003-0v04-E, June 30, 2015
8. Electric Characteristics
D a t a S h e e t ( P r e l i m i n a r y )
8.4.9
NMI Input
(Condition: See 8.2. Operation Assurance )
Parameter
Input pulse width
Symbol
Pin Name
Conditions
tNMIL
NMIX
-
Value
Min
Max
300
-
Unit
Remarks
ns
− NMIX input timing
tNMIL
NMIX
VIH
VIH
VIL
June 30, 2015, S6J3200_DS708-00003-0v04-E
CONFIDENTIAL
VIL
123
8. Electric Characteristics
D a t a S h e e t ( P r e l i m i n a r y )
8.4.10
Low-Voltage Detection
8.4.10.1 LVDL0
(Condition: See 8.2. Operation Assurance )
Parameter
Pin Name
Conditions
-
Detection
Voltage
Release
Voltage
Value
Unit
Remarks
1.0
V
-
1.025
1.075
V
-
-
30
µs
-
Min
Typ
Max
-
0.9
0.95
-
-
0.975
-
-
-
Level
Detection
Time
Note:
−
124
CONFIDENTIAL
If the power fluctuation time is less than the low-voltage detection time and has passed the detection
voltage range, the detection may occur or be canceled after the supply voltage has passed the
detection voltage range.
S6J3200_DS708-00003-0v04-E, June 30, 2015
8. Electric Characteristics
D a t a S h e e t ( P r e l i m i n a r y )
8.4.10.2 LVDH0
(Condition: See 8.2. Operation Assurance )
Parameter
Detection
Voltage
Release
Voltage
Pin Name
Conditions
VCC5
Value
Unit
Remarks
2.5
V
-
2.45
2.6
V
-
-
-
30
µs
*1
-
-
-
4
mV/µs
*2
-
50
-
-
ms
*3
Min
Typ
Max
-
2.2
2.35
VCC5
-
2.3
VCC5
-
VCC5
-
Level
Detection
Time
Slope
Detection
Undetected
Condition
Power off time
Notes:
−
−
−
*1: If a power fluctuation precedes the low-voltage detection time, the detection may occur or be
canceled after the supply voltage passes the detection voltage range.
*2: This time is a period that begins when the power supply is turned off and ends when an internal
charge is released and tilt detection becomes possible for the next power-on.
*3: This time is to start the slope detection at next power on after power down and internal charge
loss.
June 30, 2015, S6J3200_DS708-00003-0v04-E
CONFIDENTIAL
125
8. Electric Characteristics
D a t a S h e e t ( P r e l i m i n a r y )
8.4.10.3 LVDL1
(Condition: See 8.2. Operation Assurance )
Parameter
Pin Name
Detection
Release
Detection
Max
0.82
0.87
0.92
V
0.895
0.945
0.995
V
0.92
0.97
1.02
V
-
0.995
1.045
1.095
V
-
1.02
1.07
1.12
V
1.095
1.145
1.195
V
-
-
30
μs
LVDL1V=01
(Default)
-
Voltage
Unit
Typ
-
Voltage
Value
Min
-
Voltage
Conditions
Remarks
LVDL1V=10
Release
Voltage
Detection
Voltage
LVDL1V=11
Release
-
Voltage
Detection
-
Time
-
-
Notes:
−
126
CONFIDENTIAL
If the power fluctuation time is less than the low-voltage detection time and has passed the detection
voltage range, the detection may occur or be canceled after the supply voltage has passed the
detection voltage range.
S6J3200_DS708-00003-0v04-E, June 30, 2015
8. Electric Characteristics
D a t a S h e e t ( P r e l i m i n a r y )
8.4.10.4 LVDH1
(Condition: See 8.2. Operation Assurance )
Parameter
Supply
Voltage Range
Detection
Voltage
Release
Voltage
Detection
Voltage
Release
Voltage
Detection
Voltage
Release
Voltage
Detection
Voltage
Release
Voltage
Detection
Voltage
Release
Voltage
Detection
Voltage
Release
Voltage
Detection
Voltage
Release
Voltage
Detection
Voltage
Release
Voltage
Detection
Voltage
Release
Voltage
Detection
Time
Pin Name
Conditions
VCC5
-
Value
Unit
Remarks
5.5
V
-
2.35
2.50
V
-
2.30
2.45
2.60
V
-
2.60
2.75
2.90
V
-
2.70
2.85
3.00
V
-
2.70
2.85
3.00
V
-
VCC5
2.80
2.95
3.10
V
-
VCC5
3.40
3.60
3.80
V
-
3.50
3.70
3.90
V
-
3.60
3.80
4.00
V
-
3.70
3.90
4.10
V
-
3.80
4.00
4.20
V
-
3.90
4.10
4.30
V
-
4.00
4.20
4.40
V
-
4.10
4.30
4.50
V
-
4.20
4.40
4.60
V
-
4.30
4.50
4.70
V
-
4.40
4.65
4.90
V
-
4.50
4.75
5.00
V
-
VCC5
Min
Typ
Max
4.5
-
2.20
LVDH1V=0000
VCC5
VCC5
LVDH1V=0001
VCC5
VCC5
LVDH1V=0010
LVDH1V=0011
VCC5
VCC5
LVDH1V=0100
VCC5
VCC5
LVDH1V=0101
VCC5
VCC5
VCC5
LVDH1V=0110
(Default)
VCC5
LVDH1V=0111
VCC5
VCC5
LVDH1V=Other
VCC5
-
-
-
-
30
μs
-
VCC5
-
-2
-
2
V/ms
-
Power supply
voltage
regulation
June 30, 2015, S6J3200_DS708-00003-0v04-E
CONFIDENTIAL
127
8. Electric Characteristics
D a t a S h e e t ( P r e l i m i n a r y )
Notes:
−
If the fluctuation of the power supply is faster than the low-voltage detection time, there is a
possibility to generate or release after the power supply voltage has exceeded the detection voltage
range.
−
Please suppress the change of the power supply within the range of the power-supply voltage
regulation to do a low-voltage detection by detecting voltage.
8.4.10.5 LVDL2
(Condition: See 8.2. Operation Assurance )
Parameter
Supply
Voltage Range
Detection
Voltage
Release
Voltage
Detection
Voltage
Release
Voltage
Detection
Voltage
Release
Voltage
Detection
Voltage
Release
Voltage
Pin Name
Conditions
VCC12
-
Value
Unit
Remarks
1.3
V
-
0.77
0.82
V
-
0.795
0.845
0.895
V
-
0.82
0.87
0.92
V
-
VCC12
0.895
0.945
9.995
V
-
VCC12
0.92
0.97
1.02
V
-
0.995
1.045
1.095
V
-
1.02
1.07
1.12
V
-
1.095
1.145
1.195
V
-
30
μs
-
VCC12
VCC12
LVDL2V=00
(Default)
VCC12
Min
Typ
Max
1.1
-
0.72
LVDL2V=01
LVDL2V=10
VCC12
VCC12
LVDL2V=11
VCC12
Detection
-
Time
Note:
−
128
CONFIDENTIAL
If the power fluctuation time is less than the low-voltage detection time and has passed the detection
voltage range, the detection may occur or be canceled after the supply voltage has passed the
detection voltage range.
S6J3200_DS708-00003-0v04-E, June 30, 2015
8. Electric Characteristics
D a t a S h e e t ( P r e l i m i n a r y )
8.4.10.6 LVDH2
(Condition: See 8.2. Operation Assurance )
Parameter
Supply
Voltage Range
Detection
Voltage
Release
Voltage
Detection
Voltage
Release
Voltage
Detection
Voltage
Release
Voltage
Pin Name
Conditions
VCC3
-
VCC3
VCC3
LVDH2V=0000
(Default)
VCC3
Value
Unit
Remarks
3.6
V
-
2.35
2.5
V
-
2.3
2.45
2.6
V
-
2.6
2.75
2.9
V
-
2.7
2.75
3.0
V
-
2.7
2.85
3.0
V
-
2.8
2.95
3.1
V
-
-
-
30
μs
-
Min
Typ
Max
3.0
-
2.2
LVDH2V=0001
VCC3
VCC3
LVDH2V=0010
VCC3
Detection
-
Time
-
Notes:
−
−
If the fluctuation of the power supply is faster than the low-voltage detection time, there is a
possibility to generate or release after the power supply voltage has exceeded the detection voltage
range.
Please suppress the change of the power supply within the range of the power-supply voltage
regulation to do a low-voltage detection by detecting voltage.
June 30, 2015, S6J3200_DS708-00003-0v04-E
CONFIDENTIAL
129
8. Electric Characteristics
D a t a S h e e t ( P r e l i m i n a r y )
8.4.11
High Current Output Slew Rate
(Condition: See 8.2. Operation Assurance )
Parameter
Output rise /
fall time
Symbol
tR2,tF2
Pin Name
P3_21 to 31,
P4_00 to 12
Conditions
-
Value
Min
Typ
Max
15
-
100
Unit
ns
Remarks
Load capacitance
85pF
VH=VOL8+0.9 x (VOH8-VOL8)
VL=VOL8+0.1 x (VOH8-VOL8)
130
CONFIDENTIAL
S6J3200_DS708-00003-0v04-E, June 30, 2015
8. Electric Characteristics
D a t a S h e e t ( P r e l i m i n a r y )
8.4.12
Display Controller
8.4.12.1 Display Controller0 Timing (TTL Mode)
(Condition: See 8.2. Operation Assurance )
Parameter
Clock Cycle
Symbol
Pin Name
tDC0CYC
DSP0_CLK
|tDC0D|
DSP0_DATA1_11-0
DSP0_DATA0_11-0
Output delay from
DSP0_CLK↑
DSP0_CTRL11-0
DSP0_DATA0_11-0
Output data valid time
tDC0V
Value
Conditions
Min
(CL = 20pF,
IOL=-10mA,
IOH=10mA)
DSP0_DATA1_11-0
DSP0_CTRL11-0
Max
Unit
Remarks
12.5
-
ns
*1
20
-
ns
*2
-
3.2
ns
*3
9.3
-
ns
*1, *4
14.88
-
ns
*2, *4
Notes:
−
−
−
−
−
This is a target specification.
For *1, when used with DSP0_DATA* and DSP0_CTRL4-0 in VCC3 area.
For *2, when used with DSP0_DATA* and DSP0_CTRL4-0 in VCC53 area.
For *3, the value can be configured and adjusted.
For *4, the value is defined as tDC0CYC - |tDC0D| and depends on adjustment of *3.
DSP0_CLK
VOH
VOH
tDC0V
tDC0D
DSP0_DATA0_11-0
DSP0_DATA1_11-0
DSP0_CTRL11-0
June 30, 2015, S6J3200_DS708-00003-0v04-E
CONFIDENTIAL
valid
131
8. Electric Characteristics
D a t a S h e e t ( P r e l i m i n a r y )
8.4.12.2 Display Controller0 Timing (RSDS)
(Condition: See 8.2. Operation Assurance )
Parameter
Symbol
Clock Cycle
tRSCYC
Output delay from
|tRSD|
DSP0_CLK↑
Output data valid time
tRSV
SP Output delay from
DSP0_CLK↑
SP high time
RSDS Transition time
Value
Conditions
DSP0_CLK+
DSP0_CLKDSP0_DATA_D11~0+
DSP0_DATA_D11~0-
(CL = 20pF,
DSP0_DATA_D11~0+
IOL=-4mA,
DSP0_DATA_D11~0-
IOH=4mA)
tSPD
DSP0_CTRL11~0
tSPV
DSP0_CTRL11~0
TRTF
Rise and Fall
Pin Name
DSP0_DATA_D11~0+
DSP0_DATA_D11~0-
Unit
Remarks
Min
Max
12.5
-
ns
-
1.6
ns
4.65
-
ns
-3.3
-0.1
ns
9.3ns
-
ns
*2
-
-
ps
Typ : 500ps
*1
20 to 80%
CL = 5pF,
VOD=200mV
Notes:
−
−
−
This is a target spec.
For *1, the value can be configured and adjusted.
For *2, the value is defined as tDC0CYC - |tDC0D| and depends on adjustment of *1.
tRSCYC
DSP0_CLK+ VOH
DSP0_CLKtSPD
SP
(DSP0_CTRL0~11)
DSP0_DATA_D11~0+
DSP0_DATA_D11~0-
132
CONFIDENTIAL
tSPRS
VOL
VOH
VOH
VOL
VOH
tSPV
VOH
tRSV
VOL
tRSD
tRSD
valid
tRSV
VOH
valid
VOL
S6J3200_DS708-00003-0v04-E, June 30, 2015
8. Electric Characteristics
D a t a S h e e t ( P r e l i m i n a r y )
8.4.12.3 Display Controller1 Timing
(Condition: See 8.2. Operation Assurance )
Parameter
Clock Cycle
Symbol
Pin Name
tDC1CYC
DSP1_CLK
tDC1D
DSP1_DATA1_11-0
(CL = 20pF,
DSP1_CTRL2-0
IOL=-10mA,
DSP1_DATA0_11-0
IOH=10mA),
Value
Conditions
Unit
Min
Max
20.0
-
ns
-3.3
1.82
ns
14.88
-
ns
Remarks
DSP1_DATA0_11-0
Output delay from
DSP1_CLK↑
Output data valid time
tDC1V
DSP1_DATA1_11-0
DSP1_CTRL2-0
*1
tDC1CYC 3.3ns-1.82ns
Notes:
−
−
This is a target spec.
For *1, the value can be configured and adjusted.
tDC1CYC
DSP1_CLK
VOH
VOH
tDC1V
DSP1_DATA0_11-0
DSP1_DATA1_11-0
DSP1_CTRL2-0
June 30, 2015, S6J3200_DS708-00003-0v04-E
CONFIDENTIAL
tDC1D
valid
133
8. Electric Characteristics
D a t a S h e e t ( P r e l i m i n a r y )
8.4.13
Video Capture
8.4.13.1 Video Capture Timing
(Condition: See 8.2. Operation Assurance )
Parameter
Symbol
Pin Name
Clock Cycle
tCAP0CYC
CAP0_CLK
Capture data setup time
tCAP0SU
CAP0_DATA35~0
Capture data hold time
tCAP0HD
CAP0_DATA35~0
Conditions
-
Value
Unit
Min
Max
12.5
-
ns
4.0
-
ns
1.0
-
ns
Remarks
Note:
−
This is a target specification.
tCAP0CYC
CAP0_CLK
VIH
VIH
VIH
tCAP0SU
CAP0_DATA35-0
tCAP0HD
valid
VIH
VIL
134
CONFIDENTIAL
S6J3200_DS708-00003-0v04-E, June 30, 2015
8. Electric Characteristics
D a t a S h e e t ( P r e l i m i n a r y )
8.4.14
FPD-Link (LVDS)
(Condition: See 8.2. Operation Assurance )
Parameter
Output clock frequency
Differential output voltage
Symbol
Conditions
f
-
VOD
Variation of VOD
delta VOD
Common mode voltage
RL = 100 Ohm
VCM
Variation of VCM
delta VCM
Value
Unit
Min
Typ
Max
1
-
50
MHz
210
300
390
mV
250
350
450
mV
295
400
505
mV
-
25
mV
1.200
1.325
V
One of three is
1.125
1.250
1.375
V
selectable
-
-
25
mV
-
20
T
1000
ns
Duty of TXCLKP/M
TCDT
-
-
4/7 * T
-
ns
TCSK
-
-
-
200
ps
TDSK
-
-
-
50
ps
-0.25
0
+0.25
ns
Skew of TXOUTxP and
TXOUTxM
Output pulse position for bit 0
T0
Output pulse position for bit 1
T1
T/7 - 0.25
T/7
T/7 + 0.25
ns
Output pulse position for bit 2
T2
2T/7 - 0.25
2T/7
2T/7 + 0.25
ns
Output pulse position for bit 3
T3
3T/7 - 0.25
3T/7
3T/7 + 0.25
ns
Output pulse position for bit 4
T4
4T/7 - 0.25
4T/7
4T/7 + 0.25
ns
Output pulse position for bit 5
T5
5T/7 - 0.25
5T/7
5T/7 + 0.25
ns
Output pulse position for bit 6
T6
6T/7 - 0.25
6T/7
6T/7 + 0.25
ns
f = 50MHz
selectable
-
TCIP
TXOUTxP/M
One of three is
1.075
Cycle time of TXCLKP/M
Channel to Channel skew of
Remarks
Note:
−
All the corresponding ports of products which don't support FPD-Link should be connected to GND.
AVCC3_LVDS_PLL, AVSS3_LVDS_PLL, VCC3_LVDS_Tx, VSS3_LVDS_Tx, TxDOUTn+/-.
June 30, 2015, S6J3200_DS708-00003-0v04-E
CONFIDENTIAL
135
8. Electric Characteristics
D a t a S h e e t ( P r e l i m i n a r y )
Figure 8-6: LVDS AC Timing Chart
TCIP
TxCLK
TH
TxDOUT3
D3
D2
D1
TCDT = TH / (TH + TL)
TL
D0
D6
D5
D4
D3
D2
D1
D0
D6
TCSK
TxDOUT2
D3
D2
D1
D0
D6
D5
D4
D3
D2
D1
D0
D6
TxDOUT1
D3
D2
D1
D0
D6
D5
D4
D3
D2
D1
D0
D6
TxDOUT0
D3
D2
D1
D0
D6
D5
D4
D3
D2
D1
D0
D6
T0
T1
T2
T3
T4
T5
T6
136
CONFIDENTIAL
S6J3200_DS708-00003-0v04-E, June 30, 2015
8. Electric Characteristics
D a t a S h e e t ( P r e l i m i n a r y )
Figure 8-7: LVDS AC Timing Chart
Single End
Common voltage for each data bit
Tx-M
Voltage [V]
Delta VCM
Tx-P
VOD
VCM
Delta VOD = VOD.max – VOD.min
0
Tx-M
Voltage [V]
VCM
Tx-P
TDSK
0
June 30, 2015, S6J3200_DS708-00003-0v04-E
CONFIDENTIAL
137
8. Electric Characteristics
D a t a S h e e t ( P r e l i m i n a r y )
8.4.15
DDR-HSSPI
8.4.15.1 DDR-HSSPI Interface Timing (SDR Mode)
(Condition: See 8.2. Operation Assurance )
Parameter
HSSPI clock cycle
Symbol
tcyc
G_SCLK↑ ->
tspcnt
delayed sample clock↑
Pin Name
Conditions
G_SCLK0
M_SCLK0
-
Value
Unit
Min
Max
10
-
ns
0
31.5
ns
*1
-
ns
*1
-
ns
-
tcyc/2 + 2
ns
tcyc/2 - 3
-
ns
-
ns
-
ns
Remarks
G_SDATA0_0-3
GSDATA -> G_SCLK↑
tisdata
Input setup time
G_SDATA1_0-3
M_SDATA0_0-3
M_SDATA1_0-3
G_SDATA0_0-3
G_SCLK↑ -> GSDATA
tihdata
Input hold time
G_SCLK↑ -> GSDATA
toddata
Output delay time
G_SDATA1_0-3
M_SDATA0_0-3
M_SDATA1_0-3
(CL = 20pF,
G_SDATA0_0-3
IOL=-10mA,
G_SDATA1_0-3
IOH=10mA),
M_SDATA0_0-3
M_SDATA1_0-3
G_SDATA0_0-3
G_SCLK↑ -> GSDATA
tohdata
Output hold time
G_SDATA1_0-3
M_SDATA0_0-3
M_SDATA1_0-3
GSSEL↓ -> G_SCLK
todsel
Output delay time
G_SCLK↑ -> GSSEL
tohsel
Output hold time
G_SSEL0, 1
M_SSEL0, 1
G_SSEL0, 1
M_SSEL0, 1
-12.00+(S
S2CD+0.5
)*tcyc
tcyc - 2
Notes:
−
−
−
138
CONFIDENTIAL
This is target spec.
SS2CD [1:0] should be configured as 01, 10, or 11.
For *1, the delay of the delay sample clock can be configured (DLP function).
S6J3200_DS708-00003-0v04-E, June 30, 2015
8. Electric Characteristics
D a t a S h e e t ( P r e l i m i n a r y )
tcyc
G_SCLK0
VOH
VOH
tspcnt
delayed
sample clock
VOH
VIH
G_SDATA0_0-3,
G_SDATA1_0-3
(input timing)
tisdata tihdata
valid
VIL
toddata
G_SDATA0_0-3,
G_SDATA1_0-3
(output timing)
VIL
CONFIDENTIAL
VOH
VOL
VOL
tohsel
VOH
VOH
valid
VOL
June 30, 2015, S6J3200_DS708-00003-0v04-E
tohdata
VOH
valid
todsel
GSSEL0, 1
(output timing)
VIH
VOL
139
8. Electric Characteristics
D a t a S h e e t ( P r e l i m i n a r y )
8.4.15.2 DDR-HSSPI Interface Timing (DDR Mode)
(Condition: See 8.2. Operation Assurance )
Parameter
HSSPI clock cycle
Symbol
tcyc
G_SCLK↑ ->
tspcnt
delayed sample clock↑
Pin Name
Conditions
G_SCLK0
M_SCLK0
-
Value
Unit
Min
Max
12.5
-
ns
0
31.5
ns
*1
-
ns
*1
-
ns
-
tcyc/4 + 1.5
ns
Tcyc/4 - 1.0
-
ns
-
ns
-
ns
Remarks
G_SDATA0_0-3
GSDATA -> G_SCLK↑
tisdata
Input setup time
G_SDATA1_0-3
M_SDATA0_0-3
M_SDATA1_0-3
G_SDATA0_0-3
G_SCLK↑ -> GSDATA
tihdata
Input hold time
G_SDATA1_0-3
M_SDATA0_0-3
M_SDATA1_0-3
G_SCLK↑ -> GSDATA
toddata
Output delay time
(CL = 20pF,
G_SDATA0_0-3
IOL=-10mA,
G_SDATA1_0-3
IOH=10mA),
M_SDATA0_0-3
M_SDATA1_0-3
G_SDATA0_0-3
G_SCLK↑ -> GSDATA
tohdata
Output hold time
G_SDATA1_0-3
M_SDATA0_0-3
M_SDATA1_0-3
GSSEL↓ -> G_SCLK
todsel
Output delay time
G_SCLK↑ -> GSSEL
tohsel
Output hold time
G_SSEL0, 1
M_SSEL0, 1
-15.75+(SS2
CD+0.5)*tcy
c
G_SSEL0, 1
0.75*tcyc -
M_SSEL0, 1
2.0
Notes:
−
−
−
140
CONFIDENTIAL
This is target spec.
SS2CD [1:0] should be configured as 01, 10, or 11.
For *1, the delay of the delay sample clock can be configured (DLP function).
S6J3200_DS708-00003-0v04-E, June 30, 2015
8. Electric Characteristics
D a t a S h e e t ( P r e l i m i n a r y )
tcyc
G_SCLK0
VOH
VOL
VOH
tspcnt
delayed
sample clock
VOH
VIH
G_SDATA0_0-3,
G_SDATA1_0-3
(input timing)
tisdata tihdata
VIH
valid
VIL
toddata
G_SDATA0_0-3,
G_SDATA1_0-3
(output timing)
GSSEL0, 1
(output timing)
VIL
toddata
VOH
valid
VOL
todsel
CONFIDENTIAL
VOH
valid
VOL
tohsel
VOH
VOH
valid
VOL
June 30, 2015, S6J3200_DS708-00003-0v04-E
tohdata
tohdata
VOL
141
8. Electric Characteristics
D a t a S h e e t ( P r e l i m i n a r y )
8.4.16
HyperBus
8.4.16.1 HyperBus Write Timing (HyperFlash)
(Condition: See 8.2. Operation Assurance )
Parameter
Symbol
Hyper Bus clock cycle
Pin Name
tCSS
Chip Select setup time
DQ -> CK↑↓
CK↑↓ -> DQ
Hold time
CK↓ -> CS↑
Remarks
-
ns
(A)
10
-
ns
(B)
G_CS#_1,2
tCKCYC -3.25
-
ns
(A)
M_CS#_1,2
tCKCYC -2.0
-
ns
(B)
1.25
-
ns
1.25
-
ns
tCKCYC/2
-
ns
(CL = 20pF,
IOL=-10mA,
IOH=10mA),
G_DQ7-0
M_DQ7-0
G_CS#_1,2
tCSH
Chip select hold time
Unit
12.5
M_DQ7-0
tIH
Max
G_CK
G_DQ7-0
tIS
Setup time
Min
M_CK
tCKCYC
CS↑↓ -> CK↑
Value
Conditions
M_CS#_1,2
Notes:
−
−
−
This is a target specification.
(A): The value will be targeted by the product series with revision digit A.
(B): The value will be targeted by the product series with revision digit B.
tCSHI
G_CS#_1,2
M_CS#_1,2
G_CK
M_CK
VOH
VOL
tCKCYC
tCSS
VOH
tCSH
tCSS
VOL
tDSV
tDSZ
G_RWDS
M_RWDS
tIS
G_DQ7~0
M_DQ7~0
142
CONFIDENTIAL
CA0
47-40
CA0
3932
CA1
31-24
CA1
23-16
tIH
VIH
CA2
15-8
CA2
7-0
Dn
15-8
Dn
7-0
VIL
S6J3200_DS708-00003-0v04-E, June 30, 2015
8. Electric Characteristics
D a t a S h e e t ( P r e l i m i n a r y )
8.4.16.2 Hyper Bus Write Timing (HyperRAM)
(Condition: See 8.2. Operation Assurance )
Parameter
Symbol
Hyper Bus clock cycle
Pin Name
tCSS
Chip Select setup time
DQ -> CK↑↓
CK↑↓ -> DQ
CK↓ -> CS↑
Chip select hold time
RWDS↓-> CK↓
-
ns
(A)
-
ns
(B)
G_CS#_1,2
tCKCYC - 3.25
-
ns
(A)
M_CS#_1,2
tCKCYC - 2.0
-
ns
(B)
1.25
-
ns
1.25
-
ns
tCKCYC/2
-
ns
1
-
ns
-
6
ns
0
-
ns
G_DQ7-0
CK↑ -> RWDS↑↓
CK↑ -> RWDS(Hi-z)
G_RWDS
M_RWDS
G_RWDS
M_RWDS
G_RWDS
tRIH
Refresh Indicator Hold
IOL=-10mA,
IOH=10mA),
M_CS#_1,2
tRIV
Refresh Indicator Valid
(CL = 20pF,
G_CS#_1,2
tDMV
Data Mask Valid
Remarks
10
M_DQ7-0
tCSH
Unit
12.5
M_DQ7-0
tIH
Hold time
Max
G_CK
G_DQ7-0
tIS
Setup time
Value
Min
M_CK
tCKCYC
CS↑↓ -> CK↑
Conditions
M_RWDS
Notes:
−
−
−
G_CS#_1,2
M_CS#_1,2
G_CK
M_CK
G_RWDS
M_RWDS
This is a target specification.
(A): The value will be targeted by the product series with revision digit A.
(B): The value will be targeted by the product series with revision digit B.
tCSM
tRWR
VIL
tCSS
tCSHI
tPO
VIH
tCKCYC
tCSH
VOH
VOL
tRIV
tDMV
tRIH
tIS
VOH
tIH
VOL
tIS
G_DQ7~0
M_DQ7~0
tIH
VIH
CA0
47-40
CA0
3932
CA1
31-24
CA1
23-16
CA2
15-8
tCSS
CA2
7-0
Dn
15-8
Dn
7-0
VIL
June 30, 2015, S6J3200_DS708-00003-0v04-E
CONFIDENTIAL
143
8. Electric Characteristics
D a t a S h e e t ( P r e l i m i n a r y )
8.4.16.3 Hyper Bus Read Timing (HyperFlash)
(Condition: See 8.2. Operation Assurance )
Parameter
Symbol
Hyper Bus clock cycle
Pin Name
tRDSCYC
CS↑↓ -> CK↑
DQ -> CK↑↓
CK↑↓ -> DQ
CK↓ -> CS↑
RDS↑↓> DQ (valid)
RDS↑↓> DQ (invalid)
ns
-
ns
(B)
G_CS#_1,2
tRDSCYC -3.25
-
ns
(A)
M_CS#_1,2
tRDSCYC -2.0
ns
(B)
G_DQ7-0
M_DQ7-0
G_DQ7-0
M_DQ7-0
G_CS#_1,2
1.25
-
ns
1.25
-
ns
tRDSCYC / 2
-
ns
-0.8
-
ns
-0.8
-
ns
(CL = 20pF,
IOL=-10mA,
IOH=10mA),
M_CS#_1,2
G_DQ7-0
M_DQ7-0
G_DQ7-0
tDSH
Hold time
(A)
-
tDSS
Setup time
Remarks
10
tCSH
Chip select hold time
Unit
12.5
tIH
Hold time
Max
G_CK, G_RWDS
tIS
Setup time
Value
Min
M_CK, M_RWDS
tCSS
Chip Select setup time
Conditions
M_DQ7-0
Notes:
−
−
−
This is a target specification.
(A): The value will be targeted by the product series with revision digit A.
(B): The value will be targeted by the product series with revision digit B.
tCSHI
tACC
G_CS#_1,2
M_CS#_1,2
G_CK
M_CK
VOH
VOL
tCSH
tCSS
VOL
tDSV
tDQLZ
tCKDS
tRDSCYC
G_RWDS
M_RWDS
tIH
CA0
47-40
CA0
3932
CA1
31-24
CONFIDENTIAL
tDSH
VIH
CA1
23-16
CA2
15-8
VIL
144
tDSZ
tOZ
VOH
tIS
G_DQ7~0
M_DQ7~0
tCSS
VOH
CA2
7-0
Dn
15-8
VOH
Dn
7-0
tDSS
Dn+1
15-8
Dn+1
7-0
VOL
S6J3200_DS708-00003-0v04-E, June 30, 2015
8. Electric Characteristics
D a t a S h e e t ( P r e l i m i n a r y )
8.4.16.4 Hyper Bus Read Timing (HyperRAM)
(Condition: See 8.2. Operation Assurance )
Parameter
Symbol
Hyper Bus clock cycle
Pin Name
tRDSCYC
CS↑↓ -> CK↑
DQ -> CK↑↓
CK↑↓ -> DQ
CK↓ -> CS↑
RWDS↑↓> DQ (valid)
RWDS↑↓> DQ (invalid)
ns
-
ns
(B)
G_CS#_1,2
tRDSCYC -3.25
-
ns
(A)
M_CS#_1,2
tRDSCYC -2.0
-
ns
(B)
1.25
-
ns
1.25
-
ns
tRDSCYC /2
-
ns
-0.8
-
ns
-8
-
ns
-
6
ns
0
-
ns
G_DQ7-0
M_DQ7-0
G_DQ7-0
M_DQ7-0
CK↑ -> RWDS↑↓
CK↑ -> RWDS(Hi-z)
IOH=10mA),
G_DQ7-0
M_DQ7-0
G_DQ7-0
M_DQ7-0
G_RWDS
M_RWDS
G_RWDS
tRIH
Refresh Indicator Hold
IOL=-10mA,
M_CS#_1,2
tRIV
Refresh Indicator Valid
(CL = 20pF,
G_CS#_1,2
tDSH
Hold time
(A)
-
tDSS
Setup time
Remarks
10
tCSH
Chip select hold time
Unit
12.5
tIH
Hold time
Max
G_CK, G_RWDS
tIS
Setup time
Value
Min
M_CK, M_RWDS
tCSS
Chip Select setup time
Conditions
M_RWDS
Notes:
−
−
−
G_CS#_1,2
M_CS#_1,2
G_CK
M_CK
This is a target specification.
(A): The value will be targeted by the product series with revision digit A.
(B): The value will be targeted by the product series with revision digit B.
tCSM
tRWR
tCSS
tCSH
VOH
VOL
tRIH
tDQLZ
tCSS
tCKDS
tRDSCYC
tDSZ
tOZ
VOH
G_RWDS
M_RWDS
tIS
tIH
CA0
47-40
VIH
CA0
3932
CA1
31-24
June 30, 2015, S6J3200_DS708-00003-0v04-E
CONFIDENTIAL
VOH
VOL
tRIV
G_DQ7~0
M_DQ7~0
tCSHI
tPO
CA1
23-16
CA2
15-8
CA2
7-0
VIL
tDSH
VOH
Dn
15-8
tDSS
Dn
7-0
Dn+1
15-8
Dn+1
7-0
VOL
145
8. Electric Characteristics
D a t a S h e e t ( P r e l i m i n a r y )
8.4.17
Ethernet AVB
8.4.17.1 Ethernet Receive Timing
(Condition: See 8.2. Operation Assurance )
Parameter
RXCLK cylcle
Symbol
Pin Name
tRXCYC
RXCLK
Value
Conditions
Unit
Min
Max
40.0
-
ns
10.0
-
ns
0
-
ns
Remarks
RXER
RX setup time
tRXS
RXDV
tRXCYC -30ns
-
RXD0-3
RXER
RX hold time
tRXH
RXDV
RXD0-3
Note: This is target spec.
tRXCYC
RXCLK
VIH
VIH
tRXS
RXER
RXDV
RXD0-3
146
CONFIDENTIAL
tRXH
VIH
valid
VIL
S6J3200_DS708-00003-0v04-E, June 30, 2015
8. Electric Characteristics
D a t a S h e e t ( P r e l i m i n a r y )
8.4.17.2 Ethernet Transmit Timing
(Condition: See 8.2. Operation Assurance )
Parameter
Symbol
Pin Name
TXCLK cylcle
tTXCYC
RXCLK
COL/CRS input setup time
tCRXS
COL/CRS input hold time
tCRXH
COL
CRS
COL
IOL=-5mA,
CRS
tTXD
Unit
Min
Max
40.0
-
ns
12.0
-
ns
0.5
-
ns
0.5
25
ns
Remarks
(CL = 20pF,
IOH=5mA),
TXER
Tx delay time
Value
Conditions
TXDV
TXD0-3
Note: This is target spec.
tTXCYC
TXCLK
VIH
VIH
tCRXS
COL
CRS
VIH
tCRXH
VIH
valid
VIL
TXER
TXDV
TXD0-3
June 30, 2015, S6J3200_DS708-00003-0v04-E
CONFIDENTIAL
VIH
tTXD
tTXD
VOH
valid
VOL
147
8. Electric Characteristics
D a t a S h e e t ( P r e l i m i n a r y )
8.4.17.3 MDIO Timing
(Condition: See 8.2. Operation Assurance )
Parameter
MDC cylcle
Symbol
Pin Name
tMDCYC
MDC
MDIO input setup time
tMDIS
MDIO
MDIO input hold time
tMDIH
MDIO
MDIO output delay time
tMDOD
MDIO
Conditions
(CL = 20pF,
IOL=-5mA,
IOH=5mA),
Value
Min
Max
400.0
-
Unit
Remarks
ns
100.0
-
ns
0.0
-
ns
10.0
190.0
ns
Note: This is target spec.
tMDCYC
MDC
VOH
tMDIS
MDIO
(in)
MDIO
(out)
148
CONFIDENTIAL
VOH
VOH
VOH
VOL
tMDIH
VIH
valid
VIL
tMDOD
tMDOD
VOH
valid
VOL
S6J3200_DS708-00003-0v04-E, June 30, 2015
8. Electric Characteristics
D a t a S h e e t ( P r e l i m i n a r y )
8.4.18
MediaLB
8.4.18.1 MediaLB Input Timing
(Condition: See 8.2. Operation Assurance )
Parameter
MLBCLK cylce
MLBSIG, MLBDAT
Input setup
MLBSIG, MLBDAT
Input hold
Symbol
Pin Name
tmckc
MLBCLK
tdsmcf
tdhmcf
Value
Conditions
MLBSIG
MLBDAT
-
MLBSIG
MLBDAT
Unit
Min
Max
40
-
ns
1.0
-
ns
4.0
-
ns
Remarks
Notes:
−
−
This is target spec.
CLK_HAPP1B0(internal) frequency > MLBCLK(external) frequency
tmckc
MLBCLK
VIH
VIH
VIL
tdsmcf tdhmcf
VIH
MLBDAT,
MLBSIG
VIH
valid
VIL
VIL
Input
June 30, 2015, S6J3200_DS708-00003-0v04-E
CONFIDENTIAL
149
8. Electric Characteristics
D a t a S h e e t ( P r e l i m i n a r y )
8.4.18.2 MediaLB Output Timing
(Condition: See 8.2. Operation Assurance )
Parameter
MLBCLK cylce
MLBSIG, MLBDAT
output stop
MLBSIG, MLBDAT
output delay
Symbol
Pin Name
tmckc
MLBCLK
tmcfdz
tdout
Value
Conditions
MLBSIG
(CL = 20pF,
MLBDAT
IOL=-6mA,
MLBSIG
IOH=6mA),
MLBDAT
Unit
Min
Max
40
-
ns
26.5
-
ns
0
13.5
ns
Remarks
tmckc - tdout
Notes:
−
−
This is target spec.
CLK_HAPP1B0(internal) frequency > MLBCLK(external) frequency
tmckc
MLBCLK
VIH
VIH
tdout
MLBDAT,
MLBSIG
150
CONFIDENTIAL
tmcfdz
VOH
VOH
valid
VOL
VOL
S6J3200_DS708-00003-0v04-E, June 30, 2015
8. Electric Characteristics
D a t a S h e e t ( P r e l i m i n a r y )
8.4.19
Port Noise Filter
(Condition: See 8.2. Operation Assurance )
Parameter
Width for input
removal
Symbol
Pin Name
Conditions
-
ALL GPIO
-
Value
Min
Max
-
67
Unit
ns
Remarks
*
*: Input pulse width less than at least Typ 25ns to Max 67ns is removed when Port noise filter is enabled.
*: Input pulse width 100ns or more is recommended to be effective.
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D a t a S h e e t ( P r e l i m i n a r y )
8.5 A/D Converter
8.5.1
Electrical Characteristics
(Condition: See 8.2. Operation Assurance )
Parameter
Symbol
Pin Name
Value
Min
Typ
Max
Unit
Remarks
Resolution
-
-
-
-
12
bit
Total Error
-
-
-
-
±12
LSB
*3
Integral Non linearity
-
-
-
-
±4.0
LSB
*4
Differential Non linearity
-
-
-
-
±1.9
LSB
*4
VZT
AN0 to AN49
Zero transition voltage
AVRL
-11.5LSB
AVRH
-
+12.5LSB
AVRH
V
*5
Full-scale transition voltage
VFST
AN0 to AN49
Sampling time
tSMP
-
0.3
-
-
µs
*1
Compare time
tCMP
-
0.8
-
28
µs
*1
A/D conversion time
tCNV
-
1.1
-
-
µs
*1
-13.5LSB
-
AVRL
+10.5LSB
V
4tCLK_LCP1A ≥
4tCLK_LCP1A
A/D trigger input time
ADTRG
-
-
ns
100ns
4tCLK_LCP1A <
100
Resumption time
-
-
-
1
us
AN0 to AN17
-1.0
-
1.0
µA
-2.0
-
2.0
µA
-3.0
-
3.0
µA
AN18 to
Analog port input current
IAIN
AN25
AN26 to
AN49
Analog input voltage
Reference voltage
AN0 to AN49
AVSS
-
AVRH
V
AVRH
AVRH5
4.5
-
5.5
V
AVRL
AVRL5/AVSS
-
0.0
-
V
-
500
900
µA
-
1.0
100
µA
IAH
IR
IRH
Variation between channels
-
AVCC
AVRH
AN0 to AN49
-
VAVSS≤
− VAIN≤VAVCC
VAIN
IA
Power supply current
100ns
-
-
1.0
2.0
mA
-
-
5.0
µA
-
-
4.0
LSB
AVCC ≥ AVRH
*2
*2
*1: Time per channel
*2: Definition of the power supply current (when VCC=AVCC=5.0 V) while the A/D converter is not
operating and in stop mode
*3: Total Error is a comprehensive static error that includes the linearity after trimming by software.
1LSB=(AVRH-AVRL)/4096
*4: 1LSB=(VFST-VZT)/4094
*5: 1LSB=(AVRH-AVRL)/4096
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8. Electric Characteristics
D a t a S h e e t ( P r e l i m i n a r y )
8.5.2
Notes on A/D Converters
About the Output Impedance of an External Circuit for Analog Input
When the external impedance is too high, the analog voltage sampling time may become insufficient. In this
case, we recommend attaching a capacitor (about 0.1 µF) to an analog input pin.
Analog input circuit model
Comparator
R
Analog input
Sampling ON
R
12-bit A/D
C
C
3.9 kiloohms (max)
11.0 pF (max)
(4.5 V≤AVCC≤5.5 V)
Note: Use the numerical values provided here simply as a guide.
8.5.3
Glossary
Resolution: Analog change that can be identified by an A/D converter
Integral linearity error: Deviation of the straight line connecting the zero transition point ("0000 0000 0000"
<--> "0000 0000 0001") and full-scale transition point ("1111 1111 1110" <--> "1111 1111 1111") from actual
conversion characteristics
includes zero transition error, full-scale transition error, and non linearity error.
Differential linearity error: Deviation from the ideal value of the input voltage required for changing the output
code by 1 LSB
Total error : Difference between the actual value and the theoretical value. The total error
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8. Electric Characteristics
D a t a S h e e t ( P r e l i m i n a r y )
Total error
FFF
Actual
con
FFE
Digital output
FFD
1.5LSB
{1 LSB (N - 1) + 0.5LSB}
VNT
(Actually-measured
value)
004
003
Actual conversion
characteristics
002
Ideal characteristics
001
0.5LSB
AVRL
(AVSS)
Analog input
Total error of digital output N =
1LSB(Ideal value) =
AVRH
VNT- {1 LSB × (N-1) + 0.5LSB}
1LSB
AVRH - AVRL
4096
[LSB]
[V]
N: A/D converter digital output value.
VZT(Ideal value) = AVRL + 0.5LSB[V]
VFST(Ideal value) = AVRH - 1.5LSB[V]
VNT: Voltage at which the digital output changes from "(N – 1)" to "N".
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8. Electric Characteristics
D a t a S h e e t ( P r e l i m i n a r y )
Integral linearity error
Differential linearity error
Ideal characteristics
FFE
Actual conversion
characteristics
FFD
{1 LSB (N - 1) + VZT}
004
003
002
N+1
VFST
Digital output
Digital output
FFF
VNT
(measured value)
Actual conversion
characteristics
Ideal characteristics
Actual conversion
characteristics
N
N-1
N-2
001
VZT (measured value)
AVSS
(AVRL)
Analog input
Integral linearity error of digital output N =
Differential linearity error of digital output N =
1LSB =
AVRH
AVSS
(AVRL)
VNT- {1 LSB × (N-1) + VZT}
1LSB
V(N+1) T- VNT
1LSB
VFST - VZT
V(N+1)T
(measured
VNT
value)
(measured value)
Actual conversion
characteristics
Analog input
AVRH
[LSB]
-1 LSB [LSB]
[V]
4094
VZT: Voltage for which digital output changes from "0x000" to "0x001"
VFST: Voltage for which digital output changes from "0xFFE" to "0xFFF".
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8. Electric Characteristics
D a t a S h e e t ( P r e l i m i n a r y )
8.6 Audio DAC
8.6.1
Electrical Characteristics
(Condition: See 8.2. Operation Assurance )
Pin
Conditions *1
Parameter
Symbol
system clock frequency
FCLKDA0
-
-
fs
-
-
sampling clock
Analog output load
RL
resistance *2
Analog output load
capacitance
CL
*2
capacitance
-
Name
DAC_L
DAC_R
C_L
C_R
Analog output
single-end output range
-
(±full scale)
Max
2.048
-
18.432
MHz
8
-
48
kHz
-
20
-
-
kΩ
-
-
-
100
pF
-
5
10
20
µF
-
VP-P
-
V
RL=20kΩ
Min
-
DAC_R
Analog output voltage
-
(zero)
-
THD+N *3
-
-
SNR *3
-
-
Unit
Typ
CL=100pF
DAC_L
Value
signal frequency: 1kHz
LPF(fc: 20kHz)
signal frequency: 1kHz
LPF(fc: 20kHz)—
-
0.673
AVCC3_DAC
0.5
AVCC3_DAC
-
-82
-72
dB
85
89
-
dB
83
86
-
dB
Dynamic range *3
-
-
Out-of-Band Energy
-
-
20kHz to 64fs
-
-
-33
dB
Channel Separation
-
-
-
-
80
-
dB
Output impedance
-
-
-
150
200
250
Ω
PSRR
-
-
— A-weighting filter
digital
noise 50Hz
-
-35
-
dB
input:
noise 1kHz
-
-50
-
dB
zero
noise 20kHz
-
-40
-
dB
-
-13
-
dB
-
-
2.2
3.2
mA
-
-
-
100
µA
DAE↑
-
650 *5
-
ms
digital input :full scale
sine
Supply current
-
normal operation
Supply current
-
power-down
Startup Time *4
-
AVCC3_
DAC
AVCC3_
DAC
-
Remarks
Notes:
−
−
−
−
−
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*1: All parameters specified fs=44.1 kHz, system clock 256fs and 16-bit data, RL-20kΩ, CL=100pF,
unless otherwise noted.
*2: Refer to bellow note on RL load connection.
*3: These values do not include the noise caused by the analog power supply. (Refer to 7. Use
examples)
*4: 10µF is connected to C_L, C_R.
*5: Startup time (Figure 8-8)
S6J3200_DS708-00003-0v04-E, June 30, 2015
8. Electric Characteristics
D a t a S h e e t ( P r e l i m i n a r y )
Figure 8-8: Startup Time
10mV
Last Volgate
DAC_L/DAC_R
DAE
Startup Time
Time [sec]
Startup time can be calculated as follows.
1. Startup time (TYP) = 650[ms] (Table 5.2)
2. CCOM=10uF×(1±α/100)
CCOM is a capacitor connected to Termial C_L/C_R including capacitance variance.
α=Capacitance variance[%]
3. Startup time = Start up time(TYP)×(1±α) [ms]
For example, CCOM=11µF then α=(11µF-10µF)/10µF=10[%]
So, Startup time = 650ms×（1+10/100） = 715[ms]
Notes:
−
−
Two usages of RL load connection.
Case1: RL is connected to AVCC3_DAC /2 (Figure 8-9)
Case2: The coupling capacitance must be inserted as shown in (Figure 8-10).
Figure 8-9: RL is Connected to AVCC_DAC/2 (Example)
DAC_L/DAC_R
RL : min 20kΩ
AVCC3_DAC/2
CL : max 100pF
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8. Electric Characteristics
D a t a S h e e t ( P r e l i m i n a r y )
Figure 8-10: Coupling Capacitance (Example)
Low Noise Regulator
AVCC3_DAC
C1
C2
AVSS
AVSS
AVSS
C3
C_R
DAC_R
C_L
DAC_L
C4
Post LPF/ Buffer
C5
C6
Post LPF/ Buffer
Notes:
−
−
−
−
C1: more than 10μF low ESR capacitors
C2: 0.1μF ceramic capacitors
C3, C4, C5, C6: 10μF low ESR capacitors
Impedance of each power line must be as low as possible.
Notes:
When DAC is not used in your system, the related pins should be
−
−
−
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AVCC3_DAC=GND and AVSS=GND
C_L=OPEN and C_R=OPEN
DAC_L=OPEN and DAC_R=OPEN
S6J3200_DS708-00003-0v04-E, June 30, 2015
8. Electric Characteristics
D a t a S h e e t ( P r e l i m i n a r y )
8.7 Flash Memory
8.7.1
Electrical Characteristics
Value
Parameter
Min
Typ
Max*3
-
300
1100
Unit
ms
Sector erase time
Remarks
8kB sector*1
Internal preprogramming time included
64kB sector*1
-
800
3700
ms
8bit write time
-
15
288
µs
System-level overhead time excluded*1
16bit write time
-
19
384
µs
System-level overhead time excluded*1
32bit write time
-
27
567
µs
System-level overhead time excluded*1
64bit write time
-
45
945
µs
System-level overhead time excluded*1
8bit (with ECC) write time
-
19
384
µs
System-level overhead time excluded*1
16bit (with ECC) write time
-
23
483
µs
System-level overhead time excluded*1
32bit (with ECC) write time
-
31
651
µs
System-level overhead time excluded*1
64bit (with ECC) write time
-
49
1029
µs
System-level overhead time excluded*1
-
-
-
1,000/20 years
Erase count*2 /
10,000/10 years
Data retention time*3
100,000/5 years
Internal preprogramming time included
Temperature at write/erase time
Average temperature TA=+85 degrees Celsius
Notes:
−
−
−
8.7.2
*1: Guaranteed value for up to 100,000 erases
*2: Number of erases for each sector
*3: Target Value
Notes
While the Flash memory is written or erased, shutdown of the external power (VCC5) is prohibited.
In the application system where VCC5 might be shut down while writing or erasing, be sure to turn the
power off by using an external voltage detection function.
To put it concretely, after the external power supply voltage falls below the detection voltage (VDL), hold VCC5
at 2.7V or more within the duration calculated by the following expression:
*1
*2
Td [μs] + ( 1 / FCRF [MHz] ) x 1029 + 25 [μs]
*1 : See "8.4.10 Low-Voltage Detection"
*2 : See "8.4.1 Source Clock "
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9. Ordering Information
D a t a S h e e t ( P r e l i m i n a r y )
9. Ordering Information
Table 1-9-1: Order Part Number Table
Part Number
S6J326CKSFEE20000
S6J326CLSFEE20000
S6J328CKSFEE20000
S6J328CLSFEE20000
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Package
LET208
(208-pin plastic TEQFP)
LEQ216
(216-pin plastic TEQFP)
LET208
(208-pin plastic TEQFP)
LEQ216
(216-pin plastic TEQFP)
S6J3200_DS708-00003-0v04-E, June 30, 2015
ver 1.2
10. Major Changes
D a t a S h e e t ( P r e l i m i n a r y )
10. Major Changes
Page
Section
Change Results
Revision 0.1
-
-
Initial release
Revision 0.2
-
-
See Supplementary Information as described in "CHAPTER 1:Overview 2.
Document Definition”
Revision 0.3
-
-
See Supplementary Information as described in "CHAPTER 1:Overview 2.
Document Definition”
Revision 0.4
-
-
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Document Definition”
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D a t a S h e e t ( P r e l i m i n a r y )
Colophon
The products described in this document are designed, developed and manufactured as contemplated for general use,
including without limitation, ordinary industrial use, general office use, personal use, and household use, but are not
designed, developed and manufactured as contemplated (1) for any use that includes fatal risks or dangers that, unless
extremely high safety is secured, could have a serious effect to the public, and could lead directly to death, personal injury,
severe physical damage or other loss (i.e., nuclear reaction control in nuclear facility, aircraft flight control, air traffic control,
mass transport control, medical life support system, missile launch control in weapon system), or (2) for any use where
chance of failure is intolerable (i.e., submersible repeater and artificial satellite). Please note that Cypress will not be liable to
you and/or any third party for any claims or damages arising in connection with above-mentioned uses of the products. Any
semiconductor devices have an inherent chance of failure. You must protect against injury, damage or loss from such failures
by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention
of over-current levels and other abnormal operating conditions. If any products described in this document represent goods
or technologies subject to certain restrictions on export under the Foreign Exchange and Foreign Trade Law of Japan, the
US Export Administration Regulations or the applicable laws of any other country, the prior authorization by the respective
government entity will be required for export of those products.
Trademarks and Notice
The contents of this document are subject to change without notice. This document may contain information on a Cypress
product under development by Cypress. Cypress reserves the right to change or discontinue work on any product without
notice. The information in this document is provided as is without warranty or guarantee of any kind as to its accuracy,
completeness, operability, fitness for particular purpose, merchantability, non-infringement of third-party rights, or any other
warranty, express, implied, or statutory. Cypress assumes no liability for any damages of any kind arising out of the use of
the information in this document.
®
Copyright © 2014-2015 Cypress Semiconductor Corp.
All rights reserved. Cypress, Cypress logo, Spansion , the
®
®
TM
TM
TM
TM
Spansion logo, MirrorBit , MirrorBit Eclipse , ORNAND , Traveo , HyperBus and combinations thereof, are
trademarks and registered trademarks of Cypress Semiconductor Corp. in the United States and other countries. Other
names used are for informational purposes only and may be trademarks of their respective owners.
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ver 1.2