MB91460C Series

The following document contains information on Cypress products.
FUJITSU SEMICONDUCTOR
DATA SHEET
DS07-16610-2E
32-bit Microcontroller
CMOS
FR60 MB91460C Series
MB91F463CA*1, F465CA, F467CA, F467CB
■ DESCRIPTION
MB91460C series is a line of general-purpose 32-bit RISC microcontrollers designed for embedded control
applications which require high-speed real-time processing, such as consumer devices and on-board vehicle
systems. This series uses the FR60 CPU, which is compatible with the FR family*2 of CPUs.
This series contains the LIN-USART and CAN controllers.
■ FEATURES
1. FR60 CPU core
•
•
•
•
•
•
•
•
•
•
32-bit RISC, load/store architecture, five-stage pipeline
16-bit fixed-length instructions (basic instructions)
Instruction execution speed: 1 instruction per cycle
Instructions including memory-to-memory transfer, bit manipulation, and barrel shift instructions: Instructions
suitable for embedded applications
Function entry/exit instructions and register data multi-load store instructions : Instructions supporting C
language
Register interlock function: Facilitating assembly-language coding
Built-in multiplier with instruction-level support
Signed 32-bit multiplication : 5 cycles
Signed 16-bit multiplication : 3 cycles
Interrupts (save PC/PS) : 6 cycles (16 priority levels)
Harvard architecture enabling program access and data access to be performed simultaneously
Instructions compatible with the FR family*2
For the information for microcontroller supports, see the following web site.
This web site includes the "Customer Design Review Supplement" which provides the latest cautions on
system development and the minimal requirements to be checked to prevent problems before the system
development.
http://edevice.fujitsu.com/micom/en-support/
Copyright©2009-2010 FUJITSU SEMICONDUCTOR LIMITED All rights reserved
2010.4
MB91460C Series
2. Internal peripheral resources
• General-purpose ports : Maximum 104 ports
• DMAC (DMA Controller)
Maximum of 5 channels able to operate simultaneously.
2 transfer sources (internal peripheral/software)
Activation source can be selected using software
Addressing mode specifies full 32-bit addresses (increment/decrement/fixed)
Transfer mode (demand transfer/burst transfer/step transfer/block transfer)
Transfer data size selectable from 8/16/32-bit
Multi-byte transfer enabled (by software)
DMAC descriptor in I/O areas (200H to 240H, 1000H to 1024H)
• A/D converter (successive approximation type)
10-bit resolution: 30 channels
Conversion time: minimum 1 μs
• External interrupt inputs : 15 channels
8 channels shared with CAN RX or I2C pins
• Bit search module (for REALOS)
Function to search the first bit position of ‘’1’’, ‘’0’’, ‘’changed’’ from the MSB (most significant bit) within one word
• LIN-USART (full duplex double buffer): 5 channels
Clock synchronous/asynchronous selectable
Sync-break detection
Internal dedicated baud rate generator
• I2C bus interface (supports 400 kbps): 3 channels
Master/slave transmission and reception
Arbitration function, clock synchronization function
• CAN controller (C-CAN): 3 channels
Maximum transfer speed: 1 Mbps
32 transmission/reception message buffers
• Stepper motor controller : 6 channels
4 high current output to each channel
2 synchronized PWMs per channel (8/10-bit)
• Sound generator : 1 channel
Tone frequency : PWM frequency divide-by-two (reload value + 1)
• Alarm comparator : 1 channel
Monitor external voltage
Generate an interrupt in case of voltage lower/higher than the defined thresholds (reference voltage)
• 16-bit PPG timer : 12 channels
• 16-bit PFM timer : 1 channel
• 16-bit reload timer: 8 channels
• 16-bit free-run timer: 8 channels (1 channel each for ICU and OCU)
• Input capture: 8 channels (operates in conjunction with the free-run timer)
• Output compare: 4 channels (operates in conjunction with the free-run timer)
• Up/Down counter: 3 channels (3*8-bit or 2*16-bit)
• Watchdog timer
• Real-time clock
• Low-power consumption modes : Sleep/stop mode function
• Low voltage detection circuit
(Continued)
2
DS07-16610-2E
MB91460C Series
(Continued)
• Clock supervisor
Monitors the sub-clock (32 kHz) and the main clock (4 MHz) , and switches to a recovery clock (CR oscillator,
etc.) when the oscillations stop.
• Clock modulator
• Clock monitor
• Sub-clock calibration
Corrects the real-time clock timer when operating with the 32 kHz or CR oscillator
• Main oscillator stabilization timer
Generates an interrupt in sub-clock mode after the stabilization wait time has elapsed on the 23-bit stabilization
wait time counter
• Sub-oscillator stabilization timer
Generates an interrupt in main clock mode after the stabilization wait time has elapsed on the 15-bit stabilization
wait time counter
3. Package and technology
•
•
•
•
Package : QFP-144
CMOS 180 nm technology
Power supply range 3 V to 5 V (1.8 V internal logic provided by a step-down voltage converter)
Operating temperature range: between - 40°C and + 105°C
Note: *1 : These devices are under development.
*2 : FR, the abbreviation of FUJITSU RISC controller, is a line of products of Fujitsu Semiconductor Limited.
DS07-16610-2E
3
MB91460C Series
■ PRODUCT LINEUP
MB91V460
MB91F463CA
MB91F465CA
MB91F467CA
MB91F467CB
Max. core frequency (CLKB)
80 MHz
100 MHz
100 MHz
100 MHz
Max. resource frequency (CLKP)
40 MHz
50 MHz
50 MHz
50 MHz
Max. external bus frequency (CLKT)
40 MHz
-
-
-
Max. CAN frequency (CLKCAN)
20 MHz
50 MHz
50 MHz
50 MHz
Max. FlexRay frequency (SCLK)
-
-
-
-
0.35μm
0.18μm
0.18μm
0.18μm
yes
yes
yes
yes
yes (disengageable)
yes
yes
yes
yes
yes
yes
yes
Reset input (INITX)
yes
yes
yes
yes
Hardware standby input (HSTX)
yes
no
no
no
Clock Modulator
yes
yes
yes
yes
Clock Monitor
yes
yes
yes
yes
Feature
Technology
Watchdog timer
Watchdog timer (RC osc. based)
Bit Search
Low Power Mode
yes
yes
yes
yes
DMA
5 ch
5 ch
5 ch
5 ch
MPU (16 ch)*1
MPU (4 ch)*1
MPU (8 ch)*1
MPU (8 ch)*1
Emulation SRAM 32bit
read data
288 KByte
544 KByte
1088 KByte
Satellite Flash memory
-
-
-
-
Flash Protection
-
yes
yes
yes
D-RAM
64 KByte
16 KByte
16 KByte
32 KByte
ID-RAM
64 KByte
8 KByte
16 KByte
32 KByte
MMU/MPU
Flash memory
Flash-Cache (Instruction cache)
16 KByte
4 KByte
8 KByte
8 KByte
4 KByte fixed
4 KByte
4 KByte
4 KByte
RTC
1 ch
1 ch
1 ch
1 ch
Free Running Timer
8 ch
8 ch
8 ch
8 ch
ICU
8 ch
8 ch
8 ch
8 ch
Boot-ROM / BI-ROM
OCU
8 ch
4 ch
4 ch
4 ch
Reload Timer
8 ch
8 ch
8 ch
8 ch
PPG 16-bit
16 ch
12 ch
12 ch
12 ch
PFM 16-bit
1 ch
1 ch
1 ch
1 ch
Sound Generator
Up/Down Counter (8/16 bit)
C_CAN
LIN-USART
I2C (400K)
FR external bus
4
1 ch
1 ch
1 ch
1 ch
4 ch (8-bit) / 2 ch (16-bit)
3 ch (8-bit) / 2ch (16-bit)
3 ch (8-bit) / 2ch (16-bit)
3 ch (8-bit) / 2ch (16-bit)
6 ch
(128msg)
3 ch
(32msg)
3 ch
(32msg)
3 ch
(32msg)
4 ch + 4 ch FIFO + 8 ch
1 ch + 4 ch FIFO
1 ch + 4 ch FIFO
1 ch + 4 ch FIFO
4 ch
3 ch
3 ch
3 ch
yes (32bit addr, 32bit data)
-
-
-
DS07-16610-2E
MB91460C Series
Feature
MB91V460
MB91F463CA
MB91F465CA
MB91F467CA
MB91F467CB
External Interrupts
16 ch
15 ch
15 ch
15 ch
NMI Interrupts
1 ch
1 ch
1 ch
1 ch
SMC
6 ch
6 ch
6 ch
6 ch
LCD controller (40x4)
1 ch
-
-
-
ADC (10-bit)
32 ch
30 ch
30 ch
30 ch
Alarm Comparator
2 ch
1 ch
1 ch
1 ch
Supply Supervisor (low voltage detection)
yes
yes
yes
yes
Clock Supervisor
yes
yes
yes
yes
Main clock oscillator
4 MHz
4 MHz
4 MHz
4 MHz
Sub clock oscillator
32kHz
32kHz
32kHz
32kHz
RC oscillator
100kHz
100kHz / 2MHz
100kHz / 2MHz
100kHz / 2MHz
PLL
x 20
x 25
x 25
x 25
DSU4
yes
EDSU
Supply voltage
Regulator
Power consumption
yes (32 BP)
no
*1
yes (8 BP)
no
*1
no
*1
yes (16 BP)
yes (16 BP)*1
3V/5V
3V/5V
3V/5V
3V/5V
yes
yes
yes
yes
n.a.
<1W
<1W
<1W
Temperature Range (Ta)
0..70 C
-40..105 C
-40..105 C
-40..105 C
Package
BGA660
QFP-144
QFP-144
QFP-144
Power on to PLL run
< 20 ms
< 20 ms
< 20 ms
< 20 ms
Flash Download Time
n.a.
< 5 sec. typical
< 5 sec. typical
< 6 sec typical
*1: MPU channels use EDSU breakpoint registers (shared operation between MPU and EDSU).
DS07-16610-2E
5
VSS5
P20_0/SIN2/AIN0
P20_1/SOT2/BIN0
P20_2/SCK2/ZIN0/CK2
P19_0/SIN4
P19_1/SOT4
P19_2/SCK4/CK4
P19_4/SIN5
P19_5/SOT5
P19_6/SCK5/CK5
P18_0/SIN6/AIN2
P18_1/SOT6/BIN2
P18_2/SCK6/ZIN2/CK6
P18_4/SIN7/AIN3
P18_5/SOT7/BIN3
P18_6/SCK7/ZIN3/CK7
P23_6/INT11
VDD5
VSS5
P24_0/INT0
P24_1/INT1
P24_2/INT2
P24_3/INT3
P24_4/INT4/SDA2
P24_5/INT5/SCL2
P24_6/INT6/SDA3
P24_7/INT7/SCL3
P23_0/RX0/INT8
P23_1/TX0
P23_2/RX1/INT9
P23_3/TX1
P23_4/RX2/INT10
P23_5/TX2
P22_4/SDA0/INT14
P22_5/SCL0
VDD5
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
144
143
142
141
140
139
138
137
136
135
134
133
132
131
130
129
128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
VDD5
P22_2/INT13
P22_0/INT12
P25_7/SMC2M5
P25_6/SMC2P5
P25_5/SMC1M5
P25_4/SMC1P5
HVSS5
HVDD5
P25_3/SMC2M4
P25_2/SMC2P4
P25_1/SMC1M4
P25_0/SMC1P4
P26_7/SMC2M3/AN31
P26_6/SMC2P3/AN30
P26_5/SMC1M3/AN29
P26_4/SMC1P3/AN28
HVSS5
HVDD5
P26_3/SMC2M2/AN27
P26_2/SMC2P2/AN26
P26_1/SMC1M2/AN25
P26_0/SMC1P2/AN24
P27_7/SMC2M1/AN23
P27_6/SMC2P1/AN22
P27_5/SMC1M1/AN21
P27_4/SMC1P1/AN20
HVSS5
HVDD5
P27_3/SMC2M0/AN19
P27_2/SMC2P0/AN18
P27_1/SMC1M0/AN17
P27_0/SMC1P0/AN16
P28_5/AN13
P28_4/AN12
VSS5
MB91460C Series
■ PIN ASSIGNMENT
1. MB91F463CA, MB91F465CA, MB91F467Cx
(TOP VIEW)
VSS5
P02_0
P02_1
P02_2
P02_3
P02_4
P02_5
P02_6
P02_7
P14_0/ICU0/TIN0/TTG8/0
P14_1/ICU1/TIN1/TTG9/1
P14_2/ICU2/TIN2/TTG10/2
P14_3/ICU3/TIN3/TTG11/3
P14_4/ICU4/TIN4/TTG12/4
P14_5/ICU5/TIN5/TTG13/5
P14_6/ICU6/TIN6/TTG14/6
P14_7/ICU7/TIN7/TTG15/7
VDD5
VSS5
P15_0/OCU0/TOT0
P15_1/OCU1/TOT1
P15_2/OCU2/TOT2
P15_3/OCU3/TOT3
P17_4/PPG4
P17_5/PPG5
P17_6/PPG6
P17_7/PPG7
P16_0/PPG8
P16_1/PPG9
P16_2/PPG10
P16_3/PPG11
P16_4/PPG12/SGA
P16_5/PPG13/SGO
P16_6/PPG14/PFM
P16_7/PPG15/ATGX
VDD5
6
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
QFP-144
108
107
106
105
104
103
102
101
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
73
VDD5
AVCC5
AVRH5
AVSS
ALARM_0
P28_3/AN11
P28_2/AN10
P28_1/AN9
P28_0/AN8
P29_7/AN7
P29_6/AN6
P29_5/AN5
P29_4/AN4
P29_3/AN3
P29_2/AN2
P29_1/AN1
P29_0/AN0
VSS5
VDD5
VDD5R
VDD5R
VCC18C
VSS5
NMIX
INITX
X1A
X0A
VSS5
X0
X1
MD_3
MONCLK
MD_2
MD_1
MD_0
VSS5
DS07-16610-2E
MB91460C Series
■ PIN DESCRIPTION
1. MB91F463CA, MB91F465CA, MB91F467Cx
Pin no.
Pin name
I/O
I/O circuit
type*
2 to 9
P02_0 to P02_7
I/O
A
P14_0 to P14_7
ICU0 to ICU7
10 to 17
TIN0 to TIN7
I/O
A
28 to 31
P17_4 to P17_7
PPG4 to PPG7
P16_0 to P16_3
PPG8 to PPG11
I/O
A
33
34
PPG12
I/O
A
I/O
A
I/O
A
Output pins of PPG timer
General-purpose input/output ports
PPG13
I/O
A
Output pins of PPG timer
SGO
SGO output pin of sound generator
P16_6
General-purpose input/output ports
PPG14
I/O
A
PPG15
Output pins of PPG timer
Pulse frequency modulator output pin
General-purpose input/output ports
I/O
A
Output pins of PPG timer
ATGX
A/D converter external trigger input pin
P20_0
General-purpose input/output ports
SIN2
I/O
A
SOT2
General-purpose input/output ports
I/O
A
ZIN0
CK2
Data output pin of USART2
Up/down counter input pin
P20_2
SCK2
Data input pin of USART2
Up/down counter input pin
BIN0
DS07-16610-2E
Output pins of PPG timer
P16_5
P20_1
40
General-purpose input/output ports
SGA output pin of sound generator
AIN0
39
Output pins of PPG timer
SGA
P16_7
38
General-purpose input/output ports
General-purpose input/output ports
PFM
35
Output compare output pins
Reload timer output pins
P16_4
32
External trigger input pins of reload timer
General-purpose input/output ports
TOT0 to TOT3
24 to 27
Input capture input pins
External trigger input pins of PPG timer
P15_0 to P15_3
OCU0 to OCU3
General-purpose input/output ports
General-purpose input/output ports
TTG8/0 to TTG15/7
20 to 23
Function
General-purpose input/output ports
I/O
A
Clock input/output pin of USART2
Up/down counter input pin
External clock input pin of free-run timer 2
7
MB91460C Series
Pin no.
41
42
Pin name
P19_0
SIN4
P19_1
SOT4
I/O
I/O circuit
type*
I/O
A
I/O
A
P19_2
43
SCK4
45
P19_4
SIN5
P19_5
SOT5
I/O
A
SCK5
I/O
A
I/O
A
I/O
A
I/O
A
I/O
A
ZIN2
I/O
A
I/O
A
I/O
A
ZIN3
8
P23_6
INT11
Data input pin of USART7
Data output pin of USART7
General-purpose input/output ports
I/O
A
CK7
53
Up/down counter input pin
Up/down counter input pin
P18_6
SCK7
Clock input/output pin of USART6
General-purpose input/output ports
BIN3
52
Data output pin of USART6
Up/down counter input pin
P18_5
SOT7
Data input pin of USART6
General-purpose input/output ports
AIN3
51
Clock input/output pin of USART5
External clock input pin of free-run timer 6
P18_4
SIN7
Data output pin of USART5
General-purpose input/output ports
CK6
50
General-purpose input/output ports
Up/down counter input pin
P18_2
SCK6
Data input pin of USART5
General-purpose input/output ports
BIN2
49
General-purpose input/output ports
Up/down counter input pin
P18_1
SOT6
Clock input/output pin of USART4
General-purpose input/output ports
AIN2
48
Data output pin of USART4
External clock input pin of free-run timer 5
P18_0
SIN6
General-purpose input/output ports
General-purpose input/output ports
CK5
47
Data input pin of USART4
External clock input pin of free-run timer 4
P19_6
46
General-purpose input/output ports
General-purpose input/output ports
CK4
44
Function
Clock input/output pin of USART7
Up/down counter input pin
External clock input pin of free-run timer 7
I/O
A
General-purpose input/output ports
External Interrupt input (CAN wakeup)
DS07-16610-2E
MB91460C Series
Pin no.
56 to 59
Pin name
P24_0 to P24_3
INT0 to INT3
I/O
I/O circuit
type*
I/O
A
P24_4
60
INT4
61
General-purpose input/output ports
I/O
A
General-purpose input/output ports
I/O
A
I2C bus clock input/output pin (open drain)
P24_6
General-purpose input/output ports
I/O
A
I2C bus DATA input/output pin (open drain)
P24_7
General-purpose input/output ports
I/O
A
I2C bus clock input/output pin (open drain)
P23_0
General-purpose input/output ports
TX0
I/O
A
RX1
I/O
A
TX1
I/O
A
I/O
A
P23_5
TX2
I/O
A
SDA0
I/O
A
P22_5
SCL0
TX output pin of CAN1
RX input/output pin of CAN2
General-purpose input/output ports
TX output pin of CAN2
General-purpose input/output ports
I/O
A
I2C bus DATA input/output pin (open drain)
External Interrupt input (I2C wakeup)
INT14
71
General-purpose input/output ports
External Interrupt input (CAN wakeup)
P22_4
70
RX input/output pin of CAN1
General-purpose input/output ports
INT10
69
TX output pin of CAN0
External Interrupt input (CAN wakeup)
P23_4
RX2
General-purpose input/output ports
General-purpose input/output ports
INT9
P23_3
RX input/output pin of CAN0
External Interrupt input (CAN wakeup)
P23_2
68
External Interrupt input
SCL3
P23_1
67
External Interrupt input
SDA3
INT8
66
External Interrupt input
SCL2
RX0
65
External Interrupt input
P24_5
INT7
64
External Interrupt input
I2C bus DATA input/output pin (open drain)
INT6
63
General-purpose input/output ports
SDA2
INT5
62
Function
I/O
A
General-purpose input/output ports
I2C bus clock input/output pin (open drain)
74 to 76
MD_0 to MD_2
I
G
Mode setting pins
77
MONCLK
O
G
Clock monitor pin
DS07-16610-2E
9
MB91460C Series
Pin no.
Pin name
I/O
I/O circuit
type*
78
MD_3
I
G
To be connected to VSS
79
X1
—
J1
Clock (oscillation) output
80
X0
—
J1
Clock (oscillation) output
82
X0A
—
J2
Sub clock (oscillation) output
83
X1A
—
J2
Sub clock (oscillation) output
84
INITX
I
H
External reset input pin
85
NMIX
I
H
Non-Maskable Interrupt input
I/O
B
I/O
B
I
I
I/O
B
92 to 99
100 to 103
104
110, 111
P29_0 to P29_7
AN0 to AN7
P28_0 to P28_3
AN8 to AN11
ALARM_0
P28_4, P28_5
AN12 to AN13
P27_0
112
113
114
115
118
119
120
SMC1P0
General-purpose input/output ports
Analog input pins of A/D converter
General-purpose input/output ports
Analog input pins of A/D converter
Alarm comparator input pin
General-purpose input/output ports
Analog input pins of A/D converter
General-purpose input/output ports
I/O
F
Controller output pin of Stepper motor
AN16
Analog input pins of A/D converter
P27_1
General-purpose input/output ports
SMC1M0
I/O
F
Controller output pin of Stepper motor
AN17
Analog input pins of A/D converter
P27_2
General-purpose input/output ports
SMC2P0
I/O
F
Controller output pin of Stepper motor
AN18
Analog input pins of A/D converter
P27_3
General-purpose input/output ports
SMC2M0
I/O
F
Controller output pin of Stepper motor
AN19
Analog input pins of A/D converter
P27_4
General-purpose input/output ports
SMC1P1
I/O
F
Controller output pin of Stepper motor
AN20
Analog input pins of A/D converter
P27_5
General-purpose input/output ports
SMC1M1
I/O
F
Controller output pin of Stepper motor
AN21
Analog input pins of A/D converter
P27_6
General-purpose input/output ports
SMC2P1
AN22
10
Function
I/O
F
Controller output pin of Stepper motor
Analog input pins of A/D converter
DS07-16610-2E
MB91460C Series
Pin no.
Pin name
I/O
I/O circuit
type*
P27_7
121
122
123
124
125
128
129
130
131
SMC2M1
General-purpose input/output ports
I/O
F
133
134
135
DS07-16610-2E
Controller output pin of Stepper motor
AN23
Analog input pins of A/D converter
P26_0
General-purpose input/output ports
SMC1P2
I/O
F
Controller output pin of Stepper motor
AN24
Analog input pins of A/D converter
P26_1
General-purpose input/output ports
SMC1M2
I/O
F
Controller output pin of Stepper motor
AN25
Analog input pins of A/D converter
P26_2
General-purpose input/output ports
SMC2P2
I/O
F
Controller output pin of Stepper motor
AN26
Analog input pins of A/D converter
P26_3
General-purpose input/output ports
SMC2M2
I/O
F
Controller output pin of Stepper motor
AN27
Analog input pins of A/D converter
P26_4
General-purpose input/output ports
SMC1P3
I/O
F
Controller output pin of Stepper motor
AN28
Analog input pins of A/D converter
P26_5
General-purpose input/output ports
SMC1M3
I/O
F
Controller output pin of Stepper motor
AN29
Analog input pins of A/D converter
P26_6
General-purpose input/output ports
SMC2P3
I/O
F
Controller output pin of Stepper motor
AN30
Analog input pins of A/D converter
P26_7
General-purpose input/output ports
SMC2M3
I/O
F
AN31
132
Function
P25_0
SMC1P4
P25_1
SMC1M4
P25_2
SMC2P4
P25_3
SMC2M4
Controller output pin of Stepper motor
Analog input pins of A/D converter
I/O
E
I/O
E
I/O
E
I/O
E
General-purpose input/output ports
Controller output pin of Stepper motor
General-purpose input/output ports
Controller output pin of Stepper motor
General-purpose input/output ports
Controller output pin of Stepper motor
General-purpose input/output ports
Controller output pin of Stepper motor
11
MB91460C Series
Pin no.
138
139
140
141
142
143
Pin name
P25_4
SMC1P5
P25_5
SMC1M5
P25_6
SMC2P5
P25_7
SMC2M5
P22_0
INT12
P22_2
INT13
I/O
I/O circuit
type*
I/O
E
I/O
E
I/O
E
I/O
E
I/O
A
I/O
A
Function
General-purpose input/output ports
Controller output pin of Stepper motor
General-purpose input/output ports
Controller output pin of Stepper motor
General-purpose input/output ports
Controller output pin of Stepper motor
General-purpose input/output ports
Controller output pin of Stepper motor
General-purpose input/output ports
External Interrupt input (I2C wakeup)
General-purpose input/output ports
External Interrupt input (I2C wakeup)
* : For information about the I/O circuit type, refer to “■ I/O CIRCUIT TYPES”.
12
DS07-16610-2E
MB91460C Series
[Power supply/Ground pins]
Pin no.
Pin name
I/O
Function
1, 19, 37, 55, 73, 81, 86,
91, 109
VSS5
117, 127, 137
HVSS5
18, 36, 54, 72, 90, 108,
144
VDD5
116, 126, 136
HVDD5
88, 89
VDD5R
Power supply pins for internal regulator
105
AVSS5
Analog ground pin for A/D converter
107
AVCC5
Power supply pin for A/D converter
106
AVRH5
Reference power supply pin for A/D converter
87
VCC18C
Capacitor connection pin for internal regulator
DS07-16610-2E
Ground pins
Ground pins for Stepper motor controller
Power supply pins
Supply
Power supply pins for Stepper motor controller
13
MB91460C Series
■ I/O CIRCUIT TYPES
Type
Circuit
A
Remarks
pull-up control
driver strength
control
data line
CMOS level output
(programmable IOL = 5mA, IOH = -5mA
and IOL = 2mA, IOH = -2mA)
2 different CMOS hysteresis inputs with input
shutdown function
Automotive input with input shutdown function
TTL input with input shutdown function
Programmable pull-up resistor: 50kΩ approx.
pull- down control
R
CMOS hysteresis type1
CMOS hysteresis type2
Automotive inputs
TTL input
standby control for
input shutdown
B
pull-up control
driver strength
control
data line
CMOS level output
(programmable IOL = 5mA, IOH = -5mA
and IOL = 2mA, IOH = -2mA)
2 different CMOS hysteresis inputs with input
shutdown function
Automotive input with input shutdown function
TTL input with input shutdown function
Programmable pull-up resistor: 50kΩ approx.
Analog input
pull- down control
R
CMOS hysteresis type1
CMOS hysteresis type2
Automotive inputs
TTL input
standby control for
input shutdown
analog input
14
DS07-16610-2E
MB91460C Series
Type
Circuit
C
Remarks
pull-up control
data line
CMOS level output (IOL = 3mA, IOH = -3mA)
2 different CMOS hysteresis inputs with input
shutdown function
Automotive input with input shutdown function
TTL input with input shutdown function
Programmable pull-up resistor: 50kΩ approx.
pull- down control
R
CMOS hysteresis type1
CMOS hysteresis type2
Automotive inputs
TTL input
standby control for
input shutdown
D
pull-up control
data line
CMOS level output (IOL = 3mA, IOH = -3mA)
2 different CMOS hysteresis inputs with input
shutdown function
Automotive input with input shutdown function
TTL input with input shutdown function
Programmable pull-up resistor: 50kΩ approx.
Analog input
pull- down control
R
CMOS hysteresis type1
CMOS hysteresis type2
Automotive inputs
TTL input
standby control for
input shutdown
analog input
DS07-16610-2E
15
MB91460C Series
Type
Circuit
E
Remarks
pull-up control
driver strength
control
data line
pull- down control
CMOS level output
(programmable IOL = 5mA, IOH = -5mA
and IOL = 2mA, IOH = -2mA,
and IOL = 30mA, IOH = -30mA)
2 different CMOS hysteresis inputs with input
shutdown function
Automotive input with input shutdown function
TTL input with input shutdown function
Programmable pull-up resistor: 50kΩ approx.
R
CMOS hysteresis type1
CMOS hysteresis type2
Automotive inputs
TTL input
standby control for
input shutdown
F
pull-up control
driver strength
control
data line
pull- down control
CMOS level output
(programmable IOL = 5mA, IOH = -5mA
and IOL = 2mA, IOH = -2mA,
and IOL = 30mA, IOH = -30mA)
2 different CMOS hysteresis inputs with input
shutdown function
Automotive input with input shutdown function
TTL input with input shutdown function
Programmable pull-up resistor: 50kΩ approx.
Analog input
R
CMOS hysteresis type1
CMOS hysteresis type2
Automotive inputs
TTL input
standby control for
input shutdown
analog input
16
DS07-16610-2E
MB91460C Series
Type
Circuit
Remarks
G
R
Hysteresis
inputs
H
Mask ROM and EVA device:
CMOS Hysteresis input pin
Flash device:
CMOS input pin
12 V withstand (for MD [2:0])
CMOS Hysteresis input pin
Pull-up resistor value: 50 kΩ approx.
Pull-up
Resistor
R
Hysteresis
inputs
J1
X1
R
0
Xout
1
High-speed oscillation circuit:
• Programmable between oscillation mode
(external crystal or resonator connected
to X0/X1 pins) and
Fast external Clock Input (FCI) mode
(external clock connected to X0 pin)
• Feedback resistor = approx. 2 * 0.5 MΩ.
Feedback resistor is grounded in the center
when the oscillator is disabled or in FCI mode.
FCI
R
X0
FCI or osc disable
J2
Xout
X1A
Low-speed oscillation circuit:
• Feedback resistor = approx. 2 * 5 MΩ.
Feedback resistor is grounded in the center
when the oscillator is disabled.
R
R
X0A
osc disable
DS07-16610-2E
17
MB91460C Series
Type
Circuit
K
Remarks
pull-up control
driver strength
control
data line
pull- down control
CMOS level output
(programmable IOL = 5mA, IOH = -5mA
and IOL = 2mA, IOH = -2mA)
2 different CMOS hysteresis inputs with input
shutdown function
Automotive input with input shutdown function
TTL input with input shutdown function
Programmable pull-up resistor: 50kΩ approx.
LCD SEG/COM output
R
CMOS hysteresis type1
CMOS hysteresis type2
Automotive inputs
TTL input
standby control for
input shutdown
LCD SEG/COM
L
pull-up control
driver strength
control
data line
pull- down control
CMOS level output
(programmable IOL = 5mA, IOH = -5mA
and IOL = 2mA, IOH = -2mA)
2 different CMOS hysteresis inputs with input
shutdown function
Automotive input with input shutdown function)
TTL input with input shutdown function
Programmable pull-up resistor: 50kΩ approx.
Analog input
LCD Voltage input
R
CMOS hysteresis type1
CMOS hysteresis type2
Automotive inputs
TTL input
standby control for
input shutdown
VLCD
18
DS07-16610-2E
MB91460C Series
Type
Circuit
Remarks
M
CMOS level tri-state output
(IOL = 5mA, IOH = -5mA)
tri-state control
data line
N
Analog input pin with protection
analog input line
DS07-16610-2E
19
MB91460C Series
■ HANDLING DEVICES
1. Preventing Latch-up
Latch-up may occur in a CMOS IC if a voltage higher than (VDD5, VDD35 or HVDD5 *1) or less than (VSS5 or
HVSS5 *1) is applied to an input or output pin or if a voltage exceeding the rating is applied between the power
supply pins and ground pins. If latch-up occurs, the power supply current increases rapidly, sometimes resulting
in thermal breakdown of the device. Therefore, be very careful not to apply voltages in excess of the absolute
maximum ratings.
Note *1: HVDD5, HVSS5 are available only on devices having Stepper Motor Controller.
2. Handling of unused input pins
If unused input pins are left open, abnormal operation may result. Any unused input pins should be connected
to pull-up or pull-down resistor (2KΩ to 10KΩ) or enable internal pullup or pulldown resisters (PPER/PPCR)
before the input enable (PORTEN) is activated by software. The mode pins MD_x can be connected to VSS5 or
VDD5 directly. Unused ALARM input pins can be connected to AVSS5 directly.
3. Power supply pins
In MB91460 series, devices including multiple power supply pins and ground pins are designed as follows; pins
necessary to be at the same potential are interconnected internally to prevent malfunctions such as latch-up.
All of the power supply pins and ground pins must be externally connected to the power supply and ground
respectively in order to reduce unnecessary radiation, to prevent strobe signal malfunctions due to the ground
level rising and to follow the total output current ratings. Furthermore, the power supply pins and ground pins of
the MB91460 series must be connected to the current supply source via a low impedance.
It is also recommended to connect a ceramic capacitor of approximately 0.1 μF as a bypass capacitor between
power supply pin and ground pin near this device.
This series has a built-in step-down regulator. Connect a bypass capacitor of 4.7 μF (use a X7R ceramic
capacitator) to VCC18C pin for the regulator.
4. Crystal oscillator circuit
Noise in proximity to the X0 (X0A) and X1 (X1A) pins can cause the device to operate abnormally. Printed circuit
boards should be designed so that the X0 (X0A) and X1 (X1A) pins, and crystal oscillator, as well as bypass
capacitors connected to ground, are located near the device and ground.
It is recommended that the printed circuit board layout be designed such that the X0 and X1 pins or X0A and
X1A pins are surrounded by ground plane for the stable operation.
Please request the oscillator manufacturer to evaluate the oscillational characteristics of the crystal and this
device.
5. Notes on using external clock
When using the external clock, it is necessary to simultaneously supply the X0 (X0A) and the X1 (X1A) pins. In
the described combination, X1 (X1A) should be supplied with a clock signal which has the opposite phase to
the X0 (X0A) pins. At X0 and X1, a frequency up to 16 MHz is possible.
(Continued)
20
DS07-16610-2E
MB91460C Series
(Continued)
Example of using opposite phase supply
X0 (X0A)
X1 (X1A)
6. Mode pins (MD_x)
These pins should be connected directly to the power supply or ground pins. To prevent the device from entering
test mode accidentally due to noise, minimize the lengths of the patterns between each mode pin and power
supply pin or ground pin on the printed circuit board as possible and connect them with low impedance.
7. Notes on operating in PLL clock mode
If the oscillator is disconnected or the clock input stops when the PLL clock is selected, the microcontroller may
continue to operate at the free-running frequency of the self-oscillating circuit of the PLL. However, this selfrunning operation cannot be guaranteed.
8. Pull-up control
The AC standard is not guaranteed in case a pull-up resistor is connected to the pin serving as an external bus pin.
DS07-16610-2E
21
MB91460C Series
■ NOTES ON DEBUGGER
1. Execution of the RETI Command
If single-step execution is used in an environment where an interrupt occurs frequently, the corresponding
interrupt handling routine will be executed repeatedly to the exclusion of other processing. This will prevent the
main routine and the handlers for low priority level interrupts from being executed (For example, if the time-base
timer interrupt is enabled, stepping over the RETI instruction will always break on the first line of the time-base
timer interrupt handler).
Disable the corresponding interrupts when the corresponding interrupt handling routine no longer needs debugging.
2. Break function
If the range of addresses that cause a hardware break (including event breaks) is set to the address of the
current system stack pointer or to an area that contains the stack pointer, execution will break after each
instruction regardless of whether the user program actually contains data access instructions.
To prevent this, do not set (word) access to the area containing the address of the system stack pointer as the
target of the hardware break (including an event breaks).
3. Operand break
It may cause malfunctions if a stack pointer exists in the area which is set as the DSU operand break. Do not
set the access to the areas containing the address of system stack pointer as a target of data event break.
4. Notes on PS register
As the PS register is processed in advance by some instructions, when the debugger is being used, the exception
handling may result in execution breaking in an interrupt handling routine or the displayed values of the flags in
the PS register being updated.
As the microcontroller is designed to carry out reprocessing correctly upon returning from such an EIT event,
the operation before and after the EIT always proceeds according to specification.
• The following behavior may occur if any of the following occurs in the instruction
immediately after a DIV0U/DIV0S instruction:
(a) a user interrupt or NMI is accepted;
(b) single-step execution is performed;
(c) execution breaks due to a data event or from the emulator menu.
1. D0 and D1 flags are updated in advance.
2. An EIT handling routine (user interrupt/NMI or emulator) is executed.
3. Upon returning from the EIT, the DIV0U/DIV0S instruction is executed
and the D0 and D1 flags are updated to the same values as those in 1.
• The following behavior occurs when an ORCCR, STILM, MOV Ri,PS instruction is executed
to enable a user interrupt or NMI source while that interrupt is in the active state.
1. The PS register is updated in advance.
2. An EIT handling routine (user interrupt/NMI or emulator) is executed.
3. Upon returning from the EIT, the above instructions are executed and the PS register
is updated to the same value as in 1.
22
DS07-16610-2E
MB91460C Series
■ BLOCK DIAGRAM
1. MB91F463CA, MB91F465CA, MB91F467Cx
Flash-Cache
FR60 CPU
core
8 Kbytes
(MB91F467Cx)
8 Kbytes
(MB91F465CA)
4 Kbytes
(MB91F463CA)
I-bus
32
D-RAM
32 Kbytes
(MB91F467Cx)
16 Kbytes
(MB91F465CA)
16 Kbytes
(MB91F463CA)
Bit search
Flash memory
1088 Kbytes (MB91F467Cx)
544 Kbytes (MB91F465CA)
288 Kbytes (MB91F463CA)
D-bus
32
CAN
3 channels
RX0 to RX2
TX0 to TX2
32 <-> 16
bus adapter
ID-RAM
32 Kbytes
(MB91F467Cx)
16 Kbytes
(MB91F465CA)
8 Kbytes
(MB91F463CA)
Bus converter
DMAC
5 channels
R-bus
16
Clock modulator
Clock supervisor
Clock monitor
Clock control
Interrupt controller
TTG4 to TTG15
PPG4 to PPG15
PPG timer
12 channels
TIN0 to TIN7
TOT0 to TOT3
Reload timer
8 channels
CK2,CK4 to CK7
ICU0 to ICU7
Free-run timer
8 channels
Input capture
8 channels
External interrupt
15 channels
MONCLK
INT0 to INT14
LIN-USART
5 channels
SIN2,SIN4 to SIN7
SOT2,SOT4 to SOT7
SCK2,SCK4 to SCK7
I2C
3 channels
SDA0,SDA2,SDA3
SCL0,SCL2,SCL3
Real time clock
OCU0 to OCU3
AIN0,AIN2,AIN3
BIN0,BIN2,BIN3
ZIN0,ZIN2,ZIN3
PFM
ALARM_0
DS07-16610-2E
Output compare
4 channels
Up/down counter
3 channels
PFM timer
1 channel
Alarm comparator
1 channel
A/D converter
30 channels
Stepper motor controller
6 channels
Sound generator
1 channel
AN0 to AN13,
AN16 to AN31
ATGX
SMC1P0 to SMC1P5
SMC1M0 to SMC1M5
SMC2P0 to SMC2P5
SMC2M0 to SMC2M5
SGA
SG0
23
MB91460C Series
■ CPU AND CONTROL UNIT
The FR family CPU is a high performance core that is designed based on the RISC architecture with advanced
instructions for embedded applications.
1. Features
• Adoption of RISC architecture
Basic instruction: 1 instruction per cycle
• General-purpose registers: 32-bit × 16 registers
• 4 Gbytes linear memory space
• Multiplier installed
32-bit × 32-bit multiplication: 5 cycles
16-bit × 16-bit multiplication: 3 cycles
• Enhanced interrupt processing function
Quick response speed (6 cycles)
Multiple-interrupt support
Level mask function (16 levels)
• Enhanced instructions for I/O operation
Memory-to-memory transfer instruction
Bit processing instruction
Basic instruction word length: 16 bits
• Low-power consumption
Sleep mode/stop mode
2. Internal architecture
• The FR family CPU uses the Harvard architecture in which the instruction bus and data bus are independent
of each other.
• A 32-bit ↔ 16-bit buffer is connected to the 32-bit bus (D-bus) to provide an interface between the CPU and
peripheral resources.
• A Harvard ↔ Princeton bus converter is connected to both the I-bus and D-bus to provide an interface between
the CPU and the bus controller.
24
DS07-16610-2E
MB91460C Series
3. Programming model
3.1.
Basic programming model
32 bits
Initial value
R0
XXXX XXXXH
R1
...
General-purpose registers
...
...
...
...
...
...
...
R12
R13
AC
...
R14
FP
XXXX XXXXH
R15
SP
0000 0000H
Program counter
PC
Program status
RS
Table base register
TBR
Return pointer
RP
System stack pointer
SSP
User stack pointer
USP
Multiply & divide registers
MDH
ILM
SCR
CCR
MDL
DS07-16610-2E
25
MB91460C Series
4. Registers
4.1.
General-purpose register
32 bits
Initial value
R0
XXXX XXXXH
R1
...
...
...
...
...
...
...
...
R12
R13
AC
...
R14
FP
XXXX XXXXH
R15
SP
0000 0000H
Registers R0 to R15 are general-purpose registers. These registers can be used as accumulators for computation
operations and as pointers for memory access.
Of the 16 registers, enhanced commands are provided for the following registers to enable their use for particular
applications.
R13 : Virtual accumulator
R14 : Frame pointer
R15 : Stack pointer
Initial values at reset are undefined for R0 to R14. The value for R15 is 00000000H (SSP value).
4.2.
PS (Program Status)
This register holds the program status, and is divided into three parts, ILM, SCR, and CCR.
All undefined bits (-) in the diagram are reserved bits. The read values are always “0”. Write access to these bits
is invalid.
Bit position → bit 31
bit 20
bit 16
ILM
26
bit 10 bit 8 bit 7
SCR
bit 0
CCR
DS07-16610-2E
MB91460C Series
4.3.
CCR (Condition Code Register)
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
SV
S
I
N
Z
V
C
Initial value
- 000XXXXB
SV : Supervisor flag
S
: Stack flag
I
: Interrupt enable flag
N : Negative enable flag
Z
: Zero flag
V
: Overflow flag
C : Carry flag
4.4.
SCR (System Condition Register)
bit 10 bit 9
D1
bit 8
D0
Initial value
T
XX0B
Flag for step division (D1, D0)
This flag stores interim data during execution of step division.
Step trace trap flag (T)
This flag indicates whether the step trace trap is enabled or disabled.
The step trace trap function is used by emulators. When an emulator is in use, it cannot be used in execution
of user programs.
4.5.
ILM (Interrupt Level Mask register)
bit 20 bit 19 bit 18 bit 17 bit 16
Initial value
ILM4 ILM3 ILM2 ILM1 ILM0
01111B
This register stores interrupt level mask values, and the values stored in ILM4 to ILM0 are used for level masking.
The register is initialized to value “01111B” at reset.
4.6.
PC (Program Counter)
bit 31
bit 0
Initial value
XXXXXXXXH
The program counter indicates the address of the instruction that is being executed.
The initial value at reset is undefined.
DS07-16610-2E
27
MB91460C Series
4.7.
TBR (Table Base Register)
bit 0 Initial value
bit 31
000FFC00H
The table base register stores the starting address of the vector table used in EIT processing.
The initial value at reset is 000FFC00H.
4.8.
RP (Return Pointer)
bit 31
bit 0
Initial value
XXXXXXXXH
The return pointer stores the address for return from subroutines.
During execution of a CALL instruction, the PC value is transferred to this RP register.
During execution of a RET instruction, the contents of the RP register are transferred to PC.
The initial value at reset is undefined.
4.9.
USP (User Stack Pointer)
bit 31
bit 0
Initial value
XXXXXXXXH
The user stack pointer, when the S flag is “1”, this register functions as the R15 register.
• The USP register can also be explicitly specified.
The initial value at reset is undefined.
• This register cannot be used with RETI instructions.
4.10. Multiply & divide registers
bit 31
bit 0
MDH
MDL
These registers are for multiplication and division, and are each 32 bits in length.
The initial value at reset is undefined.
28
DS07-16610-2E
MB91460C Series
■ EMBEDDED PROGRAM/DATA MEMORY (FLASH)
1. Flash features
•
•
•
•
•
•
•
MB91F467Cx: 1088 Kbytes (16 × 64 Kbytes + 8 × 8 Kbytes = 8.5 Mbits)
MB91F465CA: 544 Kbytes (8 × 64 Kbytes + 4 × 8 Kbytes = 4.25 Mbits)
MB91F463CA: 288 Kbytes (4 × 64 Kbytes + 4 × 8 Kbytes = 2.25 Mbits)
Programmable wait states for read/write access
Flash and Boot security with security vector at 0x0014:8000 - 0x0014:800F
Boot security
Basic specification: Same as MBM29LV400TC (except size and part of sector configuration)
2. Operation modes:
(1) 64-bit CPU mode (available on MB91F467Cx only) :
• CPU reads and executes programs in word (32-bit) length units.
• Flash writing is not possible.
• Actual Flash Memory access is performed in d-word (64-bit) length units.
(1) 32-bit CPU mode:
• CPU reads and executes programs in word (32-bit) length units.
• Actual Flash Memory access is performed in word (32-bit) length units.
(2) 16-bit CPU mode:
• CPU reads and writes in half-word (16-bit) length units.
• Program execution from the Flash is not possible.
• Actual Flash Memory access is performed in word (16-bit) length units.
Note: The operation mode of the MCU can be selected using a Boot-ROM function. The function start address is
0xBF60. The parameter description is given in the Hardware Manual in chapter 54.6 "Flash Access Mode
Switching".
DS07-16610-2E
29
MB91460C Series
3. Flash access in CPU mode
3.1.
Flash configuration
3.1.1.
Flash memory map MB91F467Cx
Address
0014:FFFFh
0014:C000h
SA6 (8KB)
SA7 (8KB)
0014:BFFFh
0014:8000h
SA4 (8KB)
SA5 (8KB)
0014:7FFFh
0014:4000h
SA2 (8KB)
SA3 (8KB)
0014:3FFFh
0014:0000h
SA0 (8KB)
SA1 (8KB)
0013:FFFFh
0012:0000h
SA22 (64KB)
SA23 (64KB)
ROMS7
ROMS6
0011:FFFFh
0010:0000h
SA20 (64KB)
SA21 (64KB)
000F:FFFFh
000E:0000h
SA18 (64KB)
SA19 (64KB)
ROMS5
000D:FFFFh
000C:0000h
SA16 (64KB)
SA17 (64KB)
ROMS4
000B:FFFFh
000A:0000h
SA14 (64KB)
SA15 (64KB)
ROMS3
0009:FFFFh
0008:0000h
SA12 (64KB)
SA13 (64KB)
ROMS2
0007:FFFFh
0006:0000h
SA10 (64KB)
SA11 (64KB)
ROMS1
0005:FFFFh
0004:0000h
SA8 (64KB)
SA9 (64KB)
ROMS0
addr+0
16bit read/write
32bit read/write
64bit read
30
addr+1
addr+2
dat[31:16]
addr+3
addr+4
dat[15:0]
addr+5
addr+6
dat[31:16]
dat[31:0]
addr+7
dat[15:0]
dat[31:0]
dat[63:0]
DS07-16610-2E
MB91460C Series
3.1.2.
Flash memory map MB91F465CA
Addr
0014:FFFFh
0014:C000h
SA6 (8KB)
SA7 (8KB)
0014:BFFFh
0014:8000h
SA4 (8KB)
SA5 (8KB)
0014:7FFFh
0014:4000h
SA2 (8KB)
SA3 (8KB)
0014:3FFFh
0014:0000h
SA0 (8KB)
SA1 (8KB)
0013:FFFFh
0012:0000h
SA22 (64KB)
SA23 (64KB)
ROMS7
ROMS6
0011:FFFFh
0010:0000h
SA20 (64KB)
SA21 (64KB)
000F:FFFFh
000E:0000h
SA18 (64KB)
SA19 (64KB)
ROMS5
000D:FFFFh
000C:0000h
SA16 (64KB)
SA17 (64KB)
ROMS4
000B:FFFFh
000A:0000h
SA14 (64KB)
SA15 (64KB)
ROMS3
0009:FFFFh
0008:0000h
SA12 (64KB)
SA13 (64KB)
ROMS2
0007:FFFFh
0006:0000h
SA10 (64KB)
SA11 (64KB)
ROMS1
0005:FFFFh
0004:0000h
SA8 (64KB)
SA9 (64KB)
ROMS0
addr+0
16bit read/write
addr+1
addr+2
dat[31:16]
addr+3
dat[15:0]
addr+4
addr+5
addr+6
dat[31:16]
32bit read
dat[31:0]
dat[31:0]
Legend
Memory not available in this area
Memory available in this area
DS07-16610-2E
addr+7
dat[15:0]
31
MB91460C Series
3.1.3.
Flash Memory Map MB91F463CA
Address
0014:FFFFh
0014:C000h
SA6 (8KB)
SA7 (8KB)
0014:BFFFh
0014:8000h
SA4 (8KB)
SA5 (8KB)
0014:7FFFh
0014:4000h
SA2 (8KB)
SA3 (8KB)
0014:3FFFh
0014:0000h
SA0 (8KB)
SA1 (8KB)
0013:FFFFh
0012:0000h
SA22 (64KB)
SA23 (64KB)
0011:FFFFh
0010:0000h
SA20 (64KB)
SA21 (64KB)
000F:FFFFh
000E:0000h
SA18 (64KB)
SA19 (64KB)
ROMS5
000D:FFFFh
000C:0000h
SA16 (64KB)
SA17 (64KB)
ROMS4
000B:FFFFh
000A:0000h
SA14 (64KB)
SA15 (64KB)
ROMS3
0009:FFFFh
0008:0000h
SA12 (64KB)
SA13 (64KB)
ROMS2
0007:FFFFh
0006:0000h
SA10 (64KB)
SA11 (64KB)
ROMS1
0005:FFFFh
0004:0000h
SA8 (64KB)
SA9 (64KB)
ROMS0
ROMS7
ROMS6
addr+0
16bit read/write
addr+1
addr+2
dat[31:16]
addr+3
dat[15:0]
addr+4
addr+5
addr+6
dat[31:16]
32bit read
dat[31:0]
dat[31:0]
Legend
Memory not available in this area
Memory available in this area
32
addr+7
dat[15:0]
DS07-16610-2E
MB91460C Series
3.2.
Flash access timing settings in CPU mode
The following tables list all settings for a given maximum Core Frequency (through the setting of CLKB or
maximum clock modulation) for Flash read and write access.
3.2.1.
Flash read timing settings (synchronous read)
Core clock (CLKB)
ATD
ALEH
EQ
WEXH
WTC
to 24 MHz
0
0
0
-
1
to 48 MHz
0
0
1
-
2
to 100 MHz
1
1
3
-
4
3.2.2.
Remark
Flash write timing settings (synchronous write)
Core clock (CLKB)
ATD
ALEH
EQ
WEXH
WTC
to 16 MHz
0
-
-
0
3
to 32 MHz
0
-
-
0
4
to 48 MHz
0
-
-
0
5
to 64 MHz
1
-
-
0
6
to 96 MHz
1
-
-
0
7
to 100 MHz
1
-
-
1
8
DS07-16610-2E
Remark
33
MB91460C Series
3.3.
Address mapping from CPU to parallel programming mode
The following tables show the calculation from CPU addresses to flash macro addresses which are used in
parallel programming.
3.3.1.
Address mapping MB91F467Cx
CPU Address
Condition
(addr)
Flash
sectors
FA (flash address) Calculation
14:0000h
to
14:FFFFh
addr[2]==0
SA0, SA2, SA4, SA6
(8 Kbyte)
FA := addr - addr%00:4000h + (addr%00:4000h)/2 (addr/2)%4 + addr%4 - 05:0000h
14:0000h
to
14:FFFFh
addr[2]==1
SA1, SA3, SA5, SA7
(8 Kbyte)
FA := addr - addr%00:4000h + (addr%00:4000h)/2 +
00:2000h - (addr/2)%4 + addr%4 - 05:0000h
04:0000h
to
13:FFFFh
addr[2]==0
SA8, SA10, SA12, SA14,
SA16, SA18, SA20, SA22
(64 Kbyte)
FA := addr - addr%02:0000 + (addr%02:0000h)/2 (addr/2)%4 + addr%4 + 0C:0000h
04:0000h
to
13:FFFFh
addr[2]==1
SA9, SA11, SA13, SA15,
SA17, SA19, SA21, SA23
(64 Kbyte)
FA := addr - addr%02:0000h + (addr%02:0000h)/2 +
01:0000h - (addr/2)%4 + addr%4 + 0C:0000h
Note: FA result is without 20:0000h offset for parallel Flash programming .
Set offset by keeping FA[21] = 1 as described in section “Parallel Flash programming mode”.
3.3.2.
Address mapping MB91F463CA, MB91F465CA
CPU Address
Condition
(addr)
Flash
sectors
FA (flash address) Calculation
14:8000h
to
14:FFFFh
addr[2]==0
SA4, SA6
(8 Kbyte)
FA := addr - addr%00:4000h + (addr%00:4000h)/2
- (addr/2)%4 + addr%4 - 0D:0000h
14:8000h
to
14:FFFFh
addr[2]==1
SA5, SA7
(8 Kbyte)
FA := addr - addr%00:4000h + (addr%00:4000h)/2 +
00:2000h - (addr/2)%4 + addr%4 - 0D:0000h
08:0000h
to
13F:FFFFh
addr[2]==0
SA12, SA14 (MB91F465CA)
SA16, SA18
(64 Kbyte)
FA := addr - addr%02:0000 + (addr%02:0000h)/2 (addr/2)%4 + addr%4
08:0000h
to
13F:FFFFh
addr[2]==1
SA13, SA15 (MB91F465CA)
FA := addr - addr%02:0000h + (addr%02:0000h)/2 +
SA17, SA19
01:0000h - (addr/2)%4 + addr%4
(64 Kbyte)
Note: FA result is without 10:0000h offset for parallel Flash programming .
Set offset by keeping FA[20] = 1 as described in section “Parallel Flash programming mode”.
34
DS07-16610-2E
MB91460C Series
4. Parallel Flash programming mode
4.1.
Flash configuration in parallel Flash programming mode
Parallel Flash programming mode (MD[2:0] = 111):
MB91F467Cx
MB91F465CA
FA[21:0]
FA[20:0]
003F:FFFFh
003F:0000h
SA23 (64KB)
001F:FFFFh
001F:0000h
SA19 (64KB)
003E:FFFFh
003E:0000h
SA22 (64KB)
001E:FFFFh
001E:0000h
SA18 (64KB)
003D:FFFFh
003D:0000h
SA21 (64KB)
001D:FFFFh
001D:0000h
SA17 (64KB)
003C:FFFFh
003C:0000h
SA20 (64KB)
001C:FFFFh
001C:0000h
SA16 (64KB)
003B:FFFFh
003B:0000h
SA19 (64KB)
001B:FFFFh
001B:0000h
SA15 (64KB)
003A:FFFFh
003A:0000h
SA18 (64KB)
001A:FFFFh
001A:0000h
SA14 (64KB)
0039:FFFFh
0039:0000h
SA17 (64KB)
0019:FFFFh
0019:0000h
SA13 (64KB)
0038:FFFFh
0038:0000h
SA16 (64KB)
0018:FFFFh
0018:0000h
SA12 (64KB)
0037:FFFFh
0037:0000h
SA15 (64KB)
0036:FFFFh
0036:0000h
SA14 (64KB)
0035:FFFFh
0035:0000h
SA13 (64KB)
0034:FFFFh
0034:0000h
SA12 (64KB)
0033:FFFFh
0033:0000h
SA11 (64KB)
0032:FFFFh
0032:0000h
SA10 (64KB)
0031:FFFFh
0031:0000h
SA9 (64KB)
0030:FFFFh
0030:0000h
SA11 (64KB)
SA10 (64KB)
SA9 (64KB)
SA8 (64KB)
0017:FFFFh
0017:E000h
SA7 (8KB)
0017:DFFFh
0017:C000h
SA6 (8KB)
0017:BFFFh
0017:A000h
SA5 (8KB)
SA8 (64KB)
002F:FFFFh
002F:E000h
0017:9FFFh
0017:8000h
SA4 (8KB)
SA7 (8KB)
002F:DFFFh
002F:C000h
SA6 (8KB)
002F:BFFFh
002F:A000h
SA5 (8KB)
002F:9FFFh
002F:8000h
SA4 (8KB)
SA1 (8KB)
002F:7FFFh
002F:6000h
SA3 (8KB)
SA0 (8KB)
002F:5FFFh
002F:4000h
SA2 (8KB)
002F:3FFFh
002F:2000h
SA1 (8KB)
002F:1FFFh
002F:0000h
SA0 (8KB)
16bit write mode
SA3 (8KB)
SA2 (8KB)
16bit write mode
FA[1:0]=00
FA[1:0]=10
DQ[15:0]
DQ[15:0]
Remark: Always keep FA[0] = 0 and FA[20] = 1
Legend
FA[1:0]=00
FA[1:0]=10
DQ[15:0]
DQ[15:0]
Memory available in this area
Memory not available in this area
Remark: Always keep FA[0] = 0 and FA[21] = 1
DS07-16610-2E
35
MB91460C Series
MB91F463CA
FA[20:0]
001F:FFFFh
001F:0000h
SA19 (64KB)
001E:FFFFh
001E:0000h
SA18 (64KB)
001D:FFFFh
001D:0000h
SA17 (64KB)
001C:FFFFh
001C:0000h
SA16 (64KB)
SA15 (64KB)
SA14 (64KB)
SA13 (64KB)
SA12 (64KB)
SA11 (64KB)
SA10 (64KB)
SA9 (64KB)
SA8 (64KB)
0017:FFFFh
0017:E000h
SA7 (8KB)
0017:DFFFh
0017:C000h
SA6 (8KB)
0017:BFFFh
0017:A000h
SA5 (8KB)
0017:9FFFh
0017:8000h
SA4 (8KB)
SA3 (8KB)
SA2 (8KB)
SA1 (8KB)
SA0 (8KB)
16bit write mode
FA[1:0]=00
FA[1:0]=10
DQ[15:0]
DQ[15:0]
Remark: Always keep FA[0] = 0 and FA[20] = 1
Legend
Memory available in this area
Memory not available in this area
36
DS07-16610-2E
MB91460C Series
4.2.
Pin connections in parallel programming mode
Resetting after setting the MD[2:0] pins to [111] will halt CPU functioning. At this time, the Flash memory's
interface circuit enables direct control of the Flash memory unit from external pins by directly linking some of
the signals to GP-Ports. Please see table below for signal mapping.
In this mode, the Flash memory appears to the external pins as a stand-alone unit. This mode is generally set
when writing/erasing using the parallel Flash programmer. In this mode, all operations of the 8.5 Mbits Flash
memory's Auto Algorithms are available.
Correspondence between MBM29LV400TC and Flash Memory Control Signals
MBM29LV400TC
FR-CPU mode
MB91F465CA, MB91F467Cx external pins
External pins
Flash memory
mode
Normal function
Pin number
Comment
—
INITX
—
INITX
84
RESET
—
FRSTX
NMIX
85
—
—
MD_2
MD_2
76
Set to ‘1’
—
—
MD_1
MD_1
75
Set to ‘1’
—
—
MD_0
MD_0
74
Set to ‘1’
RY/BY
FMCS:RDY bit
RY/BYX
GP28_0
100
BYTE
Internally fixed to ‘H’
BYTEX
GP28_2
102
WE
WEX
GP28_5
111
OE
OEX
GP28_4
110
CEX
GP20_0
38
ATDIN
GP17_7
27
Set to ‘0’
EQIN
GP17_6
26
Set to ‘0’
—
TESTX
GP28_3
103
Set to ‘1’
—
RDYI
GP28_1
101
Set to ‘0’
A-1
FA0
GP17_5
25
Set to ‘0’
A0 to A3
FA1 to FA4
GP29_0 to GP29_3
92 to 95
A4 to A7
FA5 to FA8
GP29_4 to GP29_7
96 to 99
A8 to A11
FA9 to FA12
GP16_0 to GP16_3
28 to 31
FA13 to FA16
GP16_4 to GP16_7
32 to 35
A16 to A18
FA17 to FA19
GP15_0 to GP15_2
20 to 22
A19
FA20
GP15_3
23
Set to ‘1’ on
MB91F463CA,
MB91F465CA
—
FA21
GP17_4
24
Set to ‘1’
DQ0 to DQ7
GP14_0 to GP14_7
10 to 17
DQ8 to DQ15
GP02_0 to GP02_7
2 to 9
CE
—
—
A12 to A15
DQ0 to DQ7
DQ8 to DQ15
DS07-16610-2E
Internal control signal + control via interface circuit
Internal address bus
Internal data bus
37
MB91460C Series
5. Poweron Sequence in parallel programming mode
The flash memory can be accessed in programming mode after a certain wait time, which is needed for Security
Vector fetch:
• Minimum wait time after VDD5/VDD5R power on:
• Minimum wait time after INITX rising:
2.76 ms
1.0 ms
6. Flash Security
6.1.
Vector addresses
Two Flash Security Vectors (FSV1, FSV2) are located parallel to the Boot Security Vectors (BSV1, BSV2)
controlling the protection functions of the Flash Security Module:
FSV1: 0x14:8000
FSV2: 0x14:8008
6.2.
BSV1: 0x14:8004
BSV2: 0x14:800C
Security Vector FSV1
The setting of the Flash Security Vector FSV1 is responsible for the read and write protection modes and the
individual write protection of the 8 Kbytes sectors.
6.2.1.
FSV1 (bit31 to bit16)
The setting of the Flash Security Vector FSV1 bits [31:16] is responsible for the read and write protection modes.
Explanation of the bits in the Flash Security Vector FSV1[31:16]
FSV1[18]
FSV1[17]
FSV1[16]
FSV1[31:19] Write Protection
Write Protection Read Protection
Level
Flash Security Mode
set all to ‘0’
set to ‘0’
set to ‘0’
set to ‘1’
Read Protection (all device modes, except INTVEC mode MD[2:0]=”000”)
set all to ‘0’
set to ‘0’
set to ‘1’
set to ‘0’
Write Protection (all device modes, without exception)
set all to ‘0’
set to ‘0’
set to ‘1’
set to ‘1’
Read Protection (all device modes, except INTVEC mode MD[2:0]=”000”) and
Write Protection (all device modes)
set all to ‘0’
set to ‘1’
set to ‘0’
set to ‘1’
Read Protection (all device modes, except INTVEC mode MD[2:0]=”000”)
set all to ‘0’
set to ‘1’
set to ‘1’
set to ‘0’
Write Protection (all device modes, except INTVEC mode MD[2:0]=”000”)
set to ‘1’
Read Protection (all device modes, except INTVEC mode MD[2:0]=”000”) and
Write Protection (all device modes except
INTVEC mode MD[2:0]=”000”)
set all to ‘0’
38
set to ‘1’
set to ‘1’
DS07-16610-2E
MB91460C Series
6.2.2.
FSV1 (bit15 to bit0)
The setting of the Flash Security Vector FSV1 bits [15:0] is responsible for the individual write protection of the
8 Kbytes sectors. It is only evaluated if write protection bit FSV1[17] is set.
Explanation of the bits in the Flash Security Vector FSV1[15:0]
Enable Write
Disable Write
FSV1 bit
Sector
Protection
Protection
FSV1[0]
SA0
set to “0”
set to “1”
FSV1[1]
SA1
set to “0”
set to “1”
FSV1[2]
SA2
set to “0”
set to “1”
FSV1[3]
SA3
set to “0”
set to “1”
FSV1[4]
SA4
set to “0”
⎯
FSV1[5]
SA5
set to “0”
set to “1”
FSV1[6]
SA6
set to “0”
set to “1”
FSV1[7]
SA7
set to “0”
set to “1”
FSV1[15:8]
⎯
⎯
⎯
Comment
Sectors available on
MB91F467Cx only
Write protection is mandatory!
not available
Note: It is mandatory to always set the sector where the Flash Security Vectors FSV1 and FSV2 are located to
write protected (here sector SA4). Otherwise it is possible to overwrite the Security Vector to a setting where
it is possible to either read out the Flash content or manipulate data by writing.
See section “Flash access in CPU mode” for an overview about the sector organisation of the Flash
Memory.
DS07-16610-2E
39
MB91460C Series
6.3.
Security Vector FSV2
The setting of the Flash Security Vector FSV2 bits [31:0] is responsible for the individual write protection of the
64 KByte sectors. It is only evaluated if write protection bit FSV1[17] is set.
Explanation of the bits in the Flash Security Vector FSV2[31:0]
Enable Write
Disable Write
FSV2 bit
Sector
Protection
Protection
FSV2[0]
SA8
set to “0”
set to “1”
FSV2[1]
SA9
set to “0”
set to “1”
FSV2[2]
SA10
set to “0”
set to “1”
FSV2[3]
SA11
set to “0”
set to “1”
FSV2[4]
SA12
set to “0”
set to “1”
FSV2[5]
SA13
set to “0”
set to “1”
FSV2[6]
SA14
set to “0”
set to “1”
FSV2[7]
SA15
set to “0”
set to “1”
FSV2[8]
SA16
set to “0”
set to “1”
FSV2[9]
SA17
set to “0”
set to “1”
FSV2[10]
SA18
set to “0”
set to “1”
FSV2[11]
SA19
set to “0”
set to “1”
FSV2[12]
SA20
set to “0”
set to “1”
FSV2[13]
SA21
set to “0”
set to “1”
FSV2[14]
SA22
set to “0”
set to “1”
FSV2[15]
SA23
set to “0”
set to “1”
FSV2[31:16]
⎯
set to “0”
set to “1”
Comment
Sectors available on
MB91F467Cx only
Sectors available on
MB91F467Cx and
MB91F465CA
Sectors available on
MB91F467Cx, MB91F465CA,
MB91F463CA
Sectors available on
MB91F467Cx only
Sectors not available
Note : See section “Flash access in CPU mode” for an overview about the sector organisation of the Flash Memory.
40
DS07-16610-2E
MB91460C Series
■ MEMORY SPACE
The FR family has 4 Gbytes of logical address space (232 addresses) available to the CPU by linear access.
• Direct addressing area
The following address space area is used for I/O.
This area is called direct addressing area, and the address of an operand can be specified directly in an
instruction.
The size of directly addressable area depends on the length of the data being accessed as shown below.
Byte data access : 000H to 0FFH
Half word access : 000H to 1FFH
Word data access : 000H to 3FFH
DS07-16610-2E
41
MB91460C Series
■ MEMORY MAPS
1. MB91F467Cx, MB91F465CA
MB91F467Cx
00000000H
00000400H
00001000H
00000000H
I/O (direct addressing area)
00000400H
I/O
00001000H
DMA
00004000H
Flash-Cache (8 KBytes)
00007000H
Flash memory control
0000C000H
0000B000H
Boot ROM (4 Kbytes)
0000C000H
CAN
0002C000H
00030000H
Flash-Cache (8 KBytes)
Flash memory control
Boot ROM (4 Kbytes)
CAN
0000D000H
0000D000H
00028000H
DMA
00008000H
00008000H
0000B000H
I/O
00006000H
00006000H
00007000H
I/O (direct addressing area)
00002000H
00002000H
00004000H
MB91F465CA
D-RAM (0 wait, 32 Kbytes)
00030000H
ID-RAM (32 Kbytes)
00034000H
D-RAM (0 wait, 16 Kbytes)
ID-RAM (16 Kbytes)
00038000H
00040000H
00080000H
Flash memory (512 Kbytes)
Flash memory (1088 Kbytes)
00100000H
00148000H
Flash memory (32 Kbytes)
00150000H
00150000H
00180000H
00500000H
00500000H
FFFFFFFFH
FFFFFFFFH
Note:
42
Access prohibited areas
Note:
Access prohibited areas
DS07-16610-2E
MB91460C Series
2. MB91F463CA
MB91F463CA
00000000H
00000400H
00001000H
I/O (direct addressing area)
I/O
DMA
00002000H
00005000H
Flash-Cache (4 KBytes)
00006000H
00007000H
Flash memory control
00008000H
0000B000H
0000C000H
Boot ROM (4 Kbytes)
CAN
0000D000H
0002C000H
00030000H
D-RAM (0 wait, 16 Kbytes)
ID-RAM (8 Kbytes)
00032000H
000C0000H
Flash memory (256 Kbytes)
00100000H
00148000H
Flash memory (32 Kbytes)
00150000H
00180000H
00500000H
FFFFFFFFH
Note:
DS07-16610-2E
Access prohibited areas
43
MB91460C Series
■ I/O MAP
1. MB91F463CA, MB91F465CA, MB91F467Cx
Address
000000H
Register
+0
+1
+2
+3
PDR0 [R/W]
XXXXXXXX
PDR1 [R/W]
XXXXXXXX
PDR2 [R/W]
XXXXXXXX
PDR3 [R/W]
XXXXXXXX
Block
T-unit
port data register
Read/write attribute
Register initial value after reset
Register name (column 1 register at address 4n, column 2 register at
address 4n + 1...)
Leftmost register address (for word access, the register in column 1
becomes the MSB side of the data.)
Note : Initial values of register bits are represented as follows:
“ 1 ” : Initial value “ 1 ”
“ 0 ” : Initial value “ 0 ”
“ X ” : Initial value “ undefined ”
“ - ” : No physical register at this location
Access is barred with an undefined data access attribute.
44
DS07-16610-2E
MB91460C Series
Address
Register
Block
+0
+1
+2
+3
000000H
Reserved
Reserved
PDR02 [R/W]
XXXXXXXX
Reserved
000004H
Reserved
Reserved
Reserved
Reserved
000008H
Reserved
Reserved
Reserved
Reserved
00000CH
Reserved
Reserved
PDR14 [R/W]
XXXXXXXX
PDR15 [R/W]
- - - - XXXX
000010H
PDR16 [R/W]
XXXXXXXX
PDR17 [R/W]
XXXX - - - -
PDR18 [R/W]
- XXX - XXX
PDR19 [R/W]
- XXX - XXX
000014H
PDR20 [R/W]
- - - - - XXX
Reserved
PDR22 [R/W]
- - XX - X - X
PDR23 [R/W]
- XXXXXXX
000018H
PDR24 [R/W]
XXXXXXXX
PDR25 [R/W]
XXXXXXXX
PDR26 [R/W]
XXXXXXXX
PDR27 [R/W]
XXXXXXXX
00001CH
PDR28 [R/W]
- -XXXXX
PDR29 [R/W]
XXXXXXXX
Reserved
Reserved
000020H
to
00002CH
Reserved
R-bus
Port Data
Register
Reserved
000030H
EIRR0 [R/W]
XXXXXXXX
ENIR0 [R/W]
00000000
ELVR0 [R/W]
00000000 00000000
External Interrupt
(INT 0 to INT 7)
000034H
EIRR1 [R/W]
XXXXXXXX
ENIR1 [R/W]
00000000
ELVR1 [R/W]
00000000 00000000
External Interrupt
(INT 8 to INT 14)
000038H
DICR [R/W]
-------0
HRCL [R/W]
0 - - 11111
Reserved
Delayed Interrupt
00003CH
00004CH
000050H
000054H
Reserved
SCR02 [R/W,W] SMR02 [R/W,W]
00000000
00000000
ESCR02 [R/W]
00000X00
000058H
to
00005CH
000060H
000064H
Reserved
SSR02 [R/W,R]
00001000
ECCR02
[R/W,R,W]
-00000XX
RDR02/TDR02
[R/W]
00000000
Reserved
Reserved
SCR04 [R/W,W] SMR04 [R/W,W]
00000000
00000000
ESCR04 [R/W]
00000X00
DS07-16610-2E
ECCR04
[R/W,R,W]
-00000XX
LIN-USART 2
Reserved
SSR04 [R/W,R]
00001000
RDR04/TDR04
[R/W]
00000000
FSR04 [R]
- - - 00000
FCR04 [R/W]
0001 - 000
LIN-USART 4
with FIFO
45
MB91460C Series
000068H
SCR05 [R/W,W] SMR05 [R/W,W]
00000000
00000000
ECCR05
[R/W,R,W]
-00000XX
00006CH
ESCR05 [R/W]
00000X00
000070H
SCR06 [R/W,W] SMR06 [R/W,W]
00000000
00000000
ECCR06
[R/W,R,W]
-00000XX
000074H
ESCR06 [R/W]
00000X00
000078H
SCR07 [R/W,W] SMR07 [R/W,W]
00000000
00000000
00007CH
ESCR07 [R/W]
00000X00
ECCR07
[R/W,R,W]
-00000XX
000080H
SSR05 [R/W,R]
00001000
RDR05/TDR05
[R/W]
00000000
FSR05 [R]
- - - 00000
FCR05 [R/W]
0001 - 000
SSR06 [R/W,R]
00001000
RDR06/TDR06
[R/W]
00000000
FSR06 [R]
- - - 00000
FCR06 [R/W]
0001 - 000
SSR07 [R/W,R]
00001000
RDR07/TDR07
[R/W]
00000000
FSR07 [R]
- - - 00000
FCR07 [R/W]
0001 - 000
Reserved
BGR102 [R/W]
00000000
BGR002 [R/W]
00000000
Reserved
Reserved
000088H
BGR104 [R/W]
00000000
BGR004 [R/W]
00000000
BGR105 [R/W]
00000000
BGR005 [R/W]
00000000
00008CH
BGR106 [R/W]
00000000
BGR006 [R/W]
00000000
BGR107 [R/W]
00000000
BGR007 [R/W]
00000000
000094H
000098H
00009CH
0000A0H
0000A4H
0000A8H
0000ACH
0000B0H
0000B4H
46
PWC20 [R/W]
- - - - - - XX XXXXXXXX
Reserved
Reserved
PWC21 [R/W]
- - - - - - XX XXXXXXXX
Reserved
Reserved
PWC22 [R/W]
- - - - - - XX XXXXXXXX
Reserved
Reserved
PWC23 [R/W]
- - - - - - XX XXXXXXXX
Reserved
Reserved
PWC24 [R/W]
- - - - - - XX XXXXXXXX
Reserved
Reserved
LIN-USART 6
with FIFO
LIN-USART 7
with FIFO
Reserved
000084H
000090H
LIN-USART 5
with FIFO
PWC10 [R/W]
- - - - - - XX XXXXXXXX
PWS20 [R/W]
-0000000
PWS10 [R/W]
- -000000
PWC11 [R/W]
- - - - - - XX XXXXXXXX
PWS21 [R/W]
-0000000
PWS11 [R/W]
- -000000
PWC12 [R/W]
- - - - - - XX XXXXXXXX
PWS22 [R/W]
-0000000
PWS12 [R/W]
- -000000
PWC13 [R/W]
- - - - - - XX XXXXXXXX
PWS23 [R/W]
-0000000
PWS13 [R/W]
- -000000
PWC14 [R/W]
- - - - - - XX XXXXXXXX
PWS24 [R/W]
-0000000
PWS14 [R/W]
- -000000
Baud rate
Generator
LIN-USART
0 to 7
Stepper Motor 0
Stepper Motor 1
Stepper Motor 2
Stepper Motor 3
Stepper Motor 4
DS07-16610-2E
MB91460C Series
PWC25 [R/W]
- - - - - - XX XXXXXXXX
0000B8H
PWC15 [R/W]
- - - - - - XX XXXXXXXX
0000BCH
Reserved
Reserved
PWS25 [R/W]
-0000000
PWS15 [R/W]
- -000000
0000C0H
Reserved
PWC0 [R/W]
-00000--
Reserved
PWC1 [R/W]
-00000--
0000C4H
Reserved
PWC2 [R/W]
-00000--
Reserved
PWC3 [R/W]
-00000--
0000C8H
Reserved
PWC4 [R/W]
-00000--
Reserved
PWC5 [R/W]
-00000--
Reserved
0000CCH
Stepper Motor Control
0 to 5
Reserved
0000D0H
IBCR0 [R/W]
00000000
IBSR0 [R]
00000000
ITBAH0 [R/W]
- - - - - - 00
ITBAL0 [R/W]
00000000
0000D4H
ITMKH0 [R/W]
00 - - - - 11
ITMKL0 [R/W]
11111111
ISMK0 [R/W]
01111111
ISBA0 [R/W]
- 0000000
0000D8H
Reserved
IDAR0 [R/W]
00000000
ICCR0 [R/W]
- 0011111
Reserved
0000DCH
to
000100H
Stepper Motor 5
Reserved
I2C 0
Reserved
000104H
GCN11 [R/W]
00110010 00010000
Reserved
GCN21 [R/W]
- - - - 0000
PPG Control
4 to 7
000108H
GCN12 [R/W]
00110010 00010000
Reserved
GCN22 [R/W]
- - - - 0000
PPG Control
8 to 11
000110H
to
00012CH
Reserved
000130H
PTMR04 [R]
11111111 11111111
000134H
PDUT04 [W]
XXXXXXXX XXXXXXXX
000138H
PTMR05 [R]
11111111 11111111
00013CH
PDUT05 [W]
XXXXXXXX XXXXXXXX
000140H
PTMR06 [R]
11111111 11111111
000144H
PDUT06 [W]
XXXXXXXX XXXXXXXX
000148H
PTMR07 [R]
11111111 11111111
00014CH
PDUT07 [W]
XXXXXXXX XXXXXXXX
DS07-16610-2E
Reserved
PCSR04 [W]
XXXXXXXX XXXXXXXX
PCNH04 [R/W]
0000000 -
PCNL04 [R/W]
000000 - 0
PCSR05 [W]
XXXXXXXX XXXXXXXX
PCNH05 [R/W]
0000000 -
PCNL05 [R/W]
000000 - 0
PCSR06 [W]
XXXXXXXX XXXXXXXX
PCNH06 [R/W]
0000000 -
PCNL06 [R/W]
000000 - 0
PCSR07 [W]
XXXXXXXX XXXXXXXX
PCNH07 [R/W]
0000000 -
PCNL07 [R/W]
000000 - 0
PPG 4
PPG 5
PPG 6
PPG 7
47
MB91460C Series
000150H
PTMR08 [R]
11111111 11111111
000154H
PDUT08 [W]
XXXXXXXX XXXXXXXX
000158H
PTMR09 [R]
11111111 11111111
00015CH
PDUT09 [W]
XXXXXXXX XXXXXXXX
000160H
PTMR10 [R]
11111111 11111111
000164H
PDUT10 [W]
XXXXXXXX XXXXXXXX
000168H
PTMR11 [R]
11111111 11111111
00016CH
PDUT11 [W]
XXXXXXXX XXXXXXXX
000170H
P0TMCSRH
[R/W]
- 0-000-0
PCSR08 [W]
XXXXXXXX XXXXXXXX
PCNH08 [R/W]
0000000 -
PCNL08 [R/W]
000000 - 0
PCSR09 [W]
XXXXXXXX XXXXXXXX
PCNH09 [R/W]
0000000 -
PCNL09 [R/W]
000000 - 0
PCSR10 [W]
XXXXXXXX XXXXXXXX
PCNH10 [R/W]
0000000 -
PCNL10 [R/W]
000000 - 0
PCSR11 [W]
XXXXXXXX XXXXXXXX
P0TMCSRL
[R/W]
- - -00000
PCNH11 [R/W]
0000000 -
PCNL11 [R/W]
000000 - 0
P1TMCSRH
[R/W]
- 0000000
P1TMCSRL
[R/W]
01000000
000174H
P0TMRLR [W]
XXXXXXXX XXXXXXXX
P0TMR [R]
XXXXXXXX XXXXXXXX
000178H
P1TMRLR [W]
XXXXXXXX XXXXXXXX
P1TMR [R]
XXXXXXXX XXXXXXXX
Reserved
00017CH
000180H
Reserved
ICS01 [R/W]
00000000
Reserved
IPCP1 [R]
XXXXXXXX XXXXXXXX
000188H
IPCP2 [R]
XXXXXXXX XXXXXXXX
IPCP3 [R]
XXXXXXXX XXXXXXXX
00018CH
OCS01 [R/W]
- - - 0 - - 00 0000 - - 00
OCS23 [R/W]
- - - 0 - - 00 0000 - - 00
000190H
OCCP0 [R/W]
XXXXXXXX XXXXXXXX
OCCP1 [R/W]
XXXXXXXX XXXXXXXX
000194H
OCCP2 [R/W]
XXXXXXXX XXXXXXXX
OCCP3 [R/W]
XXXXXXXX XXXXXXXX
00019CH
SGAR [R/W]
00000000
48
SGCRL [R/W]
- - 0 - - 000
Reserved
PPG 10
PPG 11
Pulse
Frequency Modulator
ICS23 [R/W]
00000000
IPCP0 [R]
XXXXXXXX XXXXXXXX
SGCRH [R/W]
0000 - - 00
PPG 9
Reserved
000184H
000198H
PPG 8
SGFR [R/W, R]
XXXXXXXX XXXXXXXX
SGTR [R/W]
XXXXXXXX
SGDR [R/W]
XXXXXXXX
Input
Capture
0 to 3
Output
Compare
0 to 3
Sound
Generator
DS07-16610-2E
MB91460C Series
ADERH [R/W]
00000000 00000000
0001A0H
ADERL [R/W]
00000000 00000000
0001A4
ADCS1 [R/W]
00000000
ADCS0 [R/W]
00000000
ADCR1 [R]
000000XX
ADCR0 [R]
XXXXXXXX
0001A8H
ADCT1 [R/W]
00010000
ADCT0 [R/W]
00101100
ADSCH [R/W]
- - - 00000
ADECH [R/W]
- - - 00000
0001ACH
Reserved
ACSR0 [R/W]
- 11XXX00
Reserved
Reserved
0001B0H
TMRLR0 [W]
XXXXXXXX XXXXXXX
0001B4H
Reserved
0001B8H
TMRLR1 [W]
XXXXXXXX XXXXXXXX
0001BCH
Reserved
0001C0H
TMRLR2 [W]
XXXXXXXX XXXXXXXX
0001C4H
Reserved
0001C8H
TMRLR3 [W]
XXXXXXXX XXXXXXXX
0001CCH
Reserved
0001D0H
TMRLR4 [W]
XXXXXXXX XXXXXXXX
0001D4H
Reserved
0001D8H
TMRLR5 [W]
XXXXXXXX XXXXXXXX
0001DCH
Reserved
0001E0H
TMRLR6 [W]
XXXXXXXX XXXXXXXX
0001E4H
Reserved
DS07-16610-2E
A/D
Converter
Alarm Comparator 0
TMR0 [R]
XXXXXXXX XXXXXXXX
TMCSRH0
[R/W]
- - - 00000
TMCSRL0
[R/W]
0 - 000000
Reload Timer 0
TMR1 [R]
XXXXXXXX XXXXXXXX
TMCSRH1
[R/W]
- - - 00000
TMCSRL1
[R/W]
0 - 000000
TMR2 [R]
XXXXXXXX XXXXXXXX
TMCSRH2
[R/W]
- - - 00000
TMCSRL2
[R/W]
0 - 000000
TMR3 [R]
XXXXXXXX XXXXXXXX
TMCSRH3
[R/W]
- - - 00000
TMCSRL3
[R/W]
0 - 000000
TMR4 [R]
XXXXXXXX XXXXXXXX
TMCSRH4
[R/W]
- - - 00000
TMCSRL4
[R/W]
0 - 000000
TMR5 [R]
XXXXXXXX XXXXXXXX
TMCSRH5
[R/W]
- - - 00000
TMCSRL5
[R/W]
0 - 000000
TMR6 [R]
XXXXXXXX XXXXXXXX
TMCSRH6
[R/W]
- - - 00000
TMCSRL6
[R/W]
0 - 000000
Reload Timer 1
Reload Timer 2
(PPG 4, PPG 5)
Reload Timer 3
(PPG 6, PPG 7)
Reload Timer 4
(PPG 8, PPG 9)
Reload Timer 5
(PPG 10, PPG 11)
Reload Timer 6
(PPG 12, PPG 13)
49
MB91460C Series
0001E8H
TMRLR7 [W]
XXXXXXXX XXXXXXXX
0001ECH
Reserved
0001F0H
TCDT0 [R/W]
XXXXXXXX XXXXXXXX
TMR7 [R]
XXXXXXXX XXXXXXXX
TMCSRH7
[R/W]
- - - 00000
TMCSRL7
[R/W]
0 - 000000
Reserved
TCCS0 [R/W]
00000000
Reload Timer 7
(PPG 14, PPG 15)
(A/D Converter)
Free Running
Timer 0
(ICU 0, ICU 1)
0001F4H
TCDT1 [R/W]
XXXXXXXX XXXXXXXX
Reserved
TCCS1 [R/W]
00000000
Free Running
Timer 1
(ICU 2, ICU 3)
0001F8H
TCDT2 [R/W]
XXXXXXXX XXXXXXXX
Reserved
TCCS2 [R/W]
00000000
Free Running
Timer 2
(OCU 0, OCU 1)
0001FCH
TCDT3 [R/W]
XXXXXXXX XXXXXXXX
Reserved
TCCS3 [R/W]
00000000
Free Running
Timer 3
(OCU 2, OCU 3)
000200H
DMACA0 [R/W]
00000000 0000XXXX XXXXXXXX XXXXXXXX
000204H
DMACB0 [R/W]
00000000 00000000 XXXXXXXX XXXXXXXX
000208H
DMACA1 [R/W]
00000000 0000XXXX XXXXXXXX XXXXXXXX
00020CH
DMACB1 [R/W]
00000000 00000000 XXXXXXXX XXXXXXXX
000210H
DMACA2 [R/W]
00000000 0000XXXX XXXXXXXX XXXXXXXX
000214H
DMACB2 [R/W]
00000000 00000000 XXXXXXXX XXXXXXXX
000218H
DMACA3 [R/W]
00000000 0000XXXX XXXXXXXX XXXXXXXX
00021CH
DMACB3 [R/W]
00000000 00000000 XXXXXXXX XXXXXXXX
000220H
DMACA4 [R/W]
00000000 0000XXXX XXXXXXXX XXXXXXXX
000224H
DMACB4 [R/W]
00000000 00000000 XXXXXXXX XXXXXXXX
000228H to
00023CH
Reserved
000240H
50
DMACR [R/W]
0 - -0 0000
DMAC
Reserved
Reserved
DS07-16610-2E
MB91460C Series
000244H
to
0002CCH
Reserved
Reserved
0002D0H
ICS045 [R/W]
00000000
Reserved
Reserved
ICS67 [R/W]
00000000
0002D4H
IPCP4 [R]
XXXXXXXX XXXXXXXX
IPCP5 [R]
XXXXXXXX XXXXXXXX
0002D8H
IPCP6 [R]
XXXXXXXX XXXXXXXX
IPCP7 [R]
XXXXXXXX XXXXXXXX
0002DCH
to
0002ECH
Reserved
TCDT4 [R/W]
XXXXXXXX XXXXXXXX
0002F0H
Input
Capture
4 to 7
Reserved
Reserved
TCCS4 [R/W]
00000000
Free Running
Timer 4
(ICU 4, ICU 5)
TCDT5 [R/W]
XXXXXXXX XXXXXXXX
0002F4H
Reserved
TCCS5 [R/W]
00000000
Free Running
Timer 5
(ICU 6, ICU 7)
0002F8H
TCDT6 [R/W]
XXXXXXXX XXXXXXXX
Reserved
TCCS6 [R/W]
00000000
Free Running
Timer 6
0002FCH
TCDT7 [R/W]
XXXXXXXX XXXXXXXX
Reserved
TCCS7 [R/W]
00000000
Free Running
Timer 7
000300H
UDRC1 [W]
00000000
UDRC0 [W]
00000000
UDCR1 [R]
00000000
UDCR0 [R]
00000000
000304H
UDCCH0 [R/W]
00000000
UDCCL0 [R/W]
00000000
Reserved
UDCS0 [R/W]
00000000
000308H
to 00030CH
Reserved
Reserved
000310H
UDRC3 [W]
00000000
UDRC2 [W]
00000000
UDCR3 [R]
00000000
UDCR2 [R]
00000000
000314H
UDCCH2 [R/W]
00000000
UDCCL2 [R/W]
00000000
Reserved
UDCS2 [R/W]
00000000
000318H
UDCCH3 [R/W]
00000000
UDCCL3 [R/W]
00000000
Reserved
UDCS3 [R/W]
00000000
00031CH
000320H
Reserved
GCN13 [R/W]
00110010 00010000
000324H
to 00032CH
PTMR12 [R]
11111111 11111111
000334H
PDUT12 [W]
XXXXXXXX XXXXXXXX
DS07-16610-2E
Up/Down
Counter
2 to 3
Reserved
Reserved
GCN23 [R/W]
- - - - 0000
Reserved
000330H
Up/Down
Counter
0
PPG Control
12 to 15
Reserved
PCSR12 [W]
XXXXXXXX XXXXXXXX
PCNH12 [R/W]
0000000 -
PCNL12 [R/W]
000000 - 0
PPG 12
51
MB91460C Series
000338H
PTMR13 [R]
11111111 11111111
00033CH
PDUT13 [W]
XXXXXXXX XXXXXXXX
000340H
PTMR14 [R]
11111111 11111111
000344H
PDUT14 [W]
XXXXXXXX XXXXXXXX
000348H
PTMR15 [R]
11111111 11111111
00034CH
PDUT15 [W]
XXXXXXXX XXXXXXXX
000350H
to 000364H
PCSR13 [W]
XXXXXXXX XXXXXXXX
PCNH13 [R/W]
0000000 -
PCNL13 [R/W]
000000 - 0
PCSR14 [W]
XXXXXXXX XXXXXXXX
PCNH14 [R/W]
0000000 -
PCNL14 [R/W]
000000 - 0
PCSR15 [W]
XXXXXXXX XXXXXXXX
PCNH15 [R/W]
0000000 -
PCNL15 [R/W]
000000 - 0
Reserved
IBCR2 [R/W]
00000000
IBSR2 [R]
00000000
ITBAH2 [R/W]
- - - - - - 00
ITBAL2 [R/W]
00000000
00036CH
ITMKH2 [R/W]
00 - - - - 11
ITMKL2 [R/W]
11111111
ISMK2 [R/W]
01111111
ISBA2 [R/W]
- 0000000
000370H
Reserved
IDAR2 [R/W]
00000000
ICCR2 [R/W]
- 0011111
Reserved
00374H
IBCR3 [R/W]
00000000
IBSR3 [R]
00000000
ITBAH3 [R/W]
- - - - - - 00
ITBAL3 [R/W]
00000000
000378H
ITMKH3 [R/W]
00 - - - - 11
ITMKL3 [R/W]
11111111
ISMK3 [R/W]
01111111
ISBA3 [R/W]
- 0000000
00037CH
Reserved
IDAR3 [R/W]
00000000
ICCR3 [R/W]
- 0011111
Reserved
000390H
Reserved
ROMS [R]
11111111 00000000
Reserved
Reserved
0003F0H
BSD0 [W]
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
0003F4H
BSD1 [R/W]
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
0003F8H
BSDC [W]
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
0003FCH
BSRR [R]
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
52
Reserved
PPG 15
I2C 2
I2C 3
Reserved
000394H
to
0003ECH
000400H
to 00043CH
PPG 14
Reserved
000368H
000380H
to 00038CH
PPG 13
ROM Select Register
Reserved
Bit Search Module
Reserved
DS07-16610-2E
MB91460C Series
000440H
ICR00 [R/W]
---11111
ICR01 [R/W]
---11111
ICR02 [R/W]
---11111
ICR03 [R/W]
---11111
000444H
ICR04 [R/W]
---11111
ICR05 [R/W]
---11111
ICR06 [R/W]
---11111
ICR07 [R/W]
---11111
000448H
ICR08 [R/W]
---11111
ICR09 [R/W]
---11111
ICR10 [R/W]
---11111
ICR11 [R/W]
---11111
00044CH
ICR12 [R/W]
---11111
ICR13 [R/W]
---11111
ICR14 [R/W]
---11111
ICR15 [R/W]
---11111
000450H
ICR16 [R/W]
---11111
ICR17 [R/W]
---11111
ICR18 [R/W]
---11111
ICR19 [R/W]
---11111
000454H
ICR20 [R/W]
---11111
ICR21 [R/W]
---11111
ICR22 [R/W]
---11111
ICR23 [R/W]
---11111
000458H
ICR24 [R/W]
---11111
ICR25 [R/W]
---11111
ICR26 [R/W]
---11111
ICR27 [R/W]
---11111
00045CH
ICR28 [R/W]
---11111
ICR29 [R/W]
---11111
ICR30 [R/W]
---11111
ICR31 [R/W]
---11111
000460H
ICR32 [R/W]
---11111
ICR33 [R/W]
---11111
ICR34 [R/W]
---11111
ICR35 [R/W]
---11111
000464H
ICR36 [R/W]
---11111
ICR37 [R/W]
---11111
ICR38 [R/W]
---11111
ICR39 [R/W]
---11111
000468H
ICR40 [R/W]
---11111
ICR41 [R/W]
---11111
ICR42 [R/W]
---11111
ICR43 [R/W]
---11111
00046CH
ICR44 [R/W]
---11111
ICR45 [R/W]
---11111
ICR46 [R/W]
---11111
ICR47 [R/W]
---11111
000470H
ICR48 [R/W]
---11111
ICR49 [R/W]
---11111
ICR50 [R/W]
---11111
ICR51 [R/W]
---11111
000474H
ICR52 [R/W]
---11111
ICR53 [R/W]
---11111
ICR54 [R/W]
---11111
ICR55 [R/W]
---11111
000478H
ICR56 [R/W]
---11111
ICR57 [R/W]
---11111
ICR58 [R/W]
---11111
ICR59 [R/W]
---11111
00047CH
ICR60 [R/W]
---11111
ICR61 [R/W]
---11111
ICR62 [R/W]
---11111
ICR63 [R/W]
---11111
000480H
RSRR [R/W]
10000000
STCR [R/W]
00110011
TBCR [R/W]
00XXX – 00
CTBR [W]
XXXXXXXX
000484H
CLKR [R/W]
---- 0000
WPR [W]
XXXXXXXX
DIVR0 [R/W]
00000011
DIVR1 [R/W]
00000000
000488H
CTEST [R/W]
XXXX00XX
Reserved
Reserved
Reserved
00048CH
PLLDIVM [R/W] PLLDIVN [R/W] PLLDIVG [R/W]
- - - - 0000
- - 000000
- - - - 0000
000490H
PLLCTRL [R/W]
- - - - 0000
Reserved
Reserved
Reserved
000494H
OSCC1 [R/W]
- - - - - 010
OSCS1 [R/W]
00001111
OSCC2 [R/W]
- - - - - 010
OSCS2 [R/W]
00001111
DS07-16610-2E
PLLMULG [W]
00000000
Interrupt
Controller
Clock
Controller
C-Unit Test
(hidden)
PLL Interface
Main/Sub
Oscillator
Control
53
MB91460C Series
000498H
PORTEN [R/W]
- - - - - - 00
Reserved
00049CH
Reserved
Reserved
Reserved
WTCER [R/W]
- - - - - - 00
Port Input
Enable Control
Reserved
WTCR [R/W]
00000000 000 – 00 – 0
0004A0H
Reserved
0004A4H
Reserved
0004A8H
WTHR [R/W]
- - - 00000
WTMR [R/W]
- - 000000
WTSR [R/W]
- - 000000
Reserved
0004ACH
CSVTR [R/W]
- - - 00010
CSVCR [R/W]
00011100
CSCFG [R/W]
0X000000
CMCFG [R/W]
00000000
WTBR [R/W]
- - - XXXXX XXXXXXXX XXXXXXXX
0004B0H
CUCR [R/W]
- - - - - - - - - - - 0 - - 00
CUTD [R/W]
10000000 00000000
0004B4H
CUTR1 [R]
- - - - - - - - 00000000
CUTR2 [R]
00000000 00000000
0004B8H
CMPR [R/W]
- - 000010 11111101
0004BCH
CMT1 [R/W]
00000000 1 - - - 0000
Reserved
CMCR [R/W]
- 001 - - 00
CMT2 [R/W]
- - 000000 - - 000000
Real Time Clock
(Watch Timer)
ClockSupervisor / Selector /
Monitor
Calibration of Sub Clock
Clock
Modulator
0004C0H
CANPRE [R/W]
0 - - - 0000
CANCKD [R/W]
- - - - - 000*1
Reserved
0004C4H
LVSEL [R/W]
00000111
LVDET [R/W]
0000 0 – 00
HWWDE [R/W]
- - - - - - 00
0004C8H
OSCRH [R/W]
000 - - 001
OSCRL [R/W]
- - - - - 000
WPCRH [R/W]
00 - - - 000
WPCRL [R/W]
- - - - - - 00
Main-/Sub-Oscillation
Stabilisation Timer
0004CCH
OSCCR [R/W]
- - - - - - 00
Reserved
REGSEL [R/W]
- - 000110
REGCTR [R/W]
- - - 0 - - 00
Main- Oscillation
Standby Control
Main/Subregulator
Control
0004D0H to
0007F8H
0007FCH
Reserved
000C04H
to
000CFCH
54
MODR [W]
XXXXXXXX
Reserved
Reserved
Reserved
Reserved
TVCTW [W]
XXXXXXXX
TVCTR [R]
- - XXXXXX
Reserved
Reserved
CAN Clock Control
HWWD [R/W,W] Low Voltage Detection/
00011000
Hardware Watchdog
Reserved
000800H
to
000BFCH
000C00H
Reserved
Mode Register
Reserved
IOS [R/W]
00000000
I-Unit Test
(hidden)
Reserved
DS07-16610-2E
MB91460C Series
000D00H
Reserved
Reserved
PDRD02 [R]
XXXXXXXX
Reserved
000D04H
Reserved
Reserved
Reserved
Reserved
000D08H
Reserved
Reserved
Reserved
Reserved
000D0CH
Reserved
Reserved
PDRD14 [R]
XXXXXXXX
PDRD15 [R]
- - - - XXXX
000D10H
PDRD16 [R]
XXXXXXXX
PDRD17 [R]
XXXX - - - -
PDRD18 [R]
- XXX - XXX
PDRD19 [R]
- XXX - XXX
000D14H
PDRD20 [R]
- - - - - XXX
Reserved
PDRD22 [R]
- - XX - X - X
PDRD23 [R]
- XXXXXXX
000D18H
PDRD24 [R]
XXXXXXXX
PDRD25 [R]
XXXXXXXX
PDRD26 [R]
XXXXXXXX
PDRD27 [R]
XXXXXXXX
000D1CH
PDRD28 [R]
- - XXXXX
PDRD29 [R]
XXXXXXXX
Reserved
Reserved
000D20H
to
000D3CH
Reserved
Reserved
000D40H
Reserved
Reserved
DDR02 [R/W]
00000000
Reserved
000D44H
Reserved
Reserved
Reserved
Reserved
000D48H
Reserved
Reserved
Reserved
Reserved
000D4CH
Reserved
Reserved
DDR14 [R/W]
00000000
DDR15 [R/W]
- - - - 0000
000D50H
DDR16 [R/W]
00000000
DDR17 [R/W]
0000 - - - -
DDR18 [R/W]
- 000 - 000
DDR19 [R/W]
- 000 - 000
000D54H
DDR20 [R/W]
- - - - - 000
Reserved
DDR22 [R/W]
- - 00 - 0 - 0
DDR23 [R/W]
- 0000000
000D58H
DDR24 [R/W]
00000000
DDR25 [R/W]
00000000
DDR26 [R/W]
00000000
DDR27 [R/W]
00000000
000D5CH
DDR28 [R/W]
- - 00000
DDR29 [R/W]
00000000
Reserved
Reserved
000D60H
to
000D7CH
DS07-16610-2E
Reserved
R-bus
Port Data
Direct Read
Register
R-bus
Port Direction
Register
Reserved
55
MB91460C Series
000D80H
Reserved
Reserved
Reserved
Reserved
000D84H
Reserved
Reserved
Reserved
Reserved
000D88H
Reserved
Reserved
Reserved
Reserved
000D8CH
Reserved
Reserved
PFR14 [R/W]
00000000
PFR15 [R/W]
- - - - 0000
000D90H
PFR16 [R/W]
00000000
PFR17 [R/W]
0000 - - - -
PFR18 [R/W]
- 000 - 000
PFR19 [R/W]
- 000 - 000
000D94H
PFR20 [R/W]
- - - - - 000
Reserved
PFR22 [R/W]
- - 00 - 0 - 0
PFR23 [R/W]
- 000000
000D98H
PFR24 [R/W]
00000000
PFR25 [R/W]
00000000
PFR26 [R/W]
00000000
PFR27 [R/W]
00000000
000D9CH
PFR28 [R/w]
- - 00000
PFR29 [R/W]
00000000
Reserved
Reserved
000DA0H
to
000DBCH
Reserved
Reserved
000DC0H
Reserved
Reserved
Reserved
Reserved
000DC4H
Reserved
Reserved
Reserved
Reserved
000DC8H
Reserved
Reserved
Reserved
Reserved
000DCCH
Reserved
Reserved
EPFR14 [R/W]
00000000
EPFR15 [R/W]
- - - - 0000
000DD0H
EPFR16 [R/W]
0000 - - - -
Reserved
EPFR18 [R/W]
- 000 - 000
EPFR19 [R/W]
-0---0--
000DD4H
EPFR20 [R/W]
- - - - - 000
Reserved
Reserved
Reserved
000DD8H
Reserved
Reserved
EPFR26 [R/W]
00000000
EPFR27 [R/W]
00000000
000DDCH
Reserved
Reserved
Reserved
Reserved
000DE0H
to
000DFCH
56
Reserved
R-bus
Port Function
Register
R-bus Extra Port
Function
Register
Reserved
DS07-16610-2E
MB91460C Series
000E00H
Reserved
Reserved
PODR02 [R/W]
00000000
Reserved
000E04H
Reserved
Reserved
Reserved
Reserved
000E08H
Reserved
Reserved
Reserved
Reserved
000E0CH
Reserved
Reserved
PODR14 [R/W]
00000000
PODR15 [R/W]
- - - - 0000
000E10H
PODR16 [R/W]
00000000
PODR17 [R/W]
0000 - - - -
PODR18 [R/W]
- 000 - 000
PODR19 [R/W]
- 000 - 000
000E14H
PODR20 [R/W]
- - - - - 000
Reserved
PODR22 [R/W]
- - 00 - 0 - 0
PODR23 [R/W]
- 0000000
000E18H
PODR24 [R/W]
00000000
PODR25 [R/W]
00000000
PODR26 [R/W]
00000000
PODR27 [R/W]
00000000
000E1CH
PODR28 [R/W]
- - 00000
PODR29 [R/W]
00000000
Reserved
Reserved
000E20H
to
000E3CH
Reserved
Reserved
000E40H
Reserved
Reserved
PILR02 [R/W]
00000000
Reserved
000E44H
Reserved
Reserved
Reserved
Reserved
000E48H
Reserved
Reserved
Reserved
Reserved
000E4CH
Reserved
Reserved
PILR14 [R/W]
00000000
PILR15 [R/W]
- - - - 0000
000E50H
PILR16 [R/W]
00000000
PILR17 [R/W]
0000 - - - -
PILR18 [R/W]
- 000 - 000
PILR19 [R/W]
- 000 - 000
000E54H
PILR20 [R/W]
- - - - - 000
Reserved
PILR22 [R/W]
- - 00 - 0 - 0
PILR23 [R/W]
- 0000000
000E58H
PILR24 [R/W]
00000000
PILR25 [R/W]
00000000
PILR26 [R/W]
00000000
PILR27 [R/W]
00000000
000E5CH
PILR28 [R/W]
- - 000000
PILR29 [R/W]
00000000
Reserved
Reserved
000E60H
to
000E7CH
DS07-16610-2E
Reserved
R-bus Port
Output Drive Select
Register
R-bus Port
Input Level Select
Register
Reserved
57
MB91460C Series
000E80H
Reserved
Reserved
EPILR02 [R/W]
00000000
Reserved
000E84H
Reserved
Reserved
Reserved
Reserved
000E88H
Reserved
Reserved
Reserved
Reserved
000E8CH
Reserved
Reserved
EPILR14 [R/W]
00000000
EPILR15 [R/W]
- - - - 0000
000E90H
EPILR16 [R/W]
00000000
EPILR17 [R/W]
0000 - - - -
EPILR18 [R/W]
- 000 - 000
EPILR19 [R/W]
- 000 - 000
000E94H
EPILR20 [R/W]
- - - - - 000
Reserved
EPILR22 [R/W]
- - 00 - 0 - 0
EPILR23 [R/W]
- 0000000
000E98H
EPILR24 [R/W]
00000000
EPILR25 [R/W]
00000000
EPILR26 [R/W]
00000000
EPILR27 [R/W]
00000000
000E9CH
EPILR28 [R/W]
- - 00000
EPILR29 [R/W]
00000000
Reserved
Reserved
000EA0H
to
000EBCH
Reserved
Reserved
000EC0H
Reserved
Reserved
PPER02 [R/W]
00000000
Reserved
000EC4H
Reserved
Reserved
Reserved
Reserved
000EC8H
Reserved
Reserved
Reserved
Reserved
000ECCH
Reserved
Reserved
PPER14 [R/W]
00000000
PPER15 [R/W]
- - - - 0000
000ED0H
PPER16 [R/W]
00000000
PPER17 [R/W]
0000 - - - -
PPER18 [R/W]
- 000 - 000
PPER19 [R/W]
- 000 - 000
000ED4H
PPER20 [R/W]
- - - - - 000
Reserved
PPER22 [R/W]
- - 00 - 0 - 0
PPER23 [R/W]
- 0000000
000ED8H
PPER24 [R/W]
00000000
PPER25 [R/W]
00000000
PPER26 [R/W]
00000000
PPER27 [R/W]
00000000
000EDCH
PPER28 [R/W]
- - 00000
PPER29 [R/W]
00000000
Reserved
Reserved
000EE0H
to
000EFCH
58
Reserved
R-bus Extra
Port Input Level
Select Register
R-bus Port
Pull-Up/Down Enable
Register
Reserved
DS07-16610-2E
MB91460C Series
000F00H
Reserved
Reserved
PPCR02 [R/W]
11111111
Reserved
000F04H
Reserved
Reserved
Reserved
Reserved
000F08H
Reserved
Reserved
Reserved
Reserved
000F0CH
Reserved
Reserved
PPCR14 [R/W]
11111111
PPCR15 [R/W]
- - - - 1111
000F10H
PPCR16 [R/W]
11111111
PPCR17 [R/W]
1111 - - - -
PPCR18 [R/W]
- 111 - 111
PPCR19 [R/W]
- 111 - 111
000F14H
PPCR20 [R/W]
- - - - - 111
Reserved
PPCR22 [R/W]
- - 11 - 1 - 1
PPCR23 [R/W]
-1111111
000F18H
PPCR24 [R/W]
11111111
PPCR25 [R/W]
11111111
PPCR26 [R/W]
11111111
PPCR27 [R/W]
11111111
000F1CH
PPCR28 [R/W]
- - 11111
PPCR29 [R/W]
11111111
Reserved
Reserved
R-bus Port
Pull-Up/Down Control
Register
000F20H
to 000F3CH
Reserved
001000H
DMASA0 [R/W]
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
001004H
DMADA0 [R/W]
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
001008H
DMASA1 [R/W]
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
00100CH
DMADA1 [R/W]
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
001010H
DMASA2 [R/W]
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
001014H
DMADA2 [R/W]
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
001018H
DMASA3 [R/W]
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
00101CH
DMADA3 [R/W]
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
001020H
DMASA4 [R/W]
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
001024H
DMADA4 [R/W]
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
001028H
to
001FFCH
Reserved
Reserved
002000H
to
006FFCH
MB91F467Cx Flash-cache size is 8 Kbytes : 004000H to 005FFCH
MB91F465CA Flash-cache size is 8 Kbytes : 004000H to 005FFCH
MB91F463CA Flash-cache size is 4 Kbytes : 005000H to 005FFCH
Flash-cache /
I-RAM area
DS07-16610-2E
Reserved
DMAC
59
MB91460C Series
007000H
007004H
FMCS [R/W]
01101000
FMCR [R]
- - - 00000
FMWT [R/W]
11111111 11111111
FCHCR [R/W]
- - - - - - 00 10000011
FMWT2 [R]
- 001 - - - -
FMPS [R/W]
- - - - - 000
Flash Memory/
Flash-cache/
I-RAM Control
Register
007008H
FMAC [R]
00000000 00000000 00000000 00000000
00700CH
FCHA0 [R/W]
- - - - - - - - - - - 00000 00000000 00000000
007010H
FCHA1 [R/W]
- - - - - - - - - - - 00000 00000000 00000000
007014H
to
007FFCH
Reserved
Reserved
008000H
to
00BFFCH
MB91F467Cx Boot-ROM size is 4 Kbytes : 00B000H to 00BFFCH
MB91F465CA Boot-ROM size is 4 Kbytes : 00B000H to 00BFFCH
MB91F463CA Boot-ROM size is 4 Kbytes : 00B000H to 00BFFCH
(instruction access is 1 wait cycle, data access is 1 wait cycle)
Boot ROM area
00C000H
CTRLR0 [R/W]
00000000 00000001
STATR0 [R/W]
00000000 00000000
00C004H
ERRCNT0 [R]
00000000 00000000
BTR0 [R/W]
00100011 00000001
00C008H
INTR0 [R]
00000000 00000000
TESTR0 [R/W]
00000000 X0000000
00C00CH
BRPE0 [R/W]
00000000 00000000
Reserved
00C010H
IF1CREQ0 [R/W]
00000000 00000001
IF1CMSK0 [R/W]
00000000 00000000
00C014H
IF1MSK20 [R/W]
11111111 11111111
IF1MSK10 [R/W]
11111111 11111111
00C018H
IF1ARB20 [R/W]
00000000 00000000
IF1ARB10 [R/W]
00000000 00000000
00C01CH
IF1MCTR0 [R/W]
00000000 00000000
Reserved
00C020H
IF1DTA10 [R/W]
00000000 00000000
IF1DTA20 [R/W]
00000000 00000000
00C024H
IF1DTB10 [R/W]
00000000 00000000
IF1DTB20 [R/W]
00000000 00000000
00C028H
to
00C02CH
CAN 0
Control
Register
CAN 0
IF 1 Register
Reserved
00C030H
IF1DTA20 [R/W]
00000000 00000000
IF1DTA10 [R/W]
00000000 00000000
00C034H
IF1DTB20 [R/W]
00000000 00000000
IF1DTB10 [R/W]
00000000 00000000
60
Flash-cache Noncacheable area setting
Register
DS07-16610-2E
MB91460C Series
00C038H
to
00C03CH
Reserved
00C040H
IF2CREQ0 [R/W]
00000000 00000001
IF2CMSK0 [R/W]
00000000 00000000
00C044H
IF2MSK20 [R/W]
11111111 11111111
IF2MSK10 [R/W]
11111111 11111111
00C048H
IF2ARB20 [R/W]
00000000 00000000
IF2ARB10 [R/W]
00000000 00000000
00C04CH
IF2MCTR0 [R/W]
00000000 00000000
Reserved
00C050H
IF2DTA10 [R/W]
00000000 00000000
IF2DTA20 [R/W]
00000000 00000000
00C054H
IF2DTB10 [R/W]
00000000 00000000
IF2DTB20 [R/W]
00000000 00000000
00C058H
to
00C05CH
Reserved
00C060H
IF2DTA20 [R/W]
00000000 00000000
IF2DTA10 [R/W]
00000000 00000000
00C064H
IF2DTB20 [R/W]
00000000 00000000
IF2DTB10 [R/W]
00000000 00000000
00C068H
to
00C07CH
00C080H
Reserved
TREQR20 [R]
00000000 00000000
00C084H
to
00C08CH
00C090H
NEWDT20 [R]
00000000 00000000
00C0B4H
to
00C0FCH
DS07-16610-2E
NEWDT10 [R]
00000000 00000000
CAN 0
Status Flags
Reserved
INTPND20 [R]
00000000 00000000
00C0A4H
to
00C0ACH
00C0B0H
TREQR10 [R]
00000000 00000000
Reserved
00C094H
to
00C09CH
00C0A0H
CAN 0
IF 2 Register
INTPND10 [R]
00000000 00000000
Reserved
MSGVAL20 [R]
00000000 00000000
MSGVAL10 [R]
00000000 00000000
Reserved
Reserved
61
MB91460C Series
00C100H
CTRLR1 [R/W]
00000000 00000001
STATR1 [R/W]
00000000 00000000
00C104H
ERRCNT1 [R]
00000000 00000000
BTR1 [R/W]
00100011 00000001
00C108H
INTR1 [R]
00000000 00000000
TESTR1 [R/W]
00000000 X0000000
00C10CH
BRPE1 [R/W]
00000000 00000000
Reserved
00C110H
IF1CREQ1 [R/W]
00000000 00000001
IF1CMSK1 [R/W]
00000000 00000000
00C114H
IF1MSK21 [R/W]
11111111 11111111
IF1MSK11 [R/W]
11111111 11111111
00C118H
IF1ARB21 [R/W]
00000000 00000000
IF1ARB11 [R/W]
00000000 00000000
00C11CH
IF1MCTR1 [R/W]
00000000 00000000
Reserved
00C120H
IF1DTA11 [R/W]
00000000 00000000
IF1DTA21 [R/W]
00000000 00000000
00C124H
IF1DTB11 [R/W]
00000000 00000000
IF1DTB21 [R/W]
00000000 00000000
00C128H
to
00C12CH
IF1DTA21 [R/W]
00000000 00000000
IF1DTA11 [R/W]
00000000 00000000
00C134H
IF1DTB21 [R/W]
00000000 00000000
IF1DTB11 [R/W]
00000000 00000000
62
CAN 1
IF 1 Register
Reserved
00C130H
00C138H
to
00C13CH
CAN 1
Control
Register
Reserved
Reserved
DS07-16610-2E
MB91460C Series
00C140H
IF2CREQ1 [R/W]
00000000 00000001
IF2CMSK1 [R/W]
00000000 00000000
00C144H
IF2MSK21 [R/W]
11111111 11111111
IF2MSK11 [R/W]
11111111 11111111
00C148H
IF2ARB21 [R/W]
00000000 00000000
IF2ARB11 [R/W]
00000000 00000000
00C14CH
IF2MCTR1 [R/W]
00000000 00000000
Reserved
00C150H
IF2DTA11 [R/W]
00000000 00000000
IF2DTA21 [R/W]
00000000 00000000
00C154H
IF2DTB11 [R/W]
00000000 00000000
IF2DTB21 [R/W]
00000000 00000000
00C158H
to
00C15CH
Reserved
00C160H
IF2DTA21 [R/W]
00000000 00000000
IF2DTA11 [R/W]
00000000 00000000
00C164H
IF2DTB21 [R/W]
00000000 00000000
IF2DTB11 [R/W]
00000000 00000000
00C168H
to
00C17CH
00C180H
Reserved
TREQR21 [R]
00000000 00000000
00C184H
to
00C18CH
00C190H
NEWDT21 [R]
00000000 00000000
00C1B4H
to
00C1FCH
DS07-16610-2E
NEWDT11 [R]
00000000 00000000
CAN 1
Status Flags
Reserved
INTPND21 [R]
00000000 00000000
00C1A4H
to
00C1ACH
00C1B0H
TREQR11 [R]
00000000 00000000
Reserved
00C194H
to
00C19CH
00C1A0H
CAN 1
IF 2 Register
INTPND11 [R]
00000000 00000000
Reserved
MSGVAL21 [R]
00000000 00000000
Reserved
MSGVAL11 [R]
00000000 00000000
Reserved
CAN 1
Status Flags
Reserved
63
MB91460C Series
00C200H
CTRLR2 [R/W]
00000000 00000001
STATR2 [R/W]
00000000 00000000
00C204H
ERRCNT2 [R]
00000000 00000000
BTR2 [R/W]
00100011 00000001
00C208H
INTR2 [R]
00000000 00000000
TESTR2 [R/W]
00000000 X0000000
00C20CH
BRPE2 [R/W]
00000000 00000000
Reserved
00C210H
IF1CREQ2 [R/W]
00000000 00000001
IF1CMSK2 [R/W]
00000000 00000000
00C214H
IF1MSK22 [R/W]
11111111 11111111
IF1MSK12 [R/W]
11111111 11111111
00C218H
IF1ARB22 [R/W]
00000000 00000000
IF1ARB12 [R/W]
00000000 00000000
00C21CH
IF1MCTR2 [R/W]
00000000 00000000
Reserved
00C220H
IF1DTA12 [R/W]
00000000 00000000
IF1DTA22 [R/W]
00000000 00000000
00C224H
IF1DTB12 [R/W]
00000000 00000000
IF1DTB22 [R/W]
00000000 00000000
00C228H
to
00C22CH
IF1DTA22 [R/W]
00000000 00000000
IF1DTA12 [R/W]
00000000 00000000
00C234H
IF1DTB22 [R/W]
00000000 00000000
IF1DTB12 [R/W]
00000000 00000000
64
CAN 2
IF 1 Register
Reserved
00C230H
00C238H
to
00C23CH
CAN 2
Control
Register
Reserved
Reserved
DS07-16610-2E
MB91460C Series
00C240H
IF2CREQ2 [R/W]
00000000 00000001
IF2CMSK2 [R/W]
00000000 00000000
00C244H
IF2MSK22 [R/W]
11111111 11111111
IF2MSK12 [R/W]
11111111 11111111
00C248H
IF2ARB22 [R/W]
00000000 00000000
IF2ARB12 [R/W]
00000000 00000000
00C24CH
IF2MCTR2 [R/W]
00000000 00000000
Reserved
00C250H
IF2DTA12 [R/W]
00000000 00000000
IF2DTA22 [R/W]
00000000 00000000
00C254H
IF2DTB12 [R/W]
00000000 00000000
IF2DTB22 [R/W]
00000000 00000000
00C258H
to
00C25CH
Reserved
00C260H
IF2DTA22 [R/W]
00000000 00000000
IF2DTA12 [R/W]
00000000 00000000
00C264H
IF2DTB22 [R/W]
00000000 00000000
IF2DTB12 [R/W]
00000000 00000000
00C268H
to
00C27CH
00C280H
Reserved
TREQR22 [R]
00000000 00000000
00C284H
to
00C28CH
00C290H
00C2B4H
to
00EFFCH
DS07-16610-2E
TREQR12 [R]
00000000 00000000
NEWDT22 [R]
00000000 00000000
NEWDT12 [R]
00000000 00000000
CAN 2
Status Flags
Reserved
INTPND22 [R]
00000000 00000000
00C2A4H
to
00C2ACH
00C2B0H
Reserved
Reserved
00C294H
to
00C29CH
00C2A0H
CAN 2
IF 2 Register
INTPND12 [R]
00000000 00000000
Reserved
MSGVAL22 [R]
00000000 00000000
MSGVAL12 [R]
00000000 00000000
Reserved
CAN 2
Status Flags
Reserved
65
MB91460C Series
00F000H
BCTRL [R/W]
- - - - - - - - - - - - - - - - 11111100 00000000
00F004H
BSTAT [R/W]
- - - - - - - - - - - - - 000 00000000 10 - - 0000
00F008H
BIAC [R]
- - - - - - - - - - - - - - - - 00000000 00000000
00F00CH
BOAC [R]
- - - - - - - - - - - - - - - - 00000000 00000000
00F010H
BIRQ [R/W]
- - - - - - - - - - - - - - - - 00000000 00000000
00F014H
to 00F01CH
Reserved
00F020H
BCR0 [R/W]
- - - - - - - - 00000000 00000000 00000000
00F024H
BCR1 [R/W]
- - - - - - - - 00000000 00000000 00000000
00F028H
BCR2 [R/W]
- - - - - - - - 00000000 00000000 00000000
00F02CH
BCR3 [R/W]
- - - - - - - - 00000000 00000000 00000000
00F030H
to 00F07CH
Reserved
00F080H
BAD0 [R/W]
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
00F084H
BAD1 [R/W]
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
00F088H
BAD2 [R/W]
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
00F08CH
BAD3 [R/W]
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
00F090H
BAD4 [R/W]
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
00F094H
BAD5 [R/W]
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
00F098H
BAD6 [R/W]
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
66
EDSU / MPU
Reserved
EDSU / MPU
DS07-16610-2E
MB91460C Series
00F09CH
BAD7 [R/W]
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
00F0A0H
BAD8 [R/W]
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
00F0A4H
BAD9 [R/W]
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
00F0A8H
BAD10 [R/W]
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
00F0ACH
BAD11 [R/W]
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
00F0B0H
BAD12 [R/W]
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
00F0B4H
BAD13 [R/W]
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
00F0B8H
BAD14 [R/W]
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
00F0BCH
BAD15 [R/W]
XXXXXXXX XXXXXXXX XXXXXXXX XXXXXXXX
00F0C0H
to
01FFFCH
Reserved
Reserved
020000H
to
02FFFCH
MB91F467Cx D-RAM size is 32 Kbytes : 028000H to 02FFFCH
MB91F465CA D-RAM size is 16 Kbytes : 02C000H to 02FFFCH
MB91F463CA D-RAM size is 16 Kbytes : 02C000H to 02FFFCH
(data access is 0 wait cycles)
D-RAM area
030000H
to
03FFFCH
MB91F467Cx ID-RAM size is 32 Kbytes : 030000H to 037FFCH
MB91F465CA ID-RAM size is 16 Kbytes : 030000H to 033FFCH
MB91F463CA ID-RAM size is 8 Kbytes : 030000H to 031FFCH
(instruction access is 0 wait cycles, data access is 1 wait cycle)
ID-RAM area
EDSU / MPU
*1 : depends on the number of available CAN channels
DS07-16610-2E
67
MB91460C Series
2. Flash memory and external bus area
32bit read/write
16bit read/write
Address
dat[31:16]
dat[31:0]
dat[15:0]
dat[31:16]
dat[15:0]
Register
+0
+1
+2
+3
+4
+5
+6
+7
Block
040000H
to
05FFF8H
SA8 (64KB, MB91F467Cx);
Reserved (MB91F465CA,
MB91F463CA)
SA9 (64KB, MB91F467Cx);
Reserved (MB91F465CA,
MB91F463CA)
ROMS0
060000H
to
07FFF8H
SA10 (64KB, MB91F467Cx);
Reserved (MB91F465CA,
MB91F463CA)
SA11 (64KB, MB91F467Cx);
Reserved (MB91F465CA,
MB91F463CA)
ROMS1
080000H
to
09FFF8H
SA12 (64KB, MB91F467Cx,
MB91F465CA);
Reserved (MB91F463CA)
SA13 (64KB, MB91F467Cx,
MB91F465CA);
Reserved (MB91F463CA)
ROMS2
0A0000H
to
0BFFF8H
SA14 (64KB, MB91F467Cx,
MB91F465CA);
Reserved (MB91F463CA)
SA15 (64KB, MB91F467Cx,
MB91F465CA);
Reserved (MB91F463CA)
ROMS3
0C0000H
to
0DFFF8H
SA16 (64KB)
SA17 (64KB)
ROMS4
0E0000H
to
0FFFF0H
SA18 (64KB)
SA19 (64KB)
0FFFF8H
FMV [R]
06 00 00 00H
FRV [R]
00 00 BF F8H
100000H
to
11FFF8H
SA20 (64KB, MB91F467Cx);
Reserved (MB91F465CA,
MB91F463CA)
SA21 (64KB, MB91F467Cx);
Reserved (MB91F465CA,
MB91F463CA)
120000H
to
13FFF8H
SA22 (64KB, MB91F467Cx);
Reserved (MB91F465CA,
MB91F463CA)
SA23 (64KB, MB91F467Cx);
Reserved (MB91F465CA,
MB91F463CA)
140000H
to
143FF8H
SA0 (8KB, MB91F467Cx);
Reserved (MB91F465CA,
MB91F463CA)
SA1 (8KB, MB91F467Cx);
Reserved (MB91F465CA,
MB91F463CA)
144000H
to
17FF8H
SA2 (8KB, MB91F467Cx);
Reserved (MB91F465CA,
MB91F463CA)
SA3 (8KB, MB91F467Cx);
Reserved (MB91F465CA,
MB91F463CA)
148000H
to
14BFF8H
SA4 (8KB)
SA5 (8KB)
14C000H
to
14FFF8H
SA6 (8KB)
SA7 (8KB)
150000H
to
17FFF8H
68
dat[31:0]
ROMS5
ROMS6
ROMS7
Reserved
DS07-16610-2E
MB91460C Series
32bit read/write
16bit read/write
Address
dat[31:0]
dat[31:16]
dat[31:0]
dat[15:0]
dat[31:16]
dat[15:0]
Register
+0
+1
+2
+3
+4
+5
+6
+7
Block
180000H
to
1BFFF8H
ROMS8
1C0000H
to
1FFFF8H
ROMS9
200000H
to
27FFF8H
ROMS10
280000H
to
2FFFF8H
ROMS11
300000H
to
37FFF8H
Reserved
ROMS12
380000H
to
3FFFF8H
ROMS13
400000H
to
47FFF8H
ROMS14
480000H
to
4FFFF8H
ROMS15
Notes: Write operations to address 0FFFF8H and 0FFFFCH are not possible. When reading these addresses, the
values shown above will be read.
On MB91F465CA and MB91F463CA, write access to the flash is only possible in 16-bit mode.
DS07-16610-2E
69
MB91460C Series
■ INTERRUPT VECTOR TABLE
Interrupt
number
Interrupt
Interrupt level *1
Decimal
Hexadecimal
Reset
0
00
-
Mode vector
1
01
System reserved
2
System reserved
DMA
Resource
number
Offset
Default Vector
address
-
0x3FC
0x000FFFFC
-
-
0x3F8
0x000FFFF8
02
-
-
0x3F4
0x000FFFF4
3
03
-
-
0x3F0
0x000FFFF0
System reserved
4
04
-
-
0x3EC
0x000FFFEC
CPU supervisor mode
(INT #5 instruction) *6
5
05
-
-
0x3E8
0x000FFFE8
Memory Protection exception *6
6
06
-
-
0x3E4
0x000FFFE4
Co-processor
fault trap *5
7
07
-
-
0x3E0
0x000FFFE0
Co-processor
error trap *5
8
08
-
-
0x3DC
0x000FFFDC
INTE instruction *5
9
09
-
-
0x3D8
0x000FFFD8
Instruction break
exception *5
10
0A
-
-
0x3D4
0x000FFFD4
Operand break trap *5
11
0B
-
-
0x3D0
0x000FFFD0
Step trace trap *5
12
0C
-
-
0x3CC
0x000FFFCC
13
0D
-
-
0x3C8
0x000FFFC8
Undefined instruction
exception
14
0E
-
-
0x3C4
0x000FFFC4
NMI request
15
0F
0x3C0
0x000FFFC0
External Interrupt 0
16
10
0x3BC
0x000FFFBC
0, 16
External Interrupt 1
17
11
0x3B8
0x000FFFB8
1, 17
External Interrupt 2
18
12
0x3B4
0x000FFFB4
2, 18
External Interrupt 3
19
13
0x3B0
0x000FFFB0
3, 19
External Interrupt 4
20
14
0x3AC
0x000FFFAC
20
External Interrupt 5
21
15
0x3A8
0x000FFFA8
21
External Interrupt 6
22
16
0x3A4
0x000FFFA4
22
External Interrupt 7
23
17
0x3A0
0x000FFFA0
23
External Interrupt 8
24
18
0x39C
0x000FFF9C
External Interrupt 9
25
19
0x398
0x000FFF98
External Interrupt 10
26
1A
0x394
0x000FFF94
External Interrupt 11
27
1B
0x390
0x000FFF90
NMI interrupt (tool)
70
*5
Setting Register
Register address
Interrupt vector *2
FH fixed
ICR00
0x440
ICR01
0x441
ICR02
0x442
ICR03
0x443
ICR04
0x444
ICR05
0x445
DS07-16610-2E
MB91460C Series
Interrupt
number
Interrupt
Decimal
Hexadecimal
External Interrupt 12
28
1C
External Interrupt 13
29
1D
External Interrupt 14
30
1E
Reserved
31
1F
Reload Timer 0
32
20
Reload Timer 1
33
21
Reload Timer 2
34
22
Reload Timer 3
35
23
Reload Timer 4
36
24
Reload Timer 5
37
25
Reload Timer 6
38
26
Reload Timer 7
39
27
Free Run Timer 0
40
28
Free Run Timer 1
41
29
Free Run Timer 2
42
2A
Free Run Timer 3
43
2B
Free Run Timer 4
44
2C
Free Run Timer 5
45
2D
Free Run Timer 6
46
2E
Free Run Timer 7
47
2F
CAN 0
48
30
CAN 1
49
31
CAN 2
50
32
Reserved
51
33
Reserved
52
34
Reserved
53
35
Reserved
54
36
Reserved
55
37
Reserved
56
38
Reserved
57
39
USART (LIN) 2 RX
58
3A
USART (LIN) 2 TX
59
3B
Reserved
60
3C
Reserved
61
3D
DS07-16610-2E
Interrupt level *1
Setting Register
Register address
ICR06
0x446
ICR07
0x447
ICR08
0x448
ICR09
0x449
ICR10
0x44A
ICR11
0x44B
ICR12
0x44C
ICR13
0x44D
ICR14
0x44E
ICR15
0x44F
ICR16
0x450
ICR17
0x451
ICR18
0x452
ICR19
0x453
ICR20
0x454
ICR21
0x455
ICR22
0x456
Interrupt vector *2
DMA
Resource
number
Offset
Default Vector
address
0x38C
0x000FFF8C
0x388
0x000FFF88
0x384
0x000FFF84
0x380
0x000FFF80
0x37C
0x000FFF7C
4, 32
0x378
0x000FFF78
5, 33
0x374
0x000FFF74
34
0x370
0x000FFF70
35
0x36C
0x000FFF6C
36
0x368
0x000FFF68
37
0x364
0x000FFF64
38
0x360
0x000FFF60
39
0x35C
0x000FFF5C
40
0x358
0x000FFF58
41
0x354
0x000FFF54
42
0x350
0x000FFF50
43
0x34C
0x000FFF4C
44
0x348
0x000FFF48
45
0x344
0x000FFF44
46
0x340
0x000FFF40
47
0x33C
0x000FFF3C
0x338
0x000FFF38
0x334
0x000FFF34
0x330
0x000FFF30
0x32C
0x000FFF2C
0x328
0x000FFF28
0x324
0x000FFF24
6, 48
0x320
0x000FFF20
7, 49
0x31C
0x000FFF1C
8, 50
0x318
0x000FFF18
9, 51
0x314
0x000FFF14
52
0x310
0x000FFF10
53
0x30C
0x000FFF0C
54
0x308
0x000FFF08
55
71
MB91460C Series
Interrupt
number
Interrupt
Decimal
Hexadecimal
System reserved
62
3E
Delayed Interrupt
63
3F
System reserved *3
64
40
*3
65
41
USART (LIN, FIFO) 4 RX
66
42
USART (LIN, FIFO) 4 TX
67
43
USART (LIN, FIFO) 5 RX
68
44
USART (LIN, FIFO) 5 TX
69
45
USART (LIN, FIFO) 6 RX
70
46
USART (LIN, FIFO) 6 TX
71
47
USART (LIN, FIFO) 7 RX
72
48
USART (LIN, FIFO) 7 TX
73
49
IC0/IC2
74
4A
I2C 3
75
4B
Reserved
76
4C
Reserved
77
4D
Reserved
78
4E
Reserved
79
4F
Reserved
80
50
Reserved
81
51
Reserved
82
52
Reserved
83
53
Reserved
84
54
Reserved
85
55
Reserved
86
56
Reserved
87
57
Reserved
88
58
Reserved
89
59
Reserved
90
5A
Reserved
91
5B
Input Capture 0
92
5C
Input Capture 1
93
5D
Input Capture 2
94
5E
Input Capture 3
95
5F
System reserved
2
72
2
Interrupt level *1
Setting Register
Register address
ICR23 *4
0x457
(ICR24)
(0x458)
ICR25
0x459
ICR26
0x45A
ICR27
0x45B
ICR28
0x45C
ICR29
0x45D
ICR30
0x45E
ICR31
0x45F
ICR32
0x460
ICR33
0x461
ICR34
0x462
ICR35
0x463
ICR36
0x464
ICR37
0x465
ICR38
0x466
ICR39
0x467
Interrupt vector *2
DMA
Resource
number
Offset
Default Vector
address
0x304
0x000FFF04
0x300
0x000FFF00
0x2FC
0x000FFEFC
0x2F8
0x000FFEF8
0x2F4
0x000FFEF4
10, 56
0x2F0
0x000FFEF0
11, 57
0x2EC
0x000FFEEC
12, 58
0x2E8
0x000FFEE8
13, 59
0x2E4
0x000FFEE4
60
0x2E0
0x000FFEE0
61
0x2DC
0x000FFEDC
62
0x2D8
0x000FFED8
63
0x2D4
0x000FFED4
0x2D0
0x000FFED0
0x2CC
0x000FFECC
64
0x2C8
0x000FFEC8
65
0x2C4
0x000FFEC4
66
0x2C0
0x000FFEC0
67
0x2BC
0x000FFEBC
68
0x2B8
0x000FFEB8
69
0x2B4
0x000FFEB4
70
0x2B0
0x000FFEB0
71
0x2AC
0x000FFEAC
72
0x2A8
0x000FFEA8
73
0x2A4
0x000FFEA4
74
0x2A0
0x000FFEA0
75
0x29C
0x000FFE9C
76
0x298
0x000FFE98
77
0x294
0x000FFE94
78
0x290
0x000FFE90
79
0x28C
0x000FFE8C
80
0x288
0x000FFE88
81
0x284
0x000FFE84
82
0x280
0x000FFE80
83
DS07-16610-2E
MB91460C Series
Interrupt
number
Interrupt
Decimal
Hexadecimal
Input Capture 4
96
60
Input Capture 5
97
61
Input Capture 6
98
62
Input Capture 7
99
63
Output Compare 0
100
64
Output Compare 1
101
65
Output Compare 2
102
66
Output Compare 3
103
67
Reserved
104
68
Reserved
105
69
Reserved
106
6A
Reserved
107
6B
Sound Generator
108
6C
Phase Frequ. Modulator
109
6D
System reserved
110
6E
System reserved
111
6F
Reserved
112
70
Reserved
113
71
Reserved
114
72
Reserved
115
73
Prog. Pulse Gen. 4
116
74
Prog. Pulse Gen. 5
117
75
Prog. Pulse Gen. 6
118
76
Prog. Pulse Gen. 7
119
77
Prog. Pulse Gen. 8
120
78
Prog. Pulse Gen. 9
121
79
Prog. Pulse Gen. 10
122
7A
Prog. Pulse Gen. 11
123
7B
Prog. Pulse Gen. 12
124
7C
Prog. Pulse Gen. 13
125
7D
Prog. Pulse Gen. 14
126
7E
Prog. Pulse Gen. 15
127
7F
Up/Down Counter 0
128
80
Reserved
129
81
DS07-16610-2E
Interrupt level *1
Setting Register
Register address
ICR40
0x468
ICR41
0x469
ICR42
0x46A
ICR43
0x46B
ICR44
0x46C
ICR45
0x46D
ICR46
0x46E
ICR47 *4
0x46F
ICR48
0x470
ICR49
0x471
ICR50
0x472
ICR51
0x473
ICR52
0x474
ICR53
0x475
ICR54
0x476
ICR55
0x477
ICR56
0x478
Interrupt vector *2
DMA
Resource
number
Offset
Default Vector
address
0x27C
0x000FFE7C
84
0x278
0x000FFE78
85
0x274
0x000FFE74
86
0x270
0x000FFE70
87
0x26C
0x000FFE6C
88
0x268
0x000FFE68
89
0x264
0x000FFE64
90
0x260
0x000FFE60
91
0x25C
0x000FFE5C
92
0x258
0x000FFE58
93
0x254
0x000FFE54
94
0x250
0x000FFE50
95
0x24C
0x000FFE4C
0x248
0x000FFE48
0x244
0x000FFE44
0x240
0x000FFE40
0x23C
0x000FFE3C
15, 96
0x238
0x000FFE38
97
0x234
0x000FFE34
98
0x230
0x000FFE30
99
0x22C
0x000FFE2C
100
0x228
0x000FFE28
101
0x224
0x000FFE24
102
0x220
0x000FFE20
103
0x21C
0x000FFE1C
104
0x218
0x000FFE18
105
0x214
0x000FFE14
106
0x210
0x000FFE10
107
0x20C
0x000FFE0C
108
0x208
0x000FFE08
109
0x204
0x000FFE04
110
0x200
0x000FFE00
111
0x1FC
0x000FFDFC
0x1F8
0x000FFDF8
73
MB91460C Series
Interrupt
number
Interrupt
Decimal
Hexadecimal
Up/Down Counter 2
130
82
Up/Down Counter 3
131
83
Real Time Clock
132
84
Calibration Unit
133
85
A/D Converter 0
134
86
Reserved
135
87
Alarm Comparator 0
136
88
Reserved
137
89
Low Voltage Detection
138
8A
Reserved
139
8B
Timebase Overflow
140
8C
PLL Clock Gear
141
8D
DMA Controller
142
8E
Main/Sub OSC stability wait
143
8F
Security vector
144
Used by the INT
instruction.
145
to
255
Interrupt level *1
Setting Register
Register address
Interrupt vector *2
Offset
Default Vector
address
0x1F4
0x000FFDF4
0x1F0
0x000FFDF0
0x1EC
0x000FFDEC
0x1E8
0x000FFDE8
0x1E4
0x000FFDE4
0x1E0
0x000FFDE0
0x1DC
0x000FFDDC
0x1D8
0x000FFDD8
0x1D4
0x000FFDD4
0x1D0
0x000FFDD0
0x1CC
0x000FFDCC
0x1C8
0x000FFDC8
0x1C4
0x000FFDC4
0x1C0
0x000FFDC0
ICR57
0x479
ICR58
0x47A
ICR59
0x47B
ICR60
0x47C
ICR61
0x47D
ICR62
0x47E
ICR63
0x47F
90
-
-
0x1BC
0x000FFDBC
91
to
FF
-
-
0x1B8
to
0x000
0x000FFDB8
to
0x000FFC00
DMA
Resource
number
14, 112
Notes:
*1
The Interrupt Control Registers (ICRs) are located in the interrupt controller and set the interrupt level for each
interrupt request. An ICR is provided for each interrupt request.
*2 The vector address for each EIT (exception, interrupt or trap) is calculated by adding the listed offset to the table
base register value (TBR). The TBR specifies the top of the EIT vector table. The addresses listed in the table are
for the default TBR value (0x000FFC00). The TBR is initialized to this value by a reset. After execution of the internal boot ROM TBR is set to 0x000FFC00.
*3 Used by REALOS
*4 ICR23 and ICR47 can be exchanged by setting the REALOS compatibility bit (addr 0x0C03 : IOS[0])
*5 System reserved
*6 Memory Protection Unit (MPU) support
74
DS07-16610-2E
MB91460C Series
■ RECOMMENDED SETTINGS
1. PLL and Clockgear settings
Please note that for MB91F460C series the core base clock frequencies are valid in the 1.8V operation mode
of the Main regulator and Flash .
Recommended PLL divider and clockgear settings
PLL
Input (CLK)
[MHz]
Frequency Parameter
Clockgear Parameter
PLL
Output (X)
[MHz]
Core Base
Clock
[MHz]
DIVM
DIVN
DIVG
MULG
4
2
25
16
24
200
100
4
2
24
16
24
192
96
4
2
23
16
24
184
92
4
2
22
16
24
176
88
4
2
21
16
20
168
84
4
2
20
16
20
160
80
4
2
19
16
20
152
76
4
2
18
16
20
144
72
4
2
17
16
16
136
68
4
2
16
16
16
128
64
4
2
15
16
16
120
60
4
2
14
16
16
112
56
4
2
13
16
12
104
52
4
2
12
16
12
96
48
4
2
11
16
12
88
44
4
4
10
16
24
160
40
4
4
9
16
24
144
36
4
4
8
16
24
128
32
4
4
7
16
24
112
28
4
6
6
16
24
144
24
4
8
5
16
28
160
20
4
10
4
16
32
160
16
4
12
3
16
32
144
12
DS07-16610-2E
Remarks
MULG
75
MB91460C Series
2. Clock Modulator settings
The following table shows all possible settings for the Clock Modulator in a base clock frequency range from
32MHz up to 88MHz.
The Flash access time settings need to be adjusted according to Fmax while the PLL and clockgear settings
should be set according to base clock frequency.
Clock Modulator settings, frequency range and supported supply voltage
76
Modulation
Degree
(k)
Random No
(N)
CMPR
[hex]
Baseclk
[MHz]
Fmin
[MHz]
Fmax
[MHz]
1
3
026F
88
79.5
98.5
1
3
026F
84
76.1
93.8
1
3
026F
80
72.6
89.1
1
5
02AE
80
68.7
95.8
2
3
046E
80
68.7
95.8
1
3
026F
76
69.1
84.5
1
5
02AE
76
65.3
90.8
1
7
02ED
76
62
98.1
2
3
046E
76
65.3
90.8
3
3
066D
76
62
98.1
1
3
026F
72
65.5
79.9
1
5
02AE
72
62
85.8
1
7
02ED
72
58.8
92.7
2
3
046E
72
62
85.8
3
3
066D
72
58.8
92.7
1
3
026F
68
62
75.3
1
5
02AE
68
58.7
80.9
1
7
02ED
68
55.7
87.3
1
9
032C
68
53
95
2
3
046E
68
58.7
80.9
2
5
04AC
68
53
95
3
3
066D
68
55.7
87.3
4
3
086C
68
53
95
1
3
026F
64
58.5
70.7
1
5
02AE
64
55.3
75.9
1
7
02ED
64
52.5
82
1
9
032C
64
49.9
89.1
1
11
036B
64
47.6
97.6
2
3
046E
64
55.3
75.9
DS07-16610-2E
MB91460C Series
Modulation
Degree
(k)
Random No
(N)
CMPR
[hex]
Baseclk
[MHz]
Fmin
[MHz]
Fmax
[MHz]
2
5
04AC
64
49.9
89.1
3
3
066D
64
52.5
82
4
3
086C
64
49.9
89.1
5
3
0A6B
64
47.6
97.6
1
3
026F
60
54.9
66.1
1
5
02AE
60
51.9
71
1
7
02ED
60
49.3
76.7
1
9
032C
60
46.9
83.3
1
11
036B
60
44.7
91.3
2
3
046E
60
51.9
71
2
5
04AC
60
46.9
83.3
3
3
066D
60
49.3
76.7
4
3
086C
60
46.9
83.3
5
3
0A6B
60
44.7
91.3
1
3
026F
56
51.4
61.6
1
5
02AE
56
48.6
66.1
1
7
02ED
56
46.1
71.4
1
9
032C
56
43.8
77.6
1
11
036B
56
41.8
84.9
1
13
03AA
56
39.9
93.8
2
3
046E
56
48.6
66.1
2
5
04AC
56
43.8
77.6
2
7
04EA
56
39.9
93.8
3
3
066D
56
46.1
71.4
3
5
06AA
56
39.9
93.8
4
3
086C
56
43.8
77.6
5
3
0A6B
56
41.8
84.9
6
3
0C6A
56
39.9
93.8
1
3
026F
52
47.8
57
1
5
02AE
52
45.2
61.2
1
7
02ED
52
42.9
66.1
1
9
032C
52
40.8
71.8
1
11
036B
52
38.8
78.6
1
13
03AA
52
37.1
86.8
1
15
03E9
52
35.5
96.9
2
3
046E
52
45.2
61.2
DS07-16610-2E
77
MB91460C Series
78
Modulation
Degree
(k)
Random No
(N)
CMPR
[hex]
Baseclk
[MHz]
Fmin
[MHz]
Fmax
[MHz]
2
5
04AC
52
40.8
71.8
2
7
04EA
52
37.1
86.8
3
3
066D
52
42.9
66.1
3
5
06AA
52
37.1
86.8
4
3
086C
52
40.8
71.8
5
3
0A6B
52
38.8
78.6
6
3
0C6A
52
37.1
86.8
7
3
0E69
52
35.5
96.9
1
3
026F
48
44.2
52.5
1
5
02AE
48
41.8
56.4
1
7
02ED
48
39.6
60.9
1
9
032C
48
37.7
66.1
1
11
036B
48
35.9
72.3
1
13
03AA
48
34.3
79.9
1
15
03E9
48
32.8
89.1
2
3
046E
48
41.8
56.4
2
5
04AC
48
37.7
66.1
2
7
04EA
48
34.3
79.9
3
3
066D
48
39.6
60.9
3
5
06AA
48
34.3
79.9
4
3
086C
48
37.7
66.1
5
3
0A6B
48
35.9
72.3
6
3
0C6A
48
34.3
79.9
7
3
0E69
48
32.8
89.1
1
3
026F
44
40.6
48.1
1
5
02AE
44
38.4
51.6
1
7
02ED
44
36.4
55.7
1
9
032C
44
34.6
60.4
1
11
036B
44
33
66.1
1
13
03AA
44
31.5
73
1
15
03E9
44
30.1
81.4
2
3
046E
44
38.4
51.6
2
5
04AC
44
34.6
60.4
2
7
04EA
44
31.5
73
2
9
0528
44
28.9
92.1
3
3
066D
44
36.4
55.7
DS07-16610-2E
MB91460C Series
Modulation
Degree
(k)
Random No
(N)
CMPR
[hex]
Baseclk
[MHz]
Fmin
[MHz]
Fmax
[MHz]
3
5
06AA
44
31.5
73
4
3
086C
44
34.6
60.4
4
5
08A8
44
28.9
92.1
5
3
0A6B
44
33
66.1
6
3
0C6A
44
31.5
73
7
3
0E69
44
30.1
81.4
8
3
1068
44
28.9
92.1
1
3
026F
40
37
43.6
1
5
02AE
40
34.9
46.8
1
7
02ED
40
33.1
50.5
1
9
032C
40
31.5
54.8
1
11
036B
40
30
59.9
1
13
03AA
40
28.7
66.1
1
15
03E9
40
27.4
73.7
2
3
046E
40
34.9
46.8
2
5
04AC
40
31.5
54.8
2
7
04EA
40
28.7
66.1
2
9
0528
40
26.3
83.3
3
3
066D
40
33.1
50.5
3
5
06AA
40
28.7
66.1
3
7
06E7
40
25.3
95.8
4
3
086C
40
31.5
54.8
4
5
08A8
40
26.3
83.3
5
3
0A6B
40
30
59.9
6
3
0C6A
40
28.7
66.1
7
3
0E69
40
27.4
73.7
8
3
1068
40
26.3
83.3
9
3
1267
40
25.3
95.8
1
3
026F
36
33.3
39.2
1
5
02AE
36
31.5
42
1
7
02ED
36
29.9
45.3
1
9
032C
36
28.4
49.2
1
11
036B
36
27.1
53.8
1
13
03AA
36
25.8
59.3
1
15
03E9
36
24.7
66.1
2
3
046E
36
31.5
42
DS07-16610-2E
79
MB91460C Series
80
Modulation
Degree
(k)
Random No
(N)
CMPR
[hex]
Baseclk
[MHz]
Fmin
[MHz]
Fmax
[MHz]
2
5
04AC
36
28.4
49.2
2
7
04EA
36
25.8
59.3
2
9
0528
36
23.7
74.7
3
3
066D
36
29.9
45.3
3
5
06AA
36
25.8
59.3
3
7
06E7
36
22.8
85.8
4
3
086C
36
28.4
49.2
4
5
08A8
36
23.7
74.7
5
3
0A6B
36
27.1
53.8
6
3
0C6A
36
25.8
59.3
7
3
0E69
36
24.7
66.1
8
3
1068
36
23.7
74.7
9
3
1267
36
22.8
85.8
1
3
026F
32
29.7
34.7
1
5
02AE
32
28
37.3
1
7
02ED
32
26.6
40.2
1
9
032C
32
25.3
43.6
1
11
036B
32
24.1
47.7
1
13
03AA
32
23
52.5
1
15
03E9
32
22
58.6
2
3
046E
32
28
37.3
2
5
04AC
32
25.3
43.6
2
7
04EA
32
23
52.5
2
9
0528
32
21.1
66.1
2
11
0566
32
19.5
89.1
3
3
066D
32
26.6
40.2
3
5
06AA
32
23
52.5
3
7
06E7
32
20.3
75.9
4
3
086C
32
25.3
43.6
4
5
08A8
32
21.1
66.1
5
3
0A6B
32
24.1
47.7
5
5
0AA6
32
19.5
89.1
6
3
0C6A
32
23
52.5
7
3
0E69
32
22
58.6
8
3
1068
32
21.1
66.1
9
3
1267
32
20.3
75.9
DS07-16610-2E
MB91460C Series
Modulation
Degree
(k)
Random No
(N)
CMPR
[hex]
Baseclk
[MHz]
Fmin
[MHz]
Fmax
[MHz]
10
3
1466
32
19.5
89.1
DS07-16610-2E
81
MB91460C Series
■ ELECTRICAL CHARACTERISTICS
1. Absolute maximum ratings
Parameter
Symbol
Rating
Min
Max
Unit
Remarks
⎯
⎯
50
V/ms
1
VDD5R
- 0.3
+ 6.0
V
1
VDD5
- 0.3
+ 6.0
V
1
HVDD5
- 0.3
+ 6.0
V
VDD5-0.3
VDD5+0.3
V
SMC mode
VSS5-0.3
VDD5+0.3
V
General purpose port
mode
Power supply slew rate
Power supply voltage 1*
Power supply voltage 2*
Power supply voltage 3*
HVDD5
Relationship of the supply voltages
VDD5-0.3
VDD5+0.3
V
At least one pin of the
Ports 25 to 29 (SMC,
ANn) is used as digital
input or output.
VSS5-0.3
VDD5+0.3
V
All pins of the Ports 25 to
29 (SMC, ANn) follow the
condition of VIA
AVCC5
Analog power supply voltage*1
AVCC5
- 0.3
+ 6.0
V
*2
Analog reference
power supply voltage*1
AVRH
- 0.3
+ 6.0
V
*2
VI1
Vss5 - 0.3
VDD5 + 0.3
V
VI3
HVss5 - 0.3
HVDD5 + 0.3
V
Input voltage 1*1
1
Input voltage 3*
1
Stepper motor controller
VIA
AVss5 - 0.3
AVcc5 + 0.3
V
Output voltage 1*
1
VO1
Vss5 - 0.3
VDD5 + 0.3
V
Output voltage 3*
1
VO3
HVss5 - 0.3
HVDD5 + 0.3
V
ICLAMP
- 4.0
+ 4.0
mA
*3
Σ |ICLAMP|
⎯
20
mA
*3
⎯
10
mA
⎯
40
mA
⎯
8
mA
⎯
30
mA
⎯
100
mA
⎯
360
mA
⎯
50
mA
⎯
230
mA
⎯
- 10
mA
⎯
- 40
mA
⎯
-4
mA
⎯
- 30
mA
Analog pin input voltage*
Maximum clamp current
Total maximum clamp current
“L” level maximum
output current*4
IOL
“L” level average
output current*5
IOLAV
“L” level total maximum
output current
ΣIOL
“L” level total average
output current*6
“H” level maximum
output current*4
“H” level average
output current*5
82
ΣIOLAV
IOH
IOHAV
Stepper motor controller
Stepper motor controller
Stepper motor controller
Stepper motor controller
Stepper motor controller
Stepper motor controller
Stepper motor controller
DS07-16610-2E
MB91460C Series
Parameter
“H” level total maximum
output current
“H” level total average output
current*6
Symbol
ΣIOH
ΣIOHAV
Rating
Unit
Min
Max
⎯
- 100
mA
⎯
- 360
mA
⎯
- 25
mA
⎯
- 230
mA
Stepper motor controller
Stepper motor controller
Power consumption
PD
⎯
1000
mW
Operating temperature
TA
- 40
+ 105
°C
Tstg
- 55
+ 150
°C
Storage temperature
Remarks
*1 : The parameter is based on VSS5 = HVSS5 = AVSS5 = 0.0 V.
*2 : AVCC5 and AVRH5 must not exceed VDD5 + 0.3 V.
*3 :
•
•
•
•
•
•
•
•
•
Use within recommended operating conditions.
Use with DC voltage (current).
+B signals are input signals that exceed the VDD5 voltage. +B signals should always be applied by
connecting a limiting resistor between the +B signal and the microcontroller.
The value of the limiting resistor should be set so that the current input to the microcontroller pin does not
exceed the rated value at any time , either instantaneously or for an extended period, when the +B signal
is input.
Note that when the microcontroller drive current is low, such as in the low power consumption modes, the
+B input potential can increase the potential at the power supply pin via a protective diode, possibly affecting
other devices.
Note that if the +B signal is input when the microcontroller is off (not fixed at 0 V), power is supplied through
the +B input pin; therefore, the microcontroller may partially operate.
Note that if the +B signal is input at power-on, since the power is supplied through the pin, the power-on reset
may not function in the power supply voltage.
Do not leave +B input pins open.
Example of recommended circuit :
• Input/output equivalent circuit
Protective diode
VCC
Limiting
resistor
P-ch
+B input (0 V to 16 V)
N-ch
R
*4 : Maximum output current is defined as the value of the peak current flowing through any one of the corresponding
pins.
DS07-16610-2E
83
MB91460C Series
*5 : Average output current is defined as the value of the average current flowing through any one of the
corresponding pins for a 100 ms period.
*6 : Total average output current is defined as the value of the average current flowing through all of the
corresponding pins for a 100 ms period.
WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current,
temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
84
DS07-16610-2E
MB91460C Series
2. Recommended operating conditions
(VSS5 = AVSS5 = 0.0 V)
Parameter
Power supply voltage
Smoothing capacitor at
VCC18C pin
Symbol
Max
VDD5
3.0
⎯
5.5
V
VDD5R
3.0
⎯
5.5
V
Internal regulator
4.5
⎯
5.5
V
Stepper motor controller
3.0
⎯
5.5
V
Stepper motor controller
(when all pins are used as
general-purpose ports)
AVCC5
3.0
⎯
5.5
V
A/D converter
CS
⎯
4.7
⎯
μF
Use a X7R ceramic capacitor or
a capacitor that has similar
frequency characteristics.
⎯
⎯
50
V/ms
- 40
⎯
+ 105
°C
HVDD5
TA
40
Main Oscillation
stabilisation time
ns
10
0.6
Vsurge
2
fRC100kHz
fRC2MHz
50
1
Cload = 0 pF
ms
Lock-up time PLL
(4 MHz ->16 ...100MHz)
RC Oscillator
Remarks
Typ
Stepper motor control
slew rate
ESD Protection
(Human body model)
Unit
Min
Power supply slew rate
Operating temperature
Value
ms
kV
100
2
200
4
Rdischarge = 1.5kΩ
Cdischarge = 100pF
kHz
VDDCORE ≥ 1.65V
MHz
WARNING: The recommended operating conditions are required in order to ensure the normal operation of the
semiconductor device. All of the device’s electrical characteristics are warranted when the device is
operated within these ranges.
Always use semiconductor devices within their recommended operating condition ranges. Operation
outside these ranges may adversely affect reliability and could result in device failure.
No warranty is made with respect to uses, operating conditions, or combinations not represented on
the data sheet. Users considering application outside the listed conditions are advised to contact their
FUJITSU representatives beforehand.
DS07-16610-2E
85
MB91460C Series
VCC18C
VSS5
AVSS5
CS
86
DS07-16610-2E
MB91460C Series
3. DC characteristics
Note: In the following tables, “VDD” means HVDD5 for SMC pins or VDD5 for other pins.
In the following tables, “VSS” means Hvss5 for ground Pins of the stepper motor and VSS5 for the other pins.
(VDD5 = AVCC5 = 3.0 V to 5.5 V, VSS5 = AVSS5 = 0 V, TA = -40 °C to + 105 °C)
Parameter Symbol
Pin name
Value
Min
Unit
Remarks
Typ
Max
⎯
VDD + 0.3
V
CMOS
hysteresis
input
⎯
VDD + 0.3
V
4.5 V ≤ VDD ≤ 5.5 V
⎯
VDD + 0.3
V
3 V ≤ VDD ≤ 4.5 V
⎯
Port inputs if CMOS
Hysteresis 0.8/0.2 0.8 × VDD
input is selected
⎯
Port inputs if CMOS 0.7 × VDD
Hysteresis 0.7/0.3
0.74 × VDD
input is selected
⎯
AUTOMOTIVE
Hysteresis input is
selected
0.8 × VDD
⎯
VDD + 0.3
V
⎯
Port inputs if TTL
input is selected
2.0
⎯
VDD + 0.3
V
VIH
Input “H”
voltage
Condition
VIHR
INITX
⎯
0.8 × VDD
⎯
VDD + 0.3
V
INITX input pin
(CMOS
Hysteresis)
VIHM
MD_3 to
MD_0
⎯
VDD - 0.3
⎯
VDD + 0.3
V
Mode input pins
VIHX0S
X0, X0A
⎯
2.5
⎯
VDD + 0.3
V
External clock in
“Oscillation mode”
VIHX0F
X0
⎯
0.8 × VDD
⎯
VDD + 0.3
V
External clock in
“Fast Clock Input
mode”
⎯
Port inputs if CMOS
Hysteresis 0.8/0.2
input is selected
VSS - 0.3
⎯
0.2 × VDD
V
⎯
Port inputs if CMOS
Hysteresis 0.7/0.3
input is selected
VSS - 0.3
⎯
0.3 × VDD
V
VSS - 0.3
⎯
0.5 × VDD
V
4.5 V ≤ VDD ≤ 5.5 V
⎯
Port inputs if
AUTOMOTIVE
Hysteresis input is
selected
VSS - 0.3
⎯
0.46 × VDD
V
3 V ≤ VDD ≤ 4.5 V
⎯
Port inputs if TTL
input is selected
VSS - 0.3
⎯
0.8
V
VIL
Input “L”
voltage
VILR
INITX
⎯
VSS - 0.3
⎯
0.2 × VDD
V
INITX input pin
(CMOS
Hysteresis)
VILM
MD_3 to
MD_0
⎯
VSS - 0.3
⎯
VSS + 0.3
V
Mode input pins
VILXDS
X0, X0A
⎯
VSS - 0.3
⎯
0.5
V
External clock in
“Oscillation mode”
DS07-16610-2E
87
MB91460C Series
(VDD5 = AVCC5 = 3.0 V to 5.5 V, VSS5 = AVSS5 = 0 V, TA = -40 °C to + 105 °C)
Parameter Symbol
Input “L”
voltage
Output “H”
voltage
Pin
name
Condition
X0
⎯
Value
Unit
Remarks
0.2 × VDD
V
External clock in
“Fast Clock Input
mode”
⎯
⎯
V
Driving strength
set to 2 mA
VDD - 0.5
⎯
⎯
V
Driving strength
set to 5 mA
VDD - 0.5
⎯
⎯
V
Min
Typ
Max
VSS - 0.3
⎯
VOH2
4.5V ≤ VDD ≤ 5.5V,
I
Normal OH = - 2mA
outputs 3.0V ≤ VDD ≤ 4.5V,
IOH = - 1.6mA
VDD - 0.5
VOH5
4.5V ≤ VDD ≤ 5.5V,
I
Normal OH = - 5mA
outputs 3.0V ≤ VDD ≤ 4.5V,
IOH = - 3mA
VOH3
I2C
3.0V ≤ VDD ≤ 5.5V,
outputs IOH = - 3mA
VILXDF
4.5V ≤ VDD ≤ 5.5V,
TA = -40 ×C,
IOH = -40mA
VOH30
VDD - 0.5
V
Driving strength
set to 30mA
⎯
⎯
0.4
V
Driving strength
set to 2 mA
VOL5
4.5V ≤ VDD ≤ 5.5V,
Normal IOH = + 5mA
outputs 3.0V ≤ VDD ≤ 4.5V,
IOH = + 3mA
⎯
⎯
0.4
V
Driving strength
set to 5 mA
VOL3
I2C
3.0V ≤ VDD ≤ 5.5V,
outputs IOH = + 3mA
⎯
⎯
0.4
V
0.5
V
VOL2
Output “L“
voltage
High
current 4.5V ≤ VDD ≤ 5.5V,
outputs IOH = -30mA
3.0V ≤ VDD ≤ 4.5V,
IOH = -20mA
4.5V ≤ VDD ≤ 5.5V,
Normal IOH = + 2mA
outputs 3.0V ≤ VDD ≤ 4.5V,
IOH = + 1.6mA
4.5V ≤ VDD ≤ 5.5V,
TA = -40 ×C,
IOH = +40mA
VOL30
High
current 4.5V ≤ VDD ≤ 5.5V,
outputs IOH = +30mA
Driving strength
set to 30mA
3.0V ≤ VDD ≤ 4.5V,
IOH = +20mA
88
DS07-16610-2E
MB91460C Series
Parameter Symbol
Pin
name
Input leakage current
3.0V ≤ VDD ≤ 5.5V
VSS5 < VI < VDD
Pnn_m TA=25 °C
*1
3.0V ≤ VDD ≤ 5.5V
VSS5 < VI < VDD
TA=105 °C
IIL
Typ
Max
-1
⎯
+1
Unit
Remarks
μA
+3
3.0V ≤ VDD ≤ 5.5V
TA=25 °C
-1
⎯
+1
μA
3.0V ≤ VDD ≤ 5.5V
TA=105 °C
-3
⎯
+3
μA
3.0V ≤ VDD ≤ 3.6V
40
100
160
4.5V ≤ VDD ≤ 5.5V
25
50
100
3.0V ≤ VDD ≤ 3.6V
40
100
180
4.5V ≤ VDD ≤ 5.5V
25
50
100
CIN
All
except
VDD5,
VDD5R,
f = 1 MHz
VSS5,
AVCC5,
AVSS,
AVRH5
⎯
5
15
pF
ICC
MB91F467Cx:
CLKB:
100 MHz
VDD5R CLKP:
50 MHz
CLKT:
50 MHz
CLKCAN: 50 MHz
⎯
120
150
mA
TA = + 25 °C
⎯
30
150
μA
TA = + 105 °C
⎯
400
2000
μA
TA = + 25 °C
VDD5R TA = + 105 °C
⎯
100
500
μA
⎯
500
2400
μA
TA = + 25 °C
⎯
50
250
μA
TA = + 105 °C
⎯
450
2200
μA
RTC :
100 kHz mode *5
32 kHz mode *6
Pull-up
resistance
RUP
Pnn_m
*3,
INITX
Pull-down
resistance
RDOWN
Pnn_m
*4
ICCH
ANn *
2
MB91F467Cx
kΩ
kΩ
Code fetch from
Flash
At stop mode *5
RTC :
4 MHz mode *5
ILVE
VDD5
⎯
⎯
70
150
μA
External low
voltage detection
ILVI
VDD5R
⎯
⎯
50
100
μA
Internal low
voltage detection
⎯
⎯
250
500
μA
Main clock
(4 MHz)
⎯
⎯
20
40
μA
Sub clock
(32 kHz)
IOSC
DS07-16610-2E
Min
⎯
IAIN
Power
supply
current
Value
-3
Analog input leakage current
Input
capacitance
Condition
VDD5
89
MB91460C Series
Parameter Symbol
ICC
Power
supply
current
ICCH
Pin
name
VDD5R
140
mA
Code fetch from
Flash
30
150
μA
⎯
300
2000
μA
TA = + 25 °C
⎯
100
500
μA
TA = + 105 °C
⎯
500
2400
μA
TA = + 25 °C
⎯
50
250
μA
TA = + 105 °C
⎯
400
2200
μA
RTC :
100 kHz mode *5
32 kHz mode *6
⎯
110
TA = + 25 °C
⎯
TA = + 105 °C
At stop mode *5
RTC :
4 MHz mode *5
⎯
⎯
70
150
μA
External low
voltage detection
ILVI
VDD5R
⎯
⎯
50
100
μA
Internal low
voltage detection
⎯
⎯
250
500
μA
Main clock
(4 MHz)
⎯
⎯
20
40
μA
Sub clock
(32 kHz)
⎯
100
130
mA
Code fetch from
Flash
TA = + 25 °C
⎯
30
150
μA
TA = + 105 °C
⎯
300
2000
μA
TA = + 25 °C
⎯
100
500
μA
TA = + 105 °C
⎯
500
2400
μA
TA = + 25 °C
⎯
50
250
μA
TA = + 105 °C
⎯
400
2200
μA
RTC :
100 kHz mode *5
32 kHz mode *6
ICCH
VDD5
MB91F463CA:
CLKB:
100 MHz
VDD5R CLKP:
50 MHz
CLKT:
50 MHz
CLKCAN: 50 MHz
VDD5R
At stop mode *5
RTC :
4 MHz mode *5
ILVE
VDD5
⎯
⎯
70
150
μA
External low
voltage detection
ILVI
VDD5R
⎯
⎯
50
100
μA
Internal low
voltage detection
⎯
⎯
250
500
μA
Main clock
(4 MHz)
⎯
⎯
20
40
μA
Sub clock
(32 kHz)
IOSC
90
Remarks
Max
VDD5
ICC
1.
2.
Unit
Typ
ILVE
IOSC
MB91F463CA
(target
data)
Value
Min
MB91F465CA:
CLKB:
100 MHz
VDD5R CLKP:
50 MHz
CLKT:
50 MHz
CLKCAN: 50 MHz
MB91F465CA
Power
supply
current
Condition
VDD5
Pnn_m includes all GPIO pins. Analog (AN) channels and PullUp/PullDown are disabled.
ANn includes all pins where AN channels are enabled.
DS07-16610-2E
MB91460C Series
3.
4.
5.
6.
Pnn_m includes all GPIO pins. The pull up resistors must be enabled by PPER/PPCR setting and
the pins must be in input direction.
Pnn_m includes all GPIO pins. The pull down resistors must be enabled by PPER/PPCR setting and
the pins must be in input direction.
Main regulator OFF, sub regulator set to 1.2 V, Low voltage detection disabled.
Main regulator OFF, sub regulator set 1.2 V, Low voltage detection disabled, RC oscillator enabled.
Additional current consumption of Sub oscillator IOSC has to be taken into account.
DS07-16610-2E
91
MB91460C Series
4. A/D converter characteristics
(VDD5 = AVCC5 = 3.0 V to 5.5 V, VSS5 = AVSS5 = 0 V, TA = −40 °C to + 105 °C)
Parameter
Symbol Pin name
Value
Min
Typ
Max
Unit
Resolution
⎯
⎯
⎯
⎯
10
bit
Total error
⎯
⎯
-3
⎯
+3
LSB
Nonlinearity error
⎯
⎯
- 2.5
⎯
+ 2.5
LSB
Differential nonlinearity
error
⎯
⎯
- 1.9
⎯
+ 1.9
LSB
Zero reading voltage
VOT
ANn
Full scale reading voltage
VFST
ANn
Compare time
Sampling time
Conversion time
Input capacitance
Input resistance
Tcomp
Tsamp
Tconv
CIN
RIN
AVRL − 1.5 AVRL + 0.5 AVRL + 2.5
LSB
LSB
LSB
V
AVRH −
3.5 LSB
AVRH −
1.5 LSB
AVRH + 0.5
LSB
V
0.6
⎯
16,500
μs
4.5 V ≤ AVCC5 ≤
5.5 V
2.0
⎯
⎯
μs
3.0 V ≤ AVCC5 ≤
4.5 V
0.4
⎯
⎯
μs
4.5 V ≤ AVCC5 ≤
5.5 V,
REXT < 2 kΩ
1.0
⎯
⎯
μs
3.0 V ≤ AVCC5 ≤
4.5 V,
REXT < 1 kΩ
1.0
⎯
⎯
μs
4.5 V ≤ AVCC5 ≤
5.5 V
3.0
⎯
⎯
μs
3.0 V ≤ AVCC5 ≤
4.5 V
⎯
⎯
11
pF
⎯
⎯
2.6
kΩ
4.5 V ≤ AVCC5 ≤
5.5 V
⎯
⎯
12.1
kΩ
3.0 V ≤ AVCC5 ≤
4.5 V
-1
⎯
+1
μA
TA = + 25 °C
-3
⎯
+3
μA
TA = + 105 °C
⎯
⎯
⎯
ANn
Remarks
ANn
Analog input leakage
current
IAIN
ANn
Analog input voltage range
VAIN
ANn
AVRL
⎯
AVRH
V
Offset between input channels
⎯
ANn
⎯
⎯
4
LSB
(Continued)
Note : The accuracy gets worse as AVRH - AVRL becomes smaller
92
DS07-16610-2E
MB91460C Series
(Continued)
Parameter
Symbol Pin name
Reference voltage current
per ADC macro *3
Min
Typ
Max
Unit
Remarks
AVRH
AVRH5
0.75 ×
AVCC5
⎯
AVCC5
V
AVRL
AVSS5
AVSS5
⎯
AVCC5 ×
0.25
V
IA
AVCC5
⎯
2.5
5
mA
A/D Converter
active
IAH
AVCC5
⎯
⎯
5
μA
A/D Converter
not operated *1
IR
AVRH5
⎯
0.7
1
mA
A/D Converter
active
IRH
AVRH5
⎯
⎯
5
μA
A/D Converter
not operated *2
Reference voltage range
Power supply current
per ADC macro *3
Value
*1 : Supply current at AVCC5, if A/D converter and ALARM comparator are not operating,
(VDD5 = AVCC5 = AVRH = 5.0 V)
*2 : Input current at AVRH5, if A/D converter is not operating, (VDD5 = AVCC5 = AVRH = 5.0 V)
*3 : The current consumption per ADC macro is given here. On devices having more then one A/D converter, the
current values have to be multiplied by the number of macros.
Sampling Time Calculation
Tsamp = ( 2.6 kOhm + REXT) × 11pF × 7; for 4.5V ≤ AVCC5 ≤ 5.5V
Tsamp = (12.1 kOhm + REXT) × 11pF × 7; for 3.0V ≤ AVCC5 ≤ 4.5V
Conversion Time Calculation
Tconv = Tsamp + Tcomp
Definition of A/D converter terms
• Resolution
Analog variation that is recognizable by the A/D converter.
• Nonlinearity error
Deviation between actual conversion characteristics and a straight line connecting the zero transition point
(00 0000 0000B ↔ 00 0000 0001B) and the full scale transition point (11 1111 1110B ↔ 11 1111 1111B).
• Differential nonlinearity error
Deviation of the input voltage from the ideal value that is required to change the output code by 1 LSB.
• Total error
This error indicates the difference between actual and theoretical values, including the zero transition error,
full scale transition error, and nonlinearity error.
DS07-16610-2E
93
MB91460C Series
Total error
3FFH
3FEH
1.5 LSB’
Actual conversion
characteristics
Digital output
3FDH
{1 LSB’ (N − 1) + 0.5 LSB’}
004H
VNT
(measurement value)
003H
Actual conversion
characteristics
002H
Ideal characteristics
001H
0.5 LSB'
AVSS5
AVRH
Analog input
1LSB' (ideal value) = AVRH - AVSS5
1024
[V]
Total error of digital output N = VNT - {1 LSB' × (N - 1) + 0.5 LSB'}
1 LSB'
N : A/D converter digital output value
VOT' (ideal value) = AVSS5 + 0.5 LSB' [V]
VFST' (ideal value) = AVRH - 1.5 LSB' [V]
VNT : Voltage at which the digital output changes from (N + 1) H to NH
(Continued)
94
DS07-16610-2E
MB91460C Series
(Continued)
Nonlinearity error
3FFH
Differential nonlinearity error
Actual conversion characteristics
Actual conversion characteristics
(N+1)H
3FEH
{1 LSB (N - 1) + VOT}
VFST
004H
VNT
(measurement value)
003H
002H
Ideal
characteristics
(measurement value)
Digital output
Digital output
3FDH
NH
(N-1)H
VFST
Actual conversion
characteristics
VNT
(measurement value)
Ideal characteristics
(N-2)H
001H
Actual conversion
characteristics
VTO (measurement value)
AVSS5
AVSS5
AVRH
Analog input
Nonlinearity error of digital output N =
VFST - VOT
1022
AVRH
Analog input
VNT - {1LSB × (N - 1) + VOT} [LSB]
1LSB
Differential nonlinearity error of digital output N =
1LSB =
(measurement value)
V (N + 1) T - VNT
1LSB
- 1 [LSB]
[V]
N
: A/D converter digital output value
VOT : Voltage at which the digital output changes from 000H to 001H.
VFST : Voltage at which the digital output changes from 3FEH to 3FFH.
DS07-16610-2E
95
MB91460C Series
5. Alarm comparator characteristics
Parameter
Symbol
Pin name
Value
Min
⎯
IA5ALMF
Typ
25
Max
40
Unit
μA
Remarks
Alarm comparator enabled in
fast mode
(per channel)
*1
Power supply
current
AVCC5
⎯
IA5ALMS
7
10
μA
Alarm comparator enabled in
normal mode
(per channel)
*1
IA5ALMH
⎯
⎯
5
μA
Alarm comparator disabled
−1
⎯
+1
μA
TA=25 °C
−3
⎯
+3
μA
TA=105 °C
ALARM pin input current
IALIN
ALARM pin input voltage
range
VALIN
0
⎯
AVCC5
V
Alarm upper
limit
voltage
VIAH
AVCC5 × 0.78
− 3%
AVCC5 × 0.78
AVCC5 × 0.78
+ 3%
V
Alarm lower
limit
voltage
VIAL
AVCC5 × 0.36
− 5%
AVCC5 × 0.36
AVCC5 × 0.36
+ 5%
V
VIAHYS
50
⎯
250
mV
RIN
5
⎯
⎯
MΩ
tCOMPF
⎯
0.1
0.2
μA
Alarm hysteresis
voltage
Alarm input
resistance
ALARM_n
Comparion
time
tCOMPS
⎯
1
2
μA
Alarm comparator enabled in
fast mode *1
Alarm comparator enabled in
normal mode
*1
Note: *1 :
96
The fast Alarm Comparator mode is enabled by setting ACSR.MD=1
Setting ACSR.MD=0 sets the normal mode.
DS07-16610-2E
MB91460C Series
6. FLASH memory program/erase characteristics
6.1.
MB91F463CA, MB91F465CA
(TA = 25oC, Vcc = 5.0V)
Parameter
Value
Unit
Remarks
3.6
s
Erasure programming time not
included
n*0.9
n*3.6
s
n is the number of Flash sector
of the device
23
370
μs
System overhead time not included
Min
Typ
Max
Sector erase time
-
0.9
Chip erase time
-
Word (16-bit width) programming time
-
Programme/Erase cycle
10 000
cycle
Flash data retention time
20
year
*1
*1: This value was converted from the results of evaluating the reliability of the technology (using Arrhenius
equation to convert high temperature measurements into normalized value at 85oC)
6.2.
MB91F467Cx
(TA = 25oC, Vcc = 5.0V)
Parameter
Value
Unit
Remarks
2.0
s
Erasure programming time not
included
n*0.5
n*2.0
s
n is the number of Flash sector
of the device
6
100
μs
System overhead time not included
Min
Typ
Max
Sector erase time
-
0.5
Chip erase time
-
Word (16-bit or 32-bit
width) programming time
-
Programme/Erase cycle
10 000
cycle
Flash data retention time
20
year
*1
*1: This value was converted from the results of evaluating the reliability of the technology (using Arrhenius
equation to convert high temperature measurements into normalized value at 85oC)
DS07-16610-2E
97
MB91460C Series
7. AC characteristics
7.1.
Clock timing
(VDD5 = 3.0 V to 5.5 V, Vss5 = AVss5 = 0 V, TA = -40 °C to + 105 °C)
Parameter
Clock frequency
Symbol Pin name
fC
Value
Unit
Condition
16
MHz
Opposite phase external
supply or crystal
100
kHz
Min
Typ
Max
X0
X1
3.5
4
X0A
X1A
32
32.768
• Clock timing condition
tC
X0,
X1,
X0A,
X1A
0.8 VCC
0.2 VCC
PWH
98
PWL
DS07-16610-2E
MB91460C Series
7.2.
Reset input ratings
(VDD5 = 3.0 V to 5.5 V, VSS5 = AVSS5 = 0 V, TA = -40 °C to + 105 °C)
Parameter
INITX input time
(at power-on)
INITX input time
(other than the above)
Symbol
tINTL
Pin name
Condition
Value
Unit
Min
Max
10
⎯
ms
20
⎯
μs
⎯
INITX
tINTL
INITX
DS07-16610-2E
0.2 VCC
99
MB91460C Series
7.3.
LIN-USART Timings at VDD5 = 3.0 to 5.5 V
• Conditions during AC measurements
• All AC tests were measured under the following conditions:
• - IOdrive = 5 mA
• - VDD5 = 3.0 V to 5.5 V, Iload = 3 mA
• - VSS5 = 0 V
• - Ta = -40 °C to +105 °C
• - Cl = 50 pF (load capacity value of pins when testing)
• - VOL = 0.2 x VDD5
• - VOH = 0.8 x VDD5
• - EPILR = 0, PILR = 1 (Automotive Level = worst case)
(VDD5 = 3.0 V to 5.5 V, VSS5 = AVSS5 = 0 V, TA = -40 °C to + 105 °C)
Parameter
Symbol
Pin name
Serial clock
cycle time
tSCYCI
SCKn
SCK ↓ → SOT
delay time
tSLOVI
SCKn
SOTn
SOT → SCK ↓
delay time
tOVSHI
SCKn
SOTn
Valid SIN →
SCK ↑ setup time
tIVSHI
SCKn
SINn
SCK ↑ → valid
SIN hold time
tSHIXI
Serial clock
“H” pulse width
Condition
VDD5 = 3.0 V to 4.5 V VDD5 = 4.5 V to 5.5 V
Unit
Min
Max
Min
Max
4 tCLKP
⎯
4 tCLKP
⎯
ns
- 30
30
- 20
20
ns
m×
tCLKP - 30*
⎯
m×
tCLKP - 20*
⎯
ns
tCLKP + 55
⎯
tCLKP + 45
⎯
ns
SCKn
SINn
0
⎯
0
⎯
ns
tSHSLE
SCKn
tCLKP + 10
⎯
tCLKP + 10
⎯
ns
Serial clock
“L” pulse width
tSLSHE
SCKn
tCLKP + 10
⎯
tCLKP + 10
⎯
ns
SCK ↓ → SOT
delay time
tSLOVE
SCKn
SOTn
⎯
2 tCLKP +
55
⎯
2 tCLKP + 45
ns
Valid SIN →
SCK ↑ setup time
tIVSHE
SCKn
SINn
10
⎯
10
⎯
ns
SCK ↑ → valid
SIN hold time
tSHIXE
SCKn
SINn
tCLKP + 10
⎯
tCLKP + 10
⎯
ns
SCK rising time
tFE
SCKn
⎯
20
⎯
20
ns
SCK falling time
tRE
SCKn
⎯
20
⎯
20
ns
Internal
clock
operation
(master
mode)
External
clock
operation
(slave
mode)
* : Parameter m depends on tSCYCI and can be calculated as :
• if tSCYCI = 2*k*tCLKP, then m = k, where k is an integer > 2
• if tSCYCI = (2*k + 1)*tCLKP, then m = k + 1, where k is an integer > 1
Notes :
•
•
100
The above values are AC characteristics for CLK synchronous mode.
tCLKP is the cycle time of the peripheral clock.
DS07-16610-2E
MB91460C Series
• Internal clock mode (master mode)
tSCYCI
SCKn
for ESCR:SCES = 0
VOH
VOL
VOL
VOH
SCKn
for ESCR:SCES = 1
VOH
VOL
tSLOVI
tOVSHI
VOH
VOL
SOTn
tIVSHI
tSHIXI
VIH
VIL
SINn
VIH
VIL
• External clock mode (slave mode)
tSLSHE
SCKn
for ESCR:SCES = 0
VOH
SCKn
for ESCR:SCES = 1
VOL
tSHSLE
VOH
VOL
VOL
VOH
VOH
VOL
VOH
VOL
tRE
tFE
tSLOVE
SOTn
VOH
VOL
tIVSHE
SINn
DS07-16610-2E
VIH
VIL
tSHIXE
VIH
VIL
101
MB91460C Series
7.4.
I2C AC Timings at VDD5 = 3.0 to 5.5 V
• Conditions during AC measurements
All AC tests were measured under the following conditions:
- IOdrive = 3 mA
- VDD5 = 3.0 V to 5.5 V, Iload = 3 mA (VDD = 4.5 V to 5.5 V for MB91F467Cx)
- VSS5 = 0 V
- Ta = - 40 °C to + 105 °C
- Cl = 50 pF
- VOL = 0.3 × VDD5
- VOH = 0.7 × VDD5
- EPILR = 0, PILR = 0 (CMOS Hysteresis 0.3 × VDD5/0.7 × VDD5)
Fast mode:
(VDD5 = 3.5 V to 5.5 V, VSS5 = AVSS5 = 0 V, TA = -40 °C to + 105 °C)
Parameter
Symbol
Pin name
fSCL
Value
Unit
Remark
Min
Max
SCLn
0
400
kHz
tHD;STA
SCLn, SDAn
0.6
⎯
μs
LOW period of the SCL clock
tLOW
SCLn
1.3
⎯
μs
HIGH period of the SCL clock
tHIGH
SCLn
0.6
⎯
μs
Setup time for a repeated START
condition
tSU;STA
SCLn, SDAn
0.6
⎯
μs
Data hold time for I2C-bus devices
tHD;DAT
SCLn, SDAn
0
0.9
μs
Data setup time
tSU;DAT
SCLn SDAn
100
⎯
ns
Rise time of both SDA and SCL
signals
tr
SCLn, SDAn
20 + 0.1Cb
300
ns
*1
Fall time of both SDA and SCL
signals
tf
SCLn, SDAn
20 + 0.1Cb
300
ns
*1
Setup time for STOP condition
tSU;STO
SCLn, SDAn
0.6
⎯
μs
Bus free time between a STOP
and START condition
tBUF
SCLn, SDAn
1.3
⎯
μs
Capacitive load for each bus line
Cb
SCLn, SDAn
⎯
400
pF
Pulse width of spike suppressed
by input filter
tSP
SCLn, SDAn
0
(1..1.5) ×
tCLKP
ns
SCL clock frequency
Hold time (repeated) START
condition. After this period, the first
clock pulse is generated
*2
*1 On MB91F467Cx only guaranteed for 4.5 V < VDD5 < 5.5 V.
*2 The noise filter will suppress single spikes with a pulse width of 0ns and between (1 to 1.5) cycles
of peripheral clock, depending on the phase relationship between I2C signals (SDA, SCL) and peripheral clock.
Note: tCLKP is the cycle time of the peripheral clock.
102
DS07-16610-2E
DS07-16610-2E
SCL
SDA
tHD;STA
tf
S
tr
tHD;DAT
tLOW
tHIGH
tSU;DAT
tSU;STA
Sr
tHD;STA
tSP
tr
P
tSU;ST0
tBUF
S
tf
MB91460C Series
103
MB91460C Series
7.5.
Free-run timer clock
(VDD5 = 3.0 V to 5.5 V, VSS5 = AVSS5 = 0 V, TA = -40 °C to + 105 °C)
Parameter
Input pulse width
Symbol
Pin name
Condition
tTIWH
tTIWL
CKn
⎯
Value
Min
Max
4tCLKP
⎯
Unit
ns
Note : tCLKP is the cycle time of the peripheral clock.
CKn
VIH
VIH
tTIWH
7.6.
VIL
VIL
tTIWL
Trigger input timing
(VDD5 = 3.0 V to 5.5 V, VSS5 = AVSS5 = 0 V, TA = -40 °C to + 105 °C)
Parameter
Input capture input trigger
A/D converter trigger
Symbol
Pin name
Condition
tINP
ICUn
tATGX
ATGX
Value
Unit
Min
Max
⎯
5tCLKP
⎯
ns
⎯
5tCLKP
⎯
ns
Note : tCLKP is the cycle time of the peripheral clock.
tATGX, tINP
ICUn,
ATGX
104
DS07-16610-2E
MB91460C Series
■ ORDERING INFORMATION
Part number
Package
MB91F467CAPMC-GSE2
MB91F467CBPMC-GSE2
MB91F465CAPMC-GSE2
MB91F463CAPMC-GSE2
DS07-16610-2E
Remarks
not recommended
144-pin plastic LQFP
(FPT-144P-M08)
Lead-free package
Lead-free package
Lead-free package
105
MB91460C Series
■ PACKAGE DIMENSION
144-pin plastic LQFP
Lead pitch
0.50 mm
Package width ×
package length
20.0 × 20.0 mm
Lead shape
Gullwing
Sealing method
Plastic mold
Mounting height
1.70 mm MAX
Weight
1.20g
Code
(Reference)
P-LFQFP144-20×20-0.50
(FPT-144P-M08)
144-pin plastic LQFP
(FPT-144P-M08)
Note 1) *:Values do not include resin protrusion.
Resin protrusion is +0.25(.010)Max(each side).
Note 2) Pins width and pins thickness include plating thickness.
Note 3) Pins width do not include tie bar cutting remainder.
22.00±0.20(.866±.008)SQ
* 20.00±0.10(.787±.004)SQ
108
0.145±0.055
(.006±.002)
73
109
72
0.08(.003)
Details of "A" part
+0.20
1.50 –0.10
+.008
.059 –.004
0˚~8˚
INDEX
144
37
"A"
LEAD No.
1
36
0.50(.020)
0.22±0.05
(.009±.002)
0.08(.003)
0.50±0.20
(.020±.008)
0.60±0.15
(.024±.006)
(Mounting height)
0.10±0.10
(.004±.004)
(Stand off)
0.25(.010)
M
©2003-2008
FUJITSU MICROELECTRONICS LIMITED F144019S-c-4-7
C
2003 FUJITSU LIMITED F144019S-c-4-6
Dimensions in mm (inches).
Note: The values in parentheses are reference values.
Please confirm the latest Package dimension by following URL.
http://edevice.fujitsu.com/package/en-search/
106
DS07-16610-2E
MB91460C Series
■ REVISION HISTORY
Version
Date
2.0
2008-04-16
Initial Version
2008-08-15
Handling devices: Section Notes on PS Register changed for better
understanding;
Interrupt Vector Table: corrected the footnotes
FLASH: Added note about the flash operation mode switching;
added section "Poweron Sequence in parallel programming mode";
FLASH Security: Corrected sector assignments FSV1,FSV2
Absolute maximum ratings: Removed the note that analog input/output pins
cannot accept +B signal input.
DC Characteristics: Updated PullUp/Down resistors and the footnotes,
splitted ILV into external and internal LV detection
AD Converter characteristics updated (complete section);
Ordering information updated;
Company name updated
2008-11-24
Flash: Added MB91F463CA to all sections
Memory maps: Removed external bus areas (no ext. bus available)
IO-Map: Added/corrected MB91F463CA
Ordering Information: Added MB91F463CA
2.1
2.2
DS07-16610-2E
Remark
107
MB91460C Series
■ MAIN CHANGES IN THIS EDITION
Page
Section
Change Results
■ FEATURES
2. Internal peripheral resources
Deleted following description:
Fly-by transfer support (between external I/O and memory)
29
■ EMBEDDED PROGRAM /
DATA MEMORY (FLASH)
Corrected the Note:
The operation mode of the flash memory → The operation mode
of the MCU
49
■ I/O MAP
Added Reload Timer 0 and 1 on address 0001B0H to 0001BCH
2
■ ELECTRICAL CHARACTERISTICS Corrected the Remarks column of Parameter: Power supply
3. DC characteristics
current
89, 90
RTC: 100 kHz mode*5 →
RTC: 100 kHz mode*5, 32 kHz mode*6
91
Added Footnote 6:
99
■ ELECTRICAL CHARACTERISTICS Corrected the spec value of INITX input time (at power-on)
7.2. Reset input ratings
Min: 8 ms → 10 ms
The vertical lines marked in the left side of the page show the changes.
108
DS07-16610-2E
MB91460C Series
MEMO
DS07-16610-2E
109
MB91460C Series
MEMO
110
DS07-16610-2E
MB91460C Series
MEMO
DS07-16610-2E
111
MB91460C Series
FUJITSU SEMICONDUCTOR LIMITED
Nomura Fudosan Shin-yokohama Bldg. 10-23, Shin-yokohama 2-Chome,
Kohoku-ku Yokohama Kanagawa 222-0033, Japan
Tel: +81-45-415-5858
http://jp.fujitsu.com/fsl/en/
For further information please contact:
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Tsimshatsui, Kowloon, Hong Kong
Tel : +852-2377-0226 Fax : +852-2376-3269
http://cn.fujitsu.com/fmc/en/
Specifications are subject to change without notice. For further information please contact each office.
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The contents of this document are subject to change without notice.
Customers are advised to consult with sales representatives before ordering.
The information, such as descriptions of function and application circuit examples, in this document are presented solely for the purpose
of reference to show examples of operations and uses of FUJITSU SEMICONDUCTOR device; FUJITSU SEMICONDUCTOR does not
warrant proper operation of the device with respect to use based on such information. When you develop equipment incorporating the device
based on such information, you must assume any responsibility arising out of such use of the information.
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Any information in this document, including descriptions of function and schematic diagrams, shall not be construed as license of the use
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as contemplated (1) for use accompanying fatal risks or dangers that, unless extremely high safety is secured, could have a serious effect to
the public, and could lead directly to death, personal injury, severe physical damage or other loss (i.e., nuclear reaction control in nuclear
facility, aircraft flight control, air traffic control, mass transport control, medical life support system, missile launch control in weapon
system), or (2) for use requiring extremely high reliability (i.e., submersible repeater and artificial satellite).
Please note that FUJITSU SEMICONDUCTOR will not be liable against you and/or any third party for any claims or damages arising in
connection with above-mentioned uses of the products.
Any semiconductor devices have an inherent chance of failure. You must protect against injury, damage or loss from such failures by
incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current
levels and other abnormal operating conditions.
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