55KB - Epson

Crystal oscillator
HIGH-FREQUENCY CRYSTAL OSCILLATOR
SG-710 series
Product number (please refer to page 1)
Q33 7 1 0 x x x x x x x 0 0
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Ceramic package with 1.5 mm thickness.
Excellent environmental capability.
Low current consumption due to use of C-MOS technology.
Low current consumption by output enable function (OE) or standby function
(ST).
Actual size
Specifications (characteristics)
Item
Symbol
f0
Output frequency range
Max. supply voltage
Operating voltage
Storage temperature
Operating temperature
Power source
voltage
Temperature
range
Specifications
SG-710PHK
SG-710ECK
1.8000 MHz to
1.8000 MHz to
80.0000 MHz
67.0000 MHz
-0.5 V to +7.0 V
5.0 V ±0.5 V
3.3 V ±0.3 V
-55 °C to +125 °C
-10 °C to +70 °C (-40 °C to +85 °C)
VDD-GND
VDD
TSTG
TOPR
B: ±50 x 10-6 C: ± 100 x 10-6 M: ± 100 x 10-6
∆f/f0
Frequency stability
Current consumption
Iop
Output disable current
IOE
Standby current
IST
Duty
tw/ t
High output voltage
Low output voltage
Output load
condition (fan out)
VOH
VOL
N
CL
VIH
VIL
TTL
CMOS
Output enable/disable input voltage
Output rise time
13 mA Max.
24 mA Max.
—
—
6 mA Max.
12 mA Max.
—
—
15 mA Max.
26 mA Max.
34 mA Max.
40 mA Max.
5 mA Max.
10 mA Max.
13 mA Max.
16 mA Max.
8 mA Max.
15 mA Max.
18 mA Max.
—
—
—
—
—
10 µA Max.
40 % to 60 %
—
0.9 x VDD Min.
0.1 x VDD Max.
—
15 pF Max.
0.7 x VDD Min.
0.3 x VDD Max.
6 ns Max.
—
—
45 % to 55 %
2.4 V Min.
0.4 V Max.
10 TTL Max.
(15 pF Max.)
2.0 V Min.
0.8 V Max.
—
5 ns Max.
—
5 ns Max.
tTLH
45 % to 55 %
40 % to 60 %
VDD -0.5 V Min.
0.5 V Max.
10 TTL Max.
50 pF Max.
2.0 V Min.
0.8 V Max.
5 ns Max.
Refer to page 31. "Frequency range"
Stored as bare product after unpacking
Refer to page 31. "Frequency range"
B,C:-10 °C to +70 °C, M:-40 °C to +85 °C
Fo ≤ 25 MHz, No load condition (ECK: Fo ≤ 32 MHz, No load condition)
Fo ≤ 50 MHz, No load condition
Fo ≤ 67 MHz, No load condition
Fo ≤ 80 MHz, No load condition
Fo ≤ 25 MHz, OE=GND(PTK, PHK)
Fo ≤ 50 MHz, OE=GND(PTK, PHK)
Fo ≤ 67 MHz, OE=GND(PTK, PHK)
Fo ≤ 80 MHz, OE=GND(PTK, PHK)
ST=GND(ECK)
CMOS load: 1/2 VDD level
TTL load: 1.4 V level
IOH=-16 mA(PTK,PHK),-2 mA(ECK)
IOL= 16 mA(PTK,PHK), 2 mA(ECK)
OE terminal(PTK,PHK)
ST terminal(ECK)
CMOS load: 10 %→90 % VDD
TTL load: 0.4 V→2.4 V
CMOS load: 90 %→10 % VDD
TTL load: 2.4 V→0.4 V
—
5 ns Max.
6 ns Max.
Output fall time
tTHL
Oscillation start up time
tOSC
10 ms Max.
Time at minimum operating voltage to be 0 s
fa
±5 x 10 /year Max.
S.R.
±10 x 10-6 Max.
Ta= +25 °C, VDD = 5.0 V/3.3 V, First year
Three drops on a hard board from 750 mm
or excitation test with 29400 m/s2 x 0.3 ms x
1/2sine wave in 3 directions
Aging
Shock resistance
—
-6
External dimensions
(Unit: mm)
#3
W
4.8 ±0.2
5.0 ±0.2
H
1.3 ±0.1
1.4 +0.1
-0.15
1.8
2.0
#2
#2
L
#1
1.4
H
5.08
L
SG -710∗∗K 7.3 ±0.2
SG -710∗∗W 7.0 ±0.2
Note.
OE Pin (PTK, PHK, PTW, PHW, PCW)
OE pin - "H" or "open" : Specified frequency output.
OE pin - "L" : Output is high impedance.
NO. Pin terminal
1 OE or ST
2
GND
3
OUT
4
VDD
ST pin (STW, SHW, SCW)
ST pin - "H" or "open" : Specified frequency output.
ST pin - "L" : Output is low level (weak pull-down), oscillation stops.
ST pin (ECK)
ST pin - "H" or "open" : Specified frequency output.
ST pin - "L" : Output is high impedance., oscillation stops.
4.2
#1
#4
Recommended soldering pattern (Unit: mm)
2.6
E 40.000
HC724A
5.08
#3
W
#4
37
Remarks
SG-710PTK
1.8000 MHz to
50.0000 MHz
5.08
Crystal oscillator
Specifications (characteristics)
Item
Output frequency range
Power source
voltage
Temperature
range
Symbol
fO
Max. supply voltage
VDD-GND
Operating voltage
VDD
Storage temperature
TSTG
Operating temperature
TOPR
Specifications
SG-710PTW/STW
SG-710PHW/SHW
80.0001 MHz to 135.0000 MHz
SG-710PCW/SCW
67.0001 MHz to
135.0000 MHz
Output voltage
VOH
VOL
Output load condition (fan out)
CL
Output enable disable input voltage
VIH
VIL
Output rise time
tTLH
Output fall time
tTHL
Oscillation start up time
Aging
tOSC
fa
-0.5 V to +7.0 V
5.0 V ±0.5 V
3.3 V ±0.3 V
-55 °C to +125 °C
-20 °C to +70 °C
-40 °C to +85 °C
B : ±50 x 10-6 C : ±100 x 10-6
M : ±100 x 10-6
45 mA Max.
28 mA Max.
30 mA Max.
16 mA Max.
50 µA Max.
—
40 % to 60 %
40 % to 60 %
—
VDD -0.4 V Min.
0.4 V Max.
15 pF
—
—
5 TTL + 15 pF
—
—
—
15 pF
15 pF
—
25 pF
—
2.0 V Min.
70 % VDD Min.
0.8 V Max.
20 % VDD Max.
2.0 ns Max.
—
—
4.0 ns Max.
—
—
—
3.0 ns Max.
3.0 ns Max.
2.0 ns Max.
—
—
4.0 ns Max.
—
—
—
3.0 ns Max.
3.0 ns Max.
10 ms Max.
±5 x 10-6 /year Max.
Shock resistance
S.R.
±20 x 10-6 Max.
∆f/f0
Frequency stability
Current consumption
Output disable current
Standby current
Duty
CMOS level
TTL level
IOP
IOE
IST
tw/t
Remarks
Refer to page 31. "Frequency range"
Stored as bare product after unpacking
Refer to page 31. "Frequency range"
-20 °C to +70 °C
-40 °C to +80 °C
No load condition (fo = Max.)
OE=GND(P∗W)
ST=GND(S∗W)
CMOS load: 1/2VDD
TTL load: 1.4 V
IOH= -16 mA (∗TW/HW)/-8 mA(∗CW)
IOL= 16 mA (∗TW/HW)/8 mA(∗CW)
fo ≤ 135 MHz
fo ≤ 90 MHz
fo ≤ 135 MHz
fo ≤ 125 MHz
OE,ST
OE,ST
TTL load: 0.8 V→2.0 V, CL = Max.
TTL load: 0.4 V→2.4 V, CL = Max.
CMOS load: 20 % VDD→80 % VDD, CL = Max.
TTL load: 2.0 V→0.8 V, CL = Max.
TTL load: 2.4 V→0.4 V, CL = Max.
CMOS load: 80 % VDD→20 % VDD, CL = Max.
Time at minimum operating voltage to be 0 s
Ta=+25 °C, VDD =5.0 V / 3.0 V, First year
Three drops on a hard board from 750 mm or
excitation test with 29400 m/s2 x 0.3 ms x 1/2
sine wave in 3 directions
38