EPSON timing solution for Xilinx FPGAs (High-speed

EPSON timing solution for Xilinx® FPGAs
EPSON offers various oscillator products for FPGA major applications. Wired-network, medical-equipment’s,
measurement, broadcast.
z
High-speed
serial communication
:
Low jitter SPXO,SPSO
z
Broadcast, moving-picture transfer
: VCXO, Programmable VCXO
z
Timing Synchronization IEEE1588, Sync-Ethernet
:
High-Stability TCXO
< High-speed serial communication PCIe, Fibre-Channel, OTN, G-Ethernet >
PCIe
Fibre Channel
Epson Oscillator
SG7050EBN (SPXO)
Xilinx® 7 series
FPGA
XG-2102CA (SPXO)
Gbit Ethernet
OTN
Mezzanine Card
< Broadcast, moving picture transfer
Camera Image Input
HD-SDI, 3G-SDI >
Xilinx® 7 series
FPGA
SDI Out (HD, 3G)
Epson Oscillator
VG-4513CA (VCXO)
VG7050EAN (Programmable VCXO)
< Timing Synchronization IEEE1588, Sync-Ethernet >
Xilinx® 7 series
FPGA
Ethernet
Epson Oscillator
TCXO TG-5500CA
1
EPSON timing solution
For Xilinx® FPGA Transceiver
Xilinx® 7 series FPGA transceiver block diagram
TX
Reference
Clock
RX
Recommended Products Line-up
Product
Image
Frequency
Supply
name
Size [mm]
Range
voltage
Output
XG-2102CA
LVDS
(SPXO)
LV-PECL
7×5×1.2t
100 MHz
to 700 MHz
LV-PECL
(2 or 4
outputs)
(SPXO)
7×5×1.6t
SG7050EBN
100 MHz
(SPXO)
to 175 MHz
3.3 V
LV-PECL
7×5×1.5t
VG-4513CA
100 MHz
(VCXO)
to 500 MHz
3.3 V
LV-PECL
7×5×1.6t
VG7050EAN
50 MHz
(VCXO)
to 800 MHz
7×5×1.5t
3.3 V
(12 k to 20 MHz)
LV-PECL
Features
0.23 ps Max.
(f<150 MHz)
0.23 ps Max.
(150 M≤f<200 MHz)
(Note1)
3.3 V
MG7050EAN
Phase Jitter
0.17 ps Max.
(f=100 MHz)
0.15 ps Max.
(f=156.25 MHz)
SAW based low jitter
crystal oscillator
(Note2)
0.14 ps Max.
(f=100 MHz)
0.1 ps Max.
(f=156.25 MHz)
Fundamental
oscillation, low
phase noise crystal
(Note3) oscillator
High frequency
0.24 ps Typ.
fundamental
(f=122.88 MHz)
oscillation by HFF,
(Note4) low noise and low
jitter VCXO
0.3 ps Typ.
(f=122.88 MHz)
0.26 ps Typ.
(f=153.6 MHz)
Low power and low
noise Programmable
VCXO by
(Note5) Fractional-N PLL
Note1 detail specification http://www5.epsondevice.com/en/products/spxo_low_jitter/xg2102ca.html
Note2 detail specification http://www5.epsondevice.com/en/products/spxo_low_jitter/sg7050ebn.html
Note3 detail specification http://www5.epsondevice.com/en/products/spxo_low_jitter/sg7050ebn.html
Note4 detail specification http://www5.epsondevice.com/en/products/vcxo_low_phase_noise/vg4513ca.html
Note5 detail specification http://www5.epsondevice.com/en/products/vcxo_low_phase_noise/vg7050ean.html
2
Jittter Perfo
ormance
e for Xilin
nx® 7 serries FPG
GA
EPSON
E
cloccks meet Xiilinx® FPGA
A transceive
er reference clock jitter requiremennt.
GTX / GTH (QPLL)
GT
TX / GTH / GTP
G
(CPLL))
100
MHz
SPXO
Requirem
ment
XG-2102CA,MG77050EAN
SG7050E
EBN
At 10 kHz
-126
6 dBc/Hz
-148
8 dBc/Hz
-141
1 dBc/Hz
A
At 100 kHz
-1
130 dBc/Hz
-1
153 dBc/Hz
-1
152 dBc/Hz
At 1 MHz
-134 dBc/Hz
-154 dBc/Hz
-157 dBc/Hz
At 10 kH
Hz
-126 dBc/H
Hz
-148 dBc/H
Hz
-141 dBc/H
Hz
At 100 kHz
-132 dB
Bc/Hz
-153 dB
Bc/Hz
-152 dB
Bc/Hz
At 1 MHz
-136
6 dBc/Hz
-154
4 dBc/Hz
-157
7 dBc/Hz
156.25
MHz
SPXO
Requirem
ment
XG-2102CA,MG77050EAN
SG7050E
EBN
-122
2 dBc/Hz
-137
7 dBc/Hz
-142
2 dBc/Hz
-1
127 dBc/Hz
-1
149 dBc/Hz
-1
152 dBc/Hz
-132 dBc/Hz
-152 dBc/Hz
-156 dBc/Hz
-121 dBc/H
Hz
-137 dBc/H
Hz
-119 dBc/H
Hz
-129 dB
Bc/Hz
-149 dB
Bc/Hz
-126 dB
Bc/Hz
-133
3 dBc/Hz
-152
2 dBc/Hz
-132
2 dBc/Hz
122.88
MHz
VCXO
Requirem
ment
VG-4513
3CA
VG7050E
EAN
-123
3 dBc/Hz
-146
6 dBc/Hz
-133
3 dBc/Hz
-1
129 dBc/Hz
-1
151 dBc/Hz
-1
135 dBc/Hz
-133 dBc/Hz
-151 dBc/Hz
-144 dBc/Hz
-123 dBc/H
Hz
-146 dBc/H
Hz
-133 dBc/H
Hz
-131 dB
Bc/Hz
-151 dB
Bc/Hz
-135 dB
Bc/Hz
-135
5 dBc/Hz
-151 dBc/Hz
-144
4 dBc/Hz
153.6
MHz
VCXO
Requirem
ment
VG-4513
3CA
VG7050E
EAN
-122
2 dBc/Hz
-144
4 dBc/Hz
-131
1 dBc/Hz
-1
127 dBc/Hz
-1
153 dBc/Hz
-1
134 dBc/Hz
-132 dBc/Hz
-153 dBc/Hz
-142 dBc/Hz
-121 dBc/H
Hz
-144 dBc/H
Hz
-131 dBc/H
Hz
-129 dB
Bc/Hz
-153 dB
Bc/Hz
-134 dB
Bc/Hz
-133
3 dBc/Hz
-153
3 dBc/Hz
-142
2 dBc/Hz
‹ Phase No
oise plot and
d GTX/GTH//GTP(CPLL)) Mask
Re
ecommended Re
eference Clock In
nterface
‹ LV-PEC
CL
PECL
‹ LVDS LV-P
0.1 μF
Internal to Xilinx
FP
PGAs
0.1 μF
Internal to Xilinx
FPGAs
150 Ω
LVDS
L
Oscillator
O
0.1 μF
Transceiver
Reference
R
Clock
C
Input Buffe
er
150 Ω
LV-PECL
Oscillator
0.1 μF
Transceive
er
Reference
Clock Inpu
ut Buffer
3
EPSON timing solution
For Xilinx® FPGA Timing Synchronization
Recommended Products Line-up
Product
name
Image
Size [mm]
TG-5500CA
(TCXO)
Frequency
Range
Output
10 MHz
to 50 MHz
3.3 V
CMOS/
Clipped
Sine
+/-280 ppb
Stratum3
compatible
10 MHz
to 40 MHz
3.3 V
CMOS/
Clipped
Sine
+/-280 ppb
Stratum3
compatible
7×5×1.2t
TG5032CBN
TG5032SBN
(TCXO)
5×3.2×1.45t
TG-5500CA 24.576 MHz
MTIE data
Frequency
Stability
Supply
voltage
Features
(-40 to +85 degC)
(0.1Hz filter)
* Xilinx is the registered trademark of Xilinx, Inc.
4