ROHM BD9104FVM

4.0V(or 4.5V) to 5.5V, 0.8A 1ch
Synchronous Buck Converter Integrated FET
BD9102FVM
BD9104FVM
BD9106FVM
●General Description
ROHM’s high efficiency step-down switching
regulator (BD9102FVM, BD9104FVM, BD9106FVM)
is a power supply designed to produce a low voltage
including 1.24 volts from 5 volts power supply line.
Offers high efficiency with our original pulse skip
control technology and synchronous rectifier.
Employs a current mode control system to provide
faster transient response to sudden change in load.
●Key Specifications
 Input voltage range
BD9102FVM , BD9106FVM: 4.0V to 5.5V
BD9104FVM
4.5V to 5.5V
 Output voltage range
BD9102FVM:
1.24V ± 2%
BD9104FVM:
3.30V ± 2%
BD9106FVM:
1.20V to 2.50V
 Output current:
0.8A(Max.)
 Switching frequency:
1.0MHz(Typ.)
 Pch FET ON resistance:
350mΩ(Typ.)
 Nch FET ON resistance:
250mΩ(Typ.)
 Standby current:
0μA(Max.)
 Operating temperature range:
-25℃ to +85℃
●Features
 Offers fast transient response with current mode
PWM control system.
 Offers highly efficiency for all load range with
synchronous rectifier (Nch/Pch FET)
TM
and SLLM (Simple Light Load Mode)
 Incorporates soft-start function.
 Incorporates thermal protection and ULVO
functions.
 Incorporates short-current protection circuit with
time delay function.
 Incorporates shutdown function
●Package
MSOP8:
2.90 mm x 4.00 mm x 0.83 mm
●Applications
Power supply for HDD, power supply for portable
electronic devices like PDA, and power supply for LSI
including CPU and ASIC
●Typical Application Circuit
VCC
Cin
L
EN
VOUT
VCC,PVCC
VOUT
ITH
SW
VOUT
ESR
GND,PGND
RO
CO
RITH
CITH
Fig.1 Typical Application Circuit
○Product structure:Silicon monolithic integrated circuit
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Datasheet
BD9102FVM BD9104FVM BD9106FVM
●Pin Configuration
(Top View)
1
VOUT
2
(Top View)
VCC
8
1
ADJ
VCC
8
ITH
PVCC
7
2
ITH
PVCC
7
3
EN
SW
6
3
EN
SW
6
4
GND
PGND
5
4
GND
PGND
5
Fig.2 BD9102FVM BD9104FVM
Fig.3 BD9106FVM
●Pin Description
Pin No.
Pin name
1
VOUT/ADJ
2
ITH
GmAmp output pin/Connected phase compensation capacitor
3
EN
Enable pin(Active High)
4
GND
5
PGND
6
SW
7
PVCC
8
VCC
PIN function
Output voltage detect pin/ ADJ for BD9106FVM
Ground
Nch FET source pin
Pch/Nch FET drain output pin
Pch FET source pin
VCC power supply input pin
●Ordering Information
B
D
9
1
0
x
Part Number
F
V
M -
Package
FVM: MSOP8
TR
Packaging and forming specification
TR: Embossed tape and reel
●Lineup
Input voltage range
Output voltage range
UVLO Threshold
voltage
(Typ.)
Orderable
Part Number
Package
4.0V to 5.5V
1.24V±2%
2.7V
MSOP8
Reel of 3000
BD9102FVM-TR
4.0V to 5.5V
Adjustable(1.0 to 2.5V)
3.4V
MSOP8
Reel of 3000
BD9106FVM-TR
4.5V to 5.5V
3.30V±2%
4.1V
MSOP8
Reel of 3000
BD9104FVM-TR
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Datasheet
BD9102FVM BD9104FVM BD9106FVM
●Block Diagrams
Fig.4 BD9102FVM BD9104FVM Block diagram
Fig.5 BD9106FVM Block diagram
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Datasheet
BD9102FVM BD9104FVM BD9106FVM
●Absolute Maximum Ratings(Ta=25℃)
Parameter
Symbol
VCC voltage
VCC
PVCC voltage
PVCC
EN voltage
EN
SW,ITH voltage
SW,ITH
Power dissipation 1
Pd1
Power dissipation 2
Pd2
Operating temperature range
Topr
Storage temperature range
Tstg
Maximum junction temperature
Tjmax
*1
*2
*3
Limits
*1
-0.3 to +7
*1
-0.3 to +7
-0.3 to +7
-0.3 to +7
*2
387.5
*3
587.4
-25 to +85
-55 to +150
+150
Unit
V
V
V
V
mW
mW
℃
℃
℃
Pd should not be exceeded.
Derating in done 3.1mW/℃ for temperatures above Ta=25℃.
Derating in done 4.7mW/℃ for temperatures above Ta=25℃,Mounted on 70mm×70mm×1.6mm Glass Epoxy PCB
●Operating Ratings(Ta=25℃)
Parameter
Symbol
VCC voltage
VCC
PVCC voltage
PVCC
EN voltage
*4
EN
SW average output current
*4
Isw
BD9102FVM
BD9104FVM
BD9106FVM
Unit
Min.
Max.
Min.
Max.
Min.
Max.
4.0
5.5
4.5
5.5
4.0
5.5
V
4.0
5.5
4.5
5.5
4.0
5.5
V
0
VCC
0
VCC
0
VCC
V
-
0.8
-
0.8
-
0.8
A
*4 Pd should not be exceeded.
●Electrical Characteristics
◎BD9102FVM(Ta=25℃,VCC=5V,EN=VCC unless otherwise specified.)
Parameter
Standby current
Symbol
Min.
Typ.
Max.
Unit
ISTB
-
0
10
μA
Conditions
EN=GND
ICC
-
250
400
μA
EN Low voltage
VENL
-
GND
0.8
V
Standby mode
EN High voltage
VENH
2.0
VCC
-
V
Active mode
VEN=5V
Bias current
EN input current
Oscillation frequency
IEN
-
1
10
μA
FOSC
0.8
1
1.2
MHz
Pch FET ON resistance
*5
RONP
-
0.35
0.60
Ω
PVCC=5V
Nch FET ON resistance
*5
RONN
-
0.25
0.50
Ω
PVCC=5V
VOUT
1.215
1.24
1.265
V
ITH SInk current
ITHSI
10
20
-
μA
VOUT=H
ITH Source Current
ITHSO
10
20
-
μA
VOUT=L
UVLO threshold voltage
VUVLOTh
2.6
2.7
2.8
V
VCC=H→L
UVLO hysteresis voltage
VUVLOHys
50
100
200
mV
TSS
0.5
1
2
ms
TLATCH
0.5
1
2
ms
Output voltage
Soft start time
Timer latch time
*5 Design Guarantee(Outgoing inspection is not done on all products)
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Datasheet
BD9102FVM BD9104FVM BD9106FVM
◎BD9104FVM(Ta=25℃,VCC=5V,EN=VCC unless otherwise specified.)
Parameter
Standby current
Symbol
Min.
Typ.
Max.
Unit
ISTB
-
0
10
μA
Conditions
EN=GND
ICC
-
250
400
μA
EN Low voltage
VENL
-
GND
0.8
V
Standby mode
EN High voltage
VENH
2.0
VCC
-
V
Active mode
EN input current
IEN
-
1
10
μA
VEN=5V
Bias current
Oscillation frequency
FOSC
0.8
1
1.2
MHz
Pch FET ON resistance
*5
RONP
-
0.35
0.60
Ω
PVCC=5V
Nch FET ON resistance
*5
RONN
-
0.25
0.50
Ω
PVCC=5V
Output voltage
VOUT
3.234
3.300
3.366
V
ITH SInk current
ITHSI
10
20
-
μA
VOUT=H
ITH Source Current
ITHSO
10
20
-
μA
VOUT=L
UVLO threshold voltage
VUVLOTh
3.9
4.1
4.3
V
VCC=H→L
UVLO hysteresis voltage
VUVLOHys
50
100
200
mV
TSS
0.5
1
2
ms
TLATCH
0.5
1
2
ms
Soft start time
Timer latch time
*5 Design Guarantee(Outgoing inspection is not done on all products)
◎BD9106FVM(Ta=25℃,VCC=5V,EN=VCC,R1=20kΩ,R2=10kΩunless otherwise specified.)
Parameter
Symbol
Min.
Typ.
Max.
Standby current
ISTB
-
Unit
Conditions
EN=GND
0
10
μA
ICC
-
250
400
μA
EN Low voltage
VENL
-
GND
0.8
V
Standby mode
EN High voltage
VENH
2.0
VCC
-
V
Active mode
EN input current
IEN
-
1
10
μA
VEN=5V
Bias current
Oscillation frequency
FOSC
0.8
1
1.2
MHz
Pch FET ON resistance
*5
RONP
-
0.35
0.60
Ω
PVCC=5V
Nch FET ON resistance
*5
RONN
-
0.25
0.50
Ω
PVCC=5V
ADJ reference voltage
VADJ
0.780
0.800
0.820
V
Output voltage
VOUT
-
1.200
-
V
ITH SInk current
ITHSI
10
20
-
ΜA
ADJ=H
ITHSO
10
20
-
ΜA
ADJ=L
UVLO threshold voltage
VUVLOTh
3.2
3.4
3.6
V
VCC=H→L
UVLO hysteresis voltage
VUVLOHys
50
100
200
MV
TSS
1.5
3
6
Ms
TLATCH
0.5
1
2
Ms
ITH Source Current
Soft start time
Timer latch time
*5 Design Guarantee(Outgoing inspection is not done on all products)
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Datasheet
BD9102FVM BD9104FVM BD9106FVM
●Typical Performance Curves
■VCC-VOUT
Fig.6 Vcc-Vout
Fig.7 Vcc-Vout
Fig.8 Vcc-Vout
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Datasheet
BD9102FVM BD9104FVM BD9106FVM
■VEN-VOUT
Fig.10 Ven-Vout
Fig.9 Ven-Vout
Fig.11 Ven-Vout
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Datasheet
BD9102FVM BD9104FVM BD9106FVM
■IOUT-VOUT
Fig.12 Iout-Vout
Fig.13 Iout-Vout
Fig.14 Iout-Vout
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Datasheet
BD9102FVM BD9104FVM BD9106FVM
■Soft start
Fig.15 Soft start waveform
Fig.16 Soft start waveform
Fig.17 Soft start waveform
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Datasheet
BD9102FVM BD9104FVM BD9106FVM
■SW waveform IO=10mA
Fig.18 SW waveform
TM
Io=10mA(SLLM control)
Fig.19 SW waveform
TM
Io=10mA(SLLM control)
Fig.20 SW waveform
TM
Io=10mA(SLLM control
VOUT=1.8V)
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Datasheet
BD9102FVM BD9104FVM BD9106FVM
■SW waveform IO=200mA
Fig.21 SW waveform
Io=200mA(PWM control)
Fig.22 SW waveform
Io=200mA(PWM control)
Fig.23 SW waveform
Io=200mA(PWM control VOUT=1.8V)
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Datasheet
BD9102FVM BD9104FVM BD9106FVM
■Transient response IO=100mA → 600mA
Fig.25 Transient response
Io=100→600mA(10μs)
Fig.24 Transient response
Io=100→600mA(10μs)
Fig.26 Transient response
Io=100→600mA(10μs)
(VOUT=1.8V)
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Datasheet
BD9102FVM BD9104FVM BD9106FVM
■Transient response IO=600mA → 100mA
Fig.28 Transient response
Io=600→100mA(10μs)
Fig.27 Transient response
Io=600→100mA(10μs)
Fig.29 Transient response
Io=600→100mA(10μs)
(VOUT=1.8V)
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Datasheet
BD9102FVM BD9104FVM BD9106FVM
■Ta-VOUT
Fig.30 Ta-VOUT
Fig.31 Taa-VOUT
Fig.32 Ta-VOUT
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Datasheet
BD9102FVM BD9104FVM BD9106FVM
■Efficiency
Fig.33 Efficiency
(VCC=EN=5V,VOUT=1.24V)
Fig.34 Efficiency
(VCC=EN=5V,VOUT=3.3V)
Fig.35 Efficiency
(VCC=EN=5V,VOUT=1.8V)
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Datasheet
BD9102FVM BD9104FVM BD9106FVM
■Reference characteristics
Fig.36 Ta-FOSC
Fig.37 Ta-RONN
Fig.38 Ta-RONP
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Fig.39 Ta-VEN
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Datasheet
BD9102FVM BD9104FVM BD9106FVM
Fig.40 Ta-ICC
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Fig.41 Vcc-Fosc
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Datasheet
BD9102FVM BD9104FVM BD9106FVM
●Application Information
Operation
BD9102FVM, BD9104FVM, BD9106FVM are the synchronous rectifying step-down switching regulator that achieves faster
transient response by employing current mode PWM control system. It utilizes switching operation in PWM (Pulse
TM
Width Modulation) mode for heavier load, while it utilizes SLLM (Simple Light Load Mode) operation for lighter load
to improve efficiency.
○Synchronous rectifier
It does not require the power to be dissipated by a rectifier externally connected to a conventional DC/DC converter IC,
and its P.N junction shoot-through protection circuit limits the shoot-through current during operation, by which the power
dissipation of the set is reduced.
○Current mode PWM control
Synthesizes a PWM control signal with a inductor current feedback loop added to the voltage feedback.
・PWM (Pulse Width Modulation) control
The oscillation frequency for PWM is 1 MHz. SET signal form OSC turns ON a P-channel MOS FET (while a
N-channel MOS FET is turned OFF), and an inductor current I L increases. The current comparator (Current Comp)
receives two signals, a current feedback control signal (SENSE: Voltage converted from IL) and a voltage feedback
control signal (FB), and issues a RESET signal if both input signals are identical to each other, and turns OFF the
P-channel MOS FET (while a N-channel MOS FET is turned ON) for the rest of the fixed period. The PWM control
repeat this operation.
TM
・SLLM (Simple Light Load Mode) control
When the control mode is shifted from PWM for heavier load to the one for lighter load or vise versa, the switching
pulse is designed to turn OFF with the device held operated in normal PWM control loop, which allows linear operation
without voltage drop or deterioration in transient response during the mode switching from light load to heavy load or
vise versa.
Although the PWM control loop continues to operate with a SET signal from OSC and a RESET signal from Current
Comp, it is so designed that the RESET signal is held issued if shifted to the light load mode, with which the switching
is tuned OFF and the switching pulses are thinned out under control. Activating the switching intermittently reduces
the switching dissipation and improves the efficiency.
SENSE
Current
Comp
VOUT
Level
Shift
FB
Gm Amp.
ITH
RESET
R Q
IL
SET S
Driver
Logic
VOUT
SW
Load
OSC
Fig.42 Diagram of current mode PWM control
PVCC
Current
Comp
SENSE
PVCC
SENSE
Current
Comp
FB
FB
SET
GND
SET
GND
RESET
GND
RESET
GND
SW
GND
SW
IL
GND
IL(AVE)
IL
0A
VOUT
VOUT
VOUT(AVE)
VOUT(AVE)
Not switching
TM
Fig.43 PWM switching timing chart
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Fig.44 SLLM
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TSZ02201-0J3J0AJ00080-1-2
02.MAR.2012 Rev.001
Datasheet
BD9102FVM BD9104FVM BD9106FVM
Description of Operations
・Soft-start function
EN terminal shifted to “High” activates a soft-starter to gradually establish the output voltage with the current limited
during startup, by which it is possible to prevent an overshoot of output voltage and an inrush current.
・Shutdown function
With EN terminal shifted to “Low”, the device turns to Standby Mode, and all the function blocks including reference
voltage circuit, internal oscillator and drivers are turned to OFF. Circuit current during standby is 0 μF (Typ.).
・UVLO function
Detects whether the input voltage sufficient to secure the output voltage of this IC is supplied.
of 100 mV (Typ.) is provided to prevent output chattering.
And the hysteresis width
・BD9102FVM BD9104FVM
TSS=1msec(typ.)
・BD9106FVM
TSS=3msec(typ.)
Hysteresis 100mV
VCC
EN
VOUT
Tss
Tss
Tss
Soft start
Standby mode
Operating mode
UVLO
Standby
mode
Standby
mode
Operating mode
UVLO
Operating mode
EN
Standby mode
UVLO
Fig.45 Soft start, Shutdown, UVLO timing chart
・Short-current protection circuit with time delay function
Turns OFF the output to protect the IC from breakdown when the incorporated current limiter is activated continuously for
at least 1 ms. The output thus held tuned OFF may be recovered by restarting EN or by re-unlocking UVLO.
EN
Output OFF
latch
VOUT
Limit
IL
1msec
Standby
mode
Standby
mode
Operating mode
EN
Timer latch
Operating mode
EN
Fig.46 Short-current protection circuit with time delay timing chart
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Datasheet
BD9102FVM BD9104FVM BD9106FVM
Information on Advantages
Advantage 1:Offers fast transient response with current mode control system.
Conventional product (VOUT of which is 3.3 volts)
BD9104FVM(Load response IO=100mA→600mA)
VOUT
VOUT
228mV
110mV
IOUT
IOUT
Voltage drop due to sudden change in load was reduced by 50%.
Fig.47 Comparison of transient response
Advantage 2: Offers high efficiency for all load range.
・For lighter load:
Utilizes the current mode control mode called SLLM for lighter load, which reduces various dissipation such as
switching dissipation (PSW ), gate charge/discharge dissipation, ESR dissipation of output capacitor (P ESR) and
on-resistance dissipation (PRON) that may otherwise cause degradation in efficiency for lighter load.
Achieves efficiency improvement for lighter load.
Efficiency η[%]
100
・For heavier load:
Utilizes the synchronous rectifying mode and the low on-resistance
MOS FETs incorporated as power transistor.
ON resistance of P-channel MOS FET: 0.35 Ω (Typ.)
ON resistance of N-channel MOS FET: 0.25 Ω (Typ.)
SLLMTM
②
50
①
PWM
①inprovement by SLLM system
②improvement by synchronous rectifier
0
0.001
0.01
0.1
Output current Io[A]
1
Fig.48 Efficiency
Achieves efficiency improvement for heavier load.
Offers high efficiency for all load range with the improvements mentioned above.
Advantage 3:・Supplied in smaller package like MOSP8 due to small-sized power MOS FET incorporated.
・Allows reduction in size of application products
・Output capacitor Co required for current mode control: 10 μF ceramic capacitor
・Inductance L required for the operating frequency of 1 MHz: 4.7 μH inductor
Reduces a mounting area required.
VCC
15mm
Cin
CIN
DC/DC
Convertor
Controller
RITH
RITH
L
VOUT
L
10mm
CITH
Co
CO
CITH
Fig.49 Example application
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Datasheet
BD9102FVM BD9104FVM BD9106FVM
Switching Regulator Efficiency
Efficiency ŋ may be expressed by the equation shown below:
VOUT×IOUT
POUT
POUT
η=
×100[%]=
×100[%]=
Vin×Iin
Pin
POUT+PDα
×100[%]
Efficiency may be improved by reducing the switching regulator power dissipation factors PDα as follows:
Dissipation factors:
2
1) ON resistance dissipation of inductor and FET:PD(I R)
2) Gate charge/discharge dissipation:PD(Gate)
3) Switching dissipation:PD(SW)
4) ESR dissipation of capacitor:PD(ESR)
5) Operating current dissipation of IC:PD(IC)
2
2
1)PD(I R)=IOUT ×(RCOIL×RON) (RCOIL[Ω]:DC resistance of inductor, RON[Ω]:ON resistance of FET
IOUT[A]:Output current.)
2)PD(Gate)=Cgs×f×V (Cgs[F]:Gate capacitance of FET,f[H]:Switching frequency,V[V]:Gate driving voltage of FET)
2
3)PD(SW)=
Vin ×CRSS×IOUT×f
IDRIVE
(CRSS[F]:Reverse transfer capacitance of FET,IDRIVE[A]:Peak current of gate.)
2
4)PD(ESR)=IRMS ×ESR (IRMS[A]:Ripple current of capacitor,ESR[Ω]:Equivalent series resistance.)
5)PD(IC)=Vin×ICC (ICC[A]:Circuit current.)
Consideration on Permissible Dissipation and Heat Generation
As this IC functions with high efficiency without significant heat generation in most applications, no special consideration is
needed on permissible dissipation or heat generation. In case of extreme conditions, however, including lower input
voltage, higher output voltage, heavier load, and/or higher temperature, the permissible dissipation and/or heat
generation must be carefully considered.
For dissipation, only conduction losses due to DC resistance of inductor and ON resistance of FET are considered.
Because the conduction losses are considered to play the leading role among other dissipation mentioned above including
gate charge/discharge dissipation and switching dissipation.
2
P=IOUT ×(RCOIL+RON)
RON=D×RONP+(1-D)RONN
1000
If VCC=5V, VOUT=3.3V, RCOIL=0.15Ω, RONP=0.35Ω, RONN=0.25Ω
IOUT=0.8A, for example,
D=VOUT/VCC=3.3/5=0.66
RON=0.66×0.35+(1-0.66)×0.25
=0.231+0.085
=0.316[Ω]
Power dissipation:Pd [mW]
①using an IC alone
D:ON duty (=VOUT/VCC)
RCOIL:DC resistance of coil
RONP:ON resistance of P-channel MOS FET
RONN:ON resistance of N-channel MOS FET
IOUT:Output current
θj-a=322.6℃/W
800
②mounted on glass epoxy PCB
θj-a=212.8℃/W
600
400
①587.4mW
②387.5mW
200
0
0
25
50
75 85 100
125
P=0.8 ×(0.15+0.316)
≒298[mV]
Fig.50 Thermal derating curves
As RONP is greater than RONN in this IC, the dissipation increases as the ON duty becomes greater.
consideration on the dissipation as above, thermal design must be carried out with sufficient margin allowed.
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02.MAR.2012 Rev.001
Datasheet
BD9102FVM BD9104FVM BD9106FVM
Selection of Components Externally Connected
1. Selection of inductor (L)
IL
The inductance significantly depends on output ripple current. As seen
in the equation (1), the ripple current decreases as the inductor and/or
switching frequency increases.
ΔIL
VCC
ΔIL=
(VCC-VOUT)×VOUT
L×VCC×f
[A]・・・(1)
Appropriate ripple current at output should be 30% more or less of the
maximum output current.
IL
VOUT
ΔIL=0.3×IOUTmax. [A]・・・(2)
(VCC-VOUT)×VOUT
L=
[H]・・・(3)
ΔIL×VCC×f
L
Co
(ΔIL: Output ripple current, and f: Switching frequency)
Fig.51 Output ripple current
* Current exceeding the current rating of the inductor results in magnetic saturation of the inductor, which decreases efficiency.
The inductor must be selected allowing sufficient margin with which the peak current may not exceed its current rating.
If VCC=5V, VOUT=3.3V, f=1MHz, ΔIL=0.3×0.8A=0.24A, for example,
(5-3.3)×3.3
L=
0.24×5×1M
=4.675μ → 4.7[μH]
*Select the inductor of low resistance component (such as DCR and ACR) to minimize dissipation in the inductor for better efficiency.
2. Selection of output capacitor (CO)
VCC
Output capacitor should be selected with the consideration on the stability region and the
equivalent series resistance required to smooth ripple voltage.
Output ripple voltage is determined by the equation (4):
VOUT
L
ESR
ΔVOUT=ΔIL×ESR [V]・・・(4)
Co
(ΔIL: Output ripple current, ESR: Equivalent series resistance of output capacitor)
*Rating of the capacitor should be determined allowing sufficient margin against output
voltage. Less ESR allows reduction in output ripple voltage.
Fig.52 Output capacitor
As the output rise time must be designed to fall within the soft-start time, the capacitance of output capacitor should be
determined with consideration on the requirements of equation (5):
TSS×(Ilimit-IOUT)
Tss: Soft-start time
・・・(5)
Ilimit: Over current detection level, 2A(Typ)
VOUT
In case of BD9104FVM, for instance, and if VOUT=3.3V, IOUT=0.8A, and TSS=1ms,
1m×(2-0.8)
Co≦
≒364 [μF]
3.3
Inappropriate capacitance may cause problem in startup. A 10 μF to 100 μF ceramic capacitor is recommended.
Co≦
3. Selection of input capacitor (Cin)
VCC
Cin
Input capacitor to select must be a low ESR capacitor of the capacitance
sufficient to cope with high ripple current to prevent high transient voltage. The
ripple current IRMS is given by the equation (6):
√VCC(VCC-VOUT)
VCC
< Worst case > IRMS(max.)
IRMS=IOUT×
VOUT
L
Co
[A]・・・(6)
IOUT
When VCC is twice the Vout,
2
IRMS=
If VCC=5V, VOUT=3.3V, and IOUTmax.=0.8A,
Fig.53 Input capacitor
√5(5-3.3)
IRMS=0.8×
5
=0.46[ARMS]
A low ESR 10μF/10V ceramic capacitor is recommended to reduce ESR dissipation of input capacitor for better efficiency.
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Datasheet
BD9102FVM BD9104FVM BD9106FVM
4. Determination of RITH, CITH that works as a phase compensator
As the Current Mode Control is designed to limit a inductor current, a pole (phase lag) appears in the low frequency area
due to a CR filter consisting of a output capacitor and a load resistance, while a zero (phase lead) appears in the high
frequency area due to the output capacitor and its ESR. So, the phases are easily compensated by adding a zero to the
power amplifier output with C and R as described below to cancel a pole at the power amplifier.
fp(Min.)
1
2π×RO×CO
1
fz(ESR)=
2π×ESR×CO
A
Gain
[dB]
fp=
fp(Max.)
0
fz(ESR)
IOUTMin.
IOUTMax.
Pole at power amplifier
When the output current decreases, the load resistance Ro
increases and the pole frequency lowers.
0
Phase
[deg]
-90
fp(Min.)=
1
2π×ROMax.×CO
[Hz]←with lighter load
fp(Max.)=
1
2π×ROMin.×CO
[Hz]←with heavier load
Fig.54 Open loop gain characteristics
A
fz(Amp.)
Zero at power amplifier
Increasing capacitance of the output capacitor lowers the
pole frequency while the zero frequency does not change.
(This is because when the capacitance is doubled, the
capacitor ESR reduces to half.)
Gain
[dB]
0
0
Phase
[deg]
fz(Amp.)=
-90
1
2π×RITH.×CITH
Fig.55 Error amp phase compensation characteristics
VCC
Cin
EN
VOUT
L
VCC,PVCC
SW
VOUT
ITH
VOUT
ESR
RO
CO
GND,PGND
RITH
CITH
Fig.56 Typical application
Stable feedback loop may be achieved by canceling the pole fp (Min.) produced by the output capacitor and the load
resistance with CR zero correction by the error amplifier.
fz(Amp.)= fp(Min.)
1
2π×RITH×CITH
=
1
2π×ROMax.×CO
5. Determination of output voltage (for BD9106FVM only)
The output voltage VOUT is determined by the equation (7):
VOUT=(R2/R1+1)×VADJ・・・(7)
VADJ: Voltage at ADJ terminal (0.8V Typ.)
With R1 and R2 adjusted, the output voltage may be determined
as required.(Adjustable output voltage range: 1.0V to 2.5V)
Use 1 kΩ to 100 kΩ resistor for R1. If a resistor of the
resistance higher than100 kΩ is used, check the assembled set
carefully for ripple voltage etc.
4.7μH
6
Output
SW
10μF
R2
1
ADJ
R1
Fig.57 Determination of output voltage
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Datasheet
BD9102FVM BD9104FVM BD9106FVM
BD9102FVM, BD9104FVM, BD9106FVM Cautions on PC Board Layout
1
VOUT/ADJ
2
ITH
VCC
8
PVCC
7
RITH
VCC
CIN
EN
3
EN
4
GND
SW
6
PGND
5
①
L
VOUT
CITH
CO
②
③
GND
Fig.58 Layout diagram
①
②
③
For the sections drawn with heavy line, use thick conductor pattern as short as possible.
Lay out the input ceramic capacitor CIN closer to the pins PVCC and PGND, and the output capacitor Co closer to the
pin PGND.
Lay out CITH and RITH between the pins ITH and GND as neat as possible with least necessary wiring.
Table1.Recommended parts list of application [BD9102FVM]
symbol
part
value
manufacturer
L
Inductor
4.7μH
Sumida
Series
CMD6D11B
CIN
Ceramic capacitor
10μF
Kyocera
CM316X5R106M10A
CO
Ceramic capacitor
10μF
Kyocera
CM316X5R106M10A
CITH
RITH
Ceramic capacitor
Resistor
330pF
30kΩ
murata
ROHM
GRM18series
MCR10 3002
Table2. Recommended parts list of application [BD9104FVM]
symbol
part
value
manufacturer
L
Inductor
4.7μH
Sumida
Series
CMD6D11B
CIN
Ceramic capacitor
10μF
Kyocera
CM316X5R106M10A
CO
Ceramic capacitor
10μF
Kyocera
CM316X5R106M10A
CITH
RITH
Ceramic capacitor
Resistor
330pF
51kΩ
murata
ROHM
GRM18series
MCR10 5102
Table3.Recommended parts list of application [BD9106FVM]
symbol
part
value
manufacturer
L
Inductor
4.7μH
Sumida
series
CMD6D11B
CIN
Ceramic capacitor
10μF
Kyocera
CM316X5R106M10A
CO
Ceramic capacitor
10μF
Kyocera
CM316X5R106M10A
CITH
Ceramic capacitor
750pF
murata
GRM18series
Table4.BD9106FVM RITH recommended value
Vout[V]
RITH
1.0
18kΩ
1.2
22kΩ
1.5
22kΩ
*BD9106FVM: As the resistance recommended for
1.8
27kΩ
the output voltage for determination of resistance.
2.5
36kΩ
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RITH depends on the output voltage, check
TSZ02201-0J3J0AJ00080-1-2
02.MAR.2012 Rev.001
Datasheet
BD9102FVM BD9104FVM BD9106FVM
I/O Equivalence Circuit
※BD9106FVM 1pin(ADJ)
1pin(VOUT)
VCC
VCC
10kΩ
10kΩ
VOUT
ADJ
2pin(ITH)
3pin(EN)
VCC
VCC
VCC
2.8MΩ
ITH
10kΩ
EN
2.2kΩ
6pin(SW)
PVCC
PVCC
PVCC
SW
Fig.59 I/O equivalence circuit
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Datasheet
BD9102FVM BD9104FVM BD9106FVM
●Operational Notes
1. Absolute Maximum Ratings
While utmost care is taken to quality control of this product, any application that may exceed some of the absolute
maximum ratings including the voltage applied and the operating temperature range may result in breakage. If broken,
short-mode or open-mode may not be identified. So if it is expected to encounter with special mode that may exceed
the absolute maximum ratings, it is requested to take necessary safety measures physically including insertion of fuses.
2. Electrical potential at GND
GND must be designed to have the lowest electrical potential In any operating conditions.
3. Short-circuiting between terminals, and mismounting
When mounting to pc board, care must be taken to avoid mistake in its orientation and alignment. Failure to do so may
result in IC breakdown. Short-circuiting due to foreign matters entered between output terminals, or between output and
power supply or GND may also cause breakdown.
4.Operation in Strong electromagnetic field
Be noted that using the IC in the strong electromagnetic radiation can cause operation failures.
5. Thermal shutdown protection circuit
Thermal shutdown protection circuit is the circuit designed to isolate the IC from thermal runaway, and not intended to
protect and guarantee the IC. So, the IC the thermal shutdown protection circuit of which is once activated should not
be used thereafter for any operation originally intended.
6. Inspection with the IC set to a pc board
If a capacitor must be connected to the pin of lower impedance during inspection with the IC set to a pc board, the
capacitor must be discharged after each process to avoid stress to the IC. For electrostatic protection, provide proper
grounding to assembling processes with special care taken in handling and storage. When connecting to jigs in the
inspection process, be sure to turn OFF the power supply before it is connected and removed.
7. Input to IC terminals
+
This is a monolithic IC with P isolation between P-substrate and each element as illustrated below. This P-layer and
the N-layer of each element form a P-N junction, and various parasitic element are formed.
If a resistor is joined to a transistor terminal as shown in Fig 60:
○P-N junction works as a parasitic diode if the following relationship is satisfied; GND>Terminal A (at resistor side), or
GND>Terminal B (at transistor side); and
○if GND>Terminal B (at NPN transistor side),
a parasitic NPN transistor is activated by N-layer of other element adjacent to the above-mentioned parasitic diode.
The structure of the IC inevitably forms parasitic elements, the activation of which may cause interference among circuits,
and/or malfunctions contributing to breakdown. It is therefore requested to take care not to use the device in such
manner that the voltage lower than GND (at P-substrate) may be applied to the input terminal, which may result in
activation of parasitic elements.
Fig.60 Simplified structure of monorisic IC
8. Ground wiring pattern
If small-signal GND and large-current GND are provided, It will be recommended to separate the large-current GND
pattern from the small-signal GND pattern and establish a single ground at the reference point of the set PCB so that
resistance to the wiring pattern and voltage fluctuations due to a large current will cause no fluctuations in voltages of the
small-signal GND. Pay attention not to cause fluctuations in the GND wiring pattern of external parts as well.
Status of this document
The Japanese version of this document is formal specification. A customer may use this translation version only for a reference
to help reading the formal version.
If there are any differences in translation version of this document formal version takes priority.
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Datasheet
BD9102FVM BD9104FVM BD9106FVM
●Physical Dimension Tape and Reel information
●Marking Diagram
MSOP8(TOP VIEW)
Part Number Marking
D
0
9
1
2
LOT Number
1PIN MARK
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Datasheet
Notice
●Precaution for circuit design
1) The products are designed and produced for application in ordinary electronic equipment (AV equipment, OA
equipment, telecommunication equipment, home appliances, amusement equipment, etc.). If the products are to be
used in devices requiring extremely high reliability (medical equipment, transport equipment, aircraft/spacecraft,
nuclear power controllers, fuel controllers, car equipment including car accessories, safety devices, etc.) and whose
malfunction or operational error may endanger human life and sufficient fail-safe measures, please consult with the
ROHM sales staff in advance. If product malfunctions may result in serious damage, including that to human life,
sufficient fail-safe measures must be taken, including the following:
[a] Installation of protection circuits or other protective devices to improve system safety
[b] Installation of redundant circuits in the case of single-circuit failure
2)
The products are designed for use in a standard environment and not in any special environments. Application of the
products in a special environment can deteriorate product performance. Accordingly, verification and confirmation of
product performance, prior to use, is recommended if used under the following conditions:
[a] Use in various types of liquid, including water, oils, chemicals, and organic solvents
[b] Use outdoors where the products are exposed to direct sunlight, or in dusty places
[c] Use in places where the products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2,
and NO2
[d] Use in places where the products are exposed to static electricity or electromagnetic waves
[e] Use in proximity to heat-producing components, plastic cords, or other flammable items
[f] Use involving sealing or coating the products with resin or other coating materials
[g] Use involving unclean solder or use of water or water-soluble cleaning agents for cleaning after soldering
[h] Use of the products in places subject to dew condensation
3)
The products are not radiation resistant.
4)
Verification and confirmation of performance characteristics of products, after on-board mounting, is advised.
5)
In particular, if a transient load (a large amount of load applied in a short period of time, such as pulse) is applied,
confirmation of performance characteristics after on-board mounting is strongly recommended. Avoid applying power
exceeding normal rated power; exceeding the power rating under steady-state loading condition may negatively affect
product performance and reliability.
6)
De-rate Power Dissipation (Pd) depending on Ambient temperature (Ta).
When used in sealed area, confirm the actual ambient temperature.
7)
Confirm that operation temperature is within the specified range described in product specification.
8)
Failure induced under deviant condition from what defined in the product specification cannot be guaranteed.
●Precaution for Mounting / Circuit board design
1) When a highly active halogenous (chlorine, bromine, etc.) flux is used, the remainder of flux may negatively affect
product performance and reliability.
2)
In principle, the reflow soldering method must be used; if flow soldering method is preferred, please consult with the
Company in advance.
Regarding Precaution for Mounting / Circuit board design, please specially refer to ROHM Mounting specification
●Precautions Regarding Application Examples and External Circuits
1) If change is made to the constant of an external circuit, allow a sufficient margin due to variations of the characteristics
of the products and external components, including transient characteristics, as well as static characteristics.
2)
The application examples, their constants, and other types of information contained herein are applicable only when
the products are used in accordance with standard methods. Therefore, if mass production is intended, sufficient
consideration to external conditions must be made.
Notice - Rev.001
Datasheet
●Precaution for Electrostatic
This product is Electrostatic sensitive product, which may be damaged due to Electrostatic discharge. Please take proper
caution during manufacturing and storing so that voltage exceeding Product maximum rating won't be applied to products.
Please take special care under dry condition (e.g. Grounding of human body / equipment / solder iron, isolation from
charged objects, setting of Ionizer, friction prevention and temperature / humidity control).
●Precaution for Storage / Transportation
1) Product performance and soldered connections may deteriorate if the products are stored in the following places:
[a] Where the products are exposed to sea winds or corrosive gases, including Cl2, H2S, NH3, SO2, and NO2
[b] Where the temperature or humidity exceeds those recommended by the Company
[c] Storage in direct sunshine or condensation
[d] Storage in high Electrostatic
2)
Even under ROHM recommended storage condition, solderability of products out of recommended storage time period
may be degraded. It is strongly recommended to confirm solderability before using products of which storage time is
exceeding recommended storage time period .
3)
Store / transport cartons in the correct direction, which is indicated on a carton as a symbol. Otherwise bent leads may
occur due to excessive stress applied when dropping of a carton.
4)
Use products within the specified time after opening a dry bag.
●Precaution for product label
QR code printed on ROHM product label is only for internal use, and please do not use at customer site. It might contain a
internal part number that is inconsistent with an product part number.
●Precaution for disposition
When disposing products please dispose them properly with a industry waste company.
●Precaution for Foreign exchange and Foreign trade act
Since concerned goods might be fallen under controlled goods prescribed by Foreign exchange and Foreign trade act,
please consult with ROHM in case of export.
●Prohibitions Regarding Industrial Property
1) Information and data on products, including application examples, contained in these specifications are simply for
reference; the Company does not guarantee any industrial property rights, intellectual property rights, or any other
rights of a third party regarding this information or data. Accordingly, the Company does not bear any responsibility for:
[a] infringement of the intellectual property rights of a third party
[b] any problems incurred by the use of the products listed herein.
2)
The Company prohibits the purchaser of its products to exercise or use the intellectual property rights, industrial
property rights, or any other rights that either belong to or are controlled by the Company, other than the right to use,
sell, or dispose of the products.
Notice - Rev.001