H5N2001LD, H5N2001LS, H5N2001LM Silicon N Channel MOS FET High Speed Power Switching REJ03G1339-0600 Rev.6.00 Jul 14, 2006 Features • Low on-resistance • Low leakage current • High speed switching Outline RENESAS Package code: PRSS0004AE-A (Package name: LDPAK (L) ) RENESAS Package code: PRSS0004AE-B (Package name: LDPAK (S)-(1) ) 4 4 1 1 2 1. Gate 2. Drain 3. Source 4. Drain 2 3 3 H5N2001LD H5N2001LS D RENESAS Package code: PRSS0004AE-C (Package name: LDPAK (S)-(2) ) 4 G 1 2 3 H5N2001LM Rev.6.00 Jul 14, 2006 page 1 of 7 S H5N2001LD, H5N2001LS, H5N2001LM Absolute Maximum Ratings (Ta = 25°C) Item Drain to source voltage Gate to source voltage Drain current Drain peak current Body to drain diode reverse drain current Body to drain diode reverse drain peak current Avalanche current Channel dissipation Channel to case Thermal Impedance Channel temperature Storage temperature Notes: 1. PW ≤ 10 µs, duty cycle ≤ 1% 2. Value at Tc = 25°C 3. Tch ≤ 150°C Symbol VDSS VGSS ID Ratings 200 ±30 20 80 20 80 20 75 1.67 150 –55 to +150 ID (pulse) Note 1 IDR IDR (pulse) Note 1 IAP Note 3 Pch Note 2 θ ch-c Tch Tstg Unit V V A A A A A W °C/W °C °C Electrical Characteristics (Ta = 25°C) Item Drain to source breakdown voltage Gate to source leak current Zero gate voltage drain current Gate to source cutoff voltage Static drain to source on state resistance Forward transfer admittance Input capacitance Output capacitance Reverse transfer capacitance Turn-on delay time Rise time Turn-off delay time Fall time Total gate charge Gate to source charge Gate to drain charge Body to drain diode forward voltage Body to drain diode reverse recovery time Body to drain diode reverse recovery charge Note: 4. Pulse test Rev.6.00 Jul 14, 2006 page 2 of 7 Symbol V (BR) DSS IGSS IDSS VGS (off) RDS (on) |yfs| Ciss Coss Crss td (on) tr td (off) tf Qg Qgs Qgd VDF trr Min 200 — — 3.0 — 8 — — — — — — — — — — — — Typ — — — — 0.100 14 1350 180 55 35 70 85 20 44 8 22 0.9 140 Max — ±0.1 1 4.5 0.125 — — — — — — — — — — — 1.4 — Unit V µA µA V Ω S pF pF pF ns ns ns ns nC nC nC V ns Qrr — 0.7 — µC Test Conditions ID = 10 mA, VGS = 0 VGS = ±30 V, VDS = 0 VDS = 200 V, VGS = 0 ID = 1 mA, VDS = 10 V ID = 10 A, VGS = 10 V Note 4 ID = 10 A, VDS = 10 V Note 4 VDS = 25 V VGS = 0 f = 1 MHz ID = 10 A RL = 10 Ω VGS = 10 V Rg = 10 Ω VDD = 160 V VGS = 10 V ID = 20 A IF = 20 A, VGS = 0 Note4 IF = 20 A, VGS = 0 diF/dt = 100 A/µs H5N2001LD, H5N2001LS, H5N2001LM Main Characteristics Power vs. Temperature Derating Maximum Safe Operation Area 1000 (A) 300 ID 75 100 30 PW 50 25 s( 50 100 1s 0.1 Case Temperature Tc (°C) 30 100 300 1000 VDS (V) VDS = 10 V Pulse Test 7V 8V 40 30 Drain Current Drain Current 10 50 30 6V 20 10 VGS = 5 V 20 Tc = 75°C 25°C 10 –25°C 0 0 0 4 8 12 Drain to Source Voltage 16 20 0 VDS (V) Pulse Test 3 ID = 20 A 2 10 A 1 5A 0 0 4 8 12 Gate to Source Voltage Rev.6.00 Jul 14, 2006 page 3 of 7 16 20 VGS (V) 4 6 8 10 VGS (V) Static Drain to Source on State Resistance vs. Drain Current Drain to Source On State Resistance RDS(on) (Ω) 4 2 Gate to Source Voltage Drain to Source Saturation Voltage vs. Gate to Source Voltage Drain to Source Saturation Voltage VDS(on) (V) 3 Typical Transfer Characteristics 10 V 40 t) Drain to Source Voltage ID (A) ID (A) Pulse Test ho Ta = 25°C Typical Output Characteristics 50 10 µs 0µ s DC Operation Tc = 25°C 1 200 150 s Operation in 1 this area is 0.3 limited by RDS (on) 0.01 0 10 =1 3 0.03 0 1m 0m 10 Drain Current Channel Dissipation Pch (W) 100 1 Pulse Test VGS = 10 V 0.5 0.2 0.1 0.05 0.02 0.01 1 3 10 30 Drain Current 100 300 ID (A) 1000 Static Drain to Source on State Resistance vs. Temperature Forward Transfer Admittance vs. Drain Current Forward Transfer Admittance |yfs| (S) Static Drain to Source on State Resistance RDS(on) (Ω) H5N2001LD, H5N2001LS, H5N2001LM 0.5 Pulse Test VGS = 10 V 0.4 0.3 10 A ID = 20 A 0.2 0.1 5A 0 –25 0 25 50 75 100 125 150 Case Temperature Tc 100 30 Tc = –25°C 10 25°C 3 75°C 1 0.3 VDS = 10 V Pulse Test 0.1 0.1 0.3 200 100 50 20 10 5 di / dt = 100 A / µs VGS = 0, Ta = 25°C 2 100 10000 3000 Ciss 1000 300 Coss 100 Crss 30 10 0.3 1 3 10 30 100 0 50 VDD = 160 V 100 V 50 V 200 VDS 100 4 VDD = 160 V 100 V 50 V 0 20 40 Gate Charge Rev.6.00 Jul 14, 2006 page 4 of 7 60 8 80 Qg (nc) 0 100 10000 Switching Time t (ns) 12 300 VGS (V) VGS Gate to Source Voltage ID = 20 A 150 Switching Characteristics 16 400 100 Drain to Source Voltage VDS (V) IDR (A) Dynamic Input Characteristics 0 30 VGS = 0 f = 1 MHz 30000 Capacitance C (pF) Reverse Recovery Time trr (ns) 100000 500 Reverse Drain Current (V) 10 Typical Capacitance vs. Drain to Source Voltage 1000 1 0.1 VDS 3 Drain Current ID (A) (°C) Body to Drain Diode Reverse Recovery Time Drain to Source Voltage 1 VGS = 10 V, VDD = 100 V RW = 5 µs, duty ≤ 1 % 3000 Rg = 10 Ω 1000 tr 300 tf tf td(off) 100 td(on) 30 10 0.1 tr 0.3 1 3 Drain Current 10 30 ID (A) 100 H5N2001LD, H5N2001LS, H5N2001LM Reverse Drain Current vs. Souece to Drain Voltage Gate to Source Cutoff Voltage vs. Case Temperature 5 Gate to Source Cutoff Voltage VGS (off) (V) Reverse Drain Current IDR (A) 50 40 30 20 10 VGS = 0, –5 V 5V 10 V ID = 10 mA 4 3 1 mA 0.1 mA 2 1 VDS = 10 V Pulse Test 0 0 0.4 0.8 1.2 Source to Drain Voltage 1.6 0 –25 2.0 VSD (V) 0 25 50 75 100 125 150 Case Temperature Tc (°C) Normalized Transient Thermal Impedance γ s (t) Normalized Transient Thermal Impedance vs. Pulse Width 3 Tc = 25°C 1 D=1 0.5 0.3 0.2 θch – c (t) = γ s (t) • θch – c 0.1 0.1 θch – c = 1.67°C/W, Tc = 25°C 0.05 PDM 2 0.03 0.0 1 0 e . 0 uls tp o h 1s 0.01 10 µ 100 µ D= PW T PW T 1m 100 m 10 m 1 10 Pulse Width PW (S) Switching Time Test Circuit 90% Vout Monitor Vin Monitor 10 Ω Switching Time Waveform D.U.T. Vin Vout Vin 10 V VDD = 100 V 10% 10% 90% td(on) Rev.6.00 Jul 14, 2006 page 5 of 7 10% RL tr 90% td(off) tf H5N2001LD, H5N2001LS, H5N2001LM Package Dimensions RENESAS Code PRSS0004AE-A MASS[Typ.] 1.40g 4.44 ± 0.2 1.3 ± 0.15 1.3 ± 0.2 1.37 ± 0.2 0.76 ± 0.1 2.54 ± 0.5 2.54 ± 0.5 JEITA Package Code SC-83 RENESAS Code PRSS0004AE-B 2.49 ± 0.2 11.0 ± 0.5 0.2 0.86 +– 0.1 Package Name LDPAK(S)-(1) Unit: mm 10.2 ± 0.3 8.6 ± 0.3 11.3 ± 0.5 0.3 10.0 +– 0.5 Previous Code LDPAK(L) / LDPAK(L)V Previous Code LDPAK(S)-(1) / LDPAK(S)-(1)V 0.4 ± 0.1 MASS[Typ.] 1.30g (1.5) 10.0 Rev.6.00 Jul 14, 2006 page 6 of 7 2.54 ± 0.5 0.4 ± 0.1 0.3 3.0 +– 0.5 2.54 ± 0.5 0.2 0.86 +– 0.1 7.8 7.0 2.49 ± 0.2 0.2 0.1 +– 0.1 1.37 ± 0.2 1.3 ± 0.2 7.8 6.6 1.3 ± 0.15 + 0.3 – 0.5 8.6 ± 0.3 (1.5) (1.4) 4.44 ± 0.2 10.2 ± 0.3 Unit: mm 1.7 JEITA Package Code (1.4) Package Name LDPAK(L) 2.2 H5N2001LD, H5N2001LS, H5N2001LM JEITA Package Code RENESAS Code PRSS0004AE-C Previous Code LDPAK(S)-(2) / LDPAK(S)-(2)V MASS[Typ.] 1.35g 7.8 6.6 (2.3) 10.0 2.49 ± 0.2 0.2 0.1 +– 0.1 7.8 7.0 1.3 ± 0.15 + 0.3 – 0.5 8.6 ± 0.3 (1.5) (1.4) 4.44 ± 0.2 10.2 ± 0.3 Unit: mm 1.7 Package Name LDPAK(S)-(2) 2.2 1.37 ± 0.2 2.54 ± 0.5 0.2 0.86 +– 0.1 2.54 ± 0.5 0.4 ± 0.1 0.3 5.0 +– 0.5 1.3 ± 0.2 Ordering Information Part Name H5N2001LD-E H5N2001LSTL-E H5N2001LMTL-E Quantity 500 pcs 1000 pcs 1000 pcs Shipping Container Box (Conductive Sack) Taping Taping Note: For some grades, production may be terminated. Please contact the Renesas sales office to check the state of production before ordering the product. Rev.6.00 Jul 14, 2006 page 7 of 7 Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Keep safety first in your circuit designs! 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. 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