DATA SHEET BIPOLAR ANALOG INTEGRATED CIRCUIT µPC2710TB 5 V, SUPER MINIMOLD SILICON MMIC MEDIUM OUTPUT POWER AMPLIFIER DESCRIPTION The µPC2710TB is a silicon monolithic integrated circuit designed as PA driver for 900 MHz band cellular telephone tuners. This IC is packaged in super minimold package which is smaller than conventional minimold. This IC is manufactured using NEC’s 20 GHz fT NESAT TM lll silicon bipolar process. This process uses silicon nitride passivation film and gold electrodes. These materials can protect chip surface from external pollution and prevent corrosion/migration. Thus, this IC has excellent performance, uniformity and reliability. FEATURES • • • • • • • Supply voltage Circuit current Power gain Medium output power Upper limit operating frequency Port impedance High-density surface mounting : VCC = 4.5 to 5.5 V : ICC = 22 mA TYP. @VCC = 5.0 V : GP = 33 dB TYP. @ f = 500 MHz : PO(sat) = +13.5 dBm TYP. @ f = 500 MHz : fu = 1.0 GHz TYP. @ 3 dB bandwidth : input/output 50 Ω : 6-pin super minimold package (2.0 × 1.25 × 0.9 mm) APPLICATION • PA driver for 900 MHz band cellular telephone ORDERING INFORMATION Part Number µPC2710TB-E3 Remark Package Marking 6-pin super minimold C1F Supplying Form Embossed tape 8 mm wide. 1, 2, 3 pins face the perforation side of the tape. Qty 3 kpcs/reel. To order evaluation samples, please contact your nearby sales office. (Part number for sample order: µPC2710TB-A) Caution Document No. P13443EJ3V0DS00 (3rd edition) Date Published January 2001 N CP(K) Electro-static sensitive devices The mark shows major revised points µPC2710TB PIN CONNECTIONS (Top View) C1F 3 2 1 (Bottom View) 4 4 3 5 5 2 6 6 1 Pin No. Pin Name 1 INPUT 2 GND 3 GND 4 OUTPUT 5 GND 6 VCC PRODUCT LINE-UP (TA = +25°°C, VCC = Vout = 5.0 V, ZS = ZL = 50 Ω) Part No. µPC2708T µPC2708TB µPC2709T µPC2709TB µPC2710T µPC2710TB µPC2776T µPC2776TB fu (GHz) PO(sat) (dBm) GP (dB) NF (dB) ICC (mA) 2.9 +10.0 15 6.5 26 Package 6-pin minimold C1D 6-pin super minimold 6-pin minimold 2.3 +11.5 23 5.0 25 C1E 6-pin super minimold 6-pin minimold 1.0 +13.5 33 3.5 22 C1F 6-pin super minimold 6-pin minimold 2.7 +8.5 23 6.0 25 C2L 6-pin super minimold Remark Typical performance. Please refer to ELECTRICAL CHARACTERISTICS in detail. Notice The package size distinguishes between minimold and super minimold. 2 Marking Data Sheet P13443EJ3V0DS µPC2710TB SYSTEM APPLICATION EXAMPLE EXAMPLE OF 900 MHz BAND DIGITAL CELLULER TELEPHONE RX DEMOD. PLL SW I Q PLL 0° I Driver TX PA φ µ PC2710TB 90° Q Data Sheet P13443EJ3V0DS 3 µPC2710TB PIN EXPLANATION Pin No. Pin Name Applied Voltage (V) Pin Voltage Function and Applications 1 INPUT – 0.90 Signal input pin. A internal matching circuit, configured with resistors, enables 50 Ω connection over a wide band. A multi-feedback circuit is designed to cancel the deviations of hFE and resistance. This pin must be coupled to signal source with capacitor for DC cut. 2 3 5 GND 0 – Ground pin. This pin should be connected to system ground with minimum inductance. Ground pattern on the board should be formed as wide as possible. All the ground pins must be connected together with wide ground pattern to decrease impedance difference. 4 OUTPUT Voltage as same as VCC through external inductor – Signal output pin. The inductor must be attached between VCC and output pins to supply current to the internal output transistors. 6 VCC 4.5 to 5.5 – Power supply pin, which biases the internal input transistor. This pin should be externally equipped with bypass capacitor to minimize its impedance. Note Pin voltage is measured at VCC = 5.0 V 4 Internal Equivalent Circuit Note (V) Data Sheet P13443EJ3V0DS 6 4 1 3 2 5 µPC2710TB ABSOLUTE MAXIMUM RATINGS Parameter Symbol Conditions Ratings Unit Supply Voltage VCC TA = +25°C, pin 4 and pin 6 5.8 V Total Circuit Current ICC TA = +25°C 60 mA Power Dissipation PD Mounted on double-sided copper clad 50 × 50 × 1.6 mm epoxy glass PWB TA = +85°C 270 mW Operating Ambient Temperature TA −40 to +85 °C Storage Temperature Tstg −55 to +150 °C Input Power Pin +10 dBm TA = +25°C RECOMMENDED OPERATING RANGE Parameter Supply Voltage Symbol MIN. TYP. MAX. Unit VCC 4.5 5.0 5.5 V Remark The same voltage should be applied to pin 4 and pin 6. ELECTRICAL CHARACTERISTICS (Unless otherwise specified, TA = +25°°C, VCC = Vout = 5.0 V, ZS = ZL = 50 Ω) Parameter Symbol Test Conditions MIN. TYP. MAX. Unit Circuit Current ICC No signal 16 22 29 mA Power Gain GP f = 500 MHz 30 33 36.5 dB +11.0 +13.5 – dBm – 3.5 5.0 dB 3 dB down below flat gain at f = 0.1 GHz 0.7 1.0 – GHz Saturated Output Power Noise Figure Upper Limit Operating Frequency PO(sat) NF fu f = 500 MHz, Pin = –8 dBm f = 500 MHz Isolation ISL f = 500 MHz 34 39 – dB Input Return Loss RLin f = 500 MHz 3 6 – dB Output Return Loss RLout f = 500 MHz 9 12 – dB Gain Flatness ∆GP f = 0.1 to 0.6 GHz – ±0.8 – dB Data Sheet P13443EJ3V0DS 5 µPC2710TB TEST CIRCUIT VCC 1 000 pF C3 L 6 50 Ω C1 IN C2 4 1 1 000 pF 50 Ω OUT 1 000 pF 2, 3, 5 COMPONENTS OF TEST CIRCUIT FOR MEASURING ELECTRICAL EXAMPLE OF ACTURAL APPLICATION COMPONENTS CHARACTERISTICS Type Value C1, C2 Bias Tee 1 000 pF C3 Capacitor 1 000 pF L Bias Tee 1 000 nH Type Value Operating Frequency C1 to C3 Chip Capacitor 1 000 pF 100 MHz or higher L Chip Inductor 300 nH 10 MHz or higher 100 nH 100 MHz or higher 10 nH 1.0 GHz or higher INDUCTOR FOR THE OUTPUT PIN The internal output transistor of this IC consumes 20 mA, to output medium power. To supply current for output transistor, connect an inductor between the VCC pin (pin 6) and output pin (pin 4). Select large value inductance, as listed above. The inductor has both DC and AC effects. In terms of DC, the inductor biases the output transistor with minimum voltage drop to output enable high level. In terms of AC, the inductor make output-port impedance higher to get enough gain. In this case, large inductance and Q is suitable. CAPACITORS FOR THE VCC, INPUT AND OUTPUT PINS Capacitors of 1000 pF are recommendable as the bypass capacitor for the VCC pin and the coupling capacitors for the input and output pins. The bypass capacitor connected to the VCC pin is used to minimize ground impedance of VCC pin. So, stable bias can be supplied against VCC fluctuation. The coupling capacitors, connected to the input and output pins, are used to cut the DC and minimize RF serial impedance. Their capacitance are therefore selected as lower impedance against a 50 Ω load. The capacitors thus perform as high pass filters, suppressing low frequencies to DC. To obtain a flat gain from 100 MHz upwards, 1000 pF capacitors are used in the test circuit. In the case of under 10 MHz operation, increase the value of coupling capacitor such as 10000 pF. Because the coupling capacitors are determined by equation, C = 1/(2 πRfc). 6 Data Sheet P13443EJ3V0DS µPC2710TB ILLUSTRATION OF THE TEST CIRCUIT ASSEMBLED ON EVALUATION BOARD AMP-2 3 Top View C 1F 1 2 IN OUT C 6 L 5 4 C Mounting Direction VCC C COMPONENT LIST Value C 1 000 pF L 300 nH Notes 1. 30 × 30 × 0.4 mm double sided copper clad polyimide board. 2. Back side: GND pattern 3. Solder plated on pattern 4. : Through holes For more information on the use of this IC, refer to the following application note: USAGE AND APPLICATION OF 6-PIN SUPER MINIMOLD SILICON MEDIUM-POWER HIGH-FREQUENCY AMPLIFIER MMIC (P13252E). Data Sheet P13443EJ3V0DS 7 µPC2710TB TYPICAL CHARACTERISTICS (Unless otherwise specified, TA = +25°°C) CIRCUIT CURRENT vs. OPERATING AMBIENT TEMPERATURE CIRCUIT CURRENT vs. SUPPLY VOLTAGE 40 40 No signal 35 Circuit Current ICC (mA) Circuit Current ICC (mA) 35 30 25 20 15 10 30 25 20 15 10 5 5 0 No signal VCC = 5.0 V 1 2 3 4 5 0 −60 −40 6 −20 0 +20 +40 +60 +80 +100 Operating Ambient Temperature TA (°C) Supply Voltage VCC (V) NOISE FIGURE, POWER GAIN vs. FREQUENCY POWER GAIN vs. FREQUENCY 35 35 VCC = 5.0 V VCC = 5.5 V 4 30 GP VCC = 4.5 V NF VCC = 4.5 V 3.5 3 VCC = 5.5 V Power Gain GP (dB) 4.5 Power Gain GP (dB) Noise Figure NF (dB) VCC = 5.0 V 25 0.1 0.3 1.0 25 0.1 2.0 1.0 0.3 Frequency f (GHz) ISOLATION vs. FREQUENCY INPUT RETURN LOSS, OUTPUT RETURN LOSS vs. FREQUENCY 0 Input Return Loss RLin (dB) Output Return Loss RLout (dB) −10 −20 −30 −40 0.3 1.0 2.0 2.0 VCC = 5.0 V −10 −20 RLin RLout −30 −40 −50 0.1 Frequency f (GHz) 8 TA = +85°C Frequency f (GHz) VCC = 5.0 V Isolation ISL (dB) 30 VCC = 5.0 V 0 −50 0.1 TA = −40°C TA = +25°C Data Sheet P13443EJ3V0DS 0.3 1.0 Frequency f (GHz) 2.0 µPC2710TB OUTPUT POWER vs. INPUT POWER +20 VCC = 5.5 V f = 0.5 GHz +15 +15 Output Power Pout (dBm) Output Power Pout (dBm) OUTPUT POWER vs. INPUT POWER +20 +10 VCC = 5.0 V +5 VCC = 4.5 V 0 −5 −10 −15 −40 −35 −30 −25 −20 −15 −10 −5 0 VCC = 5.0 V f = 0.5 GHz +10 TA = +25°C +5 TA = −40°C 0 −5 −10 −15 −40 −35 −30 −25 −20 −15 −10 −5 +5 +10 Input Power Pin (dBm) OUTPUT POWER vs. INPUT POWER VCC = 5.0 V Output Power Pout (dBm) Output Power Pout (dBm) +15 VCC = 5.5 V +10 +5 0 VCC = 4.5 V −5 −10 0 f = 0.5 GHz +10 +5 f = 1.0 GHz 0 −5 −15 −40 −35 −30 −25 −20 −15 −10 −5 +5 +10 0 +5 +10 Input Power Pin (dBm) Input Power Pin (dBm) SATURATED OUTPUT POWER vs. FREQUENCY 3RD ORDER INTERMODULATION DISTORTION vs. OUTPUT POWER OF EACH TONE +18 Pin = −8 dBm VCC = 5.5 V +16 VCC = 5.0 V +14 +12 +10 VCC = 4.5 V +8 +6 0.1 0.2 0.5 Frequency f (GHz) 1.0 2.0 3rd Order Intermodulation Distortion IM3 (dBc) Saturated Output Power PO (sat) (dBm) +15 −10 −15 −40 −35 −30 −25 −20 −15 −10 −5 +20 +5 +10 +20 VCC = 5.0 V f = 1.0 GHz 0 Input Power Pin (dBm) OUTPUT POWER vs. INPUT POWER +20 TA = +85°C −60 f1 = 0.500 GHz f2 = 0.502 GHz −50 VCC = 5.0 V −40 VCC = 5.5 V −30 −20 VCC = 4.5 V −10 −10 −8 −6 −4 −2 0 +2 +4 +6 +8 +10 Output Power of Each Tone PO (each) (dBm) Data Sheet P13443EJ3V0DS 9 µPC2710TB S-PARAMETERS (TA = +25°°C, VCC = Vout = 5.0 V) S11-FREQUENCY 0.1 GHz 3.0 GHz 2.0 GHz 1.0 GHz S22- FREQUENCY 3.0 GHz 0.1 GHz 2.0 GHz 1.0 GHz 10 Data Sheet P13443EJ3V0DS µPC2710TB TYPICAL S-PARAMETER VALUES (TA = +25°°C) VCC = Vout = 5.0 V, ICC = 22 mA FREQUENCY MHz MAG. S11 ANG. MAG. S21 ANG. MAG. S12 ANG. MAG. ANG. 100.0000 200.0000 300.0000 400.0000 500.0000 600.0000 700.0000 800.0000 900.0000 1000.0000 1100.0000 1200.0000 1300.0000 1400.0000 1500.0000 1600.0000 1700.0000 1800.0000 1900.0000 2000.0000 2100.0000 2200.0000 2300.0000 2400.0000 2500.0000 2600.0000 2700.0000 2800.0000 2900.0000 3000.0000 3100.0000 0.306 0.324 0.356 0.400 0.439 0.469 0.481 0.488 0.479 0.465 0.448 0.417 0.387 0.350 0.316 0.292 0.256 0.245 0.215 0.201 0.177 0.161 0.145 0.124 0.113 0.107 0.091 0.081 0.067 0.055 0.039 2.5 5.2 5.3 2.5 −3.3 −10.2 −17.9 −26.7 −34.5 −41.2 −49.3 −54.9 −61.2 −65.2 −70.8 −74.0 −76.9 −80.5 −82.9 −85.6 −84.4 −88.8 −88.7 −90.3 −89.8 −91.9 −92.2 −94.9 −97.4 −103.8 −95.6 43.072 43.517 44.432 45.513 45.679 45.670 44.793 43.016 40.519 37.946 35.122 32.108 29.221 26.656 23.895 21.576 19.567 17.743 16.040 14.717 13.475 12.327 11.154 10.262 9.490 8.793 8.149 7.652 7.134 6.726 6.295 −8.4 −17.1 −26.5 −36.9 −48.1 −59.7 −71.8 −84.3 −96.0 −107.3 −117.9 −128.0 −137.0 −145.8 −153.9 −161.6 −168.1 −174.4 179.6 173.5 168.8 163.1 158.7 154.4 150.4 146.4 142.4 138.9 135.1 131.5 128.4 0.012 0.010 0.010 0.012 0.012 0.013 0.014 0.014 0.013 0.016 0.016 0.015 0.015 0.015 0.013 0.016 0.015 0.018 0.017 0.021 0.020 0.021 0.022 0.023 0.025 0.028 0.030 0.031 0.031 0.039 0.039 15.2 10.7 20.2 26.9 27.0 31.3 34.9 27.9 26.6 30.8 26.6 39.5 39.7 50.2 50.8 56.6 69.0 61.7 70.0 71.2 83.0 76.7 87.9 81.4 91.9 88.7 93.4 92.1 93.0 88.3 89.6 0.156 0.164 0.185 0.225 0.255 0.283 0.301 0.312 0.316 0.311 0.307 0.282 0.270 0.248 0.236 0.215 0.200 0.196 0.180 0.175 0.166 0.171 0.159 0.164 0.158 0.166 0.175 0.183 0.191 0.200 0.203 2.7 2.1 0.3 −5.5 −15.4 −27.6 −40.2 −54.9 −67.7 −79.5 −92.2 −104.6 −115.5 −127.0 −136.2 −145.3 −155.2 −162.5 −173.4 −178.1 172.0 167.7 159.1 154.0 147.0 141.8 135.7 131.6 123.4 118.9 111.5 Data Sheet P13443EJ3V0DS S22 K 1.08 1.17 1.10 0.92 0.85 0.77 0.74 0.74 0.78 0.79 0.85 0.99 1.12 1.27 1.56 1.49 1.71 1.59 1.88 1.71 1.94 1.99 2.08 2.15 2.19 2.06 2.13 2.13 2.26 1.97 2.08 11 µPC2710TB PACKAGE DIMENSIONS 6-PIN SUPER MINIMOLD (UNIT: mm) 2.1±0.1 0.2+0.1 –0.05 0.65 0.65 1.3 2.0±0.2 1.25±0.1 12 Data Sheet P13443EJ3V0DS 0.15+0.1 –0.05 0 to 0.1 0.7 0.9±0.1 0.1 MIN. µPC2710TB NOTES ON CORRECT USE (1) Observe precautions for handling because of electro-static sensitive devices. (2) Form a ground pattern as widely as possible to minimize ground impedance (to prevent undesired oscillation). All the ground pins must be connected together with wide ground pattern to decrease impedance difference. (3) The bypass capacitor should be attached to VCC line. (4) The inductor must be attached between VCC and output pins. The inductance value should be determined in accordance with desired frequency. (5) The DC cut capacitor must be attached to input pin and output pin. RECOMMENDED SOLDERING CONDITIONS This product should be soldered under the following recommended conditions. Soldering Method Soldering Conditions Recommended Condition Symbol Infrared Reflow Package peak temperature: 235°C or below Time: 30 seconds or less (at 210°C) Count: 3, Exposure limit: NoneNote IR35-00-3 VPS Package peak temperature: 215°C or below Time: 40 seconds or less (at 200°C) Count: 3, Exposure limit: NoneNote VP15-00-3 Wave Soldering Soldering bath temperature: 260°C or below Time: 10 seconds or less Count: 1, Exposure limit: NoneNote WS60-00-1 Partial Heating Pin temperature: 300°C or below Time: 3 seconds or less (per side of device) Exposure limit: NoneNote – Note After opening the dry pack, keep it in a place below 25°C and 65% RH for the allowable storage period. Caution Do not use different soldering methods together (except for partial heating). For details of recommended soldering conditions for surface mounting, refer to information document SEMICONDUCTOR DEVICE MOUNTING TECHNOLOGY MANUAL (C10535E). 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