BIPOLAR ANALOG INTEGRATED CIRCUIT UPC2771TB 3 V, SUPER MINIMOLD MEDIUM POWER SI MMIC AMPLIFIER FEATURES GAIN vs. FREQUENCY AND TEMPERATURE 24 • HIGH GAIN: 21 dB at 900 to 1500 MHz Typical • HIGH OUTPUT POWER: PSAT = +12.5 dBm at 900 MHz +11 dBm at 1500 MHz DESCRIPTION The UPC2771TB is a Silicon Monolithic integrated circuit which is manufactured using the NESAT™ III process. The NESAT III process produces transistors with fT approaching 20 GHz. The UPC2771TB is pin compatible and has comparable performance as the larger UPC2771T, so it is suitable for use as a replacement to help reduce system size. The IC is housed in a 6 pin super minimold or SOT-363 package. Operating on a 3 volt supply, this IC is ideally suited for hand-held, portable designs. NEC's stringent quality assurance and test procedures ensure the highest reliability and performance. Gain, GS (dB) • LOW BIAS VOLTAGE: 3.0 V Typical, 2.7 V Minimum • SUPER SMALL PACKAGE: SOT-363 • TAPE AND REEL PACKAGING OPTION AVAILABLE TA = -40˚ C 22 +85˚ C 20 TA = +25˚ C TA = +85˚ C 18 +25˚ C -40˚ C 16 VCC = 3.0 V 14 0.1 0.3 1.0 3.0 Frequency, f (GHz) ELECTRICAL CHARACTERISTICS (TA = 25°C, ZL = ZS = 50 Ω, VCC = 3.0 V) PART NUMBER PACKAGE OUTLINE SYMBOLS PARAMETERS AND CONDITIONS ICC Circuit Current (no signal) GS Small Signal Gain, fU UPC2771TB S06 UNITS MIN mA f = 900 MHz f = 1500 MHz dB dB 19 18 TYP 45 21 21 24 24 Upper Limit Operating Frequency (The gain at fU is 3 dB down from the gain at 100 MHz) GHz 1.8 2.2 P1dB 1 dB Compressed Output Power, f = 900 MHz f = 1500 MHz dBm dBm +9 +7 +11.5 +9.5 PSAT Saturated Output Power, f = 900 MHz f = 1500 MHz dBm dBm +12.5 +11 Noise Figure, f = 900 MHz f = 1500 MHz dB dB 6 6 Input Return Loss, f = 900 MHz f = 1500 MHz dB dB 10 10 14 14 RLOUT Output Return Loss, f = 900 MHz f = 1500 MHz dB dB 6.5 5.5 9.0 8.5 ISOL Isolation, SSB OutputThird Order Intercept Point dB dB dBm dBm 25 25 OIP3 30 30 +13 +10 PADJ1 Adjacent Channel Power 1, f = 900 MHz f = 1500 MHz f = 900, 902 MHz, POUT = +4 dBm f = 1500, 1502 MHz, POUT = +4 dBm f = 900 mHz, π/4 QPSK wave1, POUT = +7 dBm ∆f = ± 50 kHz ∆f = ± 100 kHz NF RLIN PADJ2 Adjacent Channel Power 2, f = 1.5 GHz, π/4 QPSK wave1, POUT = +7 dBm ∆f = ± 50 kHz ∆f = ± 100 kHz Note: 1.π/4 QPSK modulated wave input, data rate 42 kbps, Filter roll off α = 0.5 MAX 36 dBc dBc -61 -72 dBc dBc -59 -71 7.5 7.5 UPC2771TB ABSOLUTE MAXIMUM RATINGS1 (TA = 25°C) SYMBOLS PARAMETERS VCC Supply Voltage UNITS RATINGS V 3.6 TEST CIRCUIT VCC 1000 pF ICC Total Supply Current mA 77.7 PIN Input Power dBm +13 PT Total Power Dissipation2 mW 270 TOP Operating Temperature °C -40 to +85 TSTG Storage Temperature °C -55 to +150 L=1000 nH Notes: 1. Operation in excess of any one of these parameters may result in permanent damage. 2. Mounted on a 50 X 50 X 1.6 mm epoxy glass PWB (TA = 85°C). 6 50 Ω IN 1 50 Ω OUT 4 1000 pF 1000 pF 2, 3, 5 RECOMMENDED OPERATING CONDITIONS SYMBOLS PARAMETERS UNITS MIN TYP MAX VCC Supply Voltage V 2.7 3 3.3 TOP Operating Temperature °C -40 +25 +85 TYPICAL PERFORMANCE CURVES (TA = 25°C) CIRCUIT CURRENT vs. TEMPERATURE 50 40 40 Circuit Current, ICC (mA) Circuit Current, ICC (mA) CIRCUIT CURRENT vs. VOLTAGE 50 30 20 10 30 20 10 0 0 0 1 2 3 -60 4 -40 -20 0 Supply Voltage, VCC (V) 20 40 60 80 100 Temperature (°C) INPUT RETURN LOSS AND OUTPUT RETURN LOSS vs. FREQUENCY GAIN AND NOISE FIGURE vs. FREQUENCY AND VOLTAGE 0 24 VCC = 2.7V VCC = 3.3V VCC = 3.0V VCC = 3.0V 22 -10 VCC = 3.0 V 18 16 VCC = 2.7 V 14 7 VCC = 3.3 V VCC = 3.0 V 12 5 10 NF VCC = 2.7 V 8 3 6 0.1 0.3 1.0 Frequency, f (GHz) 3.0 Noise Figure, NF (dB) Gain, GS (dB) RLout GS VCC = 3.3V Return Loss (dB) 20 RLin -20 -30 -40 0.1 0.3 1.0 Frequency, f (GHz) 3.0 UPC2771TB TYPICAL PERFORMANCE CURVES (TA = 25°) OUTPUT POWER vs. INPUT POWER AND VOLTAGE ISOLATION vs. FREQUENCY 0 15 VCC = 3.3 V VCC = 3.0V f = 900 MHz Output Power, POUT (dBm) Isolation, ISOL (dB) -10 -20 -30 -40 10 VCC = 2.7 V VCC = 3.0 V 5 0 -5 -50 0.1 0.3 1.0 -25 3.0 -20 Frequency, f (GHz) Pin = -3 dBm VCC = 3.3 V 13 VCC = 3.0 V VCC = 2.7 V 9 7 5 Saturated Output Power, PO(SAT), (dBm) Saturated Output Power, PO(SAT), (dBm) 17 11 -10 -5 0 SATURATED OUTPUT POWER vs. FREQUENCY AND TEMPERATURE SATURATED OUTPUT POWER vs. FREQUENCY AND VOLTAGE 15 -15 Input Power, PIN (dBm) 17 Pin = -3 dBm 15 TA = +85˚C 13 TA = +25˚C 11 TA = -40˚C 9 7 5 0.1 0.3 1.0 Frequency, f (GHz) 3.0 0.1 0.3 1.0 Frequency, f (GHz) 3.0 UPC2771TB OUTLINE DIMENSIONS LEAD CONNECTIONS (Units in mm) UPC2771TB PACKAGE OUTLINE S06 (Top View) (Bottom View) 2.1±0.1 2.0±0.2 0.65 3 4 0.65 2 5 1 6 0.2 +0.1 -0 2 1.3 1 0.7 0~0.1 4 4 3 5 5 2 6 6 1 1. INPUT 2. GND 3. GND 4. OUTPUT 5. GND 6. VCC DOT ON BACK SIDE 0.9 ± 0.1 C2H 3 1.25±0.1 +0.1 0.15 -0.5 PIN DESCRIPTION Pin No. Pin Name (V) Applied Voltage Description Internal Equivalent Circuit 1 Input — Signal input pin. An internal matching circuit, configured with resistors, enables 50 Ω connection over a wide bandwidth. A multi-feedback circuit is designed to cancel the deviations of hFE and resistance. This pin must be coupled to the signal source with a blocking capacitor. 4 Output 6 VCC 2.7 to 3.3 2 GND 0 6 4 Signal output pin. Connect an inductor between this pin and VCC to supply current to the internal output transistors. Power supply pin. This pin should be externally equipped with a bypass capacitor to minimize ground impedance. Ground pins. These pins should be connected to system ground with minimum inductance. Ground pattern on the board should be formed as wide as possible. All the ground pins must be connected together with wide ground pattern to minimize impedance difference. 1 3 2 5 ORDERING INFORMATION PART NUMBER UPC2771TB-E3-A QTY 3K/Reel Note: Embossed Tape, 8 mm wide. Pins 1, 2 and 3 face perforated side of tape. NOTICE 1. Descriptions of circuits, software and other related information in this document are provided only to illustrate the operation of semiconductor products and application examples. You are fully responsible for the incorporation of these circuits, software, and information in the design of your equipment. California Eastern Laboratories and Renesas Electronics assumes no responsibility for any losses incurred by you or third parties arising from the use of these circuits, software, or information. 2. California Eastern Laboratories has used reasonable care in preparing the information included in this document, but California Eastern Laboratories does not warrant that such information is error free. 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