EM4324 Data Sheet - EM Microelectronic

EM MICROELECTRONIC - MARIN SA
EM4324
1 kbit Read/Write, ISO 18000-6C / EPC C-1 G-2
Passive / Battery-assisted Contactless IC
Description
Features
EM4324 is a long range passive / battery-assisted UHF
RFID tag IC compliant with the ISO 18000-6C / EPCglobal
Class-1 Generation-2 protocol. The chip offers an
advanced feature set (EPC+) leading to a performance
beyond that of standard Gen2 chips. Battery-assisted,
EM4324 offers superior reading range and reliability
compared to purely passive RFID solutions. The batteryassisted mode is tailored to harsh environment
applications where other passive UHF solutions fail e.g. in
the presence of water or metal.








ISO 18000-6C compliant
EPC Class-1 Gen-2 compliant
1024-bit non-volatile memory
720-bit user‟s free memory
96-bit EPC numbers supported
64-bit manufacturer-programmed Unique Identifier
(TID / UID)
Forward link data rates: 40 to 160 kbit/s
Return link data rates: 40 to 640 kbit/s
Tamper detection
Battery assistance mode for unsurpassed reading
range and reading reliability
Rectifier that allows passive operation in case the
battery is flat or not present
Support of near-field mode enabling reading e.g.
through water
Support of parallel-inductance matching for improved
matching
32-bit password-protected Kill command
32-bit password-protected Access command
Anti-tearing feature to prevent malicious unlocking
The EM4324 current consumption has been optimized to
maximize battery lifetime. Even if the battery is flat, the
chip continues to operate and communicate with the
reader in passive mode.

The memory size is 1024 bits enabling support of ISO or
EPC data structures. Each chip is delivered with a 64-bit
Unique Identifier to ensure full traceability.

The EM4324 includes a tamper detection circuit to
support E-seal applications. Tamper detection can be
implemented using a simple continuity loop, with heat
sensitive fuse wire, with sensors having both high and low
impedance states, or with external devices controlling an
electronic switch such as a MOSFET.

Applications
Typical Operating configuration









VBAT
Supply chain management
Tracking and tracing
Containers identification
Access control
Asset control
E-seals
Extended temperature range (–20C to +85C)
Available also in TSSOP-8 package
A
Battery


Open or closed dipole


VSS
EM4324
Fig. 1
VBAT
IC Block Diagram
Demodulator
A
Rectifier
TIN
Power
management
Logic
Modulator
EEPROM
TOUT
VSS
EM4324
Fig. 2
Copyright 2012, EM Microelectronic-Marin SA
4324-DS.doc, Version 4.0, 20-Aug-12
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EM4324
Absolute Maximum Ratings
Parameters
Symbol
Min.
Max.
Unit
Operating
temperature
TOP
-20
85
°C
Storage
temperature
TSTORE
-50
150
°C
Voltage on
pad A
VA_ABS
VSS-0.3
VSS+3.6
V
Voltage on
pad VBAT
VBAT_ABS
VSS-0.3
VSS+3.6
V
Voltage on
pad VSS
VSS
-
-
V
20
dBm
RF power at
pad A
Voltage on
pad TST,
TST2, TIN,
TOUT
DC current
into pads
except pad A
PA_ABS
Handling Procedures
This device has built-in protection against high static
voltages or electric fields; however, anti-static
precautions must be taken as for any other CMOS
component. Unless otherwise specified, proper operation
can only occur when all terminal voltages are kept within
the voltage range. Unused inputs must always be tied to
a defined logic voltage level.
Operating Conditions
Parameters
VTST_ABS
VSS-0.3
VSS+3.6
V
IABS
-98
98
mA
DC current
into pad A
IA_ABS
-20
20
mA
Electrostatic
discharge on
1)
pad A
VESD_A
-1250
1250
V
Electrostatic
discharge on
1)
pad VBAT
Stresses above these listed maximum ratings may cause
permanent damages to the device. Exposure beyond
specified operating conditions may affect device
reliability or cause malfunction.
VESD_VBAT
-2000
2000
Symbol
Min.
Max. Unit
Operating
temperature
TOP
-20
+85
°C
Battery operating
voltage (between
VBAT and VSS)
VBAT
1.25
3.3
V
5
dBm
RF power at pad A
(antenna
impedance
conjugate complex
to ZA_PAS)
PA
RF carrier
frequency
fA
860
960
MHz
Table 2
V
Table 1
Note 1: Human Body Model (HBM; 100pF; 1.5kOhm) with
reference to substrate VSS.
Electrical Characteristics
Parameters
Symbol
Conditions
Battery operating voltage for read
VBAT_RD
VBAT > 1.4V during
100µs at T=25°C
when applying VBAT
Battery operating voltage for write
VBAT_WR
Typ.
1.25
Average battery current in Sleep mode
IBAT_S_A
Average battery current in Ready state
IBAT_R_A
VBAT=1.5V, T=25°C
VBAT = 3V, T=25°C
Depth to which the carrier is modulated
KM
Unit
V
3.3
V
0.6
0.9
0.9
1.4
uA
uA
11
22
25
40
uA
uA
100
%
65
battery-assisted
mode
PDUT=-27dBm
T = 25°C
fA = 868MHz
fA = 915MHz
fA = 956MHz
Max.
3.3
2
VBAT=1.5V, T=25°C
VBAT = 3V, T=25°C
Input impedance (between A and VSS)
1
below passive activation threshold ; to
ZA_BAT
be used for antenna matching
optimized for battery-assisted mode
Min.
11-j164
11-j155
11-j148



Table 3
1
The activation threshold is defined as the RF power level above which the chip starts operating and is equal to or lower
than the read sensitivity
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EM4324
Electrical Characteristics (continued)
Parameters
Symbol
Input impedance (between A and VSS)
above passive activation threshold; to
ZA_PAS
be used for antenna matching
optimized for passive mode
TSSOP-8 input impedance (between A
and VSS) below passive activation
ZA_TSSOP
2
threshold (impedance only valid for
TSSOP-8 package option!)
Input impedance (between A and VSS)
ZA_ON
when modulator is on
Conditions
Min.
Typ.
Max.
Unit
passive mode (no
battery)
PDUT=-10dBm
T = 25°C
fA = 868MHz
fA = 915MHz
fA = 956MHz
19-j188
18-j178
17-j170

PDUT=-27dBm
T = 25°C
fA = 868MHz
fA = 915MHz
21-j145
22-j135

62-j25
61-j26
60-j27

-9
-8
dBm
dBm
-27
-27
dBm
dBm



battery-assisted
mode (VBAT=1.1V)
PDUT=-27dBm
T = 25°C
fA = 868MHz
fA = 915MHz
fA = 956MHz


Passive mode
Read sensitivity for power matching
(complex-conjugate
matching)
in PWU_PAS
passive mode
Read sensitivity for power matching
(complex-conjugate
matching)
in PWU_BAT
battery-assisted mode
fA=868MHz
fA=915MHz
Battery-assisted
mode;
1.2<VBAT<2.0V
T = 25°C
fA=868MHz
fA=915MHz
Battery-low voltage
VBAT_LOW
T = 25°C
1.15
1.2
1.25
V
Table 4
Timing Characteristics
Parameters
Symbol
Erase / write endurance
TCYC
Retention
TRET
Write time for 16 bits / 1 word
TWR
RF fade control time
TFADE
Conditions
TOP = 55ºC
Battery-assisted
mode
Min.
Typ.
Max.
Unit
10k
Cycles
10
Years
6.1
7.2
8.3
ms
40
80
175
ms
Table 5
2
The activation threshold is defined as the RF power level above which the chip starts operating and is equal to or lower
than the read sensitivity
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EM4324
Functional Description
Memory Organization
Memory name
RESERVED
TID
EPC
Memory
bank
002
102
012
USER
16-bit bank word
(decimal)
16-bit physical
word (decimal)
0
0
1
1
2
2
3
3
0
4
1
5
2
6
Contents
Kill password
Access password
TID / UID
3
7
0
RAM
CRC-16
1
8
PC
2
9
3
10
4
11
5
12
6
13
7
14
0-44
15-59
User data
45
60
System
configuration
46
61
N/A
47
62
N/A
48
63
N/A
EPC
112
SYSTEM
Table 6: Memory map
The 64-bit TID / UID is programmed and perma-write-locked during manufacturing and before customer delivery. This
guarantees the uniqueness of each device on the market. The custom command GetUID allows fast access of the UID and
provides more confidence in the uniqueness.
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EM4324
Memory name
bank
SYSTEM / 112
16-bit bank
word
4510 (2D16)
Bits (MSB first)
0
1
2
3
4
5
Content
6
7
8
9
A
B
C
D
E
F
Tamper Battery
N/A
Status
Low
N/A
Table 7
Content
Tamper Status
Battery Low
Description
Volatile bit set to 1 when tamper condition is present
Volatile bit set to 1 when the battery is low i.e. when VBAT < VBAT_LOW
Table 8
EEPROM Delivery state
The default configuration is as follows:
 Unique Identification number (UID / TID)
 Version without tamper detection has value E200'B001'XXXX'XXXXh where XXXX'XXXXh is a 32-bit
serial number
 Version with tamper detection has value E200'B002'XXXX'XXXXh where XXXX'XXXXh is a 32-bit
serial number
 EPC at value 0000'0000'0000'0000'0000'0000h
 User data words 0-43 are set to 0000h, User data word 44 is set to an arbitrary value
Commands
Command types
Three sets of commands are defined:
 Mandatory
 Optional
 Custom
Command codes
The table below shows all implemented commands in EM4324. For the description of all mandatory and optional
commands, please refer to the EPCglobal Class-1 Gen-2 standard. More detailed information on the GetUID custom
command is given further below.
Command code
Type
'00'
'01'
'1000'
'1001'
'1010'
'11000000'
'11000001'
'11000010'
'11000011'
'11000100'
'11000101'
'11000110'
„11100000 00000000‟
Mandatory
Mandatory
Mandatory
Mandatory
Mandatory
Mandatory
Mandatory
Mandatory
Mandatory
Mandatory
Mandatory
Optional
Custom
Function
QueryRep
ACK
Query
QueryAdjust
Select
NAK
Req_RN
Read
Write
Kill
Lock
Access
GetUID
Table 9
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EM4324
GetUID custom command
Command code
RN
# of bits
16
16
Description
11100000 00000000
Prior RN16 or handle
Table 10
The custom command GetUID is implemented as in Table 10. It allows an interrogator to read the tag's 64-bit TID / UID with
a single command.
A tag in Reply, Acknowledged, Open or Secured state backscatters {'0', TID / UID, RN16, CRC-16} upon a GetUID
command with a valid RN16 or handle (see Table 11). The state transition and link timing is the same as for the Ack
command. The tag reply is analogous to the tag reply upon a Read command. A link timing example is shown in Fig. 3.
# of bits
Description
Header
UID
RN
1
0
64
TID / UID
16
RN16 (prior RN16 or handle)
Select
CW
Query
GetUID
CW
T1
16
CRC-16('0'+TID+RN16)
Table 11
Next
command
CW
‟0'+UID+RN16+CRC-16
RN16
T4
CRC-16
T2
T1
T2
Fig. 3
Battery assistance
The pad VBAT allows supplying the chip with an external battery. In case the battery is flat or not present, the chip is
supplied by the RF signal on pad A (passive mode). The chip is in Sleep mode in case the RF signal on pad A is below the
sensitivity level and behaves like a passive chip below wake-up i.e. it does not reply to any command. The wake-up from
Sleep mode corresponds to a power-up of a passive EPC chip and is triggered by the presence of an RF field above the
sensitivity level. The chip implements an RF fade control mechanism to overcome momentary nulls that may occur in the
RF field. This allows for more reliable sustained communications when operating at very long ranges. The RF fade control
time is the time duration that starts when the RF signal on pad A drops below the sensitivity level and ends when the chip
declares a loss of the RF field and transition to Sleep mode.
Near-field mode / parallel resonance matching
By using an inductive coil between the pad A and VSS, it is possible to magnetically couple the chip to an interrogator as
used in HF / LF RFID applications. The magnetic / near-field coupling is used to overcome some limitations of
electromagnetic / far-field scattering. It is e.g. possible to establish a link through water and other materials that greatly
reflect the electromagnetic field but not the magnetic field.
To facilitate the near-field mode an on-chip AC coupling capacitor is implemented so that the coil between the pad A and
VSS can be used without the need for an external AC coupling capacitor.
Tamper Detection
Tamper detection is an optional feature. It is included for all packaged devices and is optional for wafers depending upon
the version ordered. The pads/pins TIN and TOUT may be connected via a simple continuity loop, with heat sensitive fuse
wire, with sensors having both high and low impedance states, or with external devices controlling an electronic switch such
as a MOSFET. The connectivity between TIN and TOUT is checked when the device detects an RF field and enters the
Ready state to start communications with a reader. If low impedance is detected, then the Tamper status bit is set,
otherwise it is cleared. A reader may then read User Memory word 4510 (2D16) to determine if a tamper condition exists.
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EM4324
Chip floor plan
80
80
3
2
4
5
6
EM4324
817.15
240.55
821.0875
1056
828.175
0.025
638.25
760.25
882.25
882.15
7
117
1
117
Y
1117
X
All dimensions in m
Pad size : 68 X 68
Fig. 4
Pad description
Pad
1
2
3
4
5
6
7
Name
VSS
2)
VBAT
2)
TST
3)
TST2
3)
TIN
3)
TOUT
A
Description
Antenna and batteryBattery+
N/A - Test purpose only
N/A - Test purpose only
Tamper input
Tamper output
Antenna+
Table 12
Note 2: The pads VBAT and TST can be shorted together to ease inlay assembly
Note 3: The pads TST2, TIN and TOUT can be shorted together to ease inlay assembly (not so for tamper detection versions)
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EM4324
Package information:
EM4324 is available in TSSOP-8 package. More details on package dimensions, pin-out and ordering information are
below.
Package dimensions
0.60
e1
0.50
2
e
1
A
E
0.60
A1
D
N
TOP VIEW
S
Y
M
B
O
L
SIDE VIEW
COMMON
DIMENSIONS
MIN.
NOM.
N
O
MAX.
T
E
1.10
A
A1
0.05
0.10
0.15
D
3.00 BSC
E
4.90 BSC
e
e1
0.65 BSC
N
8
1.95 BSC
Fig. 5
Note 4: BSC - Basic spacing between centers
TSSOP-8 Pin description
Pin
1
2
3
4
5
6
7
8
Name
A
NC
TOUT
TIN
TST2
TST
VBAT
VSS
Description
Antenna+
NC
Tamper output
Tamper input
N/A
N/A
Battery+
Antenna and batteryTable 13
Package Ordering Information
Part Number
EM4324V2TP8B+
Tamper Detection
Package
Delivery Form
Yes
TSSOP-8
Tape
Table 14
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EM4324
Ordering Information
The following charts show the general offering. For detailed Part Number to order, please see the table “Standard
Versions” below.
Die form
EM4324 V% WS 11
- %%%
Circuit Nb:
EM4324
Custom Version:
%%% = other custom specific version
Version:
V1 = no tamper detection
V2 = tamper detection
Bumping:
(blank) = no bumping
E = with Gold Bumps
Die form:
WW = Wafer
WS = Sawn Wafer/Frame
Thickness:
6 = 6 mils (152um)
7 = 7 mils (178um)
11 = 11 mils (280um)
27 = 27 mils (686um)
Fig. 6
Remarks:
 For ordering, please, use table of “Standard Version” table below.
 For specifications of Delivery Form, including gold bumps, tape and bulk, as well as possible other delivery form or
packages, please, contact EM Microelectronic-Marin S.A.
Standard Versions & Samples:
For samples, please, order exclusively:
The versions below are considered standards and should be readily available. For other versions or other delivery form,
please contact EM Microelectronic-Marin S.A.
Part Number
EM4324V1WS7E
EM4324V2WS7E
EM4324VXYYY-%%%
Tamper Detection
Package/Die Form
Delivery Form
No
Yes
Sawn wafer / bumped die – thickness of 7 mils
Sawn wafer / bumped die – thickness of 7 mils
Custom
Wafer sawn on frame
Wafer sawn on frame
Custom
Table 15
Product Support
Check our web site under Products/RF Identification section. Questions can be sent to [email protected]
EM Microelectronic-Marin SA (“EM”) makes no warranties for the use of EM products, other than those expressly contained in EM's
applicable General Terms of Sale, located at http://www.emmicroelectronic.com. EM assumes no responsibility for any errors which may
have crept into this document, reserves the right to change devices or specifications detailed herein at any time without notice, and does
not make any commitment to update the information contained herein.
No licenses to patents or other intellectual property rights of EM are granted in connection with the sale of EM products, neither expressly
nor implicitly.
In respect of the intended use of EM products by customer, customer is solely responsible for observing existing patents and other
intellectual property rights of third parties and for obtaining, as the case may be, the necessary licenses.
Important note: The use of EM products as components in medical devices and/or medical applications, including but not limited
to, safety and life supporting systems, where malfunction of such EM products might result in damage to and/or injury or death
of persons is expressly prohibited, as EM products are neither destined nor qualified for use as components in such medical
devices and/or medical applications. The prohibited use of EM products in such medical devices and/or medical applications is
exclusively at the risk of the customer
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