DS_ACT4524 20150727 - Active-Semi

ACT4524
Rev 0, 28-Jul-15
40V/3.5A Buck Converter with Dual Output and Separated Over Current Protection
GENERAL DESCRIPTION
FEATURES









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ACT4524 is a wide input voltage, high efficiency
step-down DC/DC converter that operates in either
CV (Constant Output Voltage) mode or CC
(Constant Output Current) mode. ACT4524 has
separated output current limits for dual ports CLA
application. With the separated current limits, the
CLA can meet Apple’s MFI standard.
40V Input Voltage Surge
4.5V-36V operational Input Voltage
Dual 5.1V Outputs with 1% Accuracy
Up to 3.5A Output Current
2.65A Constant Current Regulation for VOUT1
1.2A Constant Current Regulation for VOUT2
Hiccup Mode Protection at Output Short
>90% Efficiency at Full Load
<0.5mA Low Standby Input Current
5.7V Output Over Voltage Protection
Cord Voltage Drop Compensation
Meet EN55022 Class B Radiated EMI Standard
SOP-8EP Package
ACT4524 provides up to 3.5A output current at
125kHz switching frequency. ACT4524 utilizes
adaptive drive technique to achieve good EMI
performance while maintain 90% efficiency at full
load for mini size CLA designs.
ACT4524 also has built in hiccup mode output short
circuit protection. The average output current is
reduced to below 6mA when output is shorted to
ground. Other features include output over voltage
protection and thermal shutdown.
ACT4524 is available in a SOP-8EP package and
require very few external components for operation.
APPLICATIONS




Car Charger
Cigarette Lighter Adaptor (CLA)
Rechargeable Portable Device
CV/CC regulation DC/DC converter
Output VI Profile
Typical Application Circuit
Innovative PowerTM
-1-
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Copyright © 2015 Active-Semi, Inc.
ACT4524
Rev 0, 28-Jul-15
ORDERING INFORMATION
PART NUMBER
OPERATION AMBIENT TEMPERATURE RANGE
PACKAGE
PACKING
ACT4524YH-T
-40°C to 85°C
SOP-8EP
TAPE & REEL
PIN CONFIGURATION
Top View
PIN DESCRIPTIONS
PIN
NAME
DESCRIPTION
1
CSP
Voltage Feedback Input. The voltage at this pin is regulated to 5.10V. Connect this pin to the
positive terminal of current sense resistor. CSP, CSN1 and CSN2 Kevin sense is
recommended.
2
CSN1
Output current sense. Connect to the negative terminal of current sense resistor for VOUT1.
3
CSN2
Output current sense. Connect to the negative terminal of current sense resistor for VOUT2.
4
Mode pin with internal pull up current to determine device should operate in Native, Master,
or Slave mode. If the pin is floated, the device operates in native mode; if the pin is
MODE
grounded ,the device operates in Slave mode and receives CLK signal from another device;
if the pin is connected to 82kOhm resistor, the device is configured in Master mode.
5
CLK
Synchronization of dual chips. Two chips operate synchronously out of phase with CLK pin
connected.
6
IN
Power Supply Input. Bypass this pin with a 10μF ceramic capacitor to GND, placed as close
to the IC as possible.
7
SW
Power switching output to external inductor.
8
HSB
High Side Bias pin. This pin provides power to the internal high-side MOSFET gate driver.
Connect a 22nF capacitor from HSB pin to SW pin.
9
GND
Ground and heat dissipation pad. Connect this exposed pad to large ground copper area
and other ground planes by thermal vias.
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Copyright © 2015 Active-Semi, Inc.
ACT4524
Rev 0, 28-Jul-15
ABSOLUTE MAXIMUM RATINGS
PARAMETER
VALUE
UNIT
-0.3 to 40
V
SW to GND
-1 to VIN + 1
V
HSB to GND
VSW - 0.3 to VSW + 7
V
-0.3 to + 6
V
46
°C/W
Operating Junction Temperature
-40 to 150
°C
Storage Junction Temperature
-55 to 150
°C
300
°C
IN to GND
CSP, CS1, CS2, CLK, MODE to GND
Junction to Ambient Thermal Resistance
Lead Temperature (Soldering 10 sec.)
: Do not exceed these limits to prevent damage to the device. Exposure to absolute maximum rating conditions for long periods may
affect device reliability.
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Copyright © 2015 Active-Semi, Inc.
ACT4524
Rev 0, 28-Jul-15
ELECTRICAL CHARACTERISTICS
(VIN = 12V, TA = 25°C, unless otherwise specified.)
Parameter
Input over voltage protection
Symbol
Condition
Min
Typ
Max
Units
VIN_OVP
Rising
40
42
44
V
Input under voltage lockout (UVLO)
VIN
Rising
4.15
4.5
4.75
V
Input UVLO hysteresis
VIN
Output voltage regulation
CSP
Output voltage cord compensation
300
5.05
Output current 2.4A
Output over voltage protection
Output over voltage deglitch time
Output over voltage protection
hysteresis
VOUT
VOUT falling
UVP hysteresis
VOUT
VOUT rising
5.15
50
5.5
Output under voltage protection
(UVP)
5.10
mV
2.25
UVP hiccup time
UVP blanking time at startup
5.7
V
mV
6.0
V
500
ns
0.3
V
2.50
2.75
V
0.2
V
4
s
3.5
ms
Output constant current limit
CS1
Rcs=25mΩ
2.50
2.65
2.80
A
Output constant current limit
CS2
Rcs=50mΩ
1.1
1.2
1.3
A
Maximum duty cycle
99
%
Soft-start time
2.0
ms
80
mV
Thermal shut down
160
°C
Thermal shut down hysteresis
30
°C
2.0
kV
Out voltage ripples
ESD on CSP, CSN1, CSN2
Innovative PowerTM
Cout=470uF//22uF ceramic
HBM
-4-
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Copyright © 2015 Active-Semi, Inc.
ACT4524
Rev 0, 28-Jul-15
FUNCTIONAL BLOCK DIAGRAM
FUNCTIONAL DESCRIPTION
threshold. If the UVP threshold is hit for 10us, an
over current or short circuit is assumed, and the
converter goes into hiccup mode by disabling the
converter and restarts in 4 seconds and restarts.
Output Current Sensing and Regulation
The conventional cycle-by-cycle peak current mode
is implemented with high-side FET current sense.
Sense resistors are connected to the channel 1 and
channel 2 outputs, respectively. The sensed
differential voltage is compared with interval
reference to regulate current. CC loop and CV loop
are in parallel. The current loop response is allowed
to have slower response compared to voltage loop.
However, during current transient response, the
inductor current overshoot/undershoot should be
controlled within +/-25% to avoid inductor
saturation.
Cord Compensation
In some applications, the
increased with output current
potential voltage drop across
compensation is based on the
resistance.
The compensation voltage is derived as:
ΔVout = (VCSP-VCSN1)*K
Where VCSP-VCSN1=60mV and K=5/6. This voltage
difference could be added on the reference or
turning the (VCSP-VCSN) voltage into a sink current at
FB pin to pull Vout higher than programmed
voltage.
Input Over Voltage Protection
The converter is disabled if the input voltage is
above 42V (+/-2V). Device resumes operation
automatically 40ms after OVP is cleared.
The cord compensation loop should be very slow to
avoid potential disturbance to the voltage loop. The
voltage loop should be sufficiently stable on various
cord compensation setting.
Output Over Voltage Protection
Device stops switching when output over-voltage is
sensed, and resumes operation automatically when
output voltage drops to OVP- hysteresis.
Thermal Shutdown
Output Under-Voltage Protection /
Hiccup Mode
There
is
a
under
Innovative PowerTM
voltage
protection
output voltage is
to compensate the
output cable. The
high side feedback
If the TJ increases beyond 160°C, ACT4524 goes
into HZ mode and the timer is preserved until TJ
drops by 30°C.
(UVP)
-5-
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Copyright © 2015 Active-Semi, Inc.
ACT4524
Rev 0, 28-Jul-15
FUNCTIONAL DESCRIPTION
CLK Mode
There are three clock modes that depend on the
mode pin configuration. During power up, device
checks MODE pin condition (floating, 82k resistor to
ground or grounded) to decide which mode (native,
master or slave) device should operate in.
If only single ACT4524 is required, mode pin can be
left float, and ACT4524 runs at native mode using
internal oscillator clock.
For high load current application (>3.5A), it's
possible to use two ACT4524 to operate in parallel
with one device as master to provide clock for the
other (slave). Two devices operate on the same
frequency, but in opposite phase to optimize supply
loading and EMI performance.
Innovative PowerTM
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Copyright © 2015 Active-Semi, Inc.
ACT4524
Rev 0, 28-Jul-15
APPLICATIONS INFORMATION
Inductor Selection
Input Capacitor
The inductor maintains a continuous current to the
output load. This inductor current has a ripple which
is determined by the inductance value.
The input capacitor needs to be carefully selected
to maintain sufficiently low ripple at the supply input
of the converter. A low ESR capacitor is highly
recommended. Since large current flows in and out
of this capacitor during switching, its ESR also
affects efficiency.
Higher inductance reduces the peak-to-peak ripple
current. The trade off for high inductance value is
the increase in inductor core size and series
resistance, and the reduction in current handling
capability. In general, select an inductance value L
based on ripple current requirement:
L=
VOUT × (VIN _VOUT )
VIN fSW ILOADMAX K RIPPLE
The input capacitance needs to be higher than
10µF. The best choice is the ceramic type,
however, low ESR tantalum or electrolytic types
may also be used provided that the RMS ripple
current rating is higher than 50% of the output
current. The input capacitor should be placed close
to the VIN and GND pins of the IC, with the shortest
traces as possible. In the case of tantalum or
electrolytic types, they can be placed a little bit
away of IC if a paralleled ceramic capacitor is
placed right next to the IC.
(1)
Where VIN is the input voltage, VOUT is the output
voltage, fSW is the switching frequency, ILOADMAX is
the maximum load current, and KRIPPLE is the ripple
factor. Typically, choose KRIPPLE = 30% to
correspond to the peak-to-peak ripple current being
30% of the maximum load current.
Output Capacitor
With a selected inductor value the peak-to-peak
inductor current is estimated as:
ILPK _ PK =
VOUT × (VIN _VOUT )
L × VIN × fSW
The output capacitor also needs to have low ESR to
keep low output voltage ripple. The output ripple
voltage is:
VIN
VRIPPLE  IOUTMAX K RIPPLE RESR 
(5)
2
28  fSW LC OUT
(2)
The peak inductor current is estimated as:
1
ILPK = ILOADMAX + ILPK _ PK
2
Where IOUTMAX is the maximum output current,
KRIPPLE is the ripple factor, RESR is the ESR of the
output capacitor, fSW is the switching frequency, L is
the inductance, and COUT is the output capacitance.
In the case of ceramic output capacitors, RESR is very
small and only contributes a very small portion of the
ripple. Therefore, a lower capacitance value can be
used for ceramic type. In the case of tantalum or
electrolytic capacitors, the ripple is dominated by
RESR multiplied by the ripple current. In that case, the
output capacitor should be chosen to have
sufficiently low ESR.
(3)
The selected inductor should not saturate at ILPK.
The maximum output current is calculated as:
IOUTMAX = ILIM _
1
I _
2 LPK PK
(4)
LLIM is the internal current limit.
External High Voltage Bias Diode
For ceramic type output capacitor, typically choose
a capacitance of about 22µF. For tantalum or
electrolytic capacitors, choose a capacitor with less
than 50mΩ ESR. A 330µF or 470µF electrolytic
capacitor is recommended.
It is recommended that an external High Voltage
Bias diode be added when the system has a 5V
fixed input or the power supply generates a 5V
output. This helps improve the efficiency of the
regulator. The High Voltage Bias diode can be a
low cost one such as IN4148 or BAT54.
Rectifier Diode
Use a low forward voltage drop (Vf<0.5V) Schottky
diode as the rectifier to conduct current when the
High-Side Power Switch is off. The Schottky diode
must have current rating higher than the maximum
output current and a reverse voltage rating higher
than the maximum input voltage.
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Copyright © 2015 Active-Semi, Inc.
ACT4524
Rev 0, 28-Jul-15
APPLICATIONS INFORMATION
PCB Layout Guidance
When laying out the printed circuit board, the
following checklist should be used to ensure proper
operation of the IC.
1) Arrange the power components properly to
reduce the AC loop size which consisting of CIN,
VIN pin, SW pin and the Schottky diode.
2) Place input decoupling ceramic capacitor CIN as
close to VIN pin as possible. CIN is connected to
power GND with either vias or short and wide
path.
3) Return CSP to signal GND pin, and connect
the signal GND to power GND at a single point
for best noise immunity. Connect exposed pad
to power ground copper area other ground
planes by thermal vias.
4) Use copper plane for power GND for best heat
dissipation and noise immunity.
5) Use short trace connecting HSB-CHSB-SW loop.
6) SW pad is noise node which is switching from
VIN to GND. It should be isolated away from the
rest of circuit for good EMI and low noise
operation.
Innovative PowerTM
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Copyright © 2015 Active-Semi, Inc.
ACT4524
Rev 0, 28-Jul-15
Figure 1:
Typical Application Circuit for 5V/3.4A Car Charger
BOM List for 5V/3.4A Car Charger
ITEM REFERENCE
DESCRIPTION
MANUFACTURER
QTY
1
U1
IC, ACT4524, SOP-8EP
Active-Semi
1
2
C1
Capacitor, Electrolytic, 47uF/35V, 6.3х7mm
Murata, TDK
1
3
C2
Capacitor, Ceramic, 0.1µF/35V, 0805, SMD
Murata, TDK
1
4
C3
Capacitor, Ceramic, 10µF/35V, 1206, SMD
Murata, TDK
1
5
C4
Capacitor, Ceramic, 22nF/25V, 0603, SMD
Murata, TDK
1
6
C5
Capacitor, Ceramic, 2.2nF/10V, 0603, SMD, optional
Murata, TDK
1
7
C6
Capacitor, Ceramic, 10uF/10V, 1206, SMD
Murata, TDK
1
8
C7
Capacitor, Electrolytic, 220uF/10V, 6.3х7mm
Murata, TDK
1
9
C8, C9
Capacitor, Ceramic, 2.2µF/10V, 0805, SMD
Murata, TDK
2
10
L1
Inductor, 33µH, 6.0A, 20%, DCR=15mΩ
Murata, TDK
1
11
D1
Diode, Schottky, 40V/5A, S54
Vishay
1
12
R1
Chip Resistor, 0Ω, 1/10W, 5%, 0603
Murata, TDK
1
13
R2
Chip Resistor, 5.1Ω, 1/8W, 5%, 0805, optional
Murata, TDK
1
14
Rcs1
Chip Resistor, 25mΩ, 1/4W, 1%, 1206
Murata, TDK
1
15
Rcs2
Chip Resistor, 50mΩ, 1/4W, 1%, 1206
Murata, TDK
1
16
R3, R4
Chip Resistor, 49.9kΩ, 1/10W, 5%, 0603
Murata, TDK
2
17
R5, R6
Chip Resistor, 43.2kΩ, 1/10W, 5%, 0603
Murata, TDK
2
18
R7
Chip Resistor, 200Ω, 1/10W, 5%, 0603
Murata, TDK
1
19
USB
Innovative PowerTM
USB Rev A
2
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Copyright © 2015 Active-Semi, Inc.
ACT4524
Rev 0, 28-Jul-15
Figure 2:
Typical Application Circuit for 5V/4.8A (2*ACT4524) Car Charger
Innovative PowerTM
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Copyright © 2015 Active-Semi, Inc.
ACT4524
Rev 0, 28-Jul-15
BOM List for 5V/4.8A Car Charger
ITEM
REFERENCE
1
U1,U2
2
DESCRIPTION
MANUFACTURER
QTY
IC, ACT4524, SOP-8EP
Active-Semi
2
L1,L2
Inductor, 40µH, 6.0A, 20%, DCR=15mΩ
Murata, TDK
2
3
D1,D2
Diode, Schottky, 40V/5A, S54
Vishay
2
4
C1
Capacitor, Electrolytic, 47uF/35V, 6.3х7mm
Murata, TDK
1
5
C2,C9
Capacitor, Ceramic, 0.1µF/35V, 0805, SMD
Murata, TDK
2
6
C3,C10
Capacitor, Ceramic, 10µF/35V, 1206, SMD
Murata, TDK
2
7
C4,C11
Capacitor, Ceramic, 22nF/25V, 0603, SMD
Murata, TDK
2
8
C5,C12
Capacitor, Ceramic, 2.2nF/10V, 0603, SMD, optional
Murata, TDK
2
9
C6,C13
Capacitor, Ceramic, 10uF/10V, 1206, SMD
Murata, TDK
2
10
C7,C14
Capacitor, Electrolytic, 220uF/10V, 6.3х7mm
Murata, TDK
2
11
C8,C15
Capacitor, Ceramic, 2.2µF/10V, 0805, SMD
Murata, TDK
2
12
R1,R8
Chip Resistor, 0Ω, 1/10W, 5%, 0603
Murata, TDK
2
13
R2,R9
Chip Resistor, 5.1Ω, 1/8W, 5%, 0805, optional
Murata, TDK
3
14
Rcs1,Rcs2
Chip Resistor, 25mΩ, 1/4W, 1%, 1206
Murata, TDK
2
15
R3, R4,R10,R11 Chip Resistor, 49.9kΩ, 1/10W, 5%, 0603
Murata, TDK
4
16
R5, R6,R12,R13 Chip Resistor, 43.2kΩ, 1/10W, 5%, 0603
Murata, TDK
4
Murata, TDK
1
17
R7
18
USB
Innovative PowerTM
Chip Resistor, 82kΩ, 1/10W, 5%, 0603
USB Rev A
2
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Copyright © 2015 Active-Semi, Inc.
ACT4524
Rev 0, 28-Jul-15
TYPICAL PERFORMANCE CHARACTERISTICS
(Schematic as show in Figure 1, Ta = 25°C, unless otherwise specified)
Power Loss vs. Load current
Efficiency vs. Load current
85
VIN =16V
2.5
Power Loss (W)
Efficiency (%)
90
VIN =24V
80
ACT4524-002
VIN =12V
95
3.0
ACT4524-001
100
75
70
2.0
VIN =24V
1.5
VIN =16V
1.0
VIN =12V
0.5
65
60
60
0
500
1000
1500
2000
2500
3000
0
3500
500
1000
2500
3000
3500
Standby Current vs. Input Voltage
Switching Frequency vs. Input Voltage
135
Standby Current (mA)
140
130
125
120
ACT4524-004
1.0
ACT4524-003
145
Switching Frequency (kHz)
2000
Load Current (mA)
Load Current (mA)
0.8
0.6
0.4
0.2
115
110
0
10
15
20
25
30
35
40
8
12
16
Input Voltage (V)
20
24
28
32
36
40
Input Voltage (V)
Output1 CC vs. Input Voltage
Output2 CC vs. Input Voltage
Output2 Current (mA)
2640
2630
2620
2610
2600
ACT4524-006
1230
ACT4524-005
2650
Output1 Current (mA)
1500
1220
1210
1200
1190
1180
8
12
16
20
24
28
32
36
40
8
Input Voltage (V)
Innovative PowerTM
12
16
20
24
28
32
36
40
Input Voltage (V)
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Copyright © 2015 Active-Semi, Inc.
ACT4524
Rev 0, 28-Jul-15
TYPICAL PERFORMANCE CHARACTERISTICS
(Schematic as show in Figure 1, Ta = 25°C, unless otherwise specified)
Output2 Current vs. Temperature
Output1 Current vs. Temperature
Output2 Current (mA)
Output1 Current (mA)
2670
2640
2610
2580
2550
-20
10
40
70
100
130
VOUT = 5.1V
VIN = 12V
IOUT = 1.2A
1290
1260
1230
1200
1170
1140
-20
160
10
40
70
100
130
160
Temperature (°C)
Temperature (°C)
Input Surge Test
Start up into CC Mode
ACT4524-010
ACT4524-009
CH1
ACT4524-008
VOUT = 5.1V
VIN = 12V
IOUT= 2.65A
2700
1320
ACT4524-007
2730
VOUT = 5.1V
RLORD = 1.5Ω
IOUT1 = 2.65A
VIN = 12V
CH2
CH1
CH3
CH2
CH1: VIN, 20V/div
CH2: VOUT, 2V/div
CH3: IOUT, 2A/div
TIME: 100ms/div
CH1: VOUT, 2V/div
CH2: IOUT, 1A/div
TIME: 400µs/div
Start up into CC Mode
Start up with CC load
VIN = 12V
VIN
= 12V
Vout=5.1V
IOUT = 3.6A
IOUT = 3.4A
ACT4524-012
ACT4524-011
VOUT = 5.1V
RLORD = 2.5Ω
IOUT2 = 1.2A
VIN = 12V
CH1
CH1
CH2
CH3
CH2
CH4
CH1: VOUT, 2V/div
CH2: IOUT, 1A/div
TIME: 400µs/div
Innovative PowerTM
CH1: VIN, 5V/div
CH2: VOUT, 2V/div
CH3: IL, 5A/div
CH4: SW, 10V/div
TIME: 1ms//div
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Copyright © 2015 Active-Semi, Inc.
ACT4524
Rev 0, 28-Jul-15
TYPICAL PERFORMANCE CHARACTERISTICS
(Schematic as show in Figure 1, Ta = 25°C, unless otherwise specified)
Output Short Test
Power Off from CC load
CH3
CH2
CH4
CH3
CH1: VIN, 5V/div
CH2: VOUT, 2V/div
CH3: IL, 5A/div
CH4: SW, 10V/div
TIME: 1ms//div
CH1: VOUT, 2V/div
CH2: IL, 5A/div
CH3: SW, 10V/div
TIME: 2s//div
SW vs. Output Voltage Ripples
Output Short Recovery
ACT4524-016
ACT4524-015
VIN = 12V
VOUT = 5.1V
IOUT = 3.6A
VIN = 12V
VOUT = 5.1V
IOUT = 3.6A
CH1
ACT4524-014
CH2
ACT4524-013
VIN = 12V
Vout=5.1V
IOUT = 3.4A
CH1
VIN = 12V
IOUT1 = 0A
Iout2 = 1.0A
CH1
CH1
CH2
CH2
CH3
CH3
CH1: SW, 10V/div
CH2: VOUT1 Ripple, 50mV/div
CH3: VOUT2 Ripple, 50mV/div
TIME: 4µs/div
CH1: VOUT, 2V/div
CH2: IL, 5A/div
CH3: SW, 10V/div
TIME: 2s//div
SW vs. Output Voltage Ripples
ACT4524-018
ACT4524-017
VIN = 12V
IOUT1 = 2.4A
Iout2= 0A
SW vs. Output Voltage Ripples
VIN = 12V
IOUT1 = 2.4A
Iout2= 1.0A
CH1
CH1
CH2
CH2
CH3
CH3
CH1: SW, 10V/div
CH2: VOUT1 Ripple, 50mV/div
CH3: VOUT2 Ripple, 50mV/div
TIME: 4µs/div
Innovative PowerTM
CH1: SW, 10V/div
CH2: VOUT1 Ripple, 50mV/div
CH3: VOUT2 Ripple, 50mV/div
TIME: 4µs/div
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Copyright © 2015 Active-Semi, Inc.
ACT4524
Rev 0, 28-Jul-15
TYPICAL PERFORMANCE CHARACTERISTICS
(Schematic as show in Figure 1, Ta = 25°C, unless otherwise specified)
Load Transient (0mA-500mA-0mA)
Load Transient (500mA-1A-500mA)
CH1
CH2
CH2
CH3
CH3
CH1: VOUT1, 50mV/div
CH2: VOUT2, 50mV/div
CH3: IOUT1, 500mA/div
TIME: 1ms//div
CH1: VOUT1, 50mV/div
CH2: VOUT2, 50mV/div
CH3: IOUT1, 500mA/div
TIME: 1ms//div
Load Transient (1A-1.5A-1A)
Load Transient (1.5A-2.4A-1.5A)
ACT4524-022
ACT4524-021
CH1
ACT4524-020
ACT4524-019
CH1
CH1
CH2
CH2
CH3
CH3
CH1: VOUT1, 100mV/div
CH2: VOUT2, 100mV/div
CH3: IOUT1, 1A/div
TIME: 1ms//div
Innovative PowerTM
CH1: VOUT1, 100mV/div
CH2: VOUT2, 100mV/div
CH3: IOUT1, 2A/div
TIME: 1ms//div
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Copyright © 2015 Active-Semi, Inc.
ACT4524
Rev 0, 28-Jul-15
PACKAGE OUTLINE
SOP-8EP PACKAGE OUTLINE AND DIMENSIONS
SYMBOL
DIMENSION IN
MILLIMETERS
DIMENSION IN
INCHES
MIN
MAX
MIN
MAX
A
1.350
1.727
0.053
0.068
A1
0.000
0.152
0.000
0.006
A2
1.350
1.550
0.053
0.061
b
0.330
0.510
0.013
0.020
c
0.170
0.250
0.007
0.010
D
4.700
5.100
0.185
0.200
D1
3.202
3.402
0.126
0.134
E
3.734
4.000
0.147
0.157
E1
5.800
6.200
0.228
0.244
E2
2.313
2.513
0.091
0.099
e
1.270 TYP
0.050 TYP
L
0.400
1.270
0.016
0.050
θ
0°
8°
0°
8°
Active-Semi, Inc. reserves the right to modify the circuitry or specifications without notice. Users should evaluate each
product to make sure that it is suitable for their applications. Active-Semi products are not intended or authorized for use
as critical components in life-support devices or systems. Active-Semi, Inc. does not assume any liability arising out of
the use of any product or circuit described in this datasheet, nor does it convey any patent license.
Active-Semi and its logo are trademarks of Active-Semi, Inc. For more information on this and other products, contact
sales@active-semi.com or visit http://www.active-semi.com.
is a registered trademark of Active-Semi.
Innovative PowerTM
- 16 -
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Copyright © 2015 Active-Semi, Inc.