Low Capacitance ESD Protection Array for High Speed Data Lines

ESD1014, SZESD1014
Low Capacitance ESD
Protection Array for High
Speed Data Lines
Protection
www.onsemi.com
The ESD1014 transient voltage suppressor is designed to protect
high speed data lines from ESD, EFT, and lightning.
Features
• Low Capacitance (6 pF Maximum Between I/O Lines and GND)
• ESD Rating of Class 3B (Exceeding 8 kV) per Human Body model
•
•
•
and Class C (Exceeding 400 V) per Machine Model
Protection for the Following IEC Standards:
IEC 61000−4−2 (ESD) Level 4 − 30 kV (Contact)
SZ Prefix for Automotive and Other Applications Requiring Unique
Site and Control Change Requirements; AEC−Q101 Qualified and
PPAP Capable
This is a Pb−Free Device
LOW CAPACITANCE
DIODE TVS ARRAY
PIN CONFIGURATION
AND SCHEMATIC
Typical Applications
•
•
•
•
•
•
•
High Speed Communication Line Protection
USB 1.1 and 2.0 Power and Data Line Protection
Digital Video Interface (DVI)
Monitors and Flat Panel Displays
T1/E1 and T3/E3
10/100/1000 Ethernet Protection
Gigabit Ethernet Protection
Value
Unit
Peak Power Dissipation
Ppk
450
W
Maximum Peak Pulse Current
8 x 20 mS @ TA = 25°C
IPP
30
A
Operating Junction Temperature Range
TJ
−40 to +125
°C
Storage Temperature Range
Tstg
−55 to +150
°C
Lead Solder Temperature −
Maximum (10 Seconds)
TL
260
°C
ESD
16000
400
30000
V
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
© Semiconductor Components Industries, LLC, 2015
February, 2015 − Rev. 6
8
7
6
1014
AYW
G
UDFN10
CASE 517AN
Symbol
Human Body Model (HBM)
Machine Model (MM)
IEC 61000−4−2 Contact (ESD)
9
MARKING
DIAGRAM
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Rating
10
1
2
3
4
5
1
1014
A
Y
W
G
= Specific Device Code
= Assembly Location
= Year
= Work Week
= Pb−Free Package
ORDERING INFORMATION
Package
Shipping†
ESD1014MUTAG
UDFN10
(Pb−Free)
3000 / Tape &
Reel
SZESD1014MUTAG
UDFN10
(Pb−Free)
3000 / Tape &
Reel
Device
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
Publication Order Number:
ESD1014/D
ESD1014, SZESD1014
ELECTRICAL CHARACTERISTICS (TA=25°C unless otherwise specified)
Parameter
Symbol
Reverse Working Voltage
Conditions
VRWM
Breakdown Voltage
Min
Typ
(Note 1)
VBR
IT=1 mA, (Note 2)
5.0
Max
Unit
3.3
V
5.3
V
Reverse Leakage Current
IR
VRWM = 3.3 V
5.0
mA
Clamping Voltage
VC
IPP = 1 A, pin 5 to GND
6.2
V
Clamping Voltage
VC
IPP = 1 A
7.5
V
Clamping Voltage
VC
IPP = 10 A
9.0
V
Clamping Voltage
VC
IPP = 25 A
11
V
Maximum Peak Pulse Current
IPP
8x20 ms Waveform
30
A
Junction Capacitance
CJ
VR = 0 V, f=1 MHz between I/O Pins and GND
3.8
5.0
pF
Junction Capacitance
CJ
VR = 0 V, f=1 MHz between I/O Pins
1.5
3.0
pF
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
1. TVS devices are normally selected according to the working peak reverse voltage (VRWM), which should be equal or greater than the DC
or continuous peak operating voltage level.
2. VBR is measured at pulse test current IT.
TYPICAL PERFORMANCE CURVES
100
100
90
90
% OF PEAK PULSE CURRENT
PEAK POWER DISSIPATION (%)
(TJ = 25°C unless otherwise noted)
80
70
60
50
40
30
20
10
0
0
25
50
75
100
125
150
175
PULSE WIDTH (tP) IS DEFINED
AS THAT POINT WHERE THE
PEAK CURRENT DECAY = 8 ms
80
70
60
HALF VALUE IRSM/2 @ 20 ms
50
40
30
tP
20
10
0
200
PEAK VALUE IRSM @ 8 ms
tr
0
TA, AMBIENT TEMPERATURE (°C)
20
40
60
t, TIME (ms)
Figure 2. 8 × 20 ms Pulse Waveform
Figure 1. Pulse Derating Curve
www.onsemi.com
2
80
ESD1014, SZESD1014
PACKAGE DIMENSIONS
UDFN10 2.6x2.6, 0.5P
CASE 517AN
ISSUE B
D
A
ÍÍÍ
ÍÍÍ
ÍÍÍ
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN
0.15 AND 0.30mm FROM TERMINAL.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
B
E
PIN ONE
REFERENCE
DIM
A
A1
A3
b
D
D2
E
E2
e
K
L
0.10 C
2X
0.10 C
2X
TOP VIEW
A3
0.10 C
A
10X
0.08 C
MILLIMETERS
MIN
MAX
0.45
0.55
0.00
0.05
0.127 REF
0.20
0.30
2.60 BSC
2.00
2.25
2.60 BSC
1.11
1.36
0.50 BSC
0.20
--0.30
0.40
A1
SIDE VIEW
NOTE 4
C
SOLDERING FOOTPRINT*
SEATING
PLANE
2.25
10X
D2
L
1
5
10X
0.58
E2
10X
K
10
6
10X
e
BOTTOM VIEW
1.42 2.90
b
0.10 C A
0.05 C
B
10X
0.30
NOTE 3
0.50
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and the
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries.
SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed
at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation
or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets
and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each
customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended,
or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which
the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or
unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim
alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable
copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada
Email: [email protected]
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81−3−5817−1050
www.onsemi.com
3
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative
ESD1014/D