and 8-Channel - ON Semiconductor

CM1457
4-, 6-, 8-Channel EMI Filter
Array with ESD Protection
Description
• Four, Six or Eight Channels of EMI Filtering
• ±15 kV ESD Protection (IEC 61000−4−2, Contact Discharge) at
•
•
•
WLCSP15
CP SUFFIX
CASE 567BR
WLCSP10
CP SUFFIX
CASE 567BJ
External Pins
Greater than −40 dB of Attenuation at 1 GHz
MIL−STD−883 International ESD Standard
Chip Scale Package (CSP) with 0.40 mm Pitch and 0.25 mm CSP
Solder Ball which Features Extremely Low Parasitic Inductance
for Optimum Filter and ESD Performance
OptiGuard Coating for Improved Reliability at Assembly
These Devices are Pb−Free and are RoHS Compliant
Applications
• LCD and Camera Data Lines in Mobile Handsets
• I/O Port Protection for Mobile Handsets, Notebook Computers,
•
•
•
Computers
Wireless Handsets
Handheld PCs/PDAs
LCD and Camera Modules
© Semiconductor Components Industries, LLC, 2013
May, 2013 − Rev. 6
An*
(Internal
Pins)
1.8 pF
GND
(Pins
B1−B4)
4.7 pF
35 nH 35 nH
Cn*
(External
Pins)
MARKING DIAGRAM
N57 yww
CM1457−06
CM1457−04
10−Bump CSP 15−Bump CSP
N57
N57
N57
w/yww/yyww
N57 yyww
CM1457−08
20−Bump CSP
= CM1457−04CP
= CM1457−06CP
= CM1457−08CP
= date code
ORDERING INFORMATION
Device
Package
Shipping†
CM1457−04CP
CSP−10
(Pb−Free)
3500/Tape & Reel
CM1457−06CP
CSP−15
(Pb−Free)
3500/Tape & Reel
CM1457−08CP
CSP−20
(Pb−Free)
3500/Tape & Reel
PDAs, etc.
• EMI Filtering for Data Ports in Cell Phones, PDAs or Notebook
WLCSP20
CP SUFFIX
CASE 567BV
BLOCK DIAGRAM
N57 w
Features
•
http://onsemi.com
6 pF
The CM1457 is an inductor-based (L-C) EMI filter array with ESD
protection, which integrates four, six, or eight filters in a CSP form
factor with 0.40 mm pitch. Each EMI filter channel of the CM1457 is
implemented with the component value of 6 pF − 35 nH – 4.7 pF −
35 nH – 1.8 pF. The cut-off frequency at −3 dB attenuation is
300 MHz and can be used in applications where the data rates are as
high as 160 Mbps, while providing greater than −35 dB attenuation
over the 800 MHz to 2.7 GHz frequency range. The parts include ESD
diodes on every I/O pin and provide a high level of protection against
electrostatic discharge (ESD). The ESD protection diodes connected
to the external filter ports are designed and characterized to safely
dissipate ESD strikes of ±15 kV, which is beyond the maximum
requirement of the IEC61000−4−2 international standard.
This device is particularly well suited for wireless handsets, mobile
LCD modules and PDAs because of its small package format and
easy-to-use pin assignments. In particular, the CM1457 is ideal for
EMI filtering and protecting data and control lines for the LCD display
and camera interface in mobile handsets.
The CM1457 incorporates OptiGuard which results in improved
reliability at assembly. It is manufactured with a 0.40 mm pitch and
0.25 mm CSP solder ball to provide up to 28% board space savings vs.
competing CSP devices with 0.50 mm pitch and 0.30 mm CSP solder
ball.
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
1
Publication Order Number:
CM1457/D
CM1457
PACKAGE / PINOUT DIAGRAMS
Orientation
Marking
Top View
(Bumps Down View)
+
A
1
2
3
Bottom View
(Bumps Up View)
4
C1
B
A1
A1
CM1457−04CP
10−Bump CSP
Orientation
Marking
+
A
1
2
3
4
5
C1
C
CM1457−06CP
15−Bump CSP
A
+
2
4
3
5
B2
A2
A3
A4
C3
C4
C5
6
7
C2
B1
Orientation
Marking
1
C4
6
B
Orientation
Marking
C3
B1
Orientation
Marking
C
C2
B2
C6
B3
A1
A1
A2
A3
A4
A5
A6
C2
C3
C4
C5
C6
C7
8
C1
B
Orientation
Marking
C
B1
A1
A1
B2
A2
A3
B3
A4
A5
C8
B4
A6
A7
A8
CM1457−08CP
20−Bump CSP
Table 1. PIN DESCRIPTIONS
Pin Number
Pin Number
−04
−06
−08
−04
−06
−08
A1
A1
A1
Pin Description
Filter #1 (Internal)
C1
C1
C1
Filter #1 (External)
A2
A2
A2
Filter #2 (Internal)
C2
C2
C2
Filter #2 (External)
A3
A3
A3
Filter #3 (Internal)
C3
C3
C3
Filter #3 (External)
A4
A4
A4
Filter #4 (Internal)
C4
C4
C4
Filter #4 (External)
−
A5
A5
Filter #5 (Internal)
−
C5
C5
Filter #5 (External)
−
A6
A6
Filter #6 (Internal)
−
C6
C6
Filter #6 (External)
−
−
A7
Filter #7 (Internal)
−
−
C7
Filter #7 (External)
−
−
A8
Filter #8 (Internal)
−
−
C8
Filter #8 (External)
B1, B2
B1−B3
B1−B4
Pin Description
GND
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2
CM1457
SPECIFICATIONS
Table 2. ABSOLUTE MAXIMUM RATINGS
Parameter
Rating
Units
−65 to +150
°C
DC current per Inductor
15
mA
DC Package Power Rating
0.5
W
Storage Temperature Range
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
Table 3. STANDARD OPERATING CONDITIONS
Parameter
Operating Temperature Range
Rating
Units
−40 to +85
°C
Table 4. ELECTRICAL OPERATING CHARACTERISTICS (Note 1)
Parameter
Symbol
Conditions
Min
Typ
Max
Units
LTOT
Total Channel Inductance
70
nH
RTOT
Total Channel DC Resistance
45
W
CTOT_0V
Total Channel Capacitance, 0 V bias
0 V dc; 1 MHz, 30 mV rms
Total Channel Capacitance, 2.5 V bias
2.5 V dc; 1 MHz,
30 mV rms
Stand−off Voltage
I = 10 mA
ILEAK
Diode Leakage Current
VIN = +3.3 V
VSIG
Signal Clamp Voltage
Positive Clamp
Negative Clamp
ILOAD = 10 mA
ILOAD = −10 mA
VESD
In−system ESD Withstand Voltage
a) Contact Discharge per IEC 61000−4−2 standard,
Level 4 (External Pins)
b) Contact Discharge per IEC 61000−4−2 standard,
Level 4 (Internal Pins)
CTOT_2.5V
VST
fC
(Notes 2 and 3)
Cut−off Frequency
ZSOURCE = 50 W, ZLOAD = 50 W
20
24
12.5
pF
5.5
5.6
−1.5
pF
V
0.1
0.5
6.8
−0.8
9.0
−0.4
mA
V
kV
±15
±2
300
MHz
1. TA = 25°C unless otherwise specified.
2. ESD applied to input and output pins with respect to GND, one at a time.
3. Unused pins are left open.
APPLICATION INFORMATION
Refer to Application Note “The Chip Scale Package”, for a detailed description of Chip Scale Packages offered by
ON Semiconductor.
http://onsemi.com
3
CM1457
PERFORMANCE INFORMATION
0 dB
INSERTION LOSS
−10 dB
−20 dB
−30 dB
−40 dB
−50 dB
3
10
100
1000
2000
6000
FREQUENCY (MHz)
Figure 1. Insertion Loss vs. Frequency (0 V Bias)
0 dB
INSERTION LOSS
−10 dB
−20 dB
−30 dB
−40 dB
−50 dB
3
10
100
1000
FREQUENCY (MHz)
Figure 2. Insertion Loss vs. Frequency (2.5 V Bias)
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4
2000
6000
CM1457
PACKAGE DIMENSIONS
WLCSP10, 1.67x1.05
CASE 567BJ−01
ISSUE O
È
È
PIN A1
REFERENCE
2X
0.05 C
2X
0.05 C
D
A
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. COPLANARITY APPLIES TO SPHERICAL
CROWNS OF SOLDER BALLS.
B
E
DIM
A
A1
A2
b
D
E
eD
eE
TOP VIEW
OptiGuard Option
ÉÉÉÉ
0.05 C
A2
A
RECOMMENDED
SOLDERING FOOTPRINT*
0.05 C
NOTE 3
A1
C
SIDE VIEW
SEATING
PLANE
A1
eD/2
10X
b
0.05 C A B
0.03 C
eD
MILLIMETERS
MIN
MAX
0.69
0.54
0.17
0.24
0.42 REF
0.24
0.29
1.67 BSC
1.05 BSC
0.400 BSC
0.347 BSC
PACKAGE
OUTLINE
0.35
eE
0.35
0.40
PITCH
C
B
10X
0.25
DIMENSIONS: MILLIMETERS
A
1 2 3
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
4 5 6
BOTTOM VIEW
http://onsemi.com
5
CM1457
PACKAGE DIMENSIONS
WLCSP15, 2.47x1.05
CASE 567BR−01
ISSUE O
È
È
PIN A1
REFERENCE
2X
0.05 C
2X
D
0.05 C
A
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. COPLANARITY APPLIES TO SPHERICAL
CROWNS OF SOLDER BALLS.
B
E
DIM
A
A1
A2
b
D
E
eD
eE
TOP VIEW
OptiGuard Option
ÉÉÉÉÉÉ
0.05 C
A2
A
RECOMMENDED
SOLDERING FOOTPRINT*
0.05 C
NOTE 3
A1
C
SIDE VIEW
SEATING
PLANE
eD/2
15X
b
0.05 C A B
0.03 C
eD
MILLIMETERS
MIN
MAX
0.69
0.54
0.17
0.24
0.42 REF
0.24
0.29
2.47 BSC
1.05 BSC
0.400 BSC
0.347 BSC
PACKAGE
OUTLINE
A1
0.35
eE
0.35
C
15X
0.40
PITCH
B
0.25
DIMENSIONS: MILLIMETERS
A
1 2 3
4 5 6
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
7 8 9
BOTTOM VIEW
http://onsemi.com
6
CM1457
PACKAGE DIMENSIONS
WLCSP20, 3.27x1.05
CASE 567BV−01
ISSUE O
PIN A1
REFERENCE
2X
0.05 C
2X
ÈÈ
ÈÈ
D
A
E
0.05 C
DIM
A
A1
A2
b
D
E
eD
eE
TOP VIEW
ÉÉÉÉÉÉÉÉ
OptiGuard Option
0.05 C
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. COPLANARITY APPLIES TO SPHERICAL
CROWNS OF SOLDER BALLS.
B
A2
MILLIMETERS
MIN
MAX
0.69
0.54
0.17
0.24
0.42 REF
0.24
0.29
3.27 BSC
1.05 BSC
0.400 BSC
0.347 BSC
A
0.05 C
NOTE 3
A1
C
SIDE VIEW
SEATING
PLANE
eD/2
b
20X
0.05 C A B
0.03 C
eD
eE
C
B
A
1 2 3
4 5 6
7 8 9
10 1112
BOTTOM VIEW
RECOMMENDED
SOLDERING FOOTPRINT*
PACKAGE
OUTLINE
A1
0.35
0.35
20X
0.40
PITCH
0.25
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks,
copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC
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limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications
and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC
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PUBLICATION ORDERING INFORMATION
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7
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Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative
CM1457/D