3 A, 2 MHz Low-Iq Dual-Mode Step

NCV891330
3 A, 2 MHz Low-IQ DualMode Step-Down Regulator
for Automotive
The NCV891330 is a Dual Mode regulator intended for Automotive,
battery−connected applications that must operate with up to a 45 V
input supply. Depending on the output load, it operates either as a PWM
Buck Converter or as a Low Drop−Out Linear Regulator, and is suitable
for systems with low noise and Low Quiescent Current requirements
often encountered in automotive driver information systems. A reset
pin (with fixed delay) simplifies interfacing with a microcontroller.
The NCV891330 also provides several protection features expected
in automotive power supply systems such as current limit, short circuit
protection, and thermal shutdown. In addition, the high switching
frequency produces low output voltage ripple even when using small
inductor values and an all−ceramic output filter capacitor – forming a
space−efficient switching regulator solution.
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8
1
SOIC−8
EXPOSED PAD
CASE 751AC
MARKING DIAGRAM
8
Features
•
•
•
•
•
•
•
•
•
•
•
30 mA Iq in Light Load Condition
3.0 A Maximum Output Current in PWM Mode
Internal N−channel Power Switch
VIN Operating Range 3.7 V to 36 V
Withstands Load Dump to 45 V
Logic Level Enable Pin can be Tied to Battery
Fixed Output Voltage of 5.0 V, 4.0 V, 3.8 V or 3.3 V
2 MHz Free−running Switching Frequency
±2 % Output Voltage Accuracy
NCV Prefix for Automotive Requiring Site and Control Changes
These Devices are Pb−Free and are RoHS Compliant
891330XX
ALYW
G
1
With XX = 33 for 3.3 V Output
= 38 for 3.8 V Output
= 40 for 4.0 V Output
= 50 for 5.0 V Output
A
= Assembly Location
L
= Wafer Lot
Y
= Year
W
= Work Week
G
= Pb−Free Device
PIN CONNECTIONS
Typical Applications
•
•
•
•
Audio
Infotainment
Instrumentation
Safety−Vision Systems
CDRV
NCV891330
DBST
L1
VIN
CIN
VIN
SW
DRV
BST
CBST
VOUT
DFW
VIN
1
8
SW
DRV
2
7
BST
RSTB
3
6
VOUT
GND
4
5
EN
(Top View)
COUT
ORDERING INFORMATION
RESET
RSTB
VOUT
See detailed ordering and shipping information on page 17 of
this data sheet.
EN
GND
EN
Figure 1. Typical Application
© Semiconductor Components Industries, LLC, 2015
July, 2015 − Rev. 2
1
Publication Order Number:
NCV891330/D
NCV891330
CDRV
DBST
VIN
VIN
SW
VOUT
L1
CIN
3.3 V
Reg
DRV
BST
VOUT
Enable
comp
TSD
3A
detector
+
−
EN
+
−
+
+S
EN
+
Soft−Start
RESET
VOLTAGES
MONITORS
Switcher Supply
ON
MODE
SELECTION
LINEAR
REGULATOR
ON OVLD
+
−
RESET
COUT
Low PWM
LOGIC
ON OFF
Oscillator
RSTB
DFW
CBST
+
GND
Logic
NCV891330
Figure 2. Simplified Block Diagram
Table 1. PIN FUNCTION DESCRIPTION
Pin No.
Pin Name
1
VIN
Input voltage from battery. Place an input filter capacitor in close proximity to this pin.
2
DRV
Output voltage to provide a regulated voltage to the Power Switch gate driver.
3
RSTB
Reset function. Open drain output, pulling down to ground when the output voltage is out of regulation.
4
GND
Battery return, and output voltage ground reference.
5
EN
This TTL compatible Enable input allows the direct connection of Battery as the enable signal. Grounding
this input stops switching and reduces quiescent current draw to a minimum.
6
VOUT
Output voltage feedback and LDO output. Feedback of output voltage used for regulation, as well as LDO
output in LDO mode.
7
BST
Bootstrap input provides drive voltage higher than VIN to the N−channel Power Switch for minimum
switch Rdson and highest efficiency.
8
SW
Switching node of the Regulator. Connect the output inductor and cathode of the freewheeling diode to
this pin.
EPAD
Description
Connect to Pin 4 (electrical ground) and to a low thermal resistance path to the ambient temperature
environment.
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2
NCV891330
Table 2. ABSOLUTE MAXIMUM RATINGS
Rating
Symbol
Min/Max Voltage VIN
Value
Unit
−0.3 to 45
V
45
V
−0.7 to 40
V
Max Voltage VIN to SW
Min/Max Voltage SW
Min Voltage SW − 20 ns
−3.0
V
Min/Max Voltage EN
−0.3 to 40
V
Min/Max Voltage BST
−0.3 to 43
V
Min/Max Voltage BST to SW
−0.3 to 3.6
V
Min/Max Voltage on RSTB
−0.3 to 6
V
Min/Max Voltage VOUT
−0.3 to 18
V
Min/Max Voltage DRV
Thermal Resistance, SOIC8−EP Junction–to–Ambient (Note 1)
−0.3 to 3.6
V
30
°C/W
−55 to +150
°C
TJ
−40 to +150
°C
VESD
2.0
kV
MSL
Level 2
RθJA
Storage Temperature range
Operating Junction Temperature Range
ESD withstand Voltage (Note 2)
Human Body Model
Moisture Sensitivity
Peak Reflow Soldering Temperature (Note 3)
°C
260
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Value based on 4 layers of 645 mm2 (or 1 in2) of 1 oz copper thickness on FR4 PCB substrate.
2. This device series incorporates ESD protection and is tested by the following methods:
ESD Human Body Model tested per AEC−Q100−002 (EIA/JESD22−A114)
Latchup Current Maximum Rating: v150 mA per JEDEC standard: JESD78
3. For information, please refer to our Soldering and Mounting Techniques Reference Manual, SOLDERRM/D
Table 3. ELECTRICAL CHARACTERISTICS
VIN = 4.5 to 28 V, VEN = 5 V, VBST = VSW + 3 V, CDRV = 0.1 mF, for typical values TJ = 25°C, Min/Max values are valid for the temperature
range −40°C v TJ v 150°C unless noted otherwise, and are guaranteed by test, design or statistical correlation (Notes 4, 5)
Parameter
Test Conditions
Symbol
Min
Typ
Max
Unit
Iq
30
39
mA
IqSD
9
12
mA
QUIESCENT CURRENT
Quiescent Current, enabled
VIN = 13.2 V, IOUT = 100 mA, 25°C
Quiescent Current, shutdown
VIN = 13.2 V, VEN = 0 V, 25°C
UNDERVOLTAGE LOCKOUT – VIN (UVLO)
UVLO Start Threshold
VIN rising
VUVLSTT
4.1
4.5
V
UVLO Stop Threshold
VIN falling
VUVLSTP
3.1
3.7
V
VUVLOHY
0.4
1.4
V
tSS
0.8
1.4
2.0
ms
4.9
3.92
3.724
3.234
5.0
4.0
3.8
3.3
5.1
4.08
3.876
3.366
1.8
0.9
2.0
1.0
2.2
1.1
UVLO Hysteresis
SOFT−START (SS)
Soft−Start Completion Time
OUTPUT VOLTAGE
Output Voltage during regulation
100 mA < IOUT < 2.5 A
5.0 V option
4.0 V option
3.8 V option
3.3 V option
VOUTreg
4.5 < VIN < 18 V
20 V <VIN < 28V
FSW
FSW(HV)
V
OSCILLATOR
Frequency
MHz
4. Refer to ABSOLUTE MAXIMUM RATINGS and APPLICATION INFORMATION for Safe Operating Area.
5. Performance guaranteed over the indicated operating temperature range by design and/or characterization tested at TJ = TA = 25°C. Low
duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible.
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NCV891330
Table 3. ELECTRICAL CHARACTERISTICS
VIN = 4.5 to 28 V, VEN = 5 V, VBST = VSW + 3 V, CDRV = 0.1 mF, for typical values TJ = 25°C, Min/Max values are valid for the temperature
range −40°C v TJ v 150°C unless noted otherwise, and are guaranteed by test, design or statistical correlation (Notes 4, 5)
Parameter
Test Conditions
Symbol
Min
Frequency Foldback Threshold
VIN rising
VIN falling
VFLDUP
VFLDDN
18.4
18
Frequency Foldback Hysteresis
VFLDHY
0.2
INtoL
3
Typ
Max
Unit
VIN FREQUENCY FOLDBACK MONITOR
V
20
19.8
0.3
0.4
V
40
mA
MODE TRANSITION
Normal to Low−Iq mode Current Threshold
8 V < VIN < 28 V
ms
Mode Transition Duration
Switcher to Linear
Linear to Switcher
Minimum time in Normal Mode before
starting to monitor output current
Linear to switcher transition
at high Vin
at low Vin
tSWtoLIN
tLINtoSW
300
1
tSWblank
500
2
ms
VOUT = 3.3 V
V
VLINtoSW(HV)
VLINtoSW(LV)
19
3.6
28
4.5
PEAK CURRENT LIMIT
ILIM
Current Limit Threshold
3.9
4.4
4.9
A
180
360
mW
10
mA
70
ns
POWER SWITCH
ON Resistance
VBST = VSW + 3.0 V
RDSON
Leakage current VIN to SW
VSW = 0, −40°C v TJ v 85°C
ILKSW
Minimum ON Time
Measured at SW pin
tONMIN
Minimum OFF Time
Measured at SW pin
At FSW = 2 MHz (normal)
At FSW = 500 kHz (max duty cycle)
tOFFMIN
45
ns
30
30
50
70
1.45
0.65
2.0
1.0
2.8
1.3
A/ms
5
25
mV
35
mV
SLOPE COMPENSATION
4.5 < VIN < 18 V
20 V <VIN < 28V
Sramp
Sramp(HV)
Line Regulation
IOUT = 5 mA, 6 V < VIN < 18 V
VREG(line)
Load Regulation
VIN = 13.2 V, 0.1 mA < IOUT < 50 mA
VREG(load)
5
Power Supply Rejection
VOUT(ripple) = 0.5 Vp−p, F = 100 Hz
PSRR
65
Ramp Slope
(With respect to switch current)
LOW POWER LINEAR REGULATOR
Current Limit
Output clamp current
ILIN(lim)
50
VOUT = VOUTreg(typ) + 10%
ICL(OUT)
0.5
VOUT = 0 V, 4.5 V < VIN < 18 V
VOUT = 0 V, 20 V <VIN < 28 V
FSWAF
FSWAFHV
FSWHIC
450
225
24
dB
80
mA
1.0
1.5
mA
550
275
32
650
325
40
SHORT CIRCUIT DETECTOR
Switching frequency in short−circuit condition
Analog Foldback
Analog foldback – high VIN
Hiccup Mode
kHz
RESET
Leakage current into RSTB pin
IRSTBlk
Output voltage threshold at which the RSTB VOUT decreasing
signal goes low
5.0 V option
4.0 V option
3.8 V option
3.3 V option
VRESET
1
uA
V
4.50
3.6
3.42
2.97
4.625
3.7
3.515
3.05
4.75
3.8
3.61
3.14
4. Refer to ABSOLUTE MAXIMUM RATINGS and APPLICATION INFORMATION for Safe Operating Area.
5. Performance guaranteed over the indicated operating temperature range by design and/or characterization tested at TJ = TA = 25°C. Low
duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible.
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NCV891330
Table 3. ELECTRICAL CHARACTERISTICS
VIN = 4.5 to 28 V, VEN = 5 V, VBST = VSW + 3 V, CDRV = 0.1 mF, for typical values TJ = 25°C, Min/Max values are valid for the temperature
range −40°C v TJ v 150°C unless noted otherwise, and are guaranteed by test, design or statistical correlation (Notes 4, 5)
Parameter
Test Conditions
Symbol
Min
Typ
Max
25
20
19
17
60
50
45
40
100
80
76
66
Unit
RESET
Hysteresis on RSTB threshold
VOUT increasing
5.0 V option
4.0 V option
3.8 V option
3.3 V option
VREShys
mV
Noise−filtering delay
From VOUT<VRESET to RSTB pin
going low
tfilter
10
Restart Delay time
From VOUT>VRESET+VREShys to
high RSTB
tdelay
14
Low RSTB voltage
RRSTBpullup = VOUTreg/1 mA, VOUT > 1 V VRSTBlow
16
25
ms
18
ms
0.4
V
GATE VOLTAGE SUPPLY (DRV pin)
VDRV
3.1
3.3
3.5
V
DRV UVLO START Threshold
VDRVSTT
2.7
2.9
3.05
V
DRV UVLO STOP Threshold
VDRVSTP
2.5
2.8
3.0
V
DRV UVLO Hysteresis
VDRVHYS
50
200
mV
IDRVLIM
21
50
mA
Output Voltage
DRV Current Limit
VDRV = 0 V
VIN OVERVOLTAGE SHUTDOWN MONITOR
Overvoltage Stop Threshold
VIN increasing
VOVSTP
36.5
37.7
39.0
V
Overvoltage Start Threshold
VIN decreasing
VOVSTT
36.0
37.3
38.8
V
VOVHY
0.25
0.40
0.50
V
Logic low threshold voltage
VENlow
0.8
Logic high threshold voltage
VENhigh
2
V
EN pin input current
IENbias
0.2
1
mA
TSD
155
190
°C
TSDrestart
135
185
°C
THYS
5
20
°C
Overvoltage Hysteresis
ENABLE (EN)
V
THERMAL SHUTDOWN
Activation Temperature
Reset temperature
Hysteresis
4. Refer to ABSOLUTE MAXIMUM RATINGS and APPLICATION INFORMATION for Safe Operating Area.
5. Performance guaranteed over the indicated operating temperature range by design and/or characterization tested at TJ = TA = 25°C. Low
duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible.
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
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NCV891330
TYPICAL CHARACTERISTICS
1000
70
INPUT CURRENT (mA)
NO LOAD INPUT CURRENT (mA)
80
60
50
40
30
20
400
200
0
0
5
10
15
0
20
200
400
600
800
1000
INPUT VOLTAGE (V)
OUTPUT CURRENT (mA)
Figure 3. No−load Input Current at TJ = 255C
vs. Input Voltage
Figure 4. Input Current at TJ = 255C vs. Output
Current
13
Iq IN SHUTDOWN MODE (mA)
100
Iq IN LOW−Iq LINEAR MODE (mA)
600
10
0
80
60
40
20
0
−50
0
50
100
12
11
10
9
8
7
−50
150
0
50
100
150
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 5. Low−Iq Mode Quiescent Current vs.
Junction Temperature
Figure 6. Shutdown Mode Quiescent Current
vs. Junction Temperature
3.36
3.3 V OUTPUT VOLTAGE (V)
1.6
Iq IN SWITCHER MODE (mA)
800
1.5
1.4
1.3
1.2
−50
0
50
100
3.34
3.32
Switcher Mode
3.30
Low−Iq Mode
3.28
3.26
3.24
−50
150
0
50
100
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 7. Switching Mode Quiescent Current
vs. Junction Temperature
Figure 8. 3.3 V Output Voltage vs. Junction
Temperature
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150
NCV891330
TYPICAL CHARACTERISTICS
5.05
4.05
5.04
5 V OUTPUT VOLTAGE (V)
4 V OUTPUT VOLTAGE (V)
4.04
4.03
4.02
4.01
Switcher Mode
4.00
3.99
Low−Iq Mode
3.98
3.97
3.96
3.95
3.94
−50
0
50
100
150
5.00
Switcher Mode
4.99
4.98
Low−Iq Mode
4.97
4.96
0
50
100
150
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 9. 4.0 V Output Voltage vs. Junction
Temperature
Figure 10. 5.0 V Output Voltage vs. Junction
Temperature
57
MINIMUM ON TIME (ns)
SWITCHING FREQUENCY (MHz)
5.02
5.01
4.95
4.94
−50
2.2
2.1
2.0
1.9
1.8
−50
0
50
100
56
55
54
53
52
−50
150
0
50
100
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 11. Switching Frequency vs. Junction
Temperature
Figure 12. Minimum On Time vs. Junction
Temperature
PEAK CURRENT LIMIT (A)
54
52
50
48
−50
150
4.7
56
MINIMUM OFF TIME (ns)
5.03
0
50
100
4.6
4.5
4.4
4.3
4.2
−50
150
0
50
100
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 13. Minimum Off Time vs. Junction
Temperature
Figure 14. Peak Current Limit vs. Junction
Temperature
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150
NCV891330
TYPICAL CHARACTERISTICS
4.6
4.4
UVLO THRESHOLDS (V)
OVERVOLTAGE THRESHOLDS (V)
40
Start−up Threshold
4.2
4.0
3.8
3.6
UVLO Threshold
3.4
3.2
3.0
−50
0
50
100
Restart Threshold
36
35
0
50
100
150
Figure 15. UVLO Thresholds vs. Junction
Temperature
Figure 16. Input Overvoltage Thresholds vs.
Junction Temperature
3.5
3.4
DRV VOLTAGE (V)
1.50
1.45
IDRV = 0 mA
3.3
IDRV = 21 mA
3.2
3.1
0
50
100
3.0
−50
150
0
50
100
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 17. Soft−start Duration vs. Junction
Temperature
Figure 18. DRV Voltage vs. Junction
Temperature
FREQUENCY FOLDBACK VIN THRESHOLDS (V)
SOFT−START TIME (ms)
37
TEMPERATURE (°C)
3.0
DRV UVLO THRESHOLDS (V)
Overvoltage Threshold
TEMPERATURE (°C)
1.55
DRV Start−up Threshold
2.9
2.8
DRV UVLO Threshold
2.7
2.6
−50
38
34
−50
150
1.60
1.40
−50
39
0
50
100
150
19.8
19.6
19.4
VIN Rising
19.2
19.0
18.8
VIN Falling
18.6
18.4
18.2
18.0
−50
0
50
100
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 19. DRV Voltage UVLO Tresholds vs.
Junction Temperature
Figure 20. Frequency Foldback Voltage
Tresholds vs. Junction Temperature
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150
150
NCV891330
1.10
3.3 V RESET VOUT THRESHOLDS (V)
SWITCHING FREQUENCY AT HIGH VIN (MHz)
TYPICAL CHARACTERISTICS
1.05
1.00
0.95
0.90
−50
0
50
100
150
RSTB Toggles High (VOUT Rising)
3.1
RSTB Toggles Low (VOUT Falling)
3.0
2.9
2.8
−50
0
50
100
150
TEMPERATURE (°C)
Figure 21. Foldback Frequency vs. Junction
Temperature
Figure 22. 3.3 V Version RESET Thresholds vs.
Junction Temperature
5 V RESET VOUT THRESHOLDS (V)
5.0
3.9
3.8
RSTB Toggles High (VOUT Rising)
3.7
RSTB Toggles Low (VOUT Falling)
3.6
3.5
3.4
−50
0
50
100
4.9
4.8
RSTB Toggles High (VOUT Rising)
4.7
4.6
RSTB Toggles Low (VOUT Falling)
4.5
4.4
4.3
−50
150
0
50
100
150
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 23. 4.0 V Version RESET Thresholds vs.
Junction Temperature
Figure 24. 5.0 V Version RESET Thresholds vs.
Junction Temperature
17.0
71
16.8
69
LINEAR TO SWITCHER MODE
CURRENT THRESHOLD (mA)
4 V RESET VOUT THRESHOLDS (V)
3.2
TEMPERATURE (°C)
4.0
RESET DELAY (ms)
3.3
16.6
16.4
16.2
16.0
15.8
15.6
15.4
−50
0
50
100
67
65
63
61
59
57
55
−50
150
0
50
100
150
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 25. RESET Delay vs. Junction
Temperature
Figure 26. Low−Iq to Switcher Mode Transition
vs. Junction Temperature
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NCV891330
30
CURRENT RANGE FOR LOW−Iq
TRANSITION − 5 V VERSION (mA)
CURRENT RANGE FOR LOW−Iq
TRANSITION − 3.3 V VERSION (mA)
TYPICAL CHARACTERISTICS
20
10
0
30
20
10
0
5
10
15
18
5
10
15
18
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
Figure 27. Switcher to Low−Iq Mode Transition
(3.3 V Version, 2.2 mH) vs. Input Voltage
Figure 28. Switcher to Low−Iq Mode Transition
(5.0 V Version, 2.2 mH) vs. Input Voltage
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NCV891330
APPLICATION INFORMATION
Hybrid Low−Power Mode
Once the NCV891330 has transitioned to switcher mode,
it cannot go back to low−Iq mode before a 500 ms blanking
period has elapsed, after which it starts looking at the output
current level.
If the NCV891330 is in Low−Iq Linear Regulator mode
in normal battery range, it will transition to switcher mode
when VIN increases above VLINtoSW(HV), regardless of the
output current. Similarly, if the NCV891330 is in PWM
mode and VIN is higher than VFLDUP, it will not transition
to Low−Iq Linear mode even if the output current becomes
lower than INtoL.
At low input voltage, the NCV891330 stays in low−Iq
mode down to VLINtoSW(LV) if it entered this mode while in
normal battery range. However it may not enter low−Iq
mode below 8 V depending on the charge of the bootstrap
capacitor (see Bootstrap section and typical characteristics
curves for details).
Figures 29 and 30 show a mode transition for a large load
transient, while Figures 5 and 6 show a transition on a small
load transient.
A high−frequency switch−mode regulator is not very
efficient in light load conditions, making it difficult to
achieve low Iq requirements for sleep−mode operation. To
remedy this, the NCV891330 includes a low−Iq linear
regulator that turns on at light load, while the PWM
regulator turns off, ensuring a high−efficiency low−power
operation. Another advantage of linear mode is the tight
regulation free of voltage ripple usually associated with
low−Iq switchers in light load conditions.
At initial start−up the NCV891330 always runs in PWM
converter mode, regardless of the output current, and goes
through a soft start. It then stays in PWM mode if the output
current is high enough. If the output current is low, the
NCV891330 transitions to Linear Regulator mode, after a
300 ms period during which it assesses the level of ouput
current. Note that the Reset signal needs to be high before the
IC starts to look at the output current level.
It stays in this low−power mode until the output current
exceeds the ILINtoSW limit: it then transitions to PWM
converter mode. This transition happens in less than 2 ms, so
that the transient response is not affected by the mode change.
RSTB
VOUT ac
SW to LDO
transition
IOUT
SW
Figure 29. VIN = 13 V, VOUT = 5 V, 20 mA to 2.5 A at 1 A/ms – with Mode Transition
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NCV891330
RSTB
VOUT ac
IOUT
Figure 30. Detail of the 20 mA to 2.5 A Transition at VIN = 13 V and VOUT = 5 V
RSTB
VOUT ac
IOUT
Figure 31. VIN = 13 V, VOUT = 5 V, 20 mA to 120 mA Load Transient – with Mode Transition
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NCV891330
RSTB
VOUT ac
IOUT
Figure 32. Detail of the 20 mA to 120 mA Transition at VIN = 13 V and VOUT = 5 V
Figure 33 shows a load transient for which no mode transition occurred.
RSTB
VOUT ac
IOUT
SW
Figure 33. VIN = 13 V, VOUT = 5 V, 20 mA to 70 mA Load Transient – LDO Mode Only (no transition)
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13
NCV891330
Input Voltage
An overvoltage monitoring circuit automatically
terminates switching if the input voltage exceeds VOVSTP
(see Figure 34), but the NCV891330 can withstand input
voltages up to 45 V.
To avoid skipping switching pulses and entering an
uncontrolled mode of operation, the switching frequency is
reduced by a factor of 2 when the input voltage exceeds the
VIN Frequency Foldback threshold (see Figure 34).
Frequency reduction is automatically terminated when the
input voltage drops back below the VIN Frequency Foldback
threshold. This also helps to limit the power lost in switching
and generating the drive voltage for the Power Switch.
An Undervoltage Lockout (UVLO) circuit monitors the
input, and can inhibit switching and reset the Soft−start
circuit if there is insufficient voltage for proper regulation.
Depending on the output conditions (voltage option and
loading), the NCV891330 may lose regulation and run in
drop−out mode before reaching the UVLO threshold: refer
to the Minimum Vin calculation tool for details. When the
input voltage drops low enough that the part cannot regulate
because it reaches its maximum duty cycle, the switching
frequency is divided down by up to 4 (down to 500 kHz).
This helps lowering the minimum voltage at which the
regulator loses regulation.
FSW
(MHz)
2
1
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
ÎÎÎ
Frequency
folds back
if drop−out
mode
3.5
18 20
36
39
45 V IN (V)
Figure 34. NCV891330 Switching Frequency Profile vs. Input Voltage
Soft−Start
compensation signal requires the inductor to be greater than
a minimum value, depending on output voltage, in order to
avoid sub−harmonic oscillations. The recommended inductor
values are 2.2 or 3.3 mH, although higher values are possible.
Upon being enabled or released from a fault condition,
and after the DRV voltage is established, a soft−start circuit
ramps the switching regulator error amplifier reference
voltage to the final value. During soft−start, the average
switching frequency is lower until the output voltage
approaches regulation.
Current Limiting
Due to the ripple on the inductor current, the average
output current of a buck converter is lower than the peak
current setpoint of the regulator. Figure 35 shows – for a
2.2 mH inductor – how the variation of inductor peak current
with input voltage affects the maximum DC current the
NCV891330 can deliver to a load.
Slope Compensation
A fixed slope compensation signal is generated internally
and added to the sensed current to avoid increased output
voltage ripple due to bifurcation of inductor ripple current
at duty cycles above 50%. The fixed amplitude of the slope
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14
NCV891330
Figure 35. NCV891330 Load Current Capability with a 2.2 mH Inductor
Short Circuit Protection
The RSTB pin is also pulled low immediately in case of VIN
overvoltage, Thermal shutdown, VIN UVLO or DRV UVLO.
During severe output overloads or short circuits, the
NCV891330 automatically reduces its switching frequency.
This creates duty cycles small enough to limit the peak
current in the power components, while maintaining the
ability to automatically reestablish the output voltage if the
overload is removed.
In more severe short−circuit conditions where the inductor
current is still too high after the switching frequency has fully
folded back, the regulator enters a hiccup mode that further
reduces the power dissipation and protects the system.
Feedback Loop
All components of the feedback loop (output voltage
sensing, error amplifier and compensation) are integrated
inside the NCV891330, and are optimized to ensure
regulation and sufficient phase and gain margin for the
recommended conditions of operation.
Recommended conditions and components:
• Input: car battery
• Output: 3.3 V, 3.8 V, 4 V or 5 V, with output current up
to 3 A
• Output capacitor: 30 mF capacitance
• Inductor: 2.2 mH to 3.3 mH
With these operating conditions and components, the
open loop transfer function has a phase margin greater than
50°, as can be seen in Figure 36.
RESET Function
The RSTB pin is pulled low when the output voltage falls
below 7.5% of the nominal regulation level, and floats when
the output is properly regulated. A pull−up resistor tied to the
output is needed to generate a logic high signal on this open
drain pin. The pin can be left unconnected when not used.
When the output voltage drops out of regulation, the pin
goes low after a short noise−filtering delay (tfilter). It stays low
for a 16 ms delay time after the output goes back to regulation,
simplifying the connection to a micro−controller.
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15
NCV891330
Figure 36. Bode Plot of the Open Loop Transfer Function of a Buck Converter using the
NCV891330 for Vin = 13 V, Vout = 3.3 V, Iout = 2 A, Cout=3x10 mF and L=2.2 mH
For more details and for effect of component values other
than the recommended ones, please refer to the design
spreadsheet provided on the www.onsemi.com NCV891330
page.
G Loop(s) + G L0 @
1)
ǒ1 ) 1.26
s
1.48
s
10 3
10 5
Ǔ @ ǒ1 ) 1.85
s
10 6
Ǔ
@
The total open loop transfer function (from output voltage
sensing at the NCV891330 VOUT pin to output voltage) can
be modeled using the following equation:
1 ) ws
z
@
1 ) ws 1 )
p
1
s ) s2
w [email protected] p w n 2
With:
G L0 +
I OUT )
wz +
V OUT
@
[email protected] sw
1
R ESR(C
OUT)
ƪǒ
3.95
10 3
ƫ
Ǔ
6
1 ) 2.0 10 @L @ (1 * D) * 0.5
VIN*VOUT
@ C OUT
ǒ1 ) 2.0V *V10 @LǓ @ (1 * D) * 0.5
6
I OUT
wp +
)
V OUT @ C OUT
IN
OUT
L @ C OUT @ F sw
w n + p @ F sw
Qp +
p@
ƪǒ
1
Ǔ @ (1 * D) * 0.5ƫ
10 [email protected]
1 ) 2.0
V IN*V OUT
This equation is used in the design spreadsheet provided on the www.onsemi.com NCV891330 page.
www.onsemi.com
16
NCV891330
Bootstrap
voltages above 40 V are expected, EN should be tied to VIN
through a 10 kW resistor in order to limit the current flowing
into the overvoltage protection of the pin.
EN low induces a shutdown mode which shuts off the
regulator and minimizes its supply current to 9 mA typical by
disabling all functions.
Upon enabling, voltage is established at the DRV pin,
followed by a soft−start of the switching regulator output.
At the DRV pin an internal regulator provides a ground−
referenced voltage to an external capacitor (CDRV), to allow
fast recharge of the external bootstrap capacitor (CBST) used
to supply power to the power switch gate driver. If the
voltage at the DRV pin goes below the DRV UVLO
Threshold VDRVSTP, switching is inhibited and the
Soft−start circuit is reset, until the DRV pin voltage goes
back up above VDRVSTT.
The NCV891330 permanently monitors the bootstrap
capacitor, and always ensures it stays charged no matter
what the operating conditions are. As a result, the additional
charging current for the bootstrap capacitor may prevent the
regulator from entering Low−Iq mode at low input voltage.
Practically, the 5 V output version does not enter Low−Iq
mode for input voltages below 8 V, and the 3.8 V and 4 V
versions for input voltages below 6.5 V (see typical
characteristics curves for details).
Thermal Shutdown
A thermal shutdown circuit inhibits switching, resets the
Soft−start circuit, and removes DRV voltage if internal
temperature exceeds a safe level. Switching is automatically
restored when temperature returns to a safe level.
Exposed Pad
The exposed pad (EPAD) on the back of the package must
be electrically connected to the electrical ground (GND pin)
for proper, noise−free operation.
Enable
The NCV891330 is designed to accept either a logic level
signal or battery voltage as an Enable signal. However if
ORDERING INFORMATION
Device
Output
NCV891330PD50R2G
5.0 V
NCV891330PD40R2G
4.0 V
NCV891330PD38R2G
3.8 V
NCV891330PD33R2G
3.3 V
Package
Shipping
SOIC−8 EP
(Pb−Free)
2500 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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17
NCV891330
PACKAGE DIMENSIONS
SOIC−8 EP
CASE 751AC
ISSUE B
2X
NOTES:
1. DIMENSIONS AND TOLERANCING PER
ASME Y14.5M, 1994.
2. DIMENSIONS IN MILLIMETERS (ANGLES
IN DEGREES).
3. DIMENSION b DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE
0.08 MM TOTAL IN EXCESS OF THE “b”
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
4. DATUMS A AND B TO BE DETERMINED
AT DATUM PLANE H.
0.10 C A-B
D
8
E1
2X
0.10 C D
1
F
EXPOSED
PAD
5
ÉÉÉ
ÉÉÉ
PIN ONE
LOCATION
DETAIL A
D
A
5
8
G
E
4
4
0.20 C
e
1
BOTTOM VIEW
8X b
0.25 C A-B D
B
A
0.10 C
A2
b1
GAUGE
PLANE
0.10 C
L
SEATING
PLANE
C
ÇÇ
ÉÉ
ÉÉ
ÇÇ
ÉÉ
ÇÇ
ÉÉ
c
H
A
SIDE VIEW
A
END VIEW
TOP VIEW
8X
DIM
A
A1
A2
b
b1
c
c1
D
E
E1
e
L
L1
F
G
h
q
h
2X
A1
0.25
(L1)
DETAIL A
q
c1
(b)
MILLIMETERS
MIN
MAX
1.35
1.75
0.00
0.10
1.35
1.65
0.31
0.51
0.28
0.48
0.17
0.25
0.17
0.23
4.90 BSC
6.00 BSC
3.90 BSC
1.27 BSC
0.40
1.27
1.04 REF
2.24
3.20
1.55
2.51
0.25
0.50
0_
8_
SECTION A−A
SOLDERING FOOTPRINT
2.72
0.107
1.52
0.060
7.0
0.275
Exposed
Pad
4.0
0.155
2.03
0.08
0.6
0.024
1.270
0.050
SCALE 6:1
mm Ǔ
ǒinches
ON Semiconductor and the
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NCV891330/D