HWA3000 HWA Sound Source PCI Audio controller FEATURES . Full legacy audio compatibility in DOS and Windows games using QDSP legacy support through DDMA, PC/PCI, Serial IRQ . Hardware SRC( sample rate converter) with more than 20,000 volume level control for each digital input source . 20 voice FM Synthesizer, high resolution Game Port, MIDI, GPIO, EEPROM S/PDIP IN and OUT Port support . Hardware Volume control support . Full duplex operation support . PCI 2.1 BUS Master/Slave along with scatter and gather capability . Windows 95,98, Windows NT 4.0 and 5.0 (WDM) driver support with PC ‘98 and PC ‘99 Compliance and Software Wave Table Support . AC-link supports Multi Channel Audio output support with 18 bit resolution The HWA3000 is a PCI Audio controller using high performance QDSP Technology. The HWA3000 supports Legacy games and is a high quality audio solution for add-on and motherboard designs combined with QDSP software wave table and audio stations. The legacy audio compatibility is supported by DDMA, PC/PCI, and Serial IRQ solutions. Also, the HWA3000 controller supports multi-channel output support for different applications along with 20,000 level volume control and high quality 18 bit output data. The product includes the PCI Plug and Play function, FM synthesizer, and soft and hard ware wave table support capability to deliver true midi music. The HWA3000 is compliant with Microsoft’s PC98, PC99 audio requirements and Legacy audio support. The HWA3000 has two different package types to support dynamic customer requirements. DMA ENGINE & CONTROLLER MIXER with SRC CONTROL ENGINE AC97 CODEC AC LINK PCI INTERFACE PCI BUS FM , SB REGISTER CLOCK PLL HWA Sound Source Co., Ltd. JOYSTICK, MIDI, GPIO,S/PDIF,EEPROM INTERFACE Page 1/17 Nov. 30,1999(Rev 4.0) HWA3000 HWA Sound Source PCI Audio controller Overview The HWA3000 is a single, highly integrated, low cost PCI audio controller with Legacy game compatibility. The HWA3000 is partitioned into 4 functional blocks: PCI Interface, FM Synthesis, Audio system engine and peripheral interface. The PCI Interface provides a physical connection to the bus. Internally, the PCI interface has several smaller blocks to meet PCI specifications, such as PCI PnP, device configuration, DMA setting, interrupt handling, and Master/Target read/write operations. The PCI interface also contains base address registers, provided to set up the internal operation register and to execute chip operation. The FM Synthesis provides a full range of compatability for industrial standard FM based DOS games and other software. The HWA3000’s Legacy support and Windows Sound System support is further enhanced by the audio system engine to perform several key operations of DMA function and data transfer. The internal DMA block provides various dedicated hardware that perform data transfer, to and from the system memory, support simultaneous playback, record, and support modem interfacing. It also supports software wave table without having to use the OS to convert data. The dedicated wave table interface using DMA or a peripheral interface provides performance enhancements and advantages to deliver MIDI sound during other sound reproductions. HWA Sound Source Co., Ltd. The Legacy support provides an internal SB interface block to make DOS mode and Windows games compatible. The QDSP DDMA, PC/PCI, and serial IRQ interface provide Legacy I/O addresses and IRQ access to allow Legacy support in motherboard and add-in card designs. The Audio system block also provides a full range of sample rate converters and digital mixers to deliver high quality sound beyond today’s specification. It supports various types of data formats and multi-channel hardware volume controls. The digital mixer provides dedicated hardware, which uses QDSP sound products to perform superb sound reproduction and deliver real world sound generation without compromising the quality of the audio. It also provides a variety of output data structures to meet the next generation of AC97 codec specifications and capabilities. The peripheral interface provides an even further enhancement of the system using a hardware volume control interface, S/PDIF in and out interface, 128 level MIDI UART interface, high quality GAME port, General Purpose I/O port, EEPROM interface for variable system, subsystem support, and Multi-channel AC link. Page 2/17 Nov. 30,1999(Rev 4.0) HWA3000 HWA Sound Source PCI Audio controller Host Interface The HWA3000 host interface consists of three individual interface blocks that are I/O mapped into host address space. These interface blocks are located within the host 32-bit physical address space. The locations of the interface blocks are defined by the addresses programmed into the three base Address Registers in the PCI Configuration Space. The system’s Plug and Play BIOS sets up these base addresses. The Base Address 0 holds the Legacy audio configuration, control and status registers for the device. The Base Address 1 maps the AC97 link control register. The Base Address 2 maps the PCI Master control register. The PCI bus interface complies with the PCI Local Bus Specification. Below is a diagram which depicts the relationship between the Base Address Registers of the HWA3000 PCI Configuration Space and the host I/O map. Host Interface Base Address Registers Device PCI Configuration Space 00h Device ID / Vendor ID 04h Status / Command 08h Class Code / Revision 0Ch Misc. Control 10h Base Address Register 0 14h Base Address Register 1 18h Base Address Register 2 Legacy Audio control (I/O Mapped, 8byte) AC-Link control (I/O Mapped, 8byte) PCI Bus Master R/W control (I/O Mapped, 32byte) PCI bus interface The HWA3000 is a single function PCI device. Vendor ID There are two methods of loading the Subsystem ID and Subsystem Vendor ID. During power-up, When the external EEPROM mode is selected, the HWA3000 loads data from the external EEPROM. To minimize costs, the HWA3000 can load the Subsystem ID and Subsystem Vendor ID from internal ROM without using an external EEPROM. HWA Sound Source Co., Ltd. Page 3/20 Nov. 30,1999(Rev 4.0) HWA3000 HWA Sound Source PCI Audio controller PCI Configuration Register Summary Table Table 1: PCI Configuration Register Summary Host Config Address Host R/W Power-on Value Description 0x01~00 R 0x14AA Vendor ID 0x03~02 R 0x3000 Device ID 0x05~04 R/W 0x0000 PCI Command Register 0x07~06 R/W 0x0280 PCI Status Register 0x08 R 0x00 Revision ID Register 0x0B~09 R 0x040100 0x0C R 0x00 Cache Line Size Register (not implemented) 0x0D R/W 0x00 Latency Timer 0x0E R 0x00 Header Type 0x0F R 0x00 BIST (not implemented) 0x13~10 R/W 0x00000001 I/O Base Register 0 0x17~14 R/W 0x00000001 I/O Base Register 1 0x1B~18 R/W 0x00000001 I/O Base Register 2 0x2D~2C R 0x14AA Subsystem Vendor ID (Changeable by EEPROM) 0x2F~2E R 0x3000 Subsystem ID (Changeable by EEPROM) 0x34 R 0x00 Capabilities Pointer 0x3C R/W 0x00 Interrupt Line Register¹ 0x3D R 0x01 Interrupt Pin Register (INTA#) 0x3E R 0x05 Min Grant PCI Burst period 0x3F R 0x19 Max Latency PCI grand period R/W 0x907F 0x41~40 Class Code (multimedia audio device) Legacy Audio Control Table 1. PCI configuration register HWA Sound Source Co., Ltd. Page 4/17 Nov. 30,1999(Rev 4.0) HWA3000 HWA Sound Source PCI Audio controller Legacy Audio Address Map This section describes all the Legacy audio control registers supported by the HWA3000. • SB base: 0x220, 0x240 • OPL-3 base: 0x388 • Game base: 0x201 • MPU base: 0x300, 0x310, 0x320, 0x330 OPL-3 Host Offset R/W Width Description SB base + 0 R 8 Status read SB base + 0 W 8 Address bank0 write SB base + 2 W 8 Address bank1 write SB base + 1 SB base + 3 W 8 Data write SB base + 8 R 8 Status read SB base + 8 W 8 Address bank0 write SB base + 9 W 8 Data write OPL base + 0 R 8 Status read OPL base + 2 W 8 Address bank1 write OPL base + 1 OPL base + 3 W 8 Data write R/W Width SB base + 6 W 8 SB DSP reset SB base + A R 8 SB DSP read data port SB base + C W 8 SB DSP write data port SB base + C R 8 SB DSP write buffer status SB base + E R 8 SB DSP read buffer status SB Pro I/O Host Offset HWA Sound Source Co., Ltd. Description Page 5/17 Nov. 30,1999(Rev 4.0) HWA3000 HWA Sound Source PCI Audio controller SB Pro Mixer Host Offset R/W Width Description SB base + 4 W 8 SB mixer address port SB base + 5 R/W 8 SB mixer data port Host Offset R/W Width Game base + 0 R/W 8 R/W Width MPU base + 0 R/W 8 Data port MPU base + 1 R 8 Status port MPU base + 1 W 8 Command port Game Port Description Conventional game port MPU-401 Host Offset Description Table 2. Legacy Audio register map HWA Sound Source Co., Ltd. Page 6/17 Nov. 30,1999(Rev 4.0) HWA3000 HWA Sound Source EEPROM Interface The EEPROM configuration interface permits a connection of an optional external EEPROM device to provide power-up configuration information. Proper functionality is not dependent on the external EEPROM. Although, in some applications, power-up configuration settings other than the default values can be required to support specific Operating System compatibility requirements. Following a hardware reset, when the E2PSELECT pin is low, an internal state machine in the HWA3000 will detect the presence of an external EEPROM device. The data from the EEPROM is loaded into the Subsystem ID and Subsystem Vendor ID fields in the Configuration Space. The Vendor ID and Device ID are loaded in the Configuration Space as well. Software to read/write the EEPROM is provided by HWA Sound Source co., Ltd. In the case where an application does not need an external EEPROM, the EEPROM interface pin can use a general purpose in/out pin. The HWA3000 external EEPROM Interface. Support device : 93C46 Format : 8BIT BYTE ( ORG pin of EEPROM tied to GND) General Purpose I/O Pins To serve various functions dependent on the HWA3000 driver, seven pins are internally multiplexed. These pins are listed below: GPIO_0/E2PCS : EEPROM Chip select GPIO_1/E2PSK : EEPROM serial clock GPIO_2/E2PDI : EEPROM Data In GPIO_3/E2PDO : EEPROM Data Out GPIO_4/VOLUP : H/W volume up GPIO_5/VOLDOWN : H/W volume down GPIO_6/VOLMUTE : H/W volume mute HWA Sound Source Co., Ltd. PCI Audio controller OPL3 FM synthesis The HWA3000 includes FM synthesis hardware. This is useful for real DOS mode applications, due to the unavailability of software wavetable synthesis in this mode. FM is functionally compatible with the YAMAHA YMF262. MPU-401 interface This interface is compatible with the MPU-401 standard. It takes serial MIDI input on the RXD pin, converts it to 8-bit parallel data, and stores it in a 128 stage FIFO for retrieval by the host system. It also transmits parallel data from the host system to the TXD pin. The baud rate is 31250 bits per second. Game port (Joystick) Interface The game port supports industry standards with a 16 level speed selection function. Four “coordinate” channels and four “button” channels are supported by the game port. The “coordinate” channels provide game port positional information, and the “button” channels provide user button event information to the host. Hardware Volume Control The hardware volume control supports volume up, volume down and volume mute. VOL UP is for increasing volume, VOL DOWN is for decreasing volume, and VOL MUTE is for muting volume. In real DOS mode, the hardware volume control block can directly write volume data through the AC-link without the service interrupt routine. Each of these pins are shared as general purpose Input/Output. Page 7/17 Nov. 30,1999(Rev 4.0) HWA3000 HWA Sound Source PCI Audio controller 2 Zoomed Video Port (I S) SPDIF Interface The Zoomed Video port is a standard bus for the PC-Card (PCMCIA) that directly outputs a digital signal to be connected to a video or audio chip on the PC system. The ZV port format is generally referred to as I2C format. The Master clock is 384 x Fs or 256 x Fs. The HWA3000 does not use the ZV port master clock but rather reads the sample rate from a register set by the driver. The sample rate converter of the HWA3000 can accept data from the ZV port in the following sampling rates: 32K, 44.1K and 48K. The ZV Port data is sent through a sample rate converter and resampled at 48kHz before it is digitally mixed with the main audio signal. This mechanism is possible through a separate digital volume control. The HWA3000 also supports digital interfacing with the QS1000 hardware wavetable synthesis chip, by changing a register bit. Its timing diagram differs from that of the ZV port. The HWA3000 supports one transmitter and one receiver of the SPDIF(Sony/Philips Digital Interface). The transmitter supports two digital data output formats. One is for two-channel linearly represented digital audio data, and the other format is non-voice digital data. The function supporting non-voice digital data can carry Dolby AC-3 digital data from the host data memory, if the software for the DVD driver provides a digital data stream in host memory. The SPDIF receiver block can send digital data to host memory from external SPDIF equipment. This is especially useful when the data source is an external CD player or a DVD player. The signal diagram and pin names are shown below. QDSPCLK QDSPDATA 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 QDSPWS 15 14 13 12 11 10 9 8 7 6 5 Left channel Right channel Fig. 1 Zoomed Video port timing QDSPCLK QDSPDATA QDSPWS 15 14 13 12 11 10 9 8 7 6 5 4 3 2 Left channel 1 0 15 14 13 12 11 10 9 8 7 Right channel Fig. 2 Interface of the QS1000 hardware wavetable synthesis chip HWA Sound Source Co., Ltd. Page 8/17 Nov. 30,1999(Rev 4.0) HWA3000 HWA Sound Source PCI Audio controller AC-link interface DMA emulation The HWA3000 provides the AC-link interface with an AC’97 CODEC and can also connect multiple CODECs for multi-channel processing. When applications need a 4-channel voice play function, the HWA3000 can create two kinds of connections. One solution is to use multichannel CODECs like Sigmatel STMA9708. It has a 4 channel DAC. The other solution is using two CODECs with 2 channel DACs. It is compatible with multi-channel CODEC interfaces. The multi CODEC interface can control each CODEC volume separately. The HWA3000 AC-link can carry voice play data up to 6 channels. This means the HWA3000 can control difference voices and difference volumes for up to 6 speakers. The HWA3000 AC-link is comprised of 7 pins, which are described below. Distributed DMA interface HWA3000 provides the following registers to support DDMA. The HWA3000 supports 8-bit DMA transfers only. Address Base + 00h Base + 00h Base + 01h Base + 01h Base + 02h Base + 02h Base + 03h Base + 03h Base + 04h Base + 04h Base + 05h Base + 05h Base + 06h Base + 06h Base + 07h Base + 08h Base + 08h Base + 09h Base + 0ah Base + 0bh Base + 0ch Base + 0dh Base + 0eh Base + 0fh F24MOUT : 24MHz clock output. RSTOUTN : AC-Link reset output SYNCPAD : Sync output BITCLK : Bit clock input SDOUT : Serial data output SDINA : Primary CODEC data input SDINB : Secondary CODEC data input R/W W R W R W R W R W R W R W R N/A W R W N/A W N/A W N/A R/W Description Base Address 0 - 7 Current Address 0 - 7 Base Address 8 - 15 Current Address 8 - 15 Base Address 16 - 23 Current Address 16 - 23 Base Address 24 - 31 Current Address 24 - 31 Base Word counter 0 - 7 Current Word counter 0 - 7 Base Word counter 8 - 15 Current Word counter 8 - 15 Base Word counter 16 - 23 Current Word counter 16 - 23 Reserved Command Status Request Reserved Mode Reserved Master clear Reserved Multi-channel mask Table 3. DDMA register HWA Sound Source Co., Ltd. Page 9/17 Nov. 30,1999(Rev 4.0) HWA3000 HWA Sound Source PCI Audio controller PC/PCI interface The HWA3000 provides two signals, PREQ# and PGNT#, to detect the PC/PCI. The HWA3000 declares PCPCI# to being “high” using the PCICLK corresponding to the DMA channel it is going to use. Only 8-bit DMA channels are supported by the HWA3000. See Fig. 3 for the timing diagram. b2,b1,b0 000 001 010 011 100 101 110 111 PGNT# coding DMA channel 0 DMA channel 1 DMA channel 2 DMA channel 3 reserved DMA channel 5 DMA channel 6 DMA channel 7 Table 4. PC/PCI DMA channel number Serialized IRQ (SIRQ) In order to support PCI Plug and Play, the HWA3000 provides a serialized IRQ. The serialized IRQ is not a PCI standard pin. Designers route SIRQ to HWA3000 pin 85 directly. PCICLK PREQ# start CH0 CH1 CH2 CH3 CH4 CH5 CH6 CH7 PGNT# start bit0 bit1 bit2 Fig. 3 PC/PCI DMA Timing HWA Sound Source Co., Ltd. Page 10/17 Nov. 30,1999(Rev 4.0) DGND PCIAD24 PCICBEN3 PCIIDSEL PCIAD23 PCIAD22 PCIAD21 PCIAD20 PCIAD19 PCIAD18 PCIAD17 PCIAD16 PCICBEN2 DVDD DGND PCIFRAMEN PCIIRDYN PCITRDYN PCIDEVSEL PCISTOPN PCILOCKN PCIPERRN PCIPAR PCICBEN1 PCIAD15 PCIAD14 PCIAD13 PCIAD12 PCIAD11 DVDD AVDD TXD IJOY1X IJOY0X JOY1A JOY0A PCIINTAN PCIRSTN PCICLK PCIGNTN PCIREQN DGND DVDD PCIAD31 PCIAD30 PCIAD29 PCIAD28 PCIAD27 PCIAD26 PCIAD25 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 81 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 51 AGND IJOY1Y IJOY0Y JOY1B JOY0B RXD SDINBPAD F24MOUT SDOUTPAD BITCLKPAD SDINAPAD SYNCPAD RSTOUTN DGND DVDD MUTE VOLDN VOLUP QDSPDATA QDSPCLK QDSPWS XTALIN XTALOUT TEST0 SPDIFOUT SPDIFIN E2PSELECT GPIO0 GPIO1 GPIP2 HWA Sound Source 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 HWA Sound Source Co., Ltd. HWA3000 PCI Audio controller PIN configuration (100 QFP) HWA3000 100 QFP Page 11/17 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 1 31 GPIO3 SERIALIRQ PCIDMAGNT PCIDMAREQN DVDD PCIAD0 PCIAD1 PCIAD2 PCIAD3 PCIAD4 PCIAD5 DGND DVDD PCIAD6 PCIAD7 PCIAD8 PCICBEN0 PCIAD9 PCIAD10 DGND Nov. 30,1999(Rev 4.0) HWA3000 HWA Sound Source PCI Audio controller PIN description PCIFRAMEN : Cycle Frame, Sustained Tri-I/O This is driven by the current PCI bus master. Indicates the beginning and duration of a transaction. PCI Bus Interface PCICLK : PCI Bus Clock, In This is the PCI bus clock for timing all PCI transactions. All PCI synchronous signals are generated and sampled relative to the rising edge of this clock. PCIIRDYN : Initiator Ready, Sustained Tri-I/O This is driven by the current PCI bus master. Indicates that the initiator is ready to transmit or receive data (complete the current data phase). PCIRSTN : PCI Device Reset, In This is the PCI bus master reset. PCITRDYN : Target Ready, Sustained Tri-I/O This is driven by the current PCI bus master. Indicates that the initiator is ready to transmit or receive data (complete the current data phase). PCIGNTN : Master Grant, Tri I/O This is driven by the system arbiter to indicate that HWA3000 has control of the PCI bus. PCISTOPN : Target Ready, Sustained Tri-I/O This is driven by the current PCI bus master. Indicates a request to the master to stop the current transaction. PCIIDSEL : Initialize Device Select, In This is used as a chip select during PCI Configuration Space read and write cycles. PCIDEVSELN : Device Select, Sustained Tri-I/O This is driven by the PCI bus target device. Indicates that it has decoded the address of the current transaction as its own chip select range. PCIAD[31:0] : Address/Data Bus, Tri-State I/O Forms the multiplexed address/data bus for PCI interface. PCICBEN[3:0] : Command/Byte Enable Bus, Tri-State I/O Four pins constitute the multiplexed command / byte enable for the PCI interface. The cycle type is indicated by these pins during the address phase of a transaction. For the data phases of a transaction, active low byte enable information for the current data phase is indicated. During bus mastering operation, these pins are outputs, and during slave operation they are inputs. PCIPERRN : Parity Error, Sustained Tri-I/O This is used for reporting data parity errors on the PCI bus. PCIREQN : Master Request, Tri-State I/O This indicates to the system arbiter that the HWA3000 is requesting access to the PCI bus. This pin in high-impedance when PCIRSTN is active. PCIINTAN : Host Int. A, Open Drain Output This is the level triggered interrupt pin. Dedicated to servicing internal device interrupt sources. PCIPAR : Parity, Tri-State I/O Indicates even parity across PCIAD[31:0] and PCICBEN[3:0] for both addresses and data phases. The signal is delayed one PCI clock from either the address or data phase for which parity is generated. External Mix Control (GPIO) VOLUP (GPIO_4) : Volume Up Button, Tri-I/O (Schmitt), Double Bonding This is the volume up button control input. May also serve as a general purpose input if its primary function is unnecessary. If VOLDN is disconnected, it will be pulled to its inactive state due to the internal 20KΩ pullup resistor. HWA Sound Source Co., Ltd. VOLDN (GPIO_5) : Volume Down Button, Tri-I/O (Schmitt), Double Bonding This is the volume down button control input. May also serve as a general purpose input if its primary function is unnecessary. If VOLDN is disconnected, it will be pulled to its inactive state due to the internal 20KΩ pull-up resistor. Page 12/17 Nov. 30,1999(Rev 4.0) HWA3000 HWA Sound Source PCI Audio controller AC ‘97 Interface SYNCPAD : AC-Link Frame Sync, Output This is the framing clock for serial audio data. It is an output that indicates the 48KHz framing for the AC-Link. Induces a warm reset of the AC-Link when down. High : Slot 0 Low : Slot 1-12 PCISTOPN : Target Ready, Sustained Tri-I/O This is driven by the current PCI bus master to indicate a request to the master to stop the current transaction. SDINBPAD : Secondary Codec Data In, Input Serial data input from the Secondary Codec to the HWA3000 or general purpose input. Target is selected through the SPMC register. As a general purpose I/O pin, it also supports extended capability. If the pin is not in use, an external resistor of >=50KΩ attached to the ground. BITCLKPAD : AC-Link Bit Clock, Input This is the master timing clock for serial audio data. It is an input that drives the timing for the AC-Link interface. Provides the source clock for HWA3000. SDOUTPAD : AC-Link Data Out, Output This is the serial data output for HWA3000. It Provides a register interface and playback audio data Path to both Primary/Secondary Codecs. RSTOUTN : AC-Link Reset, Output This is the AC-Link and Codec reset pin. The pin acts as the logical OR of the PCI reset pin PCIRSTN. When low, it forces all Codecs attached to the ACLink into a cold reset mode. SDINAPAD : Primary Codec Data In, Input Serial data input from the Primary Codec to the HWA3000 for the purpose of register reads and capture of audio data streams. Game Port IJOY0X, IJOY0Y, IJOY1X, IJOY1Y : Joystick A and B X/Y Coordinates, I/O 4 axis coordinates for the joystick port. JOY0A, JOY0B, JOY1A, JOY1B : Joystick A and B Button Inputs, Input 4 button switches for the joystick port. GPIO / E2PROM Interface GPIO_2 (E2PDI) : EEPROM Data Line / PC/PCI Grant, I/O This is the data line for external serial EEPROM containing device configuration data for expansion card designs. In the presence of an external EEPROM, a 4.7KΩ pull-up resistor is required. This is the PC/PCI serialized grant input in motherboard designs using PC/PCI. Otherwise, this pin may be used as a general purpose input or open drain output. HWA Sound Source Co., Ltd. GPIO_3 (E2DO) : General Purpose Input/Output 3, I/O This is a general purpose I/O pin that is powered by the PCI power supply. Backward compatibility is possible as the pin powers up in a high impedance state. The remaining general purpose I/O must be tied high through its own 10KΩ resistor. Page 13/17 Nov. 30,1999(Rev 4.0) HWA3000 HWA Sound Source PCI Audio controller CHARACTERISTICS and SPECIFICATION Absolute Maximum ratings PARAMETER SYMBOL MIN MAX PCI_VDD A_VDD UNIT 4.2 4.2 V V DIGITAL INPUT VOLTAGE (note 1) Vdd+0.3 TOTAL POWER DISSIPATION (note 2) 1.0 W INPUT DC CURRENT PER PIN (note 3) 10 mA 50 mA OUTPUT DC CURRENT PER PIN V OPERATING AMBIENT TEMPERATURE (note 4) -50 125 C STORAGE TEMPERATURE -60 140 C ( PCI_GND=A_GND= 0 V) , all voltage ratings are respect to 0 V. NOTE 1. 2. 3. 4. The power supply is applied using recommend maximum value. The power generated by AC/DC output loading All the input pins except power supply pins. At ambient temperature, must be limited power. See recommended operating condition. RECOMMENED OPERATING CONDITION PARAMETER POWER SUPPLIES OPERATING AMBIENT TEMPERATURE SYMBOL MIN TYP PCI_VDD A_VDD 3.0 3.0 3.3 3.3 3.6 3.6 V V 0 25 70 V Ta MAX UNIT WARING: Operation beyond these conditions may result in permanent damage to device. ( PCI_GND=A_GND= 0 V) , all voltage ratings are respect to 0 V HWA Sound Source Co., Ltd. Page 14/17 Nov. 30,1999(Rev 4.0) HWA3000 HWA Sound Source PCI Audio controller Electrical Characteristics Absolute Maximum Rating Item Power Supply Voltage Input Voltage Operating Ambient Temperature Storage Temperature Symbol VDD Vin Top Tstg Rating -0.3 --- 7.0 -0.3 --- VDD+0.3 0 -- 70 -50 -- 125 Unit V V C C Recommended Operating Condition Item Power Supply Voltage Operating Ambient Temperature Symbol VDD Top Min. 4.75 0 Typ. 5.0 25 Max. 5.25 70 Unit V C DC Characteristics Item Symbol High Level Input Voltage (CMOS) except Joy0X,0Y,1X,1Y Vih Low Level Input Voltage(CMOS) except Joy0X,0Y,1X,1Y Vil High Level Input Voltage (Joy0X,0Y,1X,1Y) Low Level Input Voltage (Joy0X,0Y,1X,1Y) High Level Input Voltage (TTL) Low Level Input Voltage(TTL) Input High Leakage Current Input Low Leakage Current High Level Output Voltage(CMOS) Low Level Output Voltage(CMOS) High Level Output Voltage(TTL) Low Level Output Voltage(TTL) Input Pin Capacitance Clock Pin Capacitance IDSEL Pin Capacitance HWA Sound Source Co., Ltd. Vih Vil Vih Vil Iih Iil Voh Vol Voh Vol Cin Cclk Cidsel Condition Min. Typ. Max. 2.5 V 1.5 2.0 0.4 10 -10 Ioh = -4mA Iol= 4mA Ioh = -4mA Iol= 4mA 4.0 0.4 4.0 5 5 5 Page 15/17 Unit 0.4 15 15 15 V V V V V uA uA V V V V pF pF pF Nov. 30,1999(Rev 4.0) HWA3000 HWA Sound Source PCI Audio controller Mechanical Packages 100 PQFP, Plastic Quad Flat Package Bd A C Cd B E Symbol A B Bd C Cd E HWA Sound Source Co., Ltd. Min. 2.57 19.90 23.00 13.90 17.00 Millimeter Nom. 2.72 20.00 23.20 14.00 17.20 0.65 Max. 2.87 20.10 23.40 14.10 17.40 Min. 0.101 0.783 0.905 0.547 0.669 Inch Nom. 0.107 0.787 0.913 0.551 0.677 0.026 Page 16/17 Max. 0.113 0.791 0.921 0.555 0.685 Nov. 30,1999(Rev 4.0) HWA3000 HWA Sound Source PCI Audio controller HWA Sound Source co., Ltd. reserves the right to make changes to any information here in at any time without notice. The information, diagrams, and other data in this manual are correct and reliable; however, HWA Sound Source co., Ltd. is no way responsible for any violations of patents or other rights of the third party generated by the use of this manual. HWA Sound Source Co., Ltd. Page 17/17 Nov. 30,1999(Rev 4.0)