AT940

POSEICO SPA
Via Pillea 42-44, 16153 Genova - ITALY
Tel. + 39 010 8599400 - Fax + 39 010 8682006
Sales Office:
Tel. + 39 010 8599400 - Fax + 39 010 8681180
PHASE CONTROL THYRISTOR
AT940
Repetitive voltage up to
Mean on-state current
Surge current
2900 V
4687 A
75 kA
FINAL SPECIFICATION
Apr. 14 - Issue: 5A
Symbol
Characteristic
Tj
[°C]
Conditions
Value
Unit
BLOCKING
V
RRM
Repetitive peak reverse voltage
125
2900
V
V
RSM
Non-repetitive peak reverse voltage
125
3000
V
V
DRM
Repetitive peak off-state voltage
125
2900
V
I
RRM
Repetitive peak reverse current
V=VRRM
125
300
mA
I
DRM
Repetitive peak off-state current
V=VDRM
125
300
mA
I
T (AV)
Mean on-state current
180° sin, 50 Hz, Th=55°C, double side cooled
4687
A
I
T (AV)
Mean on-state current
180° sin, 50 Hz, Tc=85°C, double side cooled
3638
A
I
TSM
CONDUCTING
Surge on-state current
sine wave, 10 ms
I² t
I² t
without reverse voltage
V
T
On-state voltage
On-state current =
V
T(TO)
Threshold voltage
125
1,00
V
T
On-state slope resistance
125
0,070
mohm
r
125
75,0
28125 x1E3
7500 A
25
1,55
kA
A²s
V
SWITCHING
di/dt
Critical rate of rise of on-state current, min.
From 75% VDRM, gate 10V 5ohm
125
200
A/µs
dv/dt
Critical rate of rise of off-state voltage, min.
Linear ramp up to 70% of VDRM
125
1000
V/µs
td
Gate controlled delay time, typical
VD=100V, gate source 10V, 10 ohm , tr=5 µs
25
tq
Circuit commutated turn-off time, typical
dv/dt = 20 V/µs linear up to 75% VDRM
Q RR
Reverse recovery charge
di/dt=-20 A/µs, I= 2150 A
.
µs
500
125 .
µs
µC
I
RR
Peak reverse recovery current
VR= 50 V
I
H
Holding current, typical
VD=5V, gate open circuit
25
.
500
mA
A
I
L
Latching current, typical
VD=12V, tp=30µs
25
1000
mA
GATE
V
GT
Gate trigger voltage
VD=12V
25
3,5
V
I
GT
Gate trigger current
VD=12V
25
400
mA
VD=VDRM
125
V
GD
Non-trigger gate voltage, min.
0,25
V
V
FGM
Peak gate voltage (forward)
10
V
I
FGM
Peak gate current
10
A
V
RGM
Peak gate voltage (reverse)
P
GM
Peak gate power dissipation
P
G
Average gate power dissipation
R
th(j-c)
Thermal impedance, DC
Junction to case, double side cooled
R
th(c-h)
Thermal impedance
Case to heatsink, double side cooled
T
F
j
Operating junction temperature
Mounting force
Mass
Pulse width 100 µs
10
V
150
W
3
W
MOUNTING
°C/kW
1,5
°C/kW
-30 / 125
80/ 100
3000
ORDERING INFORMATION : AT940 S 29
standard specification
6,0
VDRM&VRRM/100
Page 1 of 6
°C
kN
g
AT940 PHASE CONTROL THYRISTOR
FINAL SPECIFICATION
Apr. 14 - Issue: 5A
DISSIPATION CHARACTERISTICS
SQUARE WAVE
Th [°C]
130
120
110
100
90
80
70
60
30°
50
60°
90°
120°
180°
DC
40
0
1000
2000
3000
4000
5000
6000
7000
IF(AV) [A]
PF(AV) [W]
10000
DC
180°
9000
90°
8000
120°
60°
30°
7000
6000
5000
4000
3000
2000
1000
0
0
1000
2000
3000
4000
IF(AV) [A]
Page 2 of 6
5000
6000
7000
AT940 PHASE CONTROL THYRISTOR
FINAL SPECIFICATION
Apr. 14 - Issue: 5A
DISSIPATION CHARACTERISTICS
SINE WAVE
Th [°C]
130
120
110
100
90
80
70
60
60°
30°
50
90°
120°
180°
40
0
1000
2000
3000
4000
5000
IF(AV) [A]
PF(AV) [W]
9000
90°
8000
120°
180°
60°
7000
30°
6000
5000
4000
3000
2000
1000
0
0
1000
2000
3000
IF(AV) [A]
Page 3 of 6
4000
5000
AT940 PHASE CONTROL THYRISTOR
Apr. 14 - Issue: 5A
Qrr [µC]
REVERSE RECOVERY CHARGE
Tj = 125°C - IT = 3000 A
di/dt [A/µs]
REVERSE RECOVERY CURRENT
Tj = 125°C - IT = 3000 A
Irr [A]
FINAL SPECIFICATION
di/dt [A/µs]
Page 4 of 6
AT940 PHASE CONTROL THYRISTOR
FINAL SPECIFICATION
Apr. 14 - Issue: 5A
SURGE CHARACTERISTIC
Tj = 125 °C
16000
80
14000
70
12000
60
10000
50
ITSM [kA]
On-state Current [A]
ON-STATE CHARACTERISTIC
Tj = 125 °C
8000
6000
40
30
4000
20
2000
10
0
0
0,6
1,1
1,6
2,1
On-state Voltage [V]
1
10
100
n° cycles
TRANSIENT THERMAL IMPEDANCE
DOUBLE SIDE COOLED
7
Wave
6
Square
Sine
°180
0,39
0,75
∆Rth [°K/kW]
°120
°90
°60
0,71
1,01
1,52
1,06
1,59
2,61
°30
2,54
4,04
Zth j-c [°C/kW]
5
4
3
2
1
0
0,0001
0,01
1
100
t[s]

ℎ −  =
 ∗ 1 − 
−


=1
i
Ai [°C/kW]
1
2,738
2
1,779
3
1,186
4
0,297
τi [s]
2,4
1,70
0,16
0,001
Cathode terminal type DIN 46244 - A 4.8 - 0.8
Gate terminal type AMP 60598 - 1
Distributed by
All the characteristics given in this data sheet are guaranteed only with uniform
clamping force, cleaned and lubricated heatsink, surfaces with flatness < .03 mm
and roughness < 2 µm.
In the interest of product improvement POSEICO SpA reserves the right to change
any data given in this data sheet at any time without previous notice.
If not stated otherwise the maximum value of ratings (simbols over shaded
background) and characteristics is reported.
Page 5 of 6
AT940 PHASE CONTROL THYRISTOR
FINAL SPECIFICATION
Annex
Apr. 14 - Issue: 5A
TRANSIENT THERMAL IMPEDANCE
DOUBLE SIDE COOLED
8
7
Zth j-h [°C/kW]
6
5
4
3
2
1
0
0,0001
0,001
0,01
0,1
1
10
100
t[s]

ℎ −ℎ  =
 ∗ 1 − 
−


=1
i
Ai [°C/kW]
1
4,320
2
1,701
3
1,183
4
0,296
τi [s]
3,400
1,800
0,160
0,001
Note:
This Zth j-h (t) curve takes into account of a contact thermal resistance value Rth c-h = 1,5 °C/kW.
Mounting recommendations must be followed in order to match the specified contact thermal resistance value.
Page 6 of 6